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X-OriginatorOrg: axis.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 May 2024 15:40:22.5173 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 04b25538-6cf9-42b1-9253-08dc7f2c7ca0 X-MS-Exchange-CrossTenant-Id: 78703d3c-b907-432f-b066-88f7af9ca3af X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=78703d3c-b907-432f-b066-88f7af9ca3af;Ip=[195.60.68.100];Helo=[mail.axis.com] X-MS-Exchange-CrossTenant-AuthSource: DB1PEPF000509FF.eurprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR02MB6617 Fix the description for the ti,dmdin-gpio1 and ti,dmclk-gpio2 properties to correctly describe that when configured as general purpose outputs (ADC3XXX_GPIO_GPO), the pins are available via the GPIO framework. Signed-off-by: Ricard Wanderlof Reviewed-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) --- base-commit: 47d09270d7776e46858a161f94b735640b2fb056 change-id: 20240528-tlv320adc3xxx-dt-gpio-fix-a3384e435148 Best regards, diff --git a/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml b/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml index ede14ca2c07a..8ac741f4cd56 100644 --- a/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml +++ b/Documentation/devicetree/bindings/sound/ti,tlv320adc3xxx.yaml @@ -58,8 +58,8 @@ properties: description: | Configuration for DMDIN/GPIO1 pin. - When ADC3XXX_GPIO_GPO is configured, this causes corresponding the - ALSA control "GPIOx Output" to appear, as a switch control. + When ADC3XXX_GPIO_GPO is selected, the pin may be controlled via the + GPIO framework, as pin number 0 on the device. ti,dmclk-gpio2: $ref: /schemas/types.yaml#/definitions/uint32 @@ -76,8 +76,8 @@ properties: description: | Configuration for DMCLK/GPIO2 pin. - When ADC3XXX_GPIO_GPO is configured, this causes corresponding the - ALSA control "GPIOx Output" to appear, as a switch control. + When ADC3XXX_GPIO_GPO is selected, the pin may be controlled via the + GPIO framework, as pin number 1 on the device. Note that there is currently no support for reading the GPIO pins as inputs.