From patchwork Wed May 29 09:29:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13678514 X-Patchwork-Delegate: geert@linux-m68k.org Received: from weierstrass.telenet-ops.be (weierstrass.telenet-ops.be [195.130.137.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5ED22176FA3 for ; Wed, 29 May 2024 09:29:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.130.137.81 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716974992; cv=none; b=r4Q6BDu1dfoux5RWKqiflrIL543rfshlpaPlDXOdEP/RrDlyr2REEBG0A3t+e683/bqoWWx2v3e2dtOM7OCHXMxLMBL3DSS00zZVv0F8cHtp64M6BZcYoh4Zmzm/8XcRANJV3Z+i5cP3EJHlgLiuQGt1D+hujI7MunmN80YE/hg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716974992; c=relaxed/simple; bh=K9JbpboeEVGszs4uTMo3Rfibhk0VjLLtBuNKn9PsLKY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=qjM54ziJevHpb7IV4jnaZojj63TNVIt7J86t1t85odf5KPxNW/R87oBYPDRPqnBj+2MS2P2Xn3lUfNDyqpEHwh5zwYBUEgLtK/AiS78OEb2dxOgHClQHFJdDxZqAFgS4bkrfDXKTM3M5Bq9357k3267pkKwvITu0NGuG4+Z7UqA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be; spf=none smtp.mailfrom=linux-m68k.org; arc=none smtp.client-ip=195.130.137.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from baptiste.telenet-ops.be (baptiste.telenet-ops.be [IPv6:2a02:1800:120:4::f00:13]) by weierstrass.telenet-ops.be (Postfix) with ESMTPS id 4Vq3xg2K6yz4wydC for ; Wed, 29 May 2024 11:29:43 +0200 (CEST) Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed80:1b01:1838:131c:4de4]) by baptiste.telenet-ops.be with bizsmtp id UxVg2C00g3VPV9V01xVgkh; Wed, 29 May 2024 11:29:43 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1sCFbt-00GHKZ-Vo; Wed, 29 May 2024 11:29:40 +0200 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1sCFcq-008wRu-Cd; Wed, 29 May 2024 11:29:40 +0200 From: Geert Uytterhoeven To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Linus Walleij , Yoshihiro Shimoda Cc: devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v2 1/8] dt-bindings: fuse: Document R-Car E-FUSE / PFC Date: Wed, 29 May 2024 11:29:30 +0200 Message-Id: <03e43e97941df238ef1a618852aecd7be68adbb0.1716974502.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Document support for E-FUSE non-volatile memory accessible through PFC on R-Car V3U and S4-8. Signed-off-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda Reviewed-by: Rob Herring (Arm) --- v2: - Add Reviewed-by. --- .../bindings/fuse/renesas,rcar-efuse.yaml | 55 +++++++++++++++++++ 1 file changed, 55 insertions(+) create mode 100644 Documentation/devicetree/bindings/fuse/renesas,rcar-efuse.yaml diff --git a/Documentation/devicetree/bindings/fuse/renesas,rcar-efuse.yaml b/Documentation/devicetree/bindings/fuse/renesas,rcar-efuse.yaml new file mode 100644 index 0000000000000000..d7e289244e72cce1 --- /dev/null +++ b/Documentation/devicetree/bindings/fuse/renesas,rcar-efuse.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fuse/renesas,rcar-efuse.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: R-Car E-FUSE connected to PFC + +maintainers: + - Geert Uytterhoeven + +description: + The E-FUSE is a type of non-volatile memory, which is accessible through the + Pin Function Controller (PFC) on some R-Car Gen4 SoCs. + +properties: + compatible: + enum: + - renesas,r8a779a0-efuse # R-Car V3U + - renesas,r8a779f0-efuse # R-Car S4-8 + + reg: + maxItems: 1 + description: PFC System Group Fuse Control and Monitor register block + + clocks: + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - power-domains + - resets + +additionalProperties: false + +examples: + - | + #include + #include + + fuse: fuse@e6078800 { + compatible = "renesas,r8a779a0-efuse"; + reg = <0xe6078800 0x100>; + clocks = <&cpg CPG_MOD 916>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 916>; + }; From patchwork Wed May 29 09:29:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13678510 X-Patchwork-Delegate: geert@linux-m68k.org Received: from baptiste.telenet-ops.be (baptiste.telenet-ops.be [195.130.132.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 02B0D16A373 for ; Wed, 29 May 2024 09:29:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.130.132.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716974987; cv=none; b=KxsUOARPc36cTN7MbaPC0sGH5yIW1yBZWuxTlgXZ/eXkM0SMsO+FU7uBAoHQxC7kKGCnrXDZI9JMCZ5PabFsn9IHd3KCRUgEQR6W8RhLhtw8hwAyeIiSLKhjGcE41XptUv90wo9E8WnToxUhvRthGKGNdOdgwRQh20RdEiggg1Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716974987; c=relaxed/simple; bh=Fimg7RAC7/UiTVwu8Mu0fP7Gwstf2zrA/lN7Pjti7Oc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=t89/apKAXr+wlntQ0NZ1z8uOl91jailZHcjLZ9GrOnzffPzHsIVmQ+tgGFGrWqG4cZxgt9/FK3TSNvuGaVIvWcDX/Qsr6jh4xJyREAmRVQANwLHWf1GuZBo+5IFFeXOxi0wofuGdd/YB8u56tYshmM2Cl8nDVXuE0fN+Yjx5/bY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be; spf=none smtp.mailfrom=linux-m68k.org; arc=none smtp.client-ip=195.130.132.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed80:1b01:1838:131c:4de4]) by baptiste.telenet-ops.be with bizsmtp id UxVg2C00i3VPV9V01xVgkg; Wed, 29 May 2024 11:29:43 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1sCFbt-00GHKc-WE; Wed, 29 May 2024 11:29:40 +0200 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1sCFcq-008wRx-DK; Wed, 29 May 2024 11:29:40 +0200 From: Geert Uytterhoeven To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Linus Walleij , Yoshihiro Shimoda Cc: devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v2 2/8] dt-bindings: fuse: Document R-Car E-FUSE / OTP_MEM Date: Wed, 29 May 2024 11:29:31 +0200 Message-Id: <436506babe4ce468fda19380d9373470468e3752.1716974502.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Document support for E-FUSE non-volatile memory accessible through OTP_MEM on R-Car V4H and V4M. Signed-off-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda Reviewed-by: Rob Herring (Arm) --- v2: - Add Reviewed-by. --- .../bindings/fuse/renesas,rcar-otp.yaml | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 Documentation/devicetree/bindings/fuse/renesas,rcar-otp.yaml diff --git a/Documentation/devicetree/bindings/fuse/renesas,rcar-otp.yaml b/Documentation/devicetree/bindings/fuse/renesas,rcar-otp.yaml new file mode 100644 index 0000000000000000..d74872ae9ff378f9 --- /dev/null +++ b/Documentation/devicetree/bindings/fuse/renesas,rcar-otp.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/fuse/renesas,rcar-otp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: R-Car E-FUSE connected to OTP_MEM + +maintainers: + - Geert Uytterhoeven + +description: + The E-FUSE is a type of non-volatile memory, which is accessible through the + One-Time Programmable Memory (OTP_MEM) module on some R-Car Gen4 SoCs. + +properties: + compatible: + enum: + - renesas,r8a779g0-otp # R-CarV4H + - renesas,r8a779h0-otp # R-CarV4M + + reg: + items: + - description: OTP_MEM_0 + - description: OTP_MEM_1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + otp: otp@e61be000 { + compatible = "renesas,r8a779g0-otp"; + reg = <0xe61be000 0x1000>, <0xe61bf000 0x1000>; + }; From patchwork Wed May 29 09:29:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13678512 X-Patchwork-Delegate: geert@linux-m68k.org Received: from albert.telenet-ops.be (albert.telenet-ops.be [195.130.137.90]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DFD8216A363 for ; Wed, 29 May 2024 09:29:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.130.137.90 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716974988; cv=none; b=Stq9j4Wwu5rkVkcSyC+UDULG3IEgIQdCwnWlOsKLxtonrbgCUzx3iJqO8kD5clvvzH/5lVcYiaICNVVCrpcUYcR8xh9wXiiSjTLsXgpJxcWI+wbAxJP25DH/UAnAiqEZzKlDcwA/0rjPT4Fjo8zzs9kNtSbK6pip+9Co6kCQHH4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716974988; c=relaxed/simple; bh=8Vj2KXMLjW6yLYPbVR9bwxmDWAE3IVEg5kHIPrLC1Zg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=azul7dLAo3A22j7Xp0iKuiUQr1foCN6l1bMkarMMUxVoaIFp8gPGz1XSDc5m8IyXWBIfR8VubrEiml9brZM77ssXf/5tmNy20Ty81s9oKwMk7N5vac/iWyIKl+anss4tjAisOXfL/yO8UmcQijqkrBsc9N1sn+ehXbXk39oaihc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be; spf=none smtp.mailfrom=linux-m68k.org; arc=none smtp.client-ip=195.130.137.90 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed80:1b01:1838:131c:4de4]) by albert.telenet-ops.be with bizsmtp id UxVg2C00H3VPV9V06xVglN; Wed, 29 May 2024 11:29:43 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1sCFbu-00GHKd-0W; Wed, 29 May 2024 11:29:40 +0200 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1sCFcq-008wS2-Dz; Wed, 29 May 2024 11:29:40 +0200 From: Geert Uytterhoeven To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Linus Walleij , Yoshihiro Shimoda Cc: devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v2 3/8] soc: renesas: Add R-Car fuse driver Date: Wed, 29 May 2024 11:29:32 +0200 Message-Id: <7f58556cc1187ddd305935c8452e03c26949ce95.1716974502.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 R-Car Gen3/Gen4 SoCs contain fuses indicating hardware support or hardware parameters. Add a driver to access the state of the fuses. This supports three type of hardware fuse provides: 1. E-FUSE non-volatile memory accessible through the Pin Function Controller on R-Car V3U and S4-8, 2. E-FUSE non-volatile memory accessible through OTP_MEM on R-Car V4H and V4M, 3. Fuses tightly integrated with the Pin Function Controller on R-Car Gen3 SoCs. Types 1 and 2 use hardware descriptions in DT. Type 3 relies on a platform device with accompanying platform data, to be provided by the PFC driver. Two APIs are provided to read the state of the fuses: - An kernelspace API (rcar_fuse_read()), to be used by e.g. the Renesas UFSHCD driver, Symbolic register indices are provided for convenience. - A userspace API, using the NVMEM framework. Signed-off-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda --- v2: - Add Reviewed-by. Questions: - Should the NVMEM support be made optional, relaxing the dependency on NVMEM? - Currently, the NVMEM access is restricted to the root user. Should his be relaxed? - On R-Car S4, the full space from RCAR_FUSE_MON0 to RCAR_LTM0_MON2 is exposed. Should this be split into separate blocks? --- drivers/soc/renesas/Kconfig | 8 + drivers/soc/renesas/Makefile | 1 + drivers/soc/renesas/rcar-fuse.c | 201 ++++++++++++++++++++++++ include/linux/platform_data/rcar_fuse.h | 11 ++ include/linux/soc/renesas/rcar-fuse.h | 41 +++++ 5 files changed, 262 insertions(+) create mode 100644 drivers/soc/renesas/rcar-fuse.c create mode 100644 include/linux/platform_data/rcar_fuse.h create mode 100644 include/linux/soc/renesas/rcar-fuse.h diff --git a/drivers/soc/renesas/Kconfig b/drivers/soc/renesas/Kconfig index 3125ab575b60b8d1..13aadcf1dec7b8b8 100644 --- a/drivers/soc/renesas/Kconfig +++ b/drivers/soc/renesas/Kconfig @@ -376,6 +376,14 @@ config ARCH_R9A07G043 endif # RISCV +config FUSE_RCAR + tristate "R-Car Fuse support" + depends on (ARCH_RENESAS && ARM64) || COMPILE_TEST + depends on NVMEM + help + Enable support for reading the fuses in the PFC, E-FUSE or OTP + non-volatile memory block on R-Car Gen3/Gen4 SoCs. + config PWC_RZV2M bool "Renesas RZ/V2M PWC support" if COMPILE_TEST diff --git a/drivers/soc/renesas/Makefile b/drivers/soc/renesas/Makefile index 725eedd9d73ceae7..8ff382a82ac94496 100644 --- a/drivers/soc/renesas/Makefile +++ b/drivers/soc/renesas/Makefile @@ -8,5 +8,6 @@ obj-$(CONFIG_ARCH_R9A06G032) += r9a06g032-smp.o endif # Family +obj-$(CONFIG_FUSE_RCAR) += rcar-fuse.o obj-$(CONFIG_PWC_RZV2M) += pwc-rzv2m.o obj-$(CONFIG_RST_RCAR) += rcar-rst.o diff --git a/drivers/soc/renesas/rcar-fuse.c b/drivers/soc/renesas/rcar-fuse.c new file mode 100644 index 0000000000000000..8fb2374f919b83e5 --- /dev/null +++ b/drivers/soc/renesas/rcar-fuse.c @@ -0,0 +1,201 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * R-Car Gen3/Gen4 E-FUSE/OTP Driver + * + * Copyright (C) 2024 Glider bv + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct rcar_fuse { + struct device *dev; + void __iomem *base; + unsigned int offset; + unsigned int nregs; + struct nvmem_device *nvmem; +}; + +struct rcar_fuse_data { + unsigned int bank; /* 0: PFC + E-FUSE, 1: OPT_MEM + E-FUSE */ + unsigned int offset; + unsigned int nregs; +}; + +/* NVMEM access must not use the rcar_fuse singleton */ +static int rcar_fuse_nvmem_read(void *priv, unsigned int offset, void *val, + size_t bytes) +{ + struct rcar_fuse *fuse = priv; + u32 *buf = val; + int ret; + + ret = pm_runtime_resume_and_get(fuse->dev); + if (ret < 0) + return ret; + + for (; bytes >= 4; bytes -= 4, offset += 4) + *buf++ = readl(fuse->base + fuse->offset + offset); + + pm_runtime_put(fuse->dev); + + return 0; +} + +static struct rcar_fuse *rcar_fuse; +static DEFINE_MUTEX(rcar_fuse_lock); /* Protects rcar_fuse singleton */ + +int rcar_fuse_read(unsigned int idx, u32 *val) +{ + int ret; + + guard(mutex)(&rcar_fuse_lock); + + if (!rcar_fuse) + return -EPROBE_DEFER; + + if (idx >= rcar_fuse->nregs) + return -EINVAL; + + ret = pm_runtime_resume_and_get(rcar_fuse->dev); + if (ret < 0) + return ret; + + *val = readl(rcar_fuse->base + rcar_fuse->offset + idx * sizeof(u32)); + + pm_runtime_put(rcar_fuse->dev); + + return 0; +} +EXPORT_SYMBOL_GPL(rcar_fuse_read); + +static int rcar_fuse_probe(struct platform_device *pdev) +{ + const struct rcar_fuse_platform_data *pdata; + const struct rcar_fuse_data *data; + struct device *dev = &pdev->dev; + struct nvmem_config nvmem; + struct rcar_fuse *fuse; + int ret; + + guard(mutex)(&rcar_fuse_lock); + + if (rcar_fuse) + return -EEXIST; + + ret = devm_pm_runtime_enable(dev); + if (ret < 0) + return ret; + + fuse = devm_kzalloc(dev, sizeof(*fuse), GFP_KERNEL); + if (!fuse) + return -ENOMEM; + + fuse->dev = dev; + + data = device_get_match_data(dev); + if (!data) { + /* Fuse block integrated into PFC */ + pdata = dev->platform_data; + if (!pdata) + return -EINVAL; + + fuse->base = pdata->base; + fuse->offset = pdata->offset; + fuse->nregs = pdata->nregs; + } else { + /* PFC + E-FUSE or OTP_MEM + E-FUSE */ + fuse->base = devm_platform_ioremap_resource(pdev, data->bank); + if (IS_ERR(fuse->base)) + return PTR_ERR(fuse->base); + + fuse->offset = data->offset; + fuse->nregs = data->nregs; + }; + + memset(&nvmem, 0, sizeof(nvmem)); + nvmem.dev = dev; + nvmem.name = "fuse"; + nvmem.id = -1; + nvmem.owner = THIS_MODULE; + nvmem.type = NVMEM_TYPE_OTP; + nvmem.read_only = true; + nvmem.root_only = true; + nvmem.reg_read = rcar_fuse_nvmem_read; + nvmem.size = fuse->nregs * 4; + nvmem.word_size = 4; + nvmem.stride = 4; + nvmem.priv = fuse; + + fuse->nvmem = devm_nvmem_register(dev, &nvmem); + if (IS_ERR(fuse->nvmem)) + return dev_err_probe(dev, PTR_ERR(fuse->nvmem), + "failed to register NVMEM device\n"); + + rcar_fuse = fuse; + + return 0; +} + +static void rcar_fuse_remove(struct platform_device *pdev) +{ + guard(mutex)(&rcar_fuse_lock); + + rcar_fuse = NULL; +} + +static const struct rcar_fuse_data rcar_fuse_v3u = { + .bank = 0, + .offset = 0xc0, + .nregs = 10, +}; + +static const struct rcar_fuse_data rcar_fuse_s4 = { + .bank = 0, + .offset = 0xc0, + .nregs = 35, +}; + +static const struct rcar_fuse_data rcar_fuse_v4h = { + .bank = 1, + .offset = 0x100, + .nregs = 40 +}; + +static const struct rcar_fuse_data rcar_fuse_v4m = { + .bank = 1, + .offset = 0x100, + .nregs = 4, +}; + +static const struct of_device_id rcar_fuse_match[] = { + { .compatible = "renesas,r8a779a0-efuse", .data = &rcar_fuse_v3u }, + { .compatible = "renesas,r8a779f0-efuse", .data = &rcar_fuse_s4 }, + { .compatible = "renesas,r8a779g0-otp", .data = &rcar_fuse_v4h }, + { .compatible = "renesas,r8a779h0-otp", .data = &rcar_fuse_v4m }, + { /* sentinel */ } +}; + +static struct platform_driver rcar_fuse_driver = { + .probe = rcar_fuse_probe, + .remove_new = rcar_fuse_remove, + .driver = { + .name = "rcar_fuse", + .of_match_table = rcar_fuse_match, + }, +}; +module_platform_driver(rcar_fuse_driver); + +MODULE_DESCRIPTION("Renesas R-Car E-FUSE/OTP driver"); +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Geert Uytterhoeven"); diff --git a/include/linux/platform_data/rcar_fuse.h b/include/linux/platform_data/rcar_fuse.h new file mode 100644 index 0000000000000000..07933336b5f4e668 --- /dev/null +++ b/include/linux/platform_data/rcar_fuse.h @@ -0,0 +1,11 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef __LINUX_PLATFORM_DATA_RCAR_FUSE_H__ +#define __LINUX_PLATFORM_DATA_RCAR_FUSE_H__ + +struct rcar_fuse_platform_data { + void __iomem *base; + unsigned int offset; + unsigned int nregs; +}; + +#endif /* __LINUX_PLATFORM_DATA_RCAR_FUSE_H__ */ diff --git a/include/linux/soc/renesas/rcar-fuse.h b/include/linux/soc/renesas/rcar-fuse.h new file mode 100644 index 0000000000000000..37fc23ef74057066 --- /dev/null +++ b/include/linux/soc/renesas/rcar-fuse.h @@ -0,0 +1,41 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef __LINUX_SOC_RENESAS_RCAR_FUSE_H__ +#define __LINUX_SOC_RENESAS_RCAR_FUSE_H__ + +#define RCAR_FUSE_MON0 0 +#define RCAR_FUSE_MON1 1 +#define RCAR_FUSE_MON2 2 +#define RCAR_FUSE_MON3 3 +#define RCAR_FUSE_MON4 4 +#define RCAR_FUSE_MON5 5 +#define RCAR_FUSE_MON6 6 +#define RCAR_FUSE_MON7 7 +#define RCAR_FUSE_MON8 8 +#define RCAR_FUSE_MON9 9 + +#define RCAR_LTM0_MON0 32 +#define RCAR_LTM0_MON1 33 +#define RCAR_LTM0_MON2 34 + +#define RCAR_OTPMONITOR0 0 +#define RCAR_OTPMONITOR3 3 +#define RCAR_OTPMONITOR28 28 +#define RCAR_OTPMONITOR32 32 +#define RCAR_OTPMONITOR33 33 +#define RCAR_OTPMONITOR34 34 +#define RCAR_OTPMONITOR35 35 +#define RCAR_OTPMONITOR36 36 +#define RCAR_OTPMONITOR37 37 +#define RCAR_OTPMONITOR38 38 +#define RCAR_OTPMONITOR39 39 + +#if IS_ENABLED(CONFIG_FUSE_RCAR) +int rcar_fuse_read(unsigned int idx, u32 *val); +#else +static inline int rcar_fuse_read(unsigned int idx, u32 *val) +{ + return -ENODEV; +} +#endif + +#endif /* __LINUX_SOC_RENESAS_RCAR_FUSE_H__ */ From patchwork Wed May 29 09:29:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13678516 X-Patchwork-Delegate: geert@linux-m68k.org Received: from xavier.telenet-ops.be (xavier.telenet-ops.be [195.130.132.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 556AB17554D for ; Wed, 29 May 2024 09:29:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.130.132.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716974992; cv=none; b=GYQrLg3i0Hz+GBBHqx0sJErkLE1xMEpXbRMBmA+Xa5uZsBI4kmpNWsBSq1qpQvdfqfHkb6H6kiuARtrcZhRvV8L9J6Ei4FyyG12X9xiatwgEpUopu+LW4QDChpsU6MUx+7pZtcJIbG8LvcbrHxZjpuNcp1Bf4Xqno+6zPDjZkbg= ARC-Message-Signature: i=1; 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Wed, 29 May 2024 11:29:40 +0200 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1sCFcq-008wS6-Ei; Wed, 29 May 2024 11:29:40 +0200 From: Geert Uytterhoeven To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Linus Walleij , Yoshihiro Shimoda Cc: devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v2 4/8] pinctrl: renesas: Add R-Car Gen3 fuse support Date: Wed, 29 May 2024 11:29:33 +0200 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On R-Car Gen3 SoCs, the fuse registers are tightly integrated into the Pin Function Controller. Add support for them by providing the rcar-fuse driver with all needed info through a platform device and platform data. Note that the number of fuse registers on R-Car V3H and V3H2 differs, while their PFC blocks use the same compatible value, hence this is handled by checking the top-level compatible value. Signed-off-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda Acked-by: Linus Walleij --- v2: - Add Reviewed-by. FUSE_MON[1-3] on R-Car V3M were only briefly documented in Hardware User's Manual Rev. 0.52/0.53 --- drivers/pinctrl/renesas/core.c | 18 ++++++++++++++++++ drivers/pinctrl/renesas/pfc-r8a77951.c | 2 ++ drivers/pinctrl/renesas/pfc-r8a7796.c | 4 ++++ drivers/pinctrl/renesas/pfc-r8a77965.c | 2 ++ drivers/pinctrl/renesas/pfc-r8a77970.c | 2 ++ drivers/pinctrl/renesas/pfc-r8a77980.c | 14 +++++++++++++- drivers/pinctrl/renesas/pfc-r8a77990.c | 2 ++ drivers/pinctrl/renesas/pfc-r8a77995.c | 2 ++ drivers/pinctrl/renesas/sh_pfc.h | 4 +++- 9 files changed, 48 insertions(+), 2 deletions(-) diff --git a/drivers/pinctrl/renesas/core.c b/drivers/pinctrl/renesas/core.c index 96d6040a8871419b..1c8447fcfb1180e3 100644 --- a/drivers/pinctrl/renesas/core.c +++ b/drivers/pinctrl/renesas/core.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -27,6 +28,8 @@ #include "core.h" +#define FUSE_MON0 0x3e4 /* R-Car Gen3 */ + static int sh_pfc_map_resources(struct sh_pfc *pfc, struct platform_device *pdev) { @@ -1372,6 +1375,21 @@ static int sh_pfc_probe(struct platform_device *pdev) } #endif + if (pfc->info->nr_fuse_regs) { + struct rcar_fuse_platform_data pdata = { + .base = pfc->windows[0].virt, + .offset = FUSE_MON0, + .nregs = pfc->info->nr_fuse_regs, + }; + struct platform_device *fdev; + + fdev = platform_device_register_data(pfc->dev, "rcar_fuse", -1, + &pdata, sizeof(pdata)); + if (IS_ERR(fdev)) + dev_err_probe(pfc->dev, PTR_ERR(fdev), + "failed to register fuses, ignoring\n"); + } + platform_set_drvdata(pdev, pfc); dev_info(pfc->dev, "%s support registered\n", info->name); diff --git a/drivers/pinctrl/renesas/pfc-r8a77951.c b/drivers/pinctrl/renesas/pfc-r8a77951.c index a1d74f61fd8cce64..ae60bc5f70f0c223 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77951.c +++ b/drivers/pinctrl/renesas/pfc-r8a77951.c @@ -6187,5 +6187,7 @@ const struct sh_pfc_soc_info r8a77951_pinmux_info = { .pinmux_data = pinmux_data, .pinmux_data_size = ARRAY_SIZE(pinmux_data), + + .nr_fuse_regs = 1, }; #endif diff --git a/drivers/pinctrl/renesas/pfc-r8a7796.c b/drivers/pinctrl/renesas/pfc-r8a7796.c index 807834f319f07d8c..b1ebd9a0b612e5b8 100644 --- a/drivers/pinctrl/renesas/pfc-r8a7796.c +++ b/drivers/pinctrl/renesas/pfc-r8a7796.c @@ -6139,6 +6139,8 @@ const struct sh_pfc_soc_info r8a77960_pinmux_info = { .pinmux_data = pinmux_data, .pinmux_data_size = ARRAY_SIZE(pinmux_data), + + .nr_fuse_regs = 1, }; #endif @@ -6166,5 +6168,7 @@ const struct sh_pfc_soc_info r8a77961_pinmux_info = { .pinmux_data = pinmux_data, .pinmux_data_size = ARRAY_SIZE(pinmux_data), + + .nr_fuse_regs = 1, }; #endif diff --git a/drivers/pinctrl/renesas/pfc-r8a77965.c b/drivers/pinctrl/renesas/pfc-r8a77965.c index e7c88a5d983f4343..47f9843a336225ac 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77965.c +++ b/drivers/pinctrl/renesas/pfc-r8a77965.c @@ -6380,5 +6380,7 @@ const struct sh_pfc_soc_info r8a77965_pinmux_info = { .pinmux_data = pinmux_data, .pinmux_data_size = ARRAY_SIZE(pinmux_data), + + .nr_fuse_regs = 1, }; #endif diff --git a/drivers/pinctrl/renesas/pfc-r8a77970.c b/drivers/pinctrl/renesas/pfc-r8a77970.c index e1b3e3b38ec3b864..688fe31c5b98ac14 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77970.c +++ b/drivers/pinctrl/renesas/pfc-r8a77970.c @@ -2557,4 +2557,6 @@ const struct sh_pfc_soc_info r8a77970_pinmux_info = { .pinmux_data = pinmux_data, .pinmux_data_size = ARRAY_SIZE(pinmux_data), + + .nr_fuse_regs = 4, }; diff --git a/drivers/pinctrl/renesas/pfc-r8a77980.c b/drivers/pinctrl/renesas/pfc-r8a77980.c index 877134d78c7e50c6..085eb6090420d013 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77980.c +++ b/drivers/pinctrl/renesas/pfc-r8a77980.c @@ -15,6 +15,7 @@ #include #include #include +#include #include "sh_pfc.h" @@ -3048,13 +3049,22 @@ static const struct pinmux_bias_reg pinmux_bias_regs[] = { { /* sentinel */ } }; +static int r8a77980_pinmux_init(struct sh_pfc *pfc) +{ + if (of_machine_is_compatible("renesas,r8a77980a")) + r8a77980_pinmux_info.nr_fuse_regs = 5; + + return 0; +} + static const struct sh_pfc_soc_operations r8a77980_pfc_ops = { + .init = r8a77980_pinmux_init, .pin_to_pocctrl = r8a77980_pin_to_pocctrl, .get_bias = rcar_pinmux_get_bias, .set_bias = rcar_pinmux_set_bias, }; -const struct sh_pfc_soc_info r8a77980_pinmux_info = { +struct sh_pfc_soc_info r8a77980_pinmux_info = { .name = "r8a77980_pfc", .ops = &r8a77980_pfc_ops, .unlock_reg = 0xe6060000, /* PMMR */ @@ -3074,4 +3084,6 @@ const struct sh_pfc_soc_info r8a77980_pinmux_info = { .pinmux_data = pinmux_data, .pinmux_data_size = ARRAY_SIZE(pinmux_data), + + .nr_fuse_regs = 1, }; diff --git a/drivers/pinctrl/renesas/pfc-r8a77990.c b/drivers/pinctrl/renesas/pfc-r8a77990.c index 262390dd7d67a101..748b9198d1efd820 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77990.c +++ b/drivers/pinctrl/renesas/pfc-r8a77990.c @@ -5336,5 +5336,7 @@ const struct sh_pfc_soc_info r8a77990_pinmux_info = { .pinmux_data = pinmux_data, .pinmux_data_size = ARRAY_SIZE(pinmux_data), + + .nr_fuse_regs = 1, }; #endif diff --git a/drivers/pinctrl/renesas/pfc-r8a77995.c b/drivers/pinctrl/renesas/pfc-r8a77995.c index 298e7a07e4934e67..f9003b8236a8881e 100644 --- a/drivers/pinctrl/renesas/pfc-r8a77995.c +++ b/drivers/pinctrl/renesas/pfc-r8a77995.c @@ -3193,4 +3193,6 @@ const struct sh_pfc_soc_info r8a77995_pinmux_info = { .pinmux_data = pinmux_data, .pinmux_data_size = ARRAY_SIZE(pinmux_data), + + .nr_fuse_regs = 1, }; diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h index 0061e96400598e49..ce9b591a275ffbd3 100644 --- a/drivers/pinctrl/renesas/sh_pfc.h +++ b/drivers/pinctrl/renesas/sh_pfc.h @@ -290,6 +290,8 @@ struct sh_pfc_soc_info { unsigned int pinmux_data_size; u32 unlock_reg; /* can be literal address or mask */ + + unsigned int nr_fuse_regs; }; extern const struct sh_pfc_soc_info emev2_pinmux_info; @@ -316,7 +318,7 @@ extern const struct sh_pfc_soc_info r8a77960_pinmux_info; extern const struct sh_pfc_soc_info r8a77961_pinmux_info; extern const struct sh_pfc_soc_info r8a77965_pinmux_info; extern const struct sh_pfc_soc_info r8a77970_pinmux_info; -extern const struct sh_pfc_soc_info r8a77980_pinmux_info; +extern struct sh_pfc_soc_info r8a77980_pinmux_info; extern const struct sh_pfc_soc_info r8a77990_pinmux_info; extern const struct sh_pfc_soc_info r8a77995_pinmux_info; extern const struct sh_pfc_soc_info r8a779a0_pinmux_info; From patchwork Wed May 29 09:29:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13678515 X-Patchwork-Delegate: geert@linux-m68k.org Received: from xavier.telenet-ops.be (xavier.telenet-ops.be [195.130.132.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 55593175543 for ; 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dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed80:1b01:1838:131c:4de4]) by xavier.telenet-ops.be with bizsmtp id UxVg2C00d3VPV9V01xVg5H; Wed, 29 May 2024 11:29:43 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1sCFbu-00GHKp-1t; Wed, 29 May 2024 11:29:40 +0200 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1sCFcq-008wSA-FR; Wed, 29 May 2024 11:29:40 +0200 From: Geert Uytterhoeven To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Linus Walleij , Yoshihiro Shimoda Cc: devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v2 5/8] arm64: dts: renesas: r8a779a0: Add E-FUSE node Date: Wed, 29 May 2024 11:29:34 +0200 Message-Id: <182eb7785a08232c93d15d340214d8242ed4b42f.1716974503.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add a device node for the System Group Fuse Control and Monitor block of the Pin Function Controller (PFC) on the R-Car V3U (R8A779A0) SoC, which provides E-FUSE services. Signed-off-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda --- v2: - Add Reviewed-by. Assuming the Fuse Control and Monitor block is driven by the same module clock as GPIO Group 0. --- arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi index cfa70b441e329a0b..1abe92c98358eddb 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi @@ -245,6 +245,14 @@ gpio9: gpio@e6069980 { #interrupt-cells = <2>; }; + fuse: fuse@e6078800 { + compatible = "renesas,r8a779a0-efuse"; + reg = <0 0xe6078800 0 0x100>; + clocks = <&cpg CPG_MOD 916>; + power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; + resets = <&cpg 916>; + }; + cmt0: timer@e60f0000 { compatible = "renesas,r8a779a0-cmt0", "renesas,rcar-gen4-cmt0"; From patchwork Wed May 29 09:29:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13678513 X-Patchwork-Delegate: geert@linux-m68k.org Received: from michel.telenet-ops.be (michel.telenet-ops.be [195.130.137.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8176816EBE9 for ; Wed, 29 May 2024 09:29:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.130.137.88 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716974990; cv=none; b=GkGNV7bBZmW4VGuMcASh2d4cg7vNcOExKeTp0Luof2k+bQTeyu/YVngA6qC2YsYMyQfekY5wSNZa6rGeUgMzdFVNHdC+7XDXZJ3YoEBSEaQsBm+SHERzmHjIaFIlFjChN+AckUp0B1J+XxbyrAR+J3Ql/lJ5HngWgRBN6R2mmZ4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716974990; c=relaxed/simple; bh=+G/6WFT3rQlXKOx3bQs0mRWnvNqUTJ9vaLt1F4gwBf0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=kRUlTivV3HgqMi6UO5RUBlmLRwO6On4tqremzZvqs/RmIknVFL5+sNRqM/ex25eNAsXiX4mwkCbCh/RBm1Txst1d9SfNvhoRPVYLJcqUmAxu2uxnmowd73h1Cs4bX1Nbv/q9kZXB4wS2IdYScqJrGMOtj6/WscUWkbzPb3rPch8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be; spf=none smtp.mailfrom=linux-m68k.org; arc=none smtp.client-ip=195.130.137.88 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed80:1b01:1838:131c:4de4]) by michel.telenet-ops.be with bizsmtp id UxVg2C00N3VPV9V06xVgBE; Wed, 29 May 2024 11:29:43 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1sCFbu-00GHKu-2b; Wed, 29 May 2024 11:29:40 +0200 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1sCFcq-008wSE-G3; Wed, 29 May 2024 11:29:40 +0200 From: Geert Uytterhoeven To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Linus Walleij , Yoshihiro Shimoda Cc: devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v2 6/8] arm64: dts: renesas: r8a779f0: Add E-FUSE node Date: Wed, 29 May 2024 11:29:35 +0200 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add a device node for the System Group Fuse Control and Monitor block of the Pin Function Controller (PFC) on the R-Car S4-8 (R8A779F0) SoC, which provides E-FUSE services. Signed-off-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda --- v2: - s/r8a779g0/r8a779f0/ in one-line summary, - Add Reviewed-by. Assuming the Fuse Control and Monitor block is driven by the same module clock as GPIO Group 0. --- arch/arm64/boot/dts/renesas/r8a779f0.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi index 72cf30341fc4d63e..48390654e172bd5d 100644 --- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi @@ -377,6 +377,14 @@ gpio3: gpio@e6051980 { #interrupt-cells = <2>; }; + fuse: fuse@e6078800 { + compatible = "renesas,r8a779f0-efuse"; + reg = <0 0xe6078800 0 0x100>; + clocks = <&cpg CPG_MOD 915>; + power-domains = <&sysc R8A779F0_PD_ALWAYS_ON>; + resets = <&cpg 915>; + }; + cmt0: timer@e60f0000 { compatible = "renesas,r8a779f0-cmt0", "renesas,rcar-gen4-cmt0"; From patchwork Wed May 29 09:29:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13678511 X-Patchwork-Delegate: geert@linux-m68k.org Received: from baptiste.telenet-ops.be (baptiste.telenet-ops.be [195.130.132.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D7F9E16A360 for ; Wed, 29 May 2024 09:29:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.130.132.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716974988; cv=none; b=ZeXG8vJg8N42VgOq3vClyc29ccLwWZMuRRORkGZq/pXoeK/SXKQ9MhSAYJYBQfC2E8vGg12lLisp10G1JKtVvHjwq2q18TPoxglihQ+/AnJqC7Id5X2yJUNhz8xcr44yRaxWOgCH37dm9Ng5IJU2UpruBca5hgKD6SWKDClEtYk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716974988; c=relaxed/simple; bh=gO8Rd/I+uXscYfoQ6E3tvucyqQc0Dr9A9uzl55Vsskg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=O46npMqUNbamIfyyFV1ccXdm1E8q9E+rk91Hvq/3eplL6bSNLb1hPSCU4pYmW9a5LetBdEo41k/H4R7Tgsq+FJNPJxoAyTk/dHqlkl5dU5FGFG4rhf1Glsd3e3inaZ5VDB84RRoIMp+4qUUIqjV8rb9UgHog8+vnFsxflJEf23A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be; spf=none smtp.mailfrom=linux-m68k.org; arc=none smtp.client-ip=195.130.132.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed80:1b01:1838:131c:4de4]) by baptiste.telenet-ops.be with bizsmtp id UxVg2C00n3VPV9V01xVgkj; Wed, 29 May 2024 11:29:43 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1sCFbu-00GHKx-3L; Wed, 29 May 2024 11:29:40 +0200 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1sCFcq-008wSI-Gl; Wed, 29 May 2024 11:29:40 +0200 From: Geert Uytterhoeven To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Linus Walleij , Yoshihiro Shimoda Cc: devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v2 7/8] arm64: dts: renesas: r8a779g0: Add OTP_MEM node Date: Wed, 29 May 2024 11:29:36 +0200 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add a device node for the OTP non-volatile memory on the R-Car V4H (R8A779G0) SoC, which provides E-FUSE services. Signed-off-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda --- v2: - Add Reviewed-by. --- arch/arm64/boot/dts/renesas/r8a779g0.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi index 2ee306305d834315..aaeebf736f3f74f6 100644 --- a/arch/arm64/boot/dts/renesas/r8a779g0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779g0.dtsi @@ -463,6 +463,11 @@ tsc: thermal@e6198000 { #thermal-sensor-cells = <1>; }; + otp: otp@e61be000 { + compatible = "renesas,r8a779g0-otp"; + reg = <0 0xe61be000 0 0x1000>, <0 0xe61bf000 0 0x1000>; + }; + intc_ex: interrupt-controller@e61c0000 { compatible = "renesas,intc-ex-r8a779g0", "renesas,irqc"; #interrupt-cells = <2>; From patchwork Wed May 29 09:29:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13678509 X-Patchwork-Delegate: geert@linux-m68k.org Received: from albert.telenet-ops.be (albert.telenet-ops.be [195.130.137.90]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D1F20169AF0 for ; Wed, 29 May 2024 09:29:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=195.130.137.90 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716974986; cv=none; b=pmPGepZ/bCjUmPabHVw/lGMb/UBplWJ4F8HBJ3N93V4enTY+05WQ+vq/xWFv5bQMgFrpGoL4ChM+HTmPxFR81y/JElHuzzOvUsaUkuJFEQPjciWdr+g3cx6m6QMUbbXWnakV2iFSTs+vfjRMnv7FbGzE4JPYV8YIhENOsPnn+DQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716974986; c=relaxed/simple; bh=lC9HYilaLEPRJNvUV/3RHQldHaDnLJhOOG8MTKQS3II=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=selq6qoSjgYNHg5IfxgNLd9yDANWYAsuspULcr/V4YBZbjqh9FxO00/ngJ7u+mo6k9NWMIlZrn0wOSq4RAIn85+TMxxDuqwjZKixaqE1cvKX6Awf3TKHMJiuuRnlhkG2KTuLQKuOq8h5emghAZgcjWVd3lclRsqezoJTZpKHPeU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be; spf=none smtp.mailfrom=linux-m68k.org; arc=none smtp.client-ip=195.130.137.90 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=glider.be Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux-m68k.org Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed80:1b01:1838:131c:4de4]) by albert.telenet-ops.be with bizsmtp id UxVg2C00S3VPV9V06xVglU; Wed, 29 May 2024 11:29:43 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1sCFbu-00GHL2-42; Wed, 29 May 2024 11:29:40 +0200 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1sCFcq-008wSQ-HS; Wed, 29 May 2024 11:29:40 +0200 From: Geert Uytterhoeven To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Magnus Damm , Linus Walleij , Yoshihiro Shimoda Cc: devicetree@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-gpio@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH v2 8/8] arm64: dts: renesas: r8a779h0: Add OTP_MEM node Date: Wed, 29 May 2024 11:29:37 +0200 Message-Id: <0e4af5b32b74f901945e24ad2baefbfce37e957f.1716974503.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add a device node for the OTP non-volatile memory on the R-Car V4M (R8A779H0) SoC, which provides E-FUSE services. Signed-off-by: Geert Uytterhoeven Reviewed-by: Yoshihiro Shimoda --- v2: - Add Reviewed-by. --- arch/arm64/boot/dts/renesas/r8a779h0.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi index 28ac930e7db1f234..3766652623fd8e5e 100644 --- a/arch/arm64/boot/dts/renesas/r8a779h0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779h0.dtsi @@ -411,6 +411,11 @@ tsc: thermal@e6198000 { #thermal-sensor-cells = <1>; }; + otp: otp@e61be000 { + compatible = "renesas,r8a779h0-otp"; + reg = <0 0xe61be000 0 0x1000>, <0 0xe61bf000 0 0x1000>; + }; + intc_ex: interrupt-controller@e61c0000 { compatible = "renesas,intc-ex-r8a779h0", "renesas,irqc"; #interrupt-cells = <2>;