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a=openpgp-sha256; l=722; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=uBjpRROAGGhAYySTps1Z1DH7fMokpKs/t6oNoXzZcRQ=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmV82HebzneriVMwImdOWiB3mso9XrDBshYsbe1 in/4fteBTaJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZlfNhwAKCRCLPIo+Aiko 1bB0B/4rrgK07tUTadnJoHd63UKKNU0UkaUJvXlsaAmslXY4nzr8PZbV85bTAKjhusEpedFoIeJ Pn0pad0Q+eipmJuG6UCEUdriZUxaWFo1+dhCYToVof3yLawXNOb/AtHMVeYTI+drZeMBKG0BL7K G5LV6Xs4bc47PtqdMtbOTi0q623J1J7sScBVpHwgVM3sIiAjryslqir6Ksvj5oJiyfv4MzUXkzQ OMrilvhLNpra3smBD7NIJgBE74okk7z4AcFlTK+b1Ydh/Ba4YuoCgzPeOX4bE9HJ3ImSDjINw9T QIio5nVtaH312Ews1vcqZKEs+EDhC8tP/XK/m0mzd3BE5MD+ X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240529_175124_125173_F726B844 X-CRM114-Status: UNSURE ( 9.49 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Enable support for the GPU Clock Controller for the Qualcomm SM8350 platform. This enables the GPU on Qualcomm SM8350 HDK and other devices using this SoC. Signed-off-by: Dmitry Baryshkov --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index dfad1cb8a072..63a8e9335efb 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1336,6 +1336,7 @@ CONFIG_SM_GCC_8650=y CONFIG_SM_GPUCC_6115=m CONFIG_SM_GPUCC_8150=y CONFIG_SM_GPUCC_8250=y +CONFIG_SM_GPUCC_8350=m CONFIG_SM_GPUCC_8450=m CONFIG_SM_GPUCC_8550=m CONFIG_SM_GPUCC_8650=m From patchwork Thu May 30 00:51:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13679581 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8F20AC25B75 for ; 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Wed, 29 May 2024 17:51:22 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5297066b233sm1396534e87.135.2024.05.29.17.51.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 May 2024 17:51:21 -0700 (PDT) From: Dmitry Baryshkov Date: Thu, 30 May 2024 03:51:14 +0300 Subject: [PATCH 2/2] arm64: defconfig: make CONFIG_INTERCONNECT_QCOM_SM8350 built-in MIME-Version: 1.0 Message-Id: <20240530-8350-config-v1-2-d6e871236ed4@linaro.org> References: <20240530-8350-config-v1-0-d6e871236ed4@linaro.org> In-Reply-To: <20240530-8350-config-v1-0-d6e871236ed4@linaro.org> To: Catalin Marinas , Will Deacon , Bjorn Andersson , Konrad Dybcio Cc: Abhinav Kumar , linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=917; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=kmKy77nhcOHi6YYrTMmhX1IdbFXK68Up4LbunGWp1+M=; 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Move this driver to be built-in to prevent such issues during the boot. Signed-off-by: Dmitry Baryshkov --- arch/arm64/configs/defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 63a8e9335efb..9a467dec78b7 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -1612,7 +1612,7 @@ CONFIG_INTERCONNECT_QCOM_SDX75=y CONFIG_INTERCONNECT_QCOM_SM6115=y CONFIG_INTERCONNECT_QCOM_SM8150=m CONFIG_INTERCONNECT_QCOM_SM8250=y -CONFIG_INTERCONNECT_QCOM_SM8350=m +CONFIG_INTERCONNECT_QCOM_SM8350=y CONFIG_INTERCONNECT_QCOM_SM8450=y CONFIG_INTERCONNECT_QCOM_SM8550=y CONFIG_INTERCONNECT_QCOM_SM8650=y