From patchwork Thu May 30 08:55:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13679959 Received: from fgw21-7.mail.saunalahti.fi (fgw21-7.mail.saunalahti.fi [62.142.5.82]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 07833176AB9 for ; Thu, 30 May 2024 08:58:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.82 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059489; cv=none; b=dw0tkH/unUzkyiCGepw2t/HBtSpoLDimio0R0V1qIbCxlKlZzGzVEHwt4uaWzCUFuWbscdOyBwfGR8zI/gT8n5icwSN3EfqWch97IDhrUqkQIkqgx32IHd6rfmLbpc6mwbOuFdiSg7eRxtQ/clRXiKgLhR82GEBzMYfboSKsFCg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059489; c=relaxed/simple; bh=1XtJWJ5PeRCirDjIxVIenINEe49dxjFUvbLv8ITaSpM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FGCTN3TJXZLLvl3HhupjIv+WksTHk2tKhokrfbvhfNhso94+FBZOdlXOQOn9pesbB73IqMQifN43TTpCCdN+XQnLhSbXkaQVzTrzEacHV1lzidJkx1kI5DKFzU30WHSwt+WHnwBFqOLHNRymx++AmB9wRdN1eJ4hxJvUMUJeShc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com; spf=fail smtp.mailfrom=gmail.com; arc=none smtp.client-ip=62.142.5.82 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=gmail.com Received: from localhost (88-113-26-230.elisa-laajakaista.fi [88.113.26.230]) by fgw21.mail.saunalahti.fi (Halon) with ESMTP id b2e2e8ab-1e62-11ef-aaf9-005056bdd08f; Thu, 30 May 2024 11:57:53 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Linus Walleij , AngeloGioacchino Del Regno , Daniel Golle , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mips@vger.kernel.org Cc: Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , Sean Wang , Matthias Brugger , Paul Cercueil , Lakshmi Sowjanya D , Andy Shevchenko Subject: [PATCH v3 01/11] pinctrl: berlin: Make use of struct pinfunction Date: Thu, 30 May 2024 11:55:10 +0300 Message-ID: <20240530085745.1539925-2-andy.shevchenko@gmail.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240530085745.1539925-1-andy.shevchenko@gmail.com> References: <20240530085745.1539925-1-andy.shevchenko@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Andy Shevchenko Since pin control provides a generic data type for the pin function, use it in the driver. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/berlin/berlin.c | 21 +++++++++------------ drivers/pinctrl/berlin/berlin.h | 6 ------ 2 files changed, 9 insertions(+), 18 deletions(-) diff --git a/drivers/pinctrl/berlin/berlin.c b/drivers/pinctrl/berlin/berlin.c index 9550cc8095c2..c372a2a24be4 100644 --- a/drivers/pinctrl/berlin/berlin.c +++ b/drivers/pinctrl/berlin/berlin.c @@ -27,7 +27,7 @@ struct berlin_pinctrl { struct regmap *regmap; struct device *dev; const struct berlin_pinctrl_desc *desc; - struct berlin_pinctrl_function *functions; + struct pinfunction *functions; unsigned nfunctions; struct pinctrl_dev *pctrl_dev; }; @@ -120,12 +120,12 @@ static const char *berlin_pinmux_get_function_name(struct pinctrl_dev *pctrl_dev static int berlin_pinmux_get_function_groups(struct pinctrl_dev *pctrl_dev, unsigned function, const char * const **groups, - unsigned * const num_groups) + unsigned * const ngroups) { struct berlin_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrl_dev); *groups = pctrl->functions[function].groups; - *num_groups = pctrl->functions[function].ngroups; + *ngroups = pctrl->functions[function].ngroups; return 0; } @@ -153,7 +153,7 @@ static int berlin_pinmux_set(struct pinctrl_dev *pctrl_dev, { struct berlin_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctrl_dev); const struct berlin_desc_group *group_desc = pctrl->desc->groups + group; - struct berlin_pinctrl_function *func = pctrl->functions + function; + struct pinfunction *func = pctrl->functions + function; struct berlin_desc_function *function_desc = berlin_pinctrl_find_function_by_name(pctrl, group_desc, func->name); @@ -180,7 +180,7 @@ static const struct pinmux_ops berlin_pinmux_ops = { static int berlin_pinctrl_add_function(struct berlin_pinctrl *pctrl, const char *name) { - struct berlin_pinctrl_function *function = pctrl->functions; + struct pinfunction *function = pctrl->functions; while (function->name) { if (!strcmp(function->name, name)) { @@ -214,8 +214,7 @@ static int berlin_pinctrl_build_state(struct platform_device *pdev) } /* we will reallocate later */ - pctrl->functions = kcalloc(max_functions, - sizeof(*pctrl->functions), GFP_KERNEL); + pctrl->functions = kcalloc(max_functions, sizeof(*pctrl->functions), GFP_KERNEL); if (!pctrl->functions) return -ENOMEM; @@ -242,8 +241,7 @@ static int berlin_pinctrl_build_state(struct platform_device *pdev) desc_function = desc_group->functions; while (desc_function->name) { - struct berlin_pinctrl_function - *function = pctrl->functions; + struct pinfunction *function = pctrl->functions; const char **groups; bool found = false; @@ -264,16 +262,15 @@ static int berlin_pinctrl_build_state(struct platform_device *pdev) function->groups = devm_kcalloc(&pdev->dev, function->ngroups, - sizeof(char *), + sizeof(*function->groups), GFP_KERNEL); - if (!function->groups) { kfree(pctrl->functions); return -ENOMEM; } } - groups = function->groups; + groups = (const char **)function->groups; while (*groups) groups++; diff --git a/drivers/pinctrl/berlin/berlin.h b/drivers/pinctrl/berlin/berlin.h index d7787754d1ed..231aab61d415 100644 --- a/drivers/pinctrl/berlin/berlin.h +++ b/drivers/pinctrl/berlin/berlin.h @@ -28,12 +28,6 @@ struct berlin_pinctrl_desc { unsigned ngroups; }; -struct berlin_pinctrl_function { - const char *name; - const char **groups; - unsigned ngroups; -}; - #define BERLIN_PINCTRL_GROUP(_name, _offset, _width, _lsb, ...) \ { \ .name = _name, \ From patchwork Thu May 30 08:55:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13679960 Received: from fgw20-7.mail.saunalahti.fi (fgw20-7.mail.saunalahti.fi [62.142.5.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2FF3815B573 for ; Thu, 30 May 2024 08:58:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.81 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059490; cv=none; b=GgAYXlw4eoBXH0MbYMPAHicKjn39SDNj9jOtwwPdRJTlN11D/KZANxvS+XlZsCPB38z7Y9716yM0vUSBlnkzZ6Iis78tmTsb6NMs1uNtxizfBIQXB3tHgZIt4utHnDAVi7bTkauLEwIUb/0jMvbAuax2tupfj1DtfrdNKH29mho= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059490; c=relaxed/simple; bh=UUNlZAPD7ufWrtpQqrGWyMeB5Qmh9EtgLPVDRPhTSwU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=hFS5aZdCcMw2P9ry/XaDKeExdRPgtTDYVCLxZ1Q1nETTBTotxTULq5Hw+r8XeDbewcgW6fUA4ZahGCDQmZid6uVWSoKFM6iRW7qSFYaS4s/QamOyuI9NH1+chcdKEaGv8i4iz6oWNQbJne9kH7QqmurAsrayc+i8MNZgDsZIJUQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com; spf=fail smtp.mailfrom=gmail.com; arc=none smtp.client-ip=62.142.5.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=gmail.com Received: from localhost (88-113-26-230.elisa-laajakaista.fi [88.113.26.230]) by fgw22.mail.saunalahti.fi (Halon) with ESMTP id bac30c71-1e62-11ef-8e2e-005056bdf889; Thu, 30 May 2024 11:58:06 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Linus Walleij , AngeloGioacchino Del Regno , Daniel Golle , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mips@vger.kernel.org Cc: Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , Sean Wang , Matthias Brugger , Paul Cercueil , Lakshmi Sowjanya D , Andy Shevchenko Subject: [PATCH v3 02/11] pinctrl: equilibrium: Make use of struct pinfunction Date: Thu, 30 May 2024 11:55:11 +0300 Message-ID: <20240530085745.1539925-3-andy.shevchenko@gmail.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240530085745.1539925-1-andy.shevchenko@gmail.com> References: <20240530085745.1539925-1-andy.shevchenko@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Andy Shevchenko Since pin control provides a generic data type for the pin function, use it in the driver. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-equilibrium.c | 24 +++++++++++++----------- drivers/pinctrl/pinctrl-equilibrium.h | 12 ------------ 2 files changed, 13 insertions(+), 23 deletions(-) diff --git a/drivers/pinctrl/pinctrl-equilibrium.c b/drivers/pinctrl/pinctrl-equilibrium.c index 6e1be38865c3..a6d089eaaae5 100644 --- a/drivers/pinctrl/pinctrl-equilibrium.c +++ b/drivers/pinctrl/pinctrl-equilibrium.c @@ -566,8 +566,8 @@ static const struct pinconf_ops eqbr_pinconf_ops = { .pin_config_config_dbg_show = pinconf_generic_dump_config, }; -static bool is_func_exist(struct eqbr_pmx_func *funcs, const char *name, - unsigned int nr_funcs, unsigned int *idx) +static bool is_func_exist(struct pinfunction *funcs, const char *name, + unsigned int nr_funcs, unsigned int *idx) { int i; @@ -584,13 +584,14 @@ static bool is_func_exist(struct eqbr_pmx_func *funcs, const char *name, return false; } -static int funcs_utils(struct device *dev, struct eqbr_pmx_func *funcs, +static int funcs_utils(struct device *dev, struct pinfunction *funcs, unsigned int *nr_funcs, funcs_util_ops op) { struct device_node *node = dev->of_node; struct device_node *np; struct property *prop; const char *fn_name; + const char **groups; unsigned int fid; int i, j; @@ -620,15 +621,16 @@ static int funcs_utils(struct device *dev, struct eqbr_pmx_func *funcs, case OP_COUNT_NR_FUNC_GRPS: if (is_func_exist(funcs, fn_name, *nr_funcs, &fid)) - funcs[fid].nr_groups++; + funcs[fid].ngroups++; break; case OP_ADD_FUNC_GRPS: if (is_func_exist(funcs, fn_name, *nr_funcs, &fid)) { - for (j = 0; j < funcs[fid].nr_groups; j++) - if (!funcs[fid].groups[j]) + groups = (const char **)funcs[fid].groups; + for (j = 0; j < funcs[fid].ngroups; j++) + if (!groups[j]) break; - funcs[fid].groups[j] = prop->value; + groups[j] = prop->value; } break; @@ -645,7 +647,7 @@ static int funcs_utils(struct device *dev, struct eqbr_pmx_func *funcs, static int eqbr_build_functions(struct eqbr_pinctrl_drv_data *drvdata) { struct device *dev = drvdata->dev; - struct eqbr_pmx_func *funcs = NULL; + struct pinfunction *funcs = NULL; unsigned int nr_funcs = 0; int i, ret; @@ -666,9 +668,9 @@ static int eqbr_build_functions(struct eqbr_pinctrl_drv_data *drvdata) return ret; for (i = 0; i < nr_funcs; i++) { - if (!funcs[i].nr_groups) + if (!funcs[i].ngroups) continue; - funcs[i].groups = devm_kcalloc(dev, funcs[i].nr_groups, + funcs[i].groups = devm_kcalloc(dev, funcs[i].ngroups, sizeof(*(funcs[i].groups)), GFP_KERNEL); if (!funcs[i].groups) @@ -688,7 +690,7 @@ static int eqbr_build_functions(struct eqbr_pinctrl_drv_data *drvdata) ret = pinmux_generic_add_function(drvdata->pctl_dev, funcs[i].name, funcs[i].groups, - funcs[i].nr_groups, + funcs[i].ngroups, drvdata); if (ret < 0) { dev_err(dev, "Failed to register function %s\n", diff --git a/drivers/pinctrl/pinctrl-equilibrium.h b/drivers/pinctrl/pinctrl-equilibrium.h index 83768cc8b3db..b4d149bde39d 100644 --- a/drivers/pinctrl/pinctrl-equilibrium.h +++ b/drivers/pinctrl/pinctrl-equilibrium.h @@ -67,18 +67,6 @@ struct gpio_irq_type { unsigned int logic_type; }; -/** - * struct eqbr_pmx_func: represent a pin function. - * @name: name of the pin function, used to lookup the function. - * @groups: one or more names of pin groups that provide this function. - * @nr_groups: number of groups included in @groups. - */ -struct eqbr_pmx_func { - const char *name; - const char **groups; - unsigned int nr_groups; -}; - /** * struct eqbr_pin_bank: represent a pin bank. * @membase: base address of the pin bank register. From patchwork Thu May 30 08:55:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13679961 Received: from fgw20-7.mail.saunalahti.fi (fgw20-7.mail.saunalahti.fi [62.142.5.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 274B417B418 for ; Thu, 30 May 2024 08:58:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.81 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059493; cv=none; b=uCAhINGGPEcU45HGkp6yA72QGL0fFta2M7M8BwYh0UFMblx9fiY7Pg9nUX7FWwrxMAHh4LKqTRA0/I/6APkSot82gzo1UR9W/9/9pE6dzHiLE6KPVGIIU7PFrjJE3JEMBxbkMb24OzPdeJg99T7DWTJW4FvYEzc/lpTJKQqefYw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059493; c=relaxed/simple; bh=WkOuYAMRW7krM/huf0kW2OFWTAkOyrJOGL1DFh65LwQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ULAMGqDqFlt000Ge8zUoBgukY4qmZypGZvQzSBzxV3MtwsuhqYxKndd6de0yjiTCIQ+Jw3WMLOq40NGBsFap6LiiRMx7JZI+8cFo+FWLIrzMOrg02/4iQzPgEr0tuYAu8KefDYHbz0bTKdofQGPFwQa4sdIhM02QiZ7QV/4WvHY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com; spf=fail smtp.mailfrom=gmail.com; arc=none smtp.client-ip=62.142.5.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=gmail.com Received: from localhost (88-113-26-230.elisa-laajakaista.fi [88.113.26.230]) by fgw20.mail.saunalahti.fi (Halon) with ESMTP id bb5f2be2-1e62-11ef-8d3e-005056bd6ce9; Thu, 30 May 2024 11:58:07 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Linus Walleij , AngeloGioacchino Del Regno , Daniel Golle , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mips@vger.kernel.org Cc: Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , Sean Wang , Matthias Brugger , Paul Cercueil , Lakshmi Sowjanya D , Andy Shevchenko Subject: [PATCH v3 03/11] pinctrl: ingenic: Provide a helper macro INGENIC_PIN_FUNCTION() Date: Thu, 30 May 2024 11:55:12 +0300 Message-ID: <20240530085745.1539925-4-andy.shevchenko@gmail.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240530085745.1539925-1-andy.shevchenko@gmail.com> References: <20240530085745.1539925-1-andy.shevchenko@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Provide a helper macro to assign the struct function_desc entries. This helps further refactoring. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-ingenic.c | 697 +++++++++++++++--------------- 1 file changed, 352 insertions(+), 345 deletions(-) diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c index bc6358a686fc..959b9ea83a66 100644 --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c @@ -94,6 +94,14 @@ .data = (void *)func, \ } +#define INGENIC_PIN_FUNCTION(_name_, id) \ + { \ + .name = _name_, \ + .group_names = id##_groups, \ + .num_group_names = ARRAY_SIZE(id##_groups), \ + .data = NULL, \ + } + enum jz_version { ID_JZ4730, ID_JZ4740, @@ -238,15 +246,15 @@ static const char *jz4730_pwm0_groups[] = { "pwm0", }; static const char *jz4730_pwm1_groups[] = { "pwm1", }; static const struct function_desc jz4730_functions[] = { - { "mmc", jz4730_mmc_groups, ARRAY_SIZE(jz4730_mmc_groups), }, - { "uart0", jz4730_uart0_groups, ARRAY_SIZE(jz4730_uart0_groups), }, - { "uart1", jz4730_uart1_groups, ARRAY_SIZE(jz4730_uart1_groups), }, - { "uart2", jz4730_uart2_groups, ARRAY_SIZE(jz4730_uart2_groups), }, - { "uart3", jz4730_uart3_groups, ARRAY_SIZE(jz4730_uart3_groups), }, - { "lcd", jz4730_lcd_groups, ARRAY_SIZE(jz4730_lcd_groups), }, - { "nand", jz4730_nand_groups, ARRAY_SIZE(jz4730_nand_groups), }, - { "pwm0", jz4730_pwm0_groups, ARRAY_SIZE(jz4730_pwm0_groups), }, - { "pwm1", jz4730_pwm1_groups, ARRAY_SIZE(jz4730_pwm1_groups), }, + INGENIC_PIN_FUNCTION("mmc", jz4730_mmc), + INGENIC_PIN_FUNCTION("uart0", jz4730_uart0), + INGENIC_PIN_FUNCTION("uart1", jz4730_uart1), + INGENIC_PIN_FUNCTION("uart2", jz4730_uart2), + INGENIC_PIN_FUNCTION("uart3", jz4730_uart3), + INGENIC_PIN_FUNCTION("lcd", jz4730_lcd), + INGENIC_PIN_FUNCTION("nand", jz4730_nand), + INGENIC_PIN_FUNCTION("pwm0", jz4730_pwm0), + INGENIC_PIN_FUNCTION("pwm1", jz4730_pwm1), }; static const struct ingenic_chip_info jz4730_chip_info = { @@ -343,19 +351,19 @@ static const char *jz4740_pwm6_groups[] = { "pwm6", }; static const char *jz4740_pwm7_groups[] = { "pwm7", }; static const struct function_desc jz4740_functions[] = { - { "mmc", jz4740_mmc_groups, ARRAY_SIZE(jz4740_mmc_groups), }, - { "uart0", jz4740_uart0_groups, ARRAY_SIZE(jz4740_uart0_groups), }, - { "uart1", jz4740_uart1_groups, ARRAY_SIZE(jz4740_uart1_groups), }, - { "lcd", jz4740_lcd_groups, ARRAY_SIZE(jz4740_lcd_groups), }, - { "nand", jz4740_nand_groups, ARRAY_SIZE(jz4740_nand_groups), }, - { "pwm0", jz4740_pwm0_groups, ARRAY_SIZE(jz4740_pwm0_groups), }, - { "pwm1", jz4740_pwm1_groups, ARRAY_SIZE(jz4740_pwm1_groups), }, - { "pwm2", jz4740_pwm2_groups, ARRAY_SIZE(jz4740_pwm2_groups), }, - { "pwm3", jz4740_pwm3_groups, ARRAY_SIZE(jz4740_pwm3_groups), }, - { "pwm4", jz4740_pwm4_groups, ARRAY_SIZE(jz4740_pwm4_groups), }, - { "pwm5", jz4740_pwm5_groups, ARRAY_SIZE(jz4740_pwm5_groups), }, - { "pwm6", jz4740_pwm6_groups, ARRAY_SIZE(jz4740_pwm6_groups), }, - { "pwm7", jz4740_pwm7_groups, ARRAY_SIZE(jz4740_pwm7_groups), }, + INGENIC_PIN_FUNCTION("mmc", jz4740_mmc), + INGENIC_PIN_FUNCTION("uart0", jz4740_uart0), + INGENIC_PIN_FUNCTION("uart1", jz4740_uart1), + INGENIC_PIN_FUNCTION("lcd", jz4740_lcd), + INGENIC_PIN_FUNCTION("nand", jz4740_nand), + INGENIC_PIN_FUNCTION("pwm0", jz4740_pwm0), + INGENIC_PIN_FUNCTION("pwm1", jz4740_pwm1), + INGENIC_PIN_FUNCTION("pwm2", jz4740_pwm2), + INGENIC_PIN_FUNCTION("pwm3", jz4740_pwm3), + INGENIC_PIN_FUNCTION("pwm4", jz4740_pwm4), + INGENIC_PIN_FUNCTION("pwm5", jz4740_pwm5), + INGENIC_PIN_FUNCTION("pwm6", jz4740_pwm6), + INGENIC_PIN_FUNCTION("pwm7", jz4740_pwm7), }; static const struct ingenic_chip_info jz4740_chip_info = { @@ -447,17 +455,17 @@ static const char *jz4725b_pwm4_groups[] = { "pwm4", }; static const char *jz4725b_pwm5_groups[] = { "pwm5", }; static const struct function_desc jz4725b_functions[] = { - { "mmc0", jz4725b_mmc0_groups, ARRAY_SIZE(jz4725b_mmc0_groups), }, - { "mmc1", jz4725b_mmc1_groups, ARRAY_SIZE(jz4725b_mmc1_groups), }, - { "uart", jz4725b_uart_groups, ARRAY_SIZE(jz4725b_uart_groups), }, - { "nand", jz4725b_nand_groups, ARRAY_SIZE(jz4725b_nand_groups), }, - { "pwm0", jz4725b_pwm0_groups, ARRAY_SIZE(jz4725b_pwm0_groups), }, - { "pwm1", jz4725b_pwm1_groups, ARRAY_SIZE(jz4725b_pwm1_groups), }, - { "pwm2", jz4725b_pwm2_groups, ARRAY_SIZE(jz4725b_pwm2_groups), }, - { "pwm3", jz4725b_pwm3_groups, ARRAY_SIZE(jz4725b_pwm3_groups), }, - { "pwm4", jz4725b_pwm4_groups, ARRAY_SIZE(jz4725b_pwm4_groups), }, - { "pwm5", jz4725b_pwm5_groups, ARRAY_SIZE(jz4725b_pwm5_groups), }, - { "lcd", jz4725b_lcd_groups, ARRAY_SIZE(jz4725b_lcd_groups), }, + INGENIC_PIN_FUNCTION("mmc0", jz4725b_mmc0), + INGENIC_PIN_FUNCTION("mmc1", jz4725b_mmc1), + INGENIC_PIN_FUNCTION("uart", jz4725b_uart), + INGENIC_PIN_FUNCTION("nand", jz4725b_nand), + INGENIC_PIN_FUNCTION("pwm0", jz4725b_pwm0), + INGENIC_PIN_FUNCTION("pwm1", jz4725b_pwm1), + INGENIC_PIN_FUNCTION("pwm2", jz4725b_pwm2), + INGENIC_PIN_FUNCTION("pwm3", jz4725b_pwm3), + INGENIC_PIN_FUNCTION("pwm4", jz4725b_pwm4), + INGENIC_PIN_FUNCTION("pwm5", jz4725b_pwm5), + INGENIC_PIN_FUNCTION("lcd", jz4725b_lcd), }; static const struct ingenic_chip_info jz4725b_chip_info = { @@ -579,22 +587,22 @@ static const char *jz4750_pwm4_groups[] = { "pwm4", }; static const char *jz4750_pwm5_groups[] = { "pwm5", }; static const struct function_desc jz4750_functions[] = { - { "uart0", jz4750_uart0_groups, ARRAY_SIZE(jz4750_uart0_groups), }, - { "uart1", jz4750_uart1_groups, ARRAY_SIZE(jz4750_uart1_groups), }, - { "uart2", jz4750_uart2_groups, ARRAY_SIZE(jz4750_uart2_groups), }, - { "uart3", jz4750_uart3_groups, ARRAY_SIZE(jz4750_uart3_groups), }, - { "mmc0", jz4750_mmc0_groups, ARRAY_SIZE(jz4750_mmc0_groups), }, - { "mmc1", jz4750_mmc1_groups, ARRAY_SIZE(jz4750_mmc1_groups), }, - { "i2c", jz4750_i2c_groups, ARRAY_SIZE(jz4750_i2c_groups), }, - { "cim", jz4750_cim_groups, ARRAY_SIZE(jz4750_cim_groups), }, - { "lcd", jz4750_lcd_groups, ARRAY_SIZE(jz4750_lcd_groups), }, - { "nand", jz4750_nand_groups, ARRAY_SIZE(jz4750_nand_groups), }, - { "pwm0", jz4750_pwm0_groups, ARRAY_SIZE(jz4750_pwm0_groups), }, - { "pwm1", jz4750_pwm1_groups, ARRAY_SIZE(jz4750_pwm1_groups), }, - { "pwm2", jz4750_pwm2_groups, ARRAY_SIZE(jz4750_pwm2_groups), }, - { "pwm3", jz4750_pwm3_groups, ARRAY_SIZE(jz4750_pwm3_groups), }, - { "pwm4", jz4750_pwm4_groups, ARRAY_SIZE(jz4750_pwm4_groups), }, - { "pwm5", jz4750_pwm5_groups, ARRAY_SIZE(jz4750_pwm5_groups), }, + INGENIC_PIN_FUNCTION("uart0", jz4750_uart0), + INGENIC_PIN_FUNCTION("uart1", jz4750_uart1), + INGENIC_PIN_FUNCTION("uart2", jz4750_uart2), + INGENIC_PIN_FUNCTION("uart3", jz4750_uart3), + INGENIC_PIN_FUNCTION("mmc0", jz4750_mmc0), + INGENIC_PIN_FUNCTION("mmc1", jz4750_mmc1), + INGENIC_PIN_FUNCTION("i2c", jz4750_i2c), + INGENIC_PIN_FUNCTION("cim", jz4750_cim), + INGENIC_PIN_FUNCTION("lcd", jz4750_lcd), + INGENIC_PIN_FUNCTION("nand", jz4750_nand), + INGENIC_PIN_FUNCTION("pwm0", jz4750_pwm0), + INGENIC_PIN_FUNCTION("pwm1", jz4750_pwm1), + INGENIC_PIN_FUNCTION("pwm2", jz4750_pwm2), + INGENIC_PIN_FUNCTION("pwm3", jz4750_pwm3), + INGENIC_PIN_FUNCTION("pwm4", jz4750_pwm4), + INGENIC_PIN_FUNCTION("pwm5", jz4750_pwm5), }; static const struct ingenic_chip_info jz4750_chip_info = { @@ -744,22 +752,22 @@ static const char *jz4755_pwm4_groups[] = { "pwm4", }; static const char *jz4755_pwm5_groups[] = { "pwm5", }; static const struct function_desc jz4755_functions[] = { - { "uart0", jz4755_uart0_groups, ARRAY_SIZE(jz4755_uart0_groups), }, - { "uart1", jz4755_uart1_groups, ARRAY_SIZE(jz4755_uart1_groups), }, - { "uart2", jz4755_uart2_groups, ARRAY_SIZE(jz4755_uart2_groups), }, - { "ssi", jz4755_ssi_groups, ARRAY_SIZE(jz4755_ssi_groups), }, - { "mmc0", jz4755_mmc0_groups, ARRAY_SIZE(jz4755_mmc0_groups), }, - { "mmc1", jz4755_mmc1_groups, ARRAY_SIZE(jz4755_mmc1_groups), }, - { "i2c", jz4755_i2c_groups, ARRAY_SIZE(jz4755_i2c_groups), }, - { "cim", jz4755_cim_groups, ARRAY_SIZE(jz4755_cim_groups), }, - { "lcd", jz4755_lcd_groups, ARRAY_SIZE(jz4755_lcd_groups), }, - { "nand", jz4755_nand_groups, ARRAY_SIZE(jz4755_nand_groups), }, - { "pwm0", jz4755_pwm0_groups, ARRAY_SIZE(jz4755_pwm0_groups), }, - { "pwm1", jz4755_pwm1_groups, ARRAY_SIZE(jz4755_pwm1_groups), }, - { "pwm2", jz4755_pwm2_groups, ARRAY_SIZE(jz4755_pwm2_groups), }, - { "pwm3", jz4755_pwm3_groups, ARRAY_SIZE(jz4755_pwm3_groups), }, - { "pwm4", jz4755_pwm4_groups, ARRAY_SIZE(jz4755_pwm4_groups), }, - { "pwm5", jz4755_pwm5_groups, ARRAY_SIZE(jz4755_pwm5_groups), }, + INGENIC_PIN_FUNCTION("uart0", jz4755_uart0), + INGENIC_PIN_FUNCTION("uart1", jz4755_uart1), + INGENIC_PIN_FUNCTION("uart2", jz4755_uart2), + INGENIC_PIN_FUNCTION("ssi", jz4755_ssi), + INGENIC_PIN_FUNCTION("mmc0", jz4755_mmc0), + INGENIC_PIN_FUNCTION("mmc1", jz4755_mmc1), + INGENIC_PIN_FUNCTION("i2c", jz4755_i2c), + INGENIC_PIN_FUNCTION("cim", jz4755_cim), + INGENIC_PIN_FUNCTION("lcd", jz4755_lcd), + INGENIC_PIN_FUNCTION("nand", jz4755_nand), + INGENIC_PIN_FUNCTION("pwm0", jz4755_pwm0), + INGENIC_PIN_FUNCTION("pwm1", jz4755_pwm1), + INGENIC_PIN_FUNCTION("pwm2", jz4755_pwm2), + INGENIC_PIN_FUNCTION("pwm3", jz4755_pwm3), + INGENIC_PIN_FUNCTION("pwm4", jz4755_pwm4), + INGENIC_PIN_FUNCTION("pwm5", jz4755_pwm5), }; static const struct ingenic_chip_info jz4755_chip_info = { @@ -1079,35 +1087,35 @@ static const char *jz4760_pwm7_groups[] = { "pwm7", }; static const char *jz4760_otg_groups[] = { "otg-vbus", }; static const struct function_desc jz4760_functions[] = { - { "uart0", jz4760_uart0_groups, ARRAY_SIZE(jz4760_uart0_groups), }, - { "uart1", jz4760_uart1_groups, ARRAY_SIZE(jz4760_uart1_groups), }, - { "uart2", jz4760_uart2_groups, ARRAY_SIZE(jz4760_uart2_groups), }, - { "uart3", jz4760_uart3_groups, ARRAY_SIZE(jz4760_uart3_groups), }, - { "ssi0", jz4760_ssi0_groups, ARRAY_SIZE(jz4760_ssi0_groups), }, - { "ssi1", jz4760_ssi1_groups, ARRAY_SIZE(jz4760_ssi1_groups), }, - { "mmc0", jz4760_mmc0_groups, ARRAY_SIZE(jz4760_mmc0_groups), }, - { "mmc1", jz4760_mmc1_groups, ARRAY_SIZE(jz4760_mmc1_groups), }, - { "mmc2", jz4760_mmc2_groups, ARRAY_SIZE(jz4760_mmc2_groups), }, - { "nemc", jz4760_nemc_groups, ARRAY_SIZE(jz4760_nemc_groups), }, - { "nemc-cs1", jz4760_cs1_groups, ARRAY_SIZE(jz4760_cs1_groups), }, - { "nemc-cs2", jz4760_cs2_groups, ARRAY_SIZE(jz4760_cs2_groups), }, - { "nemc-cs3", jz4760_cs3_groups, ARRAY_SIZE(jz4760_cs3_groups), }, - { "nemc-cs4", jz4760_cs4_groups, ARRAY_SIZE(jz4760_cs4_groups), }, - { "nemc-cs5", jz4760_cs5_groups, ARRAY_SIZE(jz4760_cs5_groups), }, - { "nemc-cs6", jz4760_cs6_groups, ARRAY_SIZE(jz4760_cs6_groups), }, - { "i2c0", jz4760_i2c0_groups, ARRAY_SIZE(jz4760_i2c0_groups), }, - { "i2c1", jz4760_i2c1_groups, ARRAY_SIZE(jz4760_i2c1_groups), }, - { "cim", jz4760_cim_groups, ARRAY_SIZE(jz4760_cim_groups), }, - { "lcd", jz4760_lcd_groups, ARRAY_SIZE(jz4760_lcd_groups), }, - { "pwm0", jz4760_pwm0_groups, ARRAY_SIZE(jz4760_pwm0_groups), }, - { "pwm1", jz4760_pwm1_groups, ARRAY_SIZE(jz4760_pwm1_groups), }, - { "pwm2", jz4760_pwm2_groups, ARRAY_SIZE(jz4760_pwm2_groups), }, - { "pwm3", jz4760_pwm3_groups, ARRAY_SIZE(jz4760_pwm3_groups), }, - { "pwm4", jz4760_pwm4_groups, ARRAY_SIZE(jz4760_pwm4_groups), }, - { "pwm5", jz4760_pwm5_groups, ARRAY_SIZE(jz4760_pwm5_groups), }, - { "pwm6", jz4760_pwm6_groups, ARRAY_SIZE(jz4760_pwm6_groups), }, - { "pwm7", jz4760_pwm7_groups, ARRAY_SIZE(jz4760_pwm7_groups), }, - { "otg", jz4760_otg_groups, ARRAY_SIZE(jz4760_otg_groups), }, + INGENIC_PIN_FUNCTION("uart0", jz4760_uart0), + INGENIC_PIN_FUNCTION("uart1", jz4760_uart1), + INGENIC_PIN_FUNCTION("uart2", jz4760_uart2), + INGENIC_PIN_FUNCTION("uart3", jz4760_uart3), + INGENIC_PIN_FUNCTION("ssi0", jz4760_ssi0), + INGENIC_PIN_FUNCTION("ssi1", jz4760_ssi1), + INGENIC_PIN_FUNCTION("mmc0", jz4760_mmc0), + INGENIC_PIN_FUNCTION("mmc1", jz4760_mmc1), + INGENIC_PIN_FUNCTION("mmc2", jz4760_mmc2), + INGENIC_PIN_FUNCTION("nemc", jz4760_nemc), + INGENIC_PIN_FUNCTION("nemc-cs1", jz4760_cs1), + INGENIC_PIN_FUNCTION("nemc-cs2", jz4760_cs2), + INGENIC_PIN_FUNCTION("nemc-cs3", jz4760_cs3), + INGENIC_PIN_FUNCTION("nemc-cs4", jz4760_cs4), + INGENIC_PIN_FUNCTION("nemc-cs5", jz4760_cs5), + INGENIC_PIN_FUNCTION("nemc-cs6", jz4760_cs6), + INGENIC_PIN_FUNCTION("i2c0", jz4760_i2c0), + INGENIC_PIN_FUNCTION("i2c1", jz4760_i2c1), + INGENIC_PIN_FUNCTION("cim", jz4760_cim), + INGENIC_PIN_FUNCTION("lcd", jz4760_lcd), + INGENIC_PIN_FUNCTION("pwm0", jz4760_pwm0), + INGENIC_PIN_FUNCTION("pwm1", jz4760_pwm1), + INGENIC_PIN_FUNCTION("pwm2", jz4760_pwm2), + INGENIC_PIN_FUNCTION("pwm3", jz4760_pwm3), + INGENIC_PIN_FUNCTION("pwm4", jz4760_pwm4), + INGENIC_PIN_FUNCTION("pwm5", jz4760_pwm5), + INGENIC_PIN_FUNCTION("pwm6", jz4760_pwm6), + INGENIC_PIN_FUNCTION("pwm7", jz4760_pwm7), + INGENIC_PIN_FUNCTION("otg", jz4760_otg), }; static const struct ingenic_chip_info jz4760_chip_info = { @@ -1417,37 +1425,37 @@ static const char *jz4770_pwm7_groups[] = { "pwm7", }; static const char *jz4770_mac_groups[] = { "mac-rmii", "mac-mii", }; static const struct function_desc jz4770_functions[] = { - { "uart0", jz4770_uart0_groups, ARRAY_SIZE(jz4770_uart0_groups), }, - { "uart1", jz4770_uart1_groups, ARRAY_SIZE(jz4770_uart1_groups), }, - { "uart2", jz4770_uart2_groups, ARRAY_SIZE(jz4770_uart2_groups), }, - { "uart3", jz4770_uart3_groups, ARRAY_SIZE(jz4770_uart3_groups), }, - { "ssi0", jz4770_ssi0_groups, ARRAY_SIZE(jz4770_ssi0_groups), }, - { "ssi1", jz4770_ssi1_groups, ARRAY_SIZE(jz4770_ssi1_groups), }, - { "mmc0", jz4770_mmc0_groups, ARRAY_SIZE(jz4770_mmc0_groups), }, - { "mmc1", jz4770_mmc1_groups, ARRAY_SIZE(jz4770_mmc1_groups), }, - { "mmc2", jz4770_mmc2_groups, ARRAY_SIZE(jz4770_mmc2_groups), }, - { "nemc", jz4770_nemc_groups, ARRAY_SIZE(jz4770_nemc_groups), }, - { "nemc-cs1", jz4770_cs1_groups, ARRAY_SIZE(jz4770_cs1_groups), }, - { "nemc-cs2", jz4770_cs2_groups, ARRAY_SIZE(jz4770_cs2_groups), }, - { "nemc-cs3", jz4770_cs3_groups, ARRAY_SIZE(jz4770_cs3_groups), }, - { "nemc-cs4", jz4770_cs4_groups, ARRAY_SIZE(jz4770_cs4_groups), }, - { "nemc-cs5", jz4770_cs5_groups, ARRAY_SIZE(jz4770_cs5_groups), }, - { "nemc-cs6", jz4770_cs6_groups, ARRAY_SIZE(jz4770_cs6_groups), }, - { "i2c0", jz4770_i2c0_groups, ARRAY_SIZE(jz4770_i2c0_groups), }, - { "i2c1", jz4770_i2c1_groups, ARRAY_SIZE(jz4770_i2c1_groups), }, - { "i2c2", jz4770_i2c2_groups, ARRAY_SIZE(jz4770_i2c2_groups), }, - { "cim", jz4770_cim_groups, ARRAY_SIZE(jz4770_cim_groups), }, - { "lcd", jz4770_lcd_groups, ARRAY_SIZE(jz4770_lcd_groups), }, - { "pwm0", jz4770_pwm0_groups, ARRAY_SIZE(jz4770_pwm0_groups), }, - { "pwm1", jz4770_pwm1_groups, ARRAY_SIZE(jz4770_pwm1_groups), }, - { "pwm2", jz4770_pwm2_groups, ARRAY_SIZE(jz4770_pwm2_groups), }, - { "pwm3", jz4770_pwm3_groups, ARRAY_SIZE(jz4770_pwm3_groups), }, - { "pwm4", jz4770_pwm4_groups, ARRAY_SIZE(jz4770_pwm4_groups), }, - { "pwm5", jz4770_pwm5_groups, ARRAY_SIZE(jz4770_pwm5_groups), }, - { "pwm6", jz4770_pwm6_groups, ARRAY_SIZE(jz4770_pwm6_groups), }, - { "pwm7", jz4770_pwm7_groups, ARRAY_SIZE(jz4770_pwm7_groups), }, - { "mac", jz4770_mac_groups, ARRAY_SIZE(jz4770_mac_groups), }, - { "otg", jz4760_otg_groups, ARRAY_SIZE(jz4760_otg_groups), }, + INGENIC_PIN_FUNCTION("uart0", jz4770_uart0), + INGENIC_PIN_FUNCTION("uart1", jz4770_uart1), + INGENIC_PIN_FUNCTION("uart2", jz4770_uart2), + INGENIC_PIN_FUNCTION("uart3", jz4770_uart3), + INGENIC_PIN_FUNCTION("ssi0", jz4770_ssi0), + INGENIC_PIN_FUNCTION("ssi1", jz4770_ssi1), + INGENIC_PIN_FUNCTION("mmc0", jz4770_mmc0), + INGENIC_PIN_FUNCTION("mmc1", jz4770_mmc1), + INGENIC_PIN_FUNCTION("mmc2", jz4770_mmc2), + INGENIC_PIN_FUNCTION("nemc", jz4770_nemc), + INGENIC_PIN_FUNCTION("nemc-cs1", jz4770_cs1), + INGENIC_PIN_FUNCTION("nemc-cs2", jz4770_cs2), + INGENIC_PIN_FUNCTION("nemc-cs3", jz4770_cs3), + INGENIC_PIN_FUNCTION("nemc-cs4", jz4770_cs4), + INGENIC_PIN_FUNCTION("nemc-cs5", jz4770_cs5), + INGENIC_PIN_FUNCTION("nemc-cs6", jz4770_cs6), + INGENIC_PIN_FUNCTION("i2c0", jz4770_i2c0), + INGENIC_PIN_FUNCTION("i2c1", jz4770_i2c1), + INGENIC_PIN_FUNCTION("i2c2", jz4770_i2c2), + INGENIC_PIN_FUNCTION("cim", jz4770_cim), + INGENIC_PIN_FUNCTION("lcd", jz4770_lcd), + INGENIC_PIN_FUNCTION("pwm0", jz4770_pwm0), + INGENIC_PIN_FUNCTION("pwm1", jz4770_pwm1), + INGENIC_PIN_FUNCTION("pwm2", jz4770_pwm2), + INGENIC_PIN_FUNCTION("pwm3", jz4770_pwm3), + INGENIC_PIN_FUNCTION("pwm4", jz4770_pwm4), + INGENIC_PIN_FUNCTION("pwm5", jz4770_pwm5), + INGENIC_PIN_FUNCTION("pwm6", jz4770_pwm6), + INGENIC_PIN_FUNCTION("pwm7", jz4770_pwm7), + INGENIC_PIN_FUNCTION("mac", jz4770_mac), + INGENIC_PIN_FUNCTION("otg", jz4760_otg), }; static const struct ingenic_chip_info jz4770_chip_info = { @@ -1696,31 +1704,31 @@ static const char *jz4775_mac_groups[] = { static const char *jz4775_otg_groups[] = { "otg-vbus", }; static const struct function_desc jz4775_functions[] = { - { "uart0", jz4775_uart0_groups, ARRAY_SIZE(jz4775_uart0_groups), }, - { "uart1", jz4775_uart1_groups, ARRAY_SIZE(jz4775_uart1_groups), }, - { "uart2", jz4775_uart2_groups, ARRAY_SIZE(jz4775_uart2_groups), }, - { "uart3", jz4775_uart3_groups, ARRAY_SIZE(jz4775_uart3_groups), }, - { "ssi", jz4775_ssi_groups, ARRAY_SIZE(jz4775_ssi_groups), }, - { "mmc0", jz4775_mmc0_groups, ARRAY_SIZE(jz4775_mmc0_groups), }, - { "mmc1", jz4775_mmc1_groups, ARRAY_SIZE(jz4775_mmc1_groups), }, - { "mmc2", jz4775_mmc2_groups, ARRAY_SIZE(jz4775_mmc2_groups), }, - { "nemc", jz4775_nemc_groups, ARRAY_SIZE(jz4775_nemc_groups), }, - { "nemc-cs1", jz4775_cs1_groups, ARRAY_SIZE(jz4775_cs1_groups), }, - { "nemc-cs2", jz4775_cs2_groups, ARRAY_SIZE(jz4775_cs2_groups), }, - { "nemc-cs3", jz4775_cs3_groups, ARRAY_SIZE(jz4775_cs3_groups), }, - { "i2c0", jz4775_i2c0_groups, ARRAY_SIZE(jz4775_i2c0_groups), }, - { "i2c1", jz4775_i2c1_groups, ARRAY_SIZE(jz4775_i2c1_groups), }, - { "i2c2", jz4775_i2c2_groups, ARRAY_SIZE(jz4775_i2c2_groups), }, - { "i2s", jz4775_i2s_groups, ARRAY_SIZE(jz4775_i2s_groups), }, - { "dmic", jz4775_dmic_groups, ARRAY_SIZE(jz4775_dmic_groups), }, - { "cim", jz4775_cim_groups, ARRAY_SIZE(jz4775_cim_groups), }, - { "lcd", jz4775_lcd_groups, ARRAY_SIZE(jz4775_lcd_groups), }, - { "pwm0", jz4775_pwm0_groups, ARRAY_SIZE(jz4775_pwm0_groups), }, - { "pwm1", jz4775_pwm1_groups, ARRAY_SIZE(jz4775_pwm1_groups), }, - { "pwm2", jz4775_pwm2_groups, ARRAY_SIZE(jz4775_pwm2_groups), }, - { "pwm3", jz4775_pwm3_groups, ARRAY_SIZE(jz4775_pwm3_groups), }, - { "mac", jz4775_mac_groups, ARRAY_SIZE(jz4775_mac_groups), }, - { "otg", jz4775_otg_groups, ARRAY_SIZE(jz4775_otg_groups), }, + INGENIC_PIN_FUNCTION("uart0", jz4775_uart0), + INGENIC_PIN_FUNCTION("uart1", jz4775_uart1), + INGENIC_PIN_FUNCTION("uart2", jz4775_uart2), + INGENIC_PIN_FUNCTION("uart3", jz4775_uart3), + INGENIC_PIN_FUNCTION("ssi", jz4775_ssi), + INGENIC_PIN_FUNCTION("mmc0", jz4775_mmc0), + INGENIC_PIN_FUNCTION("mmc1", jz4775_mmc1), + INGENIC_PIN_FUNCTION("mmc2", jz4775_mmc2), + INGENIC_PIN_FUNCTION("nemc", jz4775_nemc), + INGENIC_PIN_FUNCTION("nemc-cs1", jz4775_cs1), + INGENIC_PIN_FUNCTION("nemc-cs2", jz4775_cs2), + INGENIC_PIN_FUNCTION("nemc-cs3", jz4775_cs3), + INGENIC_PIN_FUNCTION("i2c0", jz4775_i2c0), + INGENIC_PIN_FUNCTION("i2c1", jz4775_i2c1), + INGENIC_PIN_FUNCTION("i2c2", jz4775_i2c2), + INGENIC_PIN_FUNCTION("i2s", jz4775_i2s), + INGENIC_PIN_FUNCTION("dmic", jz4775_dmic), + INGENIC_PIN_FUNCTION("cim", jz4775_cim), + INGENIC_PIN_FUNCTION("lcd", jz4775_lcd), + INGENIC_PIN_FUNCTION("pwm0", jz4775_pwm0), + INGENIC_PIN_FUNCTION("pwm1", jz4775_pwm1), + INGENIC_PIN_FUNCTION("pwm2", jz4775_pwm2), + INGENIC_PIN_FUNCTION("pwm3", jz4775_pwm3), + INGENIC_PIN_FUNCTION("mac", jz4775_mac), + INGENIC_PIN_FUNCTION("otg", jz4775_otg), }; static const struct ingenic_chip_info jz4775_chip_info = { @@ -1949,42 +1957,41 @@ static const char *jz4780_cim_groups[] = { "cim-data", }; static const char *jz4780_hdmi_ddc_groups[] = { "hdmi-ddc", }; static const struct function_desc jz4780_functions[] = { - { "uart0", jz4770_uart0_groups, ARRAY_SIZE(jz4770_uart0_groups), }, - { "uart1", jz4770_uart1_groups, ARRAY_SIZE(jz4770_uart1_groups), }, - { "uart2", jz4780_uart2_groups, ARRAY_SIZE(jz4780_uart2_groups), }, - { "uart3", jz4770_uart3_groups, ARRAY_SIZE(jz4770_uart3_groups), }, - { "uart4", jz4780_uart4_groups, ARRAY_SIZE(jz4780_uart4_groups), }, - { "ssi0", jz4780_ssi0_groups, ARRAY_SIZE(jz4780_ssi0_groups), }, - { "ssi1", jz4780_ssi1_groups, ARRAY_SIZE(jz4780_ssi1_groups), }, - { "mmc0", jz4780_mmc0_groups, ARRAY_SIZE(jz4780_mmc0_groups), }, - { "mmc1", jz4780_mmc1_groups, ARRAY_SIZE(jz4780_mmc1_groups), }, - { "mmc2", jz4780_mmc2_groups, ARRAY_SIZE(jz4780_mmc2_groups), }, - { "nemc", jz4780_nemc_groups, ARRAY_SIZE(jz4780_nemc_groups), }, - { "nemc-cs1", jz4770_cs1_groups, ARRAY_SIZE(jz4770_cs1_groups), }, - { "nemc-cs2", jz4770_cs2_groups, ARRAY_SIZE(jz4770_cs2_groups), }, - { "nemc-cs3", jz4770_cs3_groups, ARRAY_SIZE(jz4770_cs3_groups), }, - { "nemc-cs4", jz4770_cs4_groups, ARRAY_SIZE(jz4770_cs4_groups), }, - { "nemc-cs5", jz4770_cs5_groups, ARRAY_SIZE(jz4770_cs5_groups), }, - { "nemc-cs6", jz4770_cs6_groups, ARRAY_SIZE(jz4770_cs6_groups), }, - { "i2c0", jz4770_i2c0_groups, ARRAY_SIZE(jz4770_i2c0_groups), }, - { "i2c1", jz4770_i2c1_groups, ARRAY_SIZE(jz4770_i2c1_groups), }, - { "i2c2", jz4770_i2c2_groups, ARRAY_SIZE(jz4770_i2c2_groups), }, - { "i2c3", jz4780_i2c3_groups, ARRAY_SIZE(jz4780_i2c3_groups), }, - { "i2c4", jz4780_i2c4_groups, ARRAY_SIZE(jz4780_i2c4_groups), }, - { "i2s", jz4780_i2s_groups, ARRAY_SIZE(jz4780_i2s_groups), }, - { "dmic", jz4780_dmic_groups, ARRAY_SIZE(jz4780_dmic_groups), }, - { "cim", jz4780_cim_groups, ARRAY_SIZE(jz4780_cim_groups), }, - { "lcd", jz4770_lcd_groups, ARRAY_SIZE(jz4770_lcd_groups), }, - { "pwm0", jz4770_pwm0_groups, ARRAY_SIZE(jz4770_pwm0_groups), }, - { "pwm1", jz4770_pwm1_groups, ARRAY_SIZE(jz4770_pwm1_groups), }, - { "pwm2", jz4770_pwm2_groups, ARRAY_SIZE(jz4770_pwm2_groups), }, - { "pwm3", jz4770_pwm3_groups, ARRAY_SIZE(jz4770_pwm3_groups), }, - { "pwm4", jz4770_pwm4_groups, ARRAY_SIZE(jz4770_pwm4_groups), }, - { "pwm5", jz4770_pwm5_groups, ARRAY_SIZE(jz4770_pwm5_groups), }, - { "pwm6", jz4770_pwm6_groups, ARRAY_SIZE(jz4770_pwm6_groups), }, - { "pwm7", jz4770_pwm7_groups, ARRAY_SIZE(jz4770_pwm7_groups), }, - { "hdmi-ddc", jz4780_hdmi_ddc_groups, - ARRAY_SIZE(jz4780_hdmi_ddc_groups), }, + INGENIC_PIN_FUNCTION("uart0", jz4770_uart0), + INGENIC_PIN_FUNCTION("uart1", jz4770_uart1), + INGENIC_PIN_FUNCTION("uart2", jz4780_uart2), + INGENIC_PIN_FUNCTION("uart3", jz4770_uart3), + INGENIC_PIN_FUNCTION("uart4", jz4780_uart4), + INGENIC_PIN_FUNCTION("ssi0", jz4780_ssi0), + INGENIC_PIN_FUNCTION("ssi1", jz4780_ssi1), + INGENIC_PIN_FUNCTION("mmc0", jz4780_mmc0), + INGENIC_PIN_FUNCTION("mmc1", jz4780_mmc1), + INGENIC_PIN_FUNCTION("mmc2", jz4780_mmc2), + INGENIC_PIN_FUNCTION("nemc", jz4780_nemc), + INGENIC_PIN_FUNCTION("nemc-cs1", jz4770_cs1), + INGENIC_PIN_FUNCTION("nemc-cs2", jz4770_cs2), + INGENIC_PIN_FUNCTION("nemc-cs3", jz4770_cs3), + INGENIC_PIN_FUNCTION("nemc-cs4", jz4770_cs4), + INGENIC_PIN_FUNCTION("nemc-cs5", jz4770_cs5), + INGENIC_PIN_FUNCTION("nemc-cs6", jz4770_cs6), + INGENIC_PIN_FUNCTION("i2c0", jz4770_i2c0), + INGENIC_PIN_FUNCTION("i2c1", jz4770_i2c1), + INGENIC_PIN_FUNCTION("i2c2", jz4770_i2c2), + INGENIC_PIN_FUNCTION("i2c3", jz4780_i2c3), + INGENIC_PIN_FUNCTION("i2c4", jz4780_i2c4), + INGENIC_PIN_FUNCTION("i2s", jz4780_i2s), + INGENIC_PIN_FUNCTION("dmic", jz4780_dmic), + INGENIC_PIN_FUNCTION("cim", jz4780_cim), + INGENIC_PIN_FUNCTION("lcd", jz4770_lcd), + INGENIC_PIN_FUNCTION("pwm0", jz4770_pwm0), + INGENIC_PIN_FUNCTION("pwm1", jz4770_pwm1), + INGENIC_PIN_FUNCTION("pwm2", jz4770_pwm2), + INGENIC_PIN_FUNCTION("pwm3", jz4770_pwm3), + INGENIC_PIN_FUNCTION("pwm4", jz4770_pwm4), + INGENIC_PIN_FUNCTION("pwm5", jz4770_pwm5), + INGENIC_PIN_FUNCTION("pwm6", jz4770_pwm6), + INGENIC_PIN_FUNCTION("pwm7", jz4770_pwm7), + INGENIC_PIN_FUNCTION("hdmi-ddc", jz4780_hdmi_ddc), }; static const struct ingenic_chip_info jz4780_chip_info = { @@ -2185,29 +2192,29 @@ static const char *x1000_pwm4_groups[] = { "pwm4", }; static const char *x1000_mac_groups[] = { "mac", }; static const struct function_desc x1000_functions[] = { - { "uart0", x1000_uart0_groups, ARRAY_SIZE(x1000_uart0_groups), }, - { "uart1", x1000_uart1_groups, ARRAY_SIZE(x1000_uart1_groups), }, - { "uart2", x1000_uart2_groups, ARRAY_SIZE(x1000_uart2_groups), }, - { "sfc", x1000_sfc_groups, ARRAY_SIZE(x1000_sfc_groups), }, - { "ssi", x1000_ssi_groups, ARRAY_SIZE(x1000_ssi_groups), }, - { "mmc0", x1000_mmc0_groups, ARRAY_SIZE(x1000_mmc0_groups), }, - { "mmc1", x1000_mmc1_groups, ARRAY_SIZE(x1000_mmc1_groups), }, - { "emc", x1000_emc_groups, ARRAY_SIZE(x1000_emc_groups), }, - { "emc-cs1", x1000_cs1_groups, ARRAY_SIZE(x1000_cs1_groups), }, - { "emc-cs2", x1000_cs2_groups, ARRAY_SIZE(x1000_cs2_groups), }, - { "i2c0", x1000_i2c0_groups, ARRAY_SIZE(x1000_i2c0_groups), }, - { "i2c1", x1000_i2c1_groups, ARRAY_SIZE(x1000_i2c1_groups), }, - { "i2c2", x1000_i2c2_groups, ARRAY_SIZE(x1000_i2c2_groups), }, - { "i2s", x1000_i2s_groups, ARRAY_SIZE(x1000_i2s_groups), }, - { "dmic", x1000_dmic_groups, ARRAY_SIZE(x1000_dmic_groups), }, - { "cim", x1000_cim_groups, ARRAY_SIZE(x1000_cim_groups), }, - { "lcd", x1000_lcd_groups, ARRAY_SIZE(x1000_lcd_groups), }, - { "pwm0", x1000_pwm0_groups, ARRAY_SIZE(x1000_pwm0_groups), }, - { "pwm1", x1000_pwm1_groups, ARRAY_SIZE(x1000_pwm1_groups), }, - { "pwm2", x1000_pwm2_groups, ARRAY_SIZE(x1000_pwm2_groups), }, - { "pwm3", x1000_pwm3_groups, ARRAY_SIZE(x1000_pwm3_groups), }, - { "pwm4", x1000_pwm4_groups, ARRAY_SIZE(x1000_pwm4_groups), }, - { "mac", x1000_mac_groups, ARRAY_SIZE(x1000_mac_groups), }, + INGENIC_PIN_FUNCTION("uart0", x1000_uart0), + INGENIC_PIN_FUNCTION("uart1", x1000_uart1), + INGENIC_PIN_FUNCTION("uart2", x1000_uart2), + INGENIC_PIN_FUNCTION("sfc", x1000_sfc), + INGENIC_PIN_FUNCTION("ssi", x1000_ssi), + INGENIC_PIN_FUNCTION("mmc0", x1000_mmc0), + INGENIC_PIN_FUNCTION("mmc1", x1000_mmc1), + INGENIC_PIN_FUNCTION("emc", x1000_emc), + INGENIC_PIN_FUNCTION("emc-cs1", x1000_cs1), + INGENIC_PIN_FUNCTION("emc-cs2", x1000_cs2), + INGENIC_PIN_FUNCTION("i2c0", x1000_i2c0), + INGENIC_PIN_FUNCTION("i2c1", x1000_i2c1), + INGENIC_PIN_FUNCTION("i2c2", x1000_i2c2), + INGENIC_PIN_FUNCTION("i2s", x1000_i2s), + INGENIC_PIN_FUNCTION("dmic", x1000_dmic), + INGENIC_PIN_FUNCTION("cim", x1000_cim), + INGENIC_PIN_FUNCTION("lcd", x1000_lcd), + INGENIC_PIN_FUNCTION("pwm0", x1000_pwm0), + INGENIC_PIN_FUNCTION("pwm1", x1000_pwm1), + INGENIC_PIN_FUNCTION("pwm2", x1000_pwm2), + INGENIC_PIN_FUNCTION("pwm3", x1000_pwm3), + INGENIC_PIN_FUNCTION("pwm4", x1000_pwm4), + INGENIC_PIN_FUNCTION("mac", x1000_mac), }; static const struct regmap_range x1000_access_ranges[] = { @@ -2315,22 +2322,22 @@ static const char *x1500_pwm3_groups[] = { "pwm3", }; static const char *x1500_pwm4_groups[] = { "pwm4", }; static const struct function_desc x1500_functions[] = { - { "uart0", x1500_uart0_groups, ARRAY_SIZE(x1500_uart0_groups), }, - { "uart1", x1500_uart1_groups, ARRAY_SIZE(x1500_uart1_groups), }, - { "uart2", x1500_uart2_groups, ARRAY_SIZE(x1500_uart2_groups), }, - { "sfc", x1000_sfc_groups, ARRAY_SIZE(x1000_sfc_groups), }, - { "mmc", x1500_mmc_groups, ARRAY_SIZE(x1500_mmc_groups), }, - { "i2c0", x1500_i2c0_groups, ARRAY_SIZE(x1500_i2c0_groups), }, - { "i2c1", x1500_i2c1_groups, ARRAY_SIZE(x1500_i2c1_groups), }, - { "i2c2", x1500_i2c2_groups, ARRAY_SIZE(x1500_i2c2_groups), }, - { "i2s", x1500_i2s_groups, ARRAY_SIZE(x1500_i2s_groups), }, - { "dmic", x1500_dmic_groups, ARRAY_SIZE(x1500_dmic_groups), }, - { "cim", x1500_cim_groups, ARRAY_SIZE(x1500_cim_groups), }, - { "pwm0", x1500_pwm0_groups, ARRAY_SIZE(x1500_pwm0_groups), }, - { "pwm1", x1500_pwm1_groups, ARRAY_SIZE(x1500_pwm1_groups), }, - { "pwm2", x1500_pwm2_groups, ARRAY_SIZE(x1500_pwm2_groups), }, - { "pwm3", x1500_pwm3_groups, ARRAY_SIZE(x1500_pwm3_groups), }, - { "pwm4", x1500_pwm4_groups, ARRAY_SIZE(x1500_pwm4_groups), }, + INGENIC_PIN_FUNCTION("uart0", x1500_uart0), + INGENIC_PIN_FUNCTION("uart1", x1500_uart1), + INGENIC_PIN_FUNCTION("uart2", x1500_uart2), + INGENIC_PIN_FUNCTION("sfc", x1000_sfc), + INGENIC_PIN_FUNCTION("mmc", x1500_mmc), + INGENIC_PIN_FUNCTION("i2c0", x1500_i2c0), + INGENIC_PIN_FUNCTION("i2c1", x1500_i2c1), + INGENIC_PIN_FUNCTION("i2c2", x1500_i2c2), + INGENIC_PIN_FUNCTION("i2s", x1500_i2s), + INGENIC_PIN_FUNCTION("dmic", x1500_dmic), + INGENIC_PIN_FUNCTION("cim", x1500_cim), + INGENIC_PIN_FUNCTION("pwm0", x1500_pwm0), + INGENIC_PIN_FUNCTION("pwm1", x1500_pwm1), + INGENIC_PIN_FUNCTION("pwm2", x1500_pwm2), + INGENIC_PIN_FUNCTION("pwm3", x1500_pwm3), + INGENIC_PIN_FUNCTION("pwm4", x1500_pwm4), }; static const struct ingenic_chip_info x1500_chip_info = { @@ -2526,28 +2533,28 @@ static const char *x1830_pwm7_groups[] = { "pwm7-c-18", "pwm7-c-28", }; static const char *x1830_mac_groups[] = { "mac", }; static const struct function_desc x1830_functions[] = { - { "uart0", x1830_uart0_groups, ARRAY_SIZE(x1830_uart0_groups), }, - { "uart1", x1830_uart1_groups, ARRAY_SIZE(x1830_uart1_groups), }, - { "sfc", x1830_sfc_groups, ARRAY_SIZE(x1830_sfc_groups), }, - { "ssi0", x1830_ssi0_groups, ARRAY_SIZE(x1830_ssi0_groups), }, - { "ssi1", x1830_ssi1_groups, ARRAY_SIZE(x1830_ssi1_groups), }, - { "mmc0", x1830_mmc0_groups, ARRAY_SIZE(x1830_mmc0_groups), }, - { "mmc1", x1830_mmc1_groups, ARRAY_SIZE(x1830_mmc1_groups), }, - { "i2c0", x1830_i2c0_groups, ARRAY_SIZE(x1830_i2c0_groups), }, - { "i2c1", x1830_i2c1_groups, ARRAY_SIZE(x1830_i2c1_groups), }, - { "i2c2", x1830_i2c2_groups, ARRAY_SIZE(x1830_i2c2_groups), }, - { "i2s", x1830_i2s_groups, ARRAY_SIZE(x1830_i2s_groups), }, - { "dmic", x1830_dmic_groups, ARRAY_SIZE(x1830_dmic_groups), }, - { "lcd", x1830_lcd_groups, ARRAY_SIZE(x1830_lcd_groups), }, - { "pwm0", x1830_pwm0_groups, ARRAY_SIZE(x1830_pwm0_groups), }, - { "pwm1", x1830_pwm1_groups, ARRAY_SIZE(x1830_pwm1_groups), }, - { "pwm2", x1830_pwm2_groups, ARRAY_SIZE(x1830_pwm2_groups), }, - { "pwm3", x1830_pwm3_groups, ARRAY_SIZE(x1830_pwm3_groups), }, - { "pwm4", x1830_pwm4_groups, ARRAY_SIZE(x1830_pwm4_groups), }, - { "pwm5", x1830_pwm5_groups, ARRAY_SIZE(x1830_pwm4_groups), }, - { "pwm6", x1830_pwm6_groups, ARRAY_SIZE(x1830_pwm4_groups), }, - { "pwm7", x1830_pwm7_groups, ARRAY_SIZE(x1830_pwm4_groups), }, - { "mac", x1830_mac_groups, ARRAY_SIZE(x1830_mac_groups), }, + INGENIC_PIN_FUNCTION("uart0", x1830_uart0), + INGENIC_PIN_FUNCTION("uart1", x1830_uart1), + INGENIC_PIN_FUNCTION("sfc", x1830_sfc), + INGENIC_PIN_FUNCTION("ssi0", x1830_ssi0), + INGENIC_PIN_FUNCTION("ssi1", x1830_ssi1), + INGENIC_PIN_FUNCTION("mmc0", x1830_mmc0), + INGENIC_PIN_FUNCTION("mmc1", x1830_mmc1), + INGENIC_PIN_FUNCTION("i2c0", x1830_i2c0), + INGENIC_PIN_FUNCTION("i2c1", x1830_i2c1), + INGENIC_PIN_FUNCTION("i2c2", x1830_i2c2), + INGENIC_PIN_FUNCTION("i2s", x1830_i2s), + INGENIC_PIN_FUNCTION("dmic", x1830_dmic), + INGENIC_PIN_FUNCTION("lcd", x1830_lcd), + INGENIC_PIN_FUNCTION("pwm0", x1830_pwm0), + INGENIC_PIN_FUNCTION("pwm1", x1830_pwm1), + INGENIC_PIN_FUNCTION("pwm2", x1830_pwm2), + INGENIC_PIN_FUNCTION("pwm3", x1830_pwm3), + INGENIC_PIN_FUNCTION("pwm4", x1830_pwm4), + INGENIC_PIN_FUNCTION("pwm5", x1830_pwm5), + INGENIC_PIN_FUNCTION("pwm6", x1830_pwm6), + INGENIC_PIN_FUNCTION("pwm7", x1830_pwm7), + INGENIC_PIN_FUNCTION("mac", x1830_mac), }; static const struct regmap_range x1830_access_ranges[] = { @@ -2972,56 +2979,56 @@ static const char *x2000_mac1_groups[] = { "mac1-rmii", "mac1-rgmii", }; static const char *x2000_otg_groups[] = { "otg-vbus", }; static const struct function_desc x2000_functions[] = { - { "uart0", x2000_uart0_groups, ARRAY_SIZE(x2000_uart0_groups), }, - { "uart1", x2000_uart1_groups, ARRAY_SIZE(x2000_uart1_groups), }, - { "uart2", x2000_uart2_groups, ARRAY_SIZE(x2000_uart2_groups), }, - { "uart3", x2000_uart3_groups, ARRAY_SIZE(x2000_uart3_groups), }, - { "uart4", x2000_uart4_groups, ARRAY_SIZE(x2000_uart4_groups), }, - { "uart5", x2000_uart5_groups, ARRAY_SIZE(x2000_uart5_groups), }, - { "uart6", x2000_uart6_groups, ARRAY_SIZE(x2000_uart6_groups), }, - { "uart7", x2000_uart7_groups, ARRAY_SIZE(x2000_uart7_groups), }, - { "uart8", x2000_uart8_groups, ARRAY_SIZE(x2000_uart8_groups), }, - { "uart9", x2000_uart9_groups, ARRAY_SIZE(x2000_uart9_groups), }, - { "sfc", x2000_sfc_groups, ARRAY_SIZE(x2000_sfc_groups), }, - { "ssi0", x2000_ssi0_groups, ARRAY_SIZE(x2000_ssi0_groups), }, - { "ssi1", x2000_ssi1_groups, ARRAY_SIZE(x2000_ssi1_groups), }, - { "mmc0", x2000_mmc0_groups, ARRAY_SIZE(x2000_mmc0_groups), }, - { "mmc1", x2000_mmc1_groups, ARRAY_SIZE(x2000_mmc1_groups), }, - { "mmc2", x2000_mmc2_groups, ARRAY_SIZE(x2000_mmc2_groups), }, - { "emc", x2000_emc_groups, ARRAY_SIZE(x2000_emc_groups), }, - { "emc-cs1", x2000_cs1_groups, ARRAY_SIZE(x2000_cs1_groups), }, - { "emc-cs2", x2000_cs2_groups, ARRAY_SIZE(x2000_cs2_groups), }, - { "i2c0", x2000_i2c0_groups, ARRAY_SIZE(x2000_i2c0_groups), }, - { "i2c1", x2000_i2c1_groups, ARRAY_SIZE(x2000_i2c1_groups), }, - { "i2c2", x2000_i2c2_groups, ARRAY_SIZE(x2000_i2c2_groups), }, - { "i2c3", x2000_i2c3_groups, ARRAY_SIZE(x2000_i2c3_groups), }, - { "i2c4", x2000_i2c4_groups, ARRAY_SIZE(x2000_i2c4_groups), }, - { "i2c5", x2000_i2c5_groups, ARRAY_SIZE(x2000_i2c5_groups), }, - { "i2s1", x2000_i2s1_groups, ARRAY_SIZE(x2000_i2s1_groups), }, - { "i2s2", x2000_i2s2_groups, ARRAY_SIZE(x2000_i2s2_groups), }, - { "i2s3", x2000_i2s3_groups, ARRAY_SIZE(x2000_i2s3_groups), }, - { "dmic", x2000_dmic_groups, ARRAY_SIZE(x2000_dmic_groups), }, - { "cim", x2000_cim_groups, ARRAY_SIZE(x2000_cim_groups), }, - { "lcd", x2000_lcd_groups, ARRAY_SIZE(x2000_lcd_groups), }, - { "pwm0", x2000_pwm0_groups, ARRAY_SIZE(x2000_pwm0_groups), }, - { "pwm1", x2000_pwm1_groups, ARRAY_SIZE(x2000_pwm1_groups), }, - { "pwm2", x2000_pwm2_groups, ARRAY_SIZE(x2000_pwm2_groups), }, - { "pwm3", x2000_pwm3_groups, ARRAY_SIZE(x2000_pwm3_groups), }, - { "pwm4", x2000_pwm4_groups, ARRAY_SIZE(x2000_pwm4_groups), }, - { "pwm5", x2000_pwm5_groups, ARRAY_SIZE(x2000_pwm5_groups), }, - { "pwm6", x2000_pwm6_groups, ARRAY_SIZE(x2000_pwm6_groups), }, - { "pwm7", x2000_pwm7_groups, ARRAY_SIZE(x2000_pwm7_groups), }, - { "pwm8", x2000_pwm8_groups, ARRAY_SIZE(x2000_pwm8_groups), }, - { "pwm9", x2000_pwm9_groups, ARRAY_SIZE(x2000_pwm9_groups), }, - { "pwm10", x2000_pwm10_groups, ARRAY_SIZE(x2000_pwm10_groups), }, - { "pwm11", x2000_pwm11_groups, ARRAY_SIZE(x2000_pwm11_groups), }, - { "pwm12", x2000_pwm12_groups, ARRAY_SIZE(x2000_pwm12_groups), }, - { "pwm13", x2000_pwm13_groups, ARRAY_SIZE(x2000_pwm13_groups), }, - { "pwm14", x2000_pwm14_groups, ARRAY_SIZE(x2000_pwm14_groups), }, - { "pwm15", x2000_pwm15_groups, ARRAY_SIZE(x2000_pwm15_groups), }, - { "mac0", x2000_mac0_groups, ARRAY_SIZE(x2000_mac0_groups), }, - { "mac1", x2000_mac1_groups, ARRAY_SIZE(x2000_mac1_groups), }, - { "otg", x2000_otg_groups, ARRAY_SIZE(x2000_otg_groups), }, + INGENIC_PIN_FUNCTION("uart0", x2000_uart0), + INGENIC_PIN_FUNCTION("uart1", x2000_uart1), + INGENIC_PIN_FUNCTION("uart2", x2000_uart2), + INGENIC_PIN_FUNCTION("uart3", x2000_uart3), + INGENIC_PIN_FUNCTION("uart4", x2000_uart4), + INGENIC_PIN_FUNCTION("uart5", x2000_uart5), + INGENIC_PIN_FUNCTION("uart6", x2000_uart6), + INGENIC_PIN_FUNCTION("uart7", x2000_uart7), + INGENIC_PIN_FUNCTION("uart8", x2000_uart8), + INGENIC_PIN_FUNCTION("uart9", x2000_uart9), + INGENIC_PIN_FUNCTION("sfc", x2000_sfc), + INGENIC_PIN_FUNCTION("ssi0", x2000_ssi0), + INGENIC_PIN_FUNCTION("ssi1", x2000_ssi1), + INGENIC_PIN_FUNCTION("mmc0", x2000_mmc0), + INGENIC_PIN_FUNCTION("mmc1", x2000_mmc1), + INGENIC_PIN_FUNCTION("mmc2", x2000_mmc2), + INGENIC_PIN_FUNCTION("emc", x2000_emc), + INGENIC_PIN_FUNCTION("emc-cs1", x2000_cs1), + INGENIC_PIN_FUNCTION("emc-cs2", x2000_cs2), + INGENIC_PIN_FUNCTION("i2c0", x2000_i2c0), + INGENIC_PIN_FUNCTION("i2c1", x2000_i2c1), + INGENIC_PIN_FUNCTION("i2c2", x2000_i2c2), + INGENIC_PIN_FUNCTION("i2c3", x2000_i2c3), + INGENIC_PIN_FUNCTION("i2c4", x2000_i2c4), + INGENIC_PIN_FUNCTION("i2c5", x2000_i2c5), + INGENIC_PIN_FUNCTION("i2s1", x2000_i2s1), + INGENIC_PIN_FUNCTION("i2s2", x2000_i2s2), + INGENIC_PIN_FUNCTION("i2s3", x2000_i2s3), + INGENIC_PIN_FUNCTION("dmic", x2000_dmic), + INGENIC_PIN_FUNCTION("cim", x2000_cim), + INGENIC_PIN_FUNCTION("lcd", x2000_lcd), + INGENIC_PIN_FUNCTION("pwm0", x2000_pwm0), + INGENIC_PIN_FUNCTION("pwm1", x2000_pwm1), + INGENIC_PIN_FUNCTION("pwm2", x2000_pwm2), + INGENIC_PIN_FUNCTION("pwm3", x2000_pwm3), + INGENIC_PIN_FUNCTION("pwm4", x2000_pwm4), + INGENIC_PIN_FUNCTION("pwm5", x2000_pwm5), + INGENIC_PIN_FUNCTION("pwm6", x2000_pwm6), + INGENIC_PIN_FUNCTION("pwm7", x2000_pwm7), + INGENIC_PIN_FUNCTION("pwm8", x2000_pwm8), + INGENIC_PIN_FUNCTION("pwm9", x2000_pwm9), + INGENIC_PIN_FUNCTION("pwm10", x2000_pwm10), + INGENIC_PIN_FUNCTION("pwm11", x2000_pwm11), + INGENIC_PIN_FUNCTION("pwm12", x2000_pwm12), + INGENIC_PIN_FUNCTION("pwm13", x2000_pwm13), + INGENIC_PIN_FUNCTION("pwm14", x2000_pwm14), + INGENIC_PIN_FUNCTION("pwm15", x2000_pwm15), + INGENIC_PIN_FUNCTION("mac0", x2000_mac0), + INGENIC_PIN_FUNCTION("mac1", x2000_mac1), + INGENIC_PIN_FUNCTION("otg", x2000_otg), }; static const struct regmap_range x2000_access_ranges[] = { @@ -3196,54 +3203,54 @@ static const struct group_desc x2100_groups[] = { static const char *x2100_mac_groups[] = { "mac", }; static const struct function_desc x2100_functions[] = { - { "uart0", x2000_uart0_groups, ARRAY_SIZE(x2000_uart0_groups), }, - { "uart1", x2000_uart1_groups, ARRAY_SIZE(x2000_uart1_groups), }, - { "uart2", x2000_uart2_groups, ARRAY_SIZE(x2000_uart2_groups), }, - { "uart3", x2000_uart3_groups, ARRAY_SIZE(x2000_uart3_groups), }, - { "uart4", x2000_uart4_groups, ARRAY_SIZE(x2000_uart4_groups), }, - { "uart5", x2000_uart5_groups, ARRAY_SIZE(x2000_uart5_groups), }, - { "uart6", x2000_uart6_groups, ARRAY_SIZE(x2000_uart6_groups), }, - { "uart7", x2000_uart7_groups, ARRAY_SIZE(x2000_uart7_groups), }, - { "uart8", x2000_uart8_groups, ARRAY_SIZE(x2000_uart8_groups), }, - { "uart9", x2000_uart9_groups, ARRAY_SIZE(x2000_uart9_groups), }, - { "sfc", x2000_sfc_groups, ARRAY_SIZE(x2000_sfc_groups), }, - { "ssi0", x2000_ssi0_groups, ARRAY_SIZE(x2000_ssi0_groups), }, - { "ssi1", x2000_ssi1_groups, ARRAY_SIZE(x2000_ssi1_groups), }, - { "mmc0", x2000_mmc0_groups, ARRAY_SIZE(x2000_mmc0_groups), }, - { "mmc1", x2000_mmc1_groups, ARRAY_SIZE(x2000_mmc1_groups), }, - { "mmc2", x2000_mmc2_groups, ARRAY_SIZE(x2000_mmc2_groups), }, - { "emc", x2000_emc_groups, ARRAY_SIZE(x2000_emc_groups), }, - { "emc-cs1", x2000_cs1_groups, ARRAY_SIZE(x2000_cs1_groups), }, - { "emc-cs2", x2000_cs2_groups, ARRAY_SIZE(x2000_cs2_groups), }, - { "i2c0", x2000_i2c0_groups, ARRAY_SIZE(x2000_i2c0_groups), }, - { "i2c1", x2000_i2c1_groups, ARRAY_SIZE(x2000_i2c1_groups), }, - { "i2c2", x2000_i2c2_groups, ARRAY_SIZE(x2000_i2c2_groups), }, - { "i2c3", x2000_i2c3_groups, ARRAY_SIZE(x2000_i2c3_groups), }, - { "i2c4", x2000_i2c4_groups, ARRAY_SIZE(x2000_i2c4_groups), }, - { "i2c5", x2000_i2c5_groups, ARRAY_SIZE(x2000_i2c5_groups), }, - { "i2s1", x2000_i2s1_groups, ARRAY_SIZE(x2000_i2s1_groups), }, - { "i2s2", x2000_i2s2_groups, ARRAY_SIZE(x2000_i2s2_groups), }, - { "i2s3", x2000_i2s3_groups, ARRAY_SIZE(x2000_i2s3_groups), }, - { "dmic", x2000_dmic_groups, ARRAY_SIZE(x2000_dmic_groups), }, - { "cim", x2000_cim_groups, ARRAY_SIZE(x2000_cim_groups), }, - { "lcd", x2000_lcd_groups, ARRAY_SIZE(x2000_lcd_groups), }, - { "pwm0", x2000_pwm0_groups, ARRAY_SIZE(x2000_pwm0_groups), }, - { "pwm1", x2000_pwm1_groups, ARRAY_SIZE(x2000_pwm1_groups), }, - { "pwm2", x2000_pwm2_groups, ARRAY_SIZE(x2000_pwm2_groups), }, - { "pwm3", x2000_pwm3_groups, ARRAY_SIZE(x2000_pwm3_groups), }, - { "pwm4", x2000_pwm4_groups, ARRAY_SIZE(x2000_pwm4_groups), }, - { "pwm5", x2000_pwm5_groups, ARRAY_SIZE(x2000_pwm5_groups), }, - { "pwm6", x2000_pwm6_groups, ARRAY_SIZE(x2000_pwm6_groups), }, - { "pwm7", x2000_pwm7_groups, ARRAY_SIZE(x2000_pwm7_groups), }, - { "pwm8", x2000_pwm8_groups, ARRAY_SIZE(x2000_pwm8_groups), }, - { "pwm9", x2000_pwm9_groups, ARRAY_SIZE(x2000_pwm9_groups), }, - { "pwm10", x2000_pwm10_groups, ARRAY_SIZE(x2000_pwm10_groups), }, - { "pwm11", x2000_pwm11_groups, ARRAY_SIZE(x2000_pwm11_groups), }, - { "pwm12", x2000_pwm12_groups, ARRAY_SIZE(x2000_pwm12_groups), }, - { "pwm13", x2000_pwm13_groups, ARRAY_SIZE(x2000_pwm13_groups), }, - { "pwm14", x2000_pwm14_groups, ARRAY_SIZE(x2000_pwm14_groups), }, - { "pwm15", x2000_pwm15_groups, ARRAY_SIZE(x2000_pwm15_groups), }, - { "mac", x2100_mac_groups, ARRAY_SIZE(x2100_mac_groups), }, + INGENIC_PIN_FUNCTION("uart0", x2000_uart0), + INGENIC_PIN_FUNCTION("uart1", x2000_uart1), + INGENIC_PIN_FUNCTION("uart2", x2000_uart2), + INGENIC_PIN_FUNCTION("uart3", x2000_uart3), + INGENIC_PIN_FUNCTION("uart4", x2000_uart4), + INGENIC_PIN_FUNCTION("uart5", x2000_uart5), + INGENIC_PIN_FUNCTION("uart6", x2000_uart6), + INGENIC_PIN_FUNCTION("uart7", x2000_uart7), + INGENIC_PIN_FUNCTION("uart8", x2000_uart8), + INGENIC_PIN_FUNCTION("uart9", x2000_uart9), + INGENIC_PIN_FUNCTION("sfc", x2000_sfc), + INGENIC_PIN_FUNCTION("ssi0", x2000_ssi0), + INGENIC_PIN_FUNCTION("ssi1", x2000_ssi1), + INGENIC_PIN_FUNCTION("mmc0", x2000_mmc0), + INGENIC_PIN_FUNCTION("mmc1", x2000_mmc1), + INGENIC_PIN_FUNCTION("mmc2", x2000_mmc2), + INGENIC_PIN_FUNCTION("emc", x2000_emc), + INGENIC_PIN_FUNCTION("emc-cs1", x2000_cs1), + INGENIC_PIN_FUNCTION("emc-cs2", x2000_cs2), + INGENIC_PIN_FUNCTION("i2c0", x2000_i2c0), + INGENIC_PIN_FUNCTION("i2c1", x2000_i2c1), + INGENIC_PIN_FUNCTION("i2c2", x2000_i2c2), + INGENIC_PIN_FUNCTION("i2c3", x2000_i2c3), + INGENIC_PIN_FUNCTION("i2c4", x2000_i2c4), + INGENIC_PIN_FUNCTION("i2c5", x2000_i2c5), + INGENIC_PIN_FUNCTION("i2s1", x2000_i2s1), + INGENIC_PIN_FUNCTION("i2s2", x2000_i2s2), + INGENIC_PIN_FUNCTION("i2s3", x2000_i2s3), + INGENIC_PIN_FUNCTION("dmic", x2000_dmic), + INGENIC_PIN_FUNCTION("cim", x2000_cim), + INGENIC_PIN_FUNCTION("lcd", x2000_lcd), + INGENIC_PIN_FUNCTION("pwm0", x2000_pwm0), + INGENIC_PIN_FUNCTION("pwm1", x2000_pwm1), + INGENIC_PIN_FUNCTION("pwm2", x2000_pwm2), + INGENIC_PIN_FUNCTION("pwm3", x2000_pwm3), + INGENIC_PIN_FUNCTION("pwm4", x2000_pwm4), + INGENIC_PIN_FUNCTION("pwm5", x2000_pwm5), + INGENIC_PIN_FUNCTION("pwm6", x2000_pwm6), + INGENIC_PIN_FUNCTION("pwm7", x2000_pwm7), + INGENIC_PIN_FUNCTION("pwm8", x2000_pwm8), + INGENIC_PIN_FUNCTION("pwm9", x2000_pwm9), + INGENIC_PIN_FUNCTION("pwm10", x2000_pwm10), + INGENIC_PIN_FUNCTION("pwm11", x2000_pwm11), + INGENIC_PIN_FUNCTION("pwm12", x2000_pwm12), + INGENIC_PIN_FUNCTION("pwm13", x2000_pwm13), + INGENIC_PIN_FUNCTION("pwm14", x2000_pwm14), + INGENIC_PIN_FUNCTION("pwm15", x2000_pwm15), + INGENIC_PIN_FUNCTION("mac", x2100_mac), }; static const struct ingenic_chip_info x2100_chip_info = { From patchwork Thu May 30 08:55:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13679962 Received: from fgw21-7.mail.saunalahti.fi (fgw21-7.mail.saunalahti.fi [62.142.5.82]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8439917C7CC for ; Thu, 30 May 2024 08:58:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.82 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059494; cv=none; b=XKq+nJbEb/yYoyh1611xiKP726Php702jkXXWfb5F+LFRs4uz0VdH7YDImpyv13zUSMaDQdIZRPbcDbOoD0eFH7y+/yrtOVTtbiL1VHbG/5xiju96etSDXJ352NIl/Es7dOWjV5zp8hyQlvaRkVQ1t40pLGytqpbfIuzo8a+uB8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059494; c=relaxed/simple; bh=IoWxw1wN+d5SAFqtPGYSsUvNdf8wwSs5lzlDEnu3yBc=; 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imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mips@vger.kernel.org Cc: Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , Sean Wang , Matthias Brugger , Paul Cercueil , Lakshmi Sowjanya D , Andy Shevchenko Subject: [PATCH v3 04/11] pinctrl: mediatek: moore: Provide a helper macro PINCTRL_PIN_FUNCTION() Date: Thu, 30 May 2024 11:55:13 +0300 Message-ID: <20240530085745.1539925-5-andy.shevchenko@gmail.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240530085745.1539925-1-andy.shevchenko@gmail.com> References: <20240530085745.1539925-1-andy.shevchenko@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Provide a helper macro to assign the struct function_desc entries. This helps further refactoring. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Andy Shevchenko --- drivers/pinctrl/mediatek/pinctrl-moore.h | 8 +++++ drivers/pinctrl/mediatek/pinctrl-mt7622.c | 32 ++++++++--------- drivers/pinctrl/mediatek/pinctrl-mt7623.c | 42 +++++++++++------------ drivers/pinctrl/mediatek/pinctrl-mt7629.c | 20 +++++------ drivers/pinctrl/mediatek/pinctrl-mt7981.c | 34 +++++++++--------- drivers/pinctrl/mediatek/pinctrl-mt7986.c | 24 ++++++------- 6 files changed, 84 insertions(+), 76 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-moore.h b/drivers/pinctrl/mediatek/pinctrl-moore.h index e0313e7a1fe0..5945e4fe021f 100644 --- a/drivers/pinctrl/mediatek/pinctrl-moore.h +++ b/drivers/pinctrl/mediatek/pinctrl-moore.h @@ -43,6 +43,14 @@ .data = id##_funcs, \ } +#define PINCTRL_PIN_FUNCTION(_name_, id) \ + { \ + .name = _name_, \ + .group_names = id##_groups, \ + .num_group_names = ARRAY_SIZE(id##_groups), \ + .data = NULL, \ + } + int mtk_moore_pinctrl_probe(struct platform_device *pdev, const struct mtk_pin_soc *soc); diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7622.c b/drivers/pinctrl/mediatek/pinctrl-mt7622.c index 3c1148d59eff..2dc101991066 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7622.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7622.c @@ -823,22 +823,22 @@ static const char *mt7622_uart_groups[] = { "uart0_0_tx_rx", static const char *mt7622_wdt_groups[] = { "watchdog", }; static const struct function_desc mt7622_functions[] = { - {"antsel", mt7622_antsel_groups, ARRAY_SIZE(mt7622_antsel_groups)}, - {"emmc", mt7622_emmc_groups, ARRAY_SIZE(mt7622_emmc_groups)}, - {"eth", mt7622_ethernet_groups, ARRAY_SIZE(mt7622_ethernet_groups)}, - {"i2c", mt7622_i2c_groups, ARRAY_SIZE(mt7622_i2c_groups)}, - {"i2s", mt7622_i2s_groups, ARRAY_SIZE(mt7622_i2s_groups)}, - {"ir", mt7622_ir_groups, ARRAY_SIZE(mt7622_ir_groups)}, - {"led", mt7622_led_groups, ARRAY_SIZE(mt7622_led_groups)}, - {"flash", mt7622_flash_groups, ARRAY_SIZE(mt7622_flash_groups)}, - {"pcie", mt7622_pcie_groups, ARRAY_SIZE(mt7622_pcie_groups)}, - {"pmic", mt7622_pmic_bus_groups, ARRAY_SIZE(mt7622_pmic_bus_groups)}, - {"pwm", mt7622_pwm_groups, ARRAY_SIZE(mt7622_pwm_groups)}, - {"sd", mt7622_sd_groups, ARRAY_SIZE(mt7622_sd_groups)}, - {"spi", mt7622_spic_groups, ARRAY_SIZE(mt7622_spic_groups)}, - {"tdm", mt7622_tdm_groups, ARRAY_SIZE(mt7622_tdm_groups)}, - {"uart", mt7622_uart_groups, ARRAY_SIZE(mt7622_uart_groups)}, - {"watchdog", mt7622_wdt_groups, ARRAY_SIZE(mt7622_wdt_groups)}, + PINCTRL_PIN_FUNCTION("antsel", mt7622_antsel), + PINCTRL_PIN_FUNCTION("emmc", mt7622_emmc), + PINCTRL_PIN_FUNCTION("eth", mt7622_ethernet), + PINCTRL_PIN_FUNCTION("i2c", mt7622_i2c), + PINCTRL_PIN_FUNCTION("i2s", mt7622_i2s), + PINCTRL_PIN_FUNCTION("ir", mt7622_ir), + PINCTRL_PIN_FUNCTION("led", mt7622_led), + PINCTRL_PIN_FUNCTION("flash", mt7622_flash), + PINCTRL_PIN_FUNCTION("pcie", mt7622_pcie), + PINCTRL_PIN_FUNCTION("pmic", mt7622_pmic_bus), + PINCTRL_PIN_FUNCTION("pwm", mt7622_pwm), + PINCTRL_PIN_FUNCTION("sd", mt7622_sd), + PINCTRL_PIN_FUNCTION("spi", mt7622_spic), + PINCTRL_PIN_FUNCTION("tdm", mt7622_tdm), + PINCTRL_PIN_FUNCTION("uart", mt7622_uart), + PINCTRL_PIN_FUNCTION("watchdog", mt7622_wdt), }; static const struct mtk_eint_hw mt7622_eint_hw = { diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7623.c b/drivers/pinctrl/mediatek/pinctrl-mt7623.c index 699977074697..3e59eada2825 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7623.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7623.c @@ -1341,27 +1341,27 @@ static const char *mt7623_uart_groups[] = { "uart0_0_txd_rxd", static const char *mt7623_wdt_groups[] = { "watchdog_0", "watchdog_1", }; static const struct function_desc mt7623_functions[] = { - {"audck", mt7623_aud_clk_groups, ARRAY_SIZE(mt7623_aud_clk_groups)}, - {"disp", mt7623_disp_pwm_groups, ARRAY_SIZE(mt7623_disp_pwm_groups)}, - {"eth", mt7623_ethernet_groups, ARRAY_SIZE(mt7623_ethernet_groups)}, - {"sdio", mt7623_ext_sdio_groups, ARRAY_SIZE(mt7623_ext_sdio_groups)}, - {"hdmi", mt7623_hdmi_groups, ARRAY_SIZE(mt7623_hdmi_groups)}, - {"i2c", mt7623_i2c_groups, ARRAY_SIZE(mt7623_i2c_groups)}, - {"i2s", mt7623_i2s_groups, ARRAY_SIZE(mt7623_i2s_groups)}, - {"ir", mt7623_ir_groups, ARRAY_SIZE(mt7623_ir_groups)}, - {"lcd", mt7623_lcd_groups, ARRAY_SIZE(mt7623_lcd_groups)}, - {"msdc", mt7623_msdc_groups, ARRAY_SIZE(mt7623_msdc_groups)}, - {"nand", mt7623_nandc_groups, ARRAY_SIZE(mt7623_nandc_groups)}, - {"otg", mt7623_otg_groups, ARRAY_SIZE(mt7623_otg_groups)}, - {"pcie", mt7623_pcie_groups, ARRAY_SIZE(mt7623_pcie_groups)}, - {"pcm", mt7623_pcm_groups, ARRAY_SIZE(mt7623_pcm_groups)}, - {"pwm", mt7623_pwm_groups, ARRAY_SIZE(mt7623_pwm_groups)}, - {"pwrap", mt7623_pwrap_groups, ARRAY_SIZE(mt7623_pwrap_groups)}, - {"rtc", mt7623_rtc_groups, ARRAY_SIZE(mt7623_rtc_groups)}, - {"spi", mt7623_spi_groups, ARRAY_SIZE(mt7623_spi_groups)}, - {"spdif", mt7623_spdif_groups, ARRAY_SIZE(mt7623_spdif_groups)}, - {"uart", mt7623_uart_groups, ARRAY_SIZE(mt7623_uart_groups)}, - {"watchdog", mt7623_wdt_groups, ARRAY_SIZE(mt7623_wdt_groups)}, + PINCTRL_PIN_FUNCTION("audck", mt7623_aud_clk), + PINCTRL_PIN_FUNCTION("disp", mt7623_disp_pwm), + PINCTRL_PIN_FUNCTION("eth", mt7623_ethernet), + PINCTRL_PIN_FUNCTION("sdio", mt7623_ext_sdio), + PINCTRL_PIN_FUNCTION("hdmi", mt7623_hdmi), + PINCTRL_PIN_FUNCTION("i2c", mt7623_i2c), + PINCTRL_PIN_FUNCTION("i2s", mt7623_i2s), + PINCTRL_PIN_FUNCTION("ir", mt7623_ir), + PINCTRL_PIN_FUNCTION("lcd", mt7623_lcd), + PINCTRL_PIN_FUNCTION("msdc", mt7623_msdc), + PINCTRL_PIN_FUNCTION("nand", mt7623_nandc), + PINCTRL_PIN_FUNCTION("otg", mt7623_otg), + PINCTRL_PIN_FUNCTION("pcie", mt7623_pcie), + PINCTRL_PIN_FUNCTION("pcm", mt7623_pcm), + PINCTRL_PIN_FUNCTION("pwm", mt7623_pwm), + PINCTRL_PIN_FUNCTION("pwrap", mt7623_pwrap), + PINCTRL_PIN_FUNCTION("rtc", mt7623_rtc), + PINCTRL_PIN_FUNCTION("spi", mt7623_spi), + PINCTRL_PIN_FUNCTION("spdif", mt7623_spdif), + PINCTRL_PIN_FUNCTION("uart", mt7623_uart), + PINCTRL_PIN_FUNCTION("watchdog", mt7623_wdt), }; static const struct mtk_eint_hw mt7623_eint_hw = { diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7629.c b/drivers/pinctrl/mediatek/pinctrl-mt7629.c index 2ce411cb9c6e..98142e8c9801 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7629.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7629.c @@ -385,16 +385,16 @@ static const char *mt7629_wifi_groups[] = { "wf0_5g", "wf0_2g", }; static const char *mt7629_flash_groups[] = { "snfi", "spi_nor" }; static const struct function_desc mt7629_functions[] = { - {"eth", mt7629_ethernet_groups, ARRAY_SIZE(mt7629_ethernet_groups)}, - {"i2c", mt7629_i2c_groups, ARRAY_SIZE(mt7629_i2c_groups)}, - {"led", mt7629_led_groups, ARRAY_SIZE(mt7629_led_groups)}, - {"pcie", mt7629_pcie_groups, ARRAY_SIZE(mt7629_pcie_groups)}, - {"pwm", mt7629_pwm_groups, ARRAY_SIZE(mt7629_pwm_groups)}, - {"spi", mt7629_spi_groups, ARRAY_SIZE(mt7629_spi_groups)}, - {"uart", mt7629_uart_groups, ARRAY_SIZE(mt7629_uart_groups)}, - {"watchdog", mt7629_wdt_groups, ARRAY_SIZE(mt7629_wdt_groups)}, - {"wifi", mt7629_wifi_groups, ARRAY_SIZE(mt7629_wifi_groups)}, - {"flash", mt7629_flash_groups, ARRAY_SIZE(mt7629_flash_groups)}, + PINCTRL_PIN_FUNCTION("eth", mt7629_ethernet), + PINCTRL_PIN_FUNCTION("i2c", mt7629_i2c), + PINCTRL_PIN_FUNCTION("led", mt7629_led), + PINCTRL_PIN_FUNCTION("pcie", mt7629_pcie), + PINCTRL_PIN_FUNCTION("pwm", mt7629_pwm), + PINCTRL_PIN_FUNCTION("spi", mt7629_spi), + PINCTRL_PIN_FUNCTION("uart", mt7629_uart), + PINCTRL_PIN_FUNCTION("watchdog", mt7629_wdt), + PINCTRL_PIN_FUNCTION("wifi", mt7629_wifi), + PINCTRL_PIN_FUNCTION("flash", mt7629_flash), }; static const struct mtk_eint_hw mt7629_eint_hw = { diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7981.c b/drivers/pinctrl/mediatek/pinctrl-mt7981.c index ef6123765885..83092be5b614 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7981.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7981.c @@ -978,23 +978,23 @@ static const char *mt7981_ethernet_groups[] = { "smi_mdc_mdio", "gbe_ext_mdc_mdi static const char *mt7981_ant_groups[] = { "ant_sel", }; static const struct function_desc mt7981_functions[] = { - {"wa_aice", mt7981_wa_aice_groups, ARRAY_SIZE(mt7981_wa_aice_groups)}, - {"dfd", mt7981_dfd_groups, ARRAY_SIZE(mt7981_dfd_groups)}, - {"jtag", mt7981_jtag_groups, ARRAY_SIZE(mt7981_jtag_groups)}, - {"pta", mt7981_pta_groups, ARRAY_SIZE(mt7981_pta_groups)}, - {"pcm", mt7981_pcm_groups, ARRAY_SIZE(mt7981_pcm_groups)}, - {"udi", mt7981_udi_groups, ARRAY_SIZE(mt7981_udi_groups)}, - {"usb", mt7981_usb_groups, ARRAY_SIZE(mt7981_usb_groups)}, - {"ant", mt7981_ant_groups, ARRAY_SIZE(mt7981_ant_groups)}, - {"eth", mt7981_ethernet_groups, ARRAY_SIZE(mt7981_ethernet_groups)}, - {"i2c", mt7981_i2c_groups, ARRAY_SIZE(mt7981_i2c_groups)}, - {"led", mt7981_led_groups, ARRAY_SIZE(mt7981_led_groups)}, - {"pwm", mt7981_pwm_groups, ARRAY_SIZE(mt7981_pwm_groups)}, - {"spi", mt7981_spi_groups, ARRAY_SIZE(mt7981_spi_groups)}, - {"uart", mt7981_uart_groups, ARRAY_SIZE(mt7981_uart_groups)}, - {"watchdog", mt7981_wdt_groups, ARRAY_SIZE(mt7981_wdt_groups)}, - {"flash", mt7981_flash_groups, ARRAY_SIZE(mt7981_flash_groups)}, - {"pcie", mt7981_pcie_groups, ARRAY_SIZE(mt7981_pcie_groups)}, + PINCTRL_PIN_FUNCTION("wa_aice", mt7981_wa_aice), + PINCTRL_PIN_FUNCTION("dfd", mt7981_dfd), + PINCTRL_PIN_FUNCTION("jtag", mt7981_jtag), + PINCTRL_PIN_FUNCTION("pta", mt7981_pta), + PINCTRL_PIN_FUNCTION("pcm", mt7981_pcm), + PINCTRL_PIN_FUNCTION("udi", mt7981_udi), + PINCTRL_PIN_FUNCTION("usb", mt7981_usb), + PINCTRL_PIN_FUNCTION("ant", mt7981_ant), + PINCTRL_PIN_FUNCTION("eth", mt7981_ethernet), + PINCTRL_PIN_FUNCTION("i2c", mt7981_i2c), + PINCTRL_PIN_FUNCTION("led", mt7981_led), + PINCTRL_PIN_FUNCTION("pwm", mt7981_pwm), + PINCTRL_PIN_FUNCTION("spi", mt7981_spi), + PINCTRL_PIN_FUNCTION("uart", mt7981_uart), + PINCTRL_PIN_FUNCTION("watchdog", mt7981_wdt), + PINCTRL_PIN_FUNCTION("flash", mt7981_flash), + PINCTRL_PIN_FUNCTION("pcie", mt7981_pcie), }; static const struct mtk_eint_hw mt7981_eint_hw = { diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7986.c b/drivers/pinctrl/mediatek/pinctrl-mt7986.c index 39e80fa644c1..5816b5fdb7ca 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7986.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7986.c @@ -879,18 +879,18 @@ static const char *mt7986_wdt_groups[] = { "watchdog", }; static const char *mt7986_wf_groups[] = { "wf_2g", "wf_5g", "wf_dbdc", }; static const struct function_desc mt7986_functions[] = { - {"audio", mt7986_audio_groups, ARRAY_SIZE(mt7986_audio_groups)}, - {"emmc", mt7986_emmc_groups, ARRAY_SIZE(mt7986_emmc_groups)}, - {"eth", mt7986_ethernet_groups, ARRAY_SIZE(mt7986_ethernet_groups)}, - {"i2c", mt7986_i2c_groups, ARRAY_SIZE(mt7986_i2c_groups)}, - {"led", mt7986_led_groups, ARRAY_SIZE(mt7986_led_groups)}, - {"flash", mt7986_flash_groups, ARRAY_SIZE(mt7986_flash_groups)}, - {"pcie", mt7986_pcie_groups, ARRAY_SIZE(mt7986_pcie_groups)}, - {"pwm", mt7986_pwm_groups, ARRAY_SIZE(mt7986_pwm_groups)}, - {"spi", mt7986_spi_groups, ARRAY_SIZE(mt7986_spi_groups)}, - {"uart", mt7986_uart_groups, ARRAY_SIZE(mt7986_uart_groups)}, - {"watchdog", mt7986_wdt_groups, ARRAY_SIZE(mt7986_wdt_groups)}, - {"wifi", mt7986_wf_groups, ARRAY_SIZE(mt7986_wf_groups)}, + PINCTRL_PIN_FUNCTION("audio", mt7986_audio), + PINCTRL_PIN_FUNCTION("emmc", mt7986_emmc), + PINCTRL_PIN_FUNCTION("eth", mt7986_ethernet), + PINCTRL_PIN_FUNCTION("i2c", mt7986_i2c), + PINCTRL_PIN_FUNCTION("led", mt7986_led), + PINCTRL_PIN_FUNCTION("flash", mt7986_flash), + PINCTRL_PIN_FUNCTION("pcie", mt7986_pcie), + PINCTRL_PIN_FUNCTION("pwm", mt7986_pwm), + PINCTRL_PIN_FUNCTION("spi", mt7986_spi), + PINCTRL_PIN_FUNCTION("uart", mt7986_uart), + PINCTRL_PIN_FUNCTION("watchdog", mt7986_wdt), + PINCTRL_PIN_FUNCTION("wifi", mt7986_wf), }; static const struct mtk_eint_hw mt7986a_eint_hw = { From patchwork Thu May 30 08:55:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13679963 Received: from fgw20-7.mail.saunalahti.fi (fgw20-7.mail.saunalahti.fi [62.142.5.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A426F1C2305 for ; Thu, 30 May 2024 08:58:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.81 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059495; cv=none; b=f+QTzX5V9SrKMCGdk8TaDo5N7AOnn+naoBAsgStWv4tdbecuOynEe7kcMXaUmBGNIkdgfAo/Flzt/NzUKN/nCwGc8zyIGssGuBwK6JK2pBqPffN6fV8K8gnlilPrzG1wnRD3tvS1WAWRqNoB/pEa+ZJ8qWcuOGeLDHfdxLi4ESM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059495; c=relaxed/simple; bh=A072AS2lgROf98Pwf8Fyliy4tqTS+ybyUetYZctK3UE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=T8EW+Q0AqsL4euQ3UC+IKTo5nGDlLUNjL71Br/3RiLY57uLYC8dQ+tEEKumWJ8bookeEjAjzXqlSRD3c5m49sta1GedAgVblqR2lLUEcyxaa8UfXHeeVZaXeGhBZA866eIxlhBiXveWQW56fZTZreVfByl6sXJ7sZod85vrFULE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com; spf=fail smtp.mailfrom=gmail.com; arc=none smtp.client-ip=62.142.5.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=gmail.com Received: from localhost (88-113-26-230.elisa-laajakaista.fi [88.113.26.230]) by fgw23.mail.saunalahti.fi (Halon) with ESMTP id bcd29a08-1e62-11ef-80c8-005056bdfda7; Thu, 30 May 2024 11:58:10 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Linus Walleij , AngeloGioacchino Del Regno , Daniel Golle , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mips@vger.kernel.org Cc: Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , Sean Wang , Matthias Brugger , Paul Cercueil , Lakshmi Sowjanya D , Andy Shevchenko Subject: [PATCH v3 05/11] pinctrl: pinmux: Add a convenient define PINCTRL_FUNCTION_DESC() Date: Thu, 30 May 2024 11:55:14 +0300 Message-ID: <20240530085745.1539925-6-andy.shevchenko@gmail.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240530085745.1539925-1-andy.shevchenko@gmail.com> References: <20240530085745.1539925-1-andy.shevchenko@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Andy Shevchenko Add PINCTRL_FUNCTION_DESC() macro for inline use. While at it, fix adjective form in the comment of PINCTRL_GROUP_DESC(). Signed-off-by: Andy Shevchenko --- drivers/pinctrl/core.h | 2 +- drivers/pinctrl/pinmux.c | 9 +++------ drivers/pinctrl/pinmux.h | 11 ++++++++++- 3 files changed, 14 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/core.h b/drivers/pinctrl/core.h index 837fd5bd903d..4e07707d2435 100644 --- a/drivers/pinctrl/core.h +++ b/drivers/pinctrl/core.h @@ -206,7 +206,7 @@ struct group_desc { void *data; }; -/* Convenience macro to define a generic pin group descriptor */ +/* Convenient macro to define a generic pin group descriptor */ #define PINCTRL_GROUP_DESC(_name, _pins, _num_pins, _data) \ (struct group_desc) { \ .grp = PINCTRL_PINGROUP(_name, _pins, _num_pins), \ diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c index addba55334d9..8d69fa1b0bff 100644 --- a/drivers/pinctrl/pinmux.c +++ b/drivers/pinctrl/pinmux.c @@ -852,13 +852,13 @@ EXPORT_SYMBOL_GPL(pinmux_generic_get_function); * @pctldev: pin controller device * @name: name of the function * @groups: array of pin groups - * @num_groups: number of pin groups + * @ngroups: number of pin groups * @data: pin controller driver specific data */ int pinmux_generic_add_function(struct pinctrl_dev *pctldev, const char *name, const char * const *groups, - const unsigned int num_groups, + const unsigned int ngroups, void *data) { struct function_desc *function; @@ -877,10 +877,7 @@ int pinmux_generic_add_function(struct pinctrl_dev *pctldev, if (!function) return -ENOMEM; - function->name = name; - function->group_names = groups; - function->num_group_names = num_groups; - function->data = data; + *function = PINCTRL_FUNCTION_DESC(name, groups, ngroups, data); error = radix_tree_insert(&pctldev->pin_function_tree, selector, function); if (error) diff --git a/drivers/pinctrl/pinmux.h b/drivers/pinctrl/pinmux.h index 7c8aa25ccc80..52e6e4db88b4 100644 --- a/drivers/pinctrl/pinmux.h +++ b/drivers/pinctrl/pinmux.h @@ -145,6 +145,15 @@ struct function_desc { void *data; }; +/* Convenient macro to define a generic pin function descriptor */ +#define PINCTRL_FUNCTION_DESC(_name, _grps, _num_grps, _data) \ +(struct function_desc) { \ + .name = _name, \ + .group_names = _grps, \ + .num_group_names = _num_grps, \ + .data = _data, \ +} + int pinmux_generic_get_function_count(struct pinctrl_dev *pctldev); const char * @@ -162,7 +171,7 @@ struct function_desc *pinmux_generic_get_function(struct pinctrl_dev *pctldev, int pinmux_generic_add_function(struct pinctrl_dev *pctldev, const char *name, const char * const *groups, - unsigned int const num_groups, + unsigned int const ngroups, void *data); int pinmux_generic_remove_function(struct pinctrl_dev *pctldev, From patchwork Thu May 30 08:55:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13679964 Received: from fgw22-7.mail.saunalahti.fi (fgw22-7.mail.saunalahti.fi [62.142.5.83]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9DB391C0DEA for ; Thu, 30 May 2024 08:58:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.83 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059495; cv=none; b=IJri1YKRDBNWBEA61LOHVfgUY/BUKOH8mDx5i07r4M2TFYBap4WBOxRnFXaXAS1h5oR+CL7DcT9QZvxuXdf5sAgZ328q1/xtRQOZg32/fYNkizpTFLU4qUPJwGZr0dJlivUXD0Vb4htYGjuJjAOLTK5VPOmjpT+V7Y6DmMFW/Jg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059495; c=relaxed/simple; bh=/YBz71iw2VP9vAVk7LnHHysVeutBwakvEIw5dgBOqkE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=R8i+BtlO4XcaHeqvm9KdaVHTeIQ4xnqhmpQemmH+hybayNBpSGkS66uetHUfObw2C4X17+PfJ4c5cPLmZln5hKvtgRAWA7OCQn95mHbQuc/b6x+jVyMIZDFbm6xhJZ0bEhGC+p/jLLN04ixwBgrkY55AI3FZu9x/JIc6CYwqr7g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com; spf=fail smtp.mailfrom=gmail.com; arc=none smtp.client-ip=62.142.5.83 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=gmail.com Received: from localhost (88-113-26-230.elisa-laajakaista.fi [88.113.26.230]) by fgw23.mail.saunalahti.fi (Halon) with ESMTP id bd740b5a-1e62-11ef-80c8-005056bdfda7; Thu, 30 May 2024 11:58:10 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Linus Walleij , AngeloGioacchino Del Regno , Daniel Golle , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mips@vger.kernel.org Cc: Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , Sean Wang , Matthias Brugger , Paul Cercueil , Lakshmi Sowjanya D , Andy Shevchenko Subject: [PATCH v3 06/11] pinctrl: pinmux: Embed struct pinfunction into struct function_desc Date: Thu, 30 May 2024 11:55:15 +0300 Message-ID: <20240530085745.1539925-7-andy.shevchenko@gmail.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240530085745.1539925-1-andy.shevchenko@gmail.com> References: <20240530085745.1539925-1-andy.shevchenko@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Andy Shevchenko struct function_desc is a particular version of the struct pinfunction with associated opaque data. Start switching pin control core and drivers to use it explicitly. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinmux.c | 10 +++++----- drivers/pinctrl/pinmux.h | 5 ++++- 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/pinmux.c b/drivers/pinctrl/pinmux.c index 8d69fa1b0bff..aae71a37219b 100644 --- a/drivers/pinctrl/pinmux.c +++ b/drivers/pinctrl/pinmux.c @@ -796,7 +796,7 @@ pinmux_generic_get_function_name(struct pinctrl_dev *pctldev, if (!function) return NULL; - return function->name; + return function->func.name; } EXPORT_SYMBOL_GPL(pinmux_generic_get_function_name); @@ -805,12 +805,12 @@ EXPORT_SYMBOL_GPL(pinmux_generic_get_function_name); * @pctldev: pin controller device * @selector: function number * @groups: array of pin groups - * @num_groups: number of pin groups + * @ngroups: number of pin groups */ int pinmux_generic_get_function_groups(struct pinctrl_dev *pctldev, unsigned int selector, const char * const **groups, - unsigned int * const num_groups) + unsigned int * const ngroups) { struct function_desc *function; @@ -821,8 +821,8 @@ int pinmux_generic_get_function_groups(struct pinctrl_dev *pctldev, __func__, selector); return -EINVAL; } - *groups = function->group_names; - *num_groups = function->num_group_names; + *groups = function->func.groups; + *ngroups = function->func.ngroups; return 0; } diff --git a/drivers/pinctrl/pinmux.h b/drivers/pinctrl/pinmux.h index 52e6e4db88b4..9b57c1cc9d50 100644 --- a/drivers/pinctrl/pinmux.h +++ b/drivers/pinctrl/pinmux.h @@ -133,12 +133,14 @@ static inline void pinmux_init_device_debugfs(struct dentry *devroot, /** * struct function_desc - generic function descriptor + * @func: generic data of the pin function (name and groups of pins) * @name: name of the function * @group_names: array of pin group names * @num_group_names: number of pin group names * @data: pin controller driver specific data */ struct function_desc { + struct pinfunction func; const char *name; const char * const *group_names; int num_group_names; @@ -148,6 +150,7 @@ struct function_desc { /* Convenient macro to define a generic pin function descriptor */ #define PINCTRL_FUNCTION_DESC(_name, _grps, _num_grps, _data) \ (struct function_desc) { \ + .func = PINCTRL_PINFUNCTION(_name, _grps, _num_grps), \ .name = _name, \ .group_names = _grps, \ .num_group_names = _num_grps, \ @@ -163,7 +166,7 @@ pinmux_generic_get_function_name(struct pinctrl_dev *pctldev, int pinmux_generic_get_function_groups(struct pinctrl_dev *pctldev, unsigned int selector, const char * const **groups, - unsigned int * const num_groups); + unsigned int * const ngroups); struct function_desc *pinmux_generic_get_function(struct pinctrl_dev *pctldev, unsigned int selector); From patchwork Thu May 30 08:55:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13679965 Received: from fgw20-7.mail.saunalahti.fi (fgw20-7.mail.saunalahti.fi [62.142.5.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EA64B183A6E for ; Thu, 30 May 2024 08:58:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.81 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059498; cv=none; b=Cl/5x8UQ7oa1Z28Pthh52Ly2WrdOui1xJfmg3xIuAI9vba/Ojti5LEmCD9r2QRU8t3fE58f+qSnNFa43HOwSV/vQbEKM/ISVUV2Ph3gUYzGvUD1rBdt+YkrAtS19+ISn90+Ok7IT/Eu9IoYu7Lmv0t0NkXzxFQtjlNJ2q4Zatw4= ARC-Message-Signature: i=1; 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Signed-off-by: Andy Shevchenko --- drivers/pinctrl/freescale/pinctrl-imx.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/pinctrl/freescale/pinctrl-imx.c b/drivers/pinctrl/freescale/pinctrl-imx.c index 2d3d80921c0d..1ccdeb86d8a7 100644 --- a/drivers/pinctrl/freescale/pinctrl-imx.c +++ b/drivers/pinctrl/freescale/pinctrl-imx.c @@ -266,7 +266,7 @@ static int imx_pmx_set(struct pinctrl_dev *pctldev, unsigned selector, npins = grp->grp.npins; dev_dbg(ipctl->dev, "enable function %s group %s\n", - func->name, grp->grp.name); + func->func.name, grp->grp.name); for (i = 0; i < npins; i++) { /* @@ -593,21 +593,21 @@ static int imx_pinctrl_parse_functions(struct device_node *np, return -EINVAL; /* Initialise function */ - func->name = np->name; - func->num_group_names = of_get_child_count(np); - if (func->num_group_names == 0) { + func->func.name = np->name; + func->func.ngroups = of_get_child_count(np); + if (func->func.ngroups == 0) { dev_info(ipctl->dev, "no groups defined in %pOF\n", np); return -EINVAL; } - group_names = devm_kcalloc(ipctl->dev, func->num_group_names, - sizeof(char *), GFP_KERNEL); + group_names = devm_kcalloc(ipctl->dev, func->func.ngroups, + sizeof(*func->func.groups), GFP_KERNEL); if (!group_names) return -ENOMEM; i = 0; for_each_child_of_node(np, child) group_names[i++] = child->name; - func->group_names = group_names; + func->func.groups = group_names; i = 0; for_each_child_of_node(np, child) { From patchwork Thu May 30 08:55:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13679966 Received: from fgw20-7.mail.saunalahti.fi (fgw20-7.mail.saunalahti.fi [62.142.5.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2D8A718508A for ; Thu, 30 May 2024 08:58:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.81 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059518; cv=none; b=PB5r/mOQ5Y9qv5d5wxxTgCik3gq6NgTIVqmCCVNotM0QV3ty+5pRGUYyN2Rc7hqzQfFaQDfMeo7WdvA13MEnb/ZJ6HfIS5jFmsxTk09ppWSviqOcL9DKrAU00avgyn50xV5VixKBJg68KoV9nfAlANJjQLDhGddqcX/elz8tFGg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059518; c=relaxed/simple; bh=KYoxAAK6S+GIuN2E48DvdIJyuBlhCt1h5mEc1k8V3xc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XWA/VqgVKhecVL6T6hDKLLwCAR69JBnDrHfiIpb4QOzZTzrIwAfQWwiUVvp7S7Kzx3twwlZKqn1ErStFtByA6Ob1PdohsW7TUkrXhReLbB/e7ISAFE10zHgXjEPDuotWDRCz3bnpmWcNLFKgLL1Tx3UCBGVihcT5ngy9bkVXCTw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com; spf=fail smtp.mailfrom=gmail.com; arc=none smtp.client-ip=62.142.5.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=gmail.com Received: from localhost (88-113-26-230.elisa-laajakaista.fi [88.113.26.230]) by fgw20.mail.saunalahti.fi (Halon) with ESMTP id be284b31-1e62-11ef-8d3e-005056bd6ce9; Thu, 30 May 2024 11:58:11 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Linus Walleij , AngeloGioacchino Del Regno , Daniel Golle , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mips@vger.kernel.org Cc: Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , Sean Wang , Matthias Brugger , Paul Cercueil , Lakshmi Sowjanya D , Andy Shevchenko Subject: [PATCH v3 08/11] pinctrl: ingenic: Convert to use func member Date: Thu, 30 May 2024 11:55:17 +0300 Message-ID: <20240530085745.1539925-9-andy.shevchenko@gmail.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240530085745.1539925-1-andy.shevchenko@gmail.com> References: <20240530085745.1539925-1-andy.shevchenko@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert drivers to use func member embedded in struct function_desc, because other members will be removed to avoid duplication and desynchronisation of the generic pin function description. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-ingenic.c | 16 +++++++--------- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c index 959b9ea83a66..31703737731b 100644 --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c @@ -96,9 +96,7 @@ #define INGENIC_PIN_FUNCTION(_name_, id) \ { \ - .name = _name_, \ - .group_names = id##_groups, \ - .num_group_names = ARRAY_SIZE(id##_groups), \ + .func = PINCTRL_PINFUNCTION(_name_, id##_groups, ARRAY_SIZE(id##_groups)), \ .data = NULL, \ } @@ -3769,7 +3767,7 @@ static int ingenic_pinmux_set_mux(struct pinctrl_dev *pctldev, return -EINVAL; dev_dbg(pctldev->dev, "enable function %s group %s\n", - func->name, grp->grp.name); + func->func.name, grp->grp.name); mode = (uintptr_t)grp->data; if (mode <= 3) { @@ -4317,14 +4315,14 @@ static int __init ingenic_pinctrl_probe(struct platform_device *pdev) } for (i = 0; i < chip_info->num_functions; i++) { - const struct function_desc *func = &chip_info->functions[i]; + const struct function_desc *function = &chip_info->functions[i]; + const struct pinfunction *func = &function->func; err = pinmux_generic_add_function(jzpc->pctl, func->name, - func->group_names, func->num_group_names, - func->data); + func->groups, func->ngroups, + function->data); if (err < 0) { - dev_err(dev, "Failed to register function %s\n", - func->name); + dev_err(dev, "Failed to register function %s\n", func->name); return err; } } From patchwork Thu May 30 08:55:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13679967 Received: from fgw20-7.mail.saunalahti.fi (fgw20-7.mail.saunalahti.fi [62.142.5.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6722518508E for ; Thu, 30 May 2024 08:58:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.81 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059520; cv=none; b=LkGKIHkUfNFIRh54s24YbtX6G8bklPGaVp/VOedKcPzmgiLj32gtxBbIen2znErwWjU1sVDvyF9BZWg9vJtxrRax06P2yzQHW8wrePqi/r8VCHVfmxmZ7UkEvwrE44QZCkCti/p+uFM9IHCdxExhfNz5umFIL4yYt2DGfoAxoc0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059520; c=relaxed/simple; bh=/LiSEQG+njMYAteIWAP1DID2MkGU7RNK5JsYIWD5POA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cV/C9dUNFaC2alJvPK2BLsgLkvcf3l/yduIUS6D4Pln7pO3+So6HcR/1iNWnjf9NyligRKt9OUPxc8rdgYJouV1G3biKpAlNHS1umS2g2iRtHHakiFBM6/GOJMyKf2OI1+/ZYh5c5TDaV5hRPp5qj3b+4PeiAcOe+GFkJf3Lnmg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com; spf=fail smtp.mailfrom=gmail.com; arc=none smtp.client-ip=62.142.5.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=gmail.com Received: from localhost (88-113-26-230.elisa-laajakaista.fi [88.113.26.230]) by fgw22.mail.saunalahti.fi (Halon) with ESMTP id cc94fb57-1e62-11ef-8e2e-005056bdf889; Thu, 30 May 2024 11:58:36 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Linus Walleij , AngeloGioacchino Del Regno , Daniel Golle , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mips@vger.kernel.org Cc: Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , Sean Wang , Matthias Brugger , Paul Cercueil , Lakshmi Sowjanya D , Andy Shevchenko Subject: [PATCH v3 09/11] pinctrl: keembay: Convert to use func member Date: Thu, 30 May 2024 11:55:18 +0300 Message-ID: <20240530085745.1539925-10-andy.shevchenko@gmail.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240530085745.1539925-1-andy.shevchenko@gmail.com> References: <20240530085745.1539925-1-andy.shevchenko@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert drivers to use func member embedded in struct function_desc, because other members will be removed to avoid duplication and desynchronisation of the generic pin function description. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinctrl-keembay.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/drivers/pinctrl/pinctrl-keembay.c b/drivers/pinctrl/pinctrl-keembay.c index b1349ee22799..245a74ed97ee 100644 --- a/drivers/pinctrl/pinctrl-keembay.c +++ b/drivers/pinctrl/pinctrl-keembay.c @@ -1566,7 +1566,7 @@ static int keembay_add_functions(struct keembay_pinctrl *kpc, unsigned int grp_idx = 0; int j; - group_names = devm_kcalloc(kpc->dev, func->num_group_names, + group_names = devm_kcalloc(kpc->dev, func->func.ngroups, sizeof(*group_names), GFP_KERNEL); if (!group_names) return -ENOMEM; @@ -1576,20 +1576,20 @@ static int keembay_add_functions(struct keembay_pinctrl *kpc, struct keembay_mux_desc *mux; for (mux = pdesc->drv_data; mux->name; mux++) { - if (!strcmp(mux->name, func->name)) + if (!strcmp(mux->name, func->func.name)) group_names[grp_idx++] = pdesc->name; } } - func->group_names = group_names; + func->func.groups = group_names; } /* Add all functions */ for (i = 0; i < kpc->nfuncs; i++) { pinmux_generic_add_function(kpc->pctrl, - functions[i].name, - functions[i].group_names, - functions[i].num_group_names, + functions[i].func.name, + functions[i].func.groups, + functions[i].func.ngroups, functions[i].data); } @@ -1619,17 +1619,17 @@ static int keembay_build_functions(struct keembay_pinctrl *kpc) struct function_desc *fdesc; /* Check if we already have function for this mux */ - for (fdesc = keembay_funcs; fdesc->name; fdesc++) { - if (!strcmp(mux->name, fdesc->name)) { - fdesc->num_group_names++; + for (fdesc = keembay_funcs; fdesc->func.name; fdesc++) { + if (!strcmp(mux->name, fdesc->func.name)) { + fdesc->func.ngroups++; break; } } /* Setup new function for this mux we didn't see before */ if (!fdesc->name) { - fdesc->name = mux->name; - fdesc->num_group_names = 1; + fdesc->func.name = mux->name; + fdesc->func.ngroups = 1; fdesc->data = &mux->mode; kpc->nfuncs++; } From patchwork Thu May 30 08:55:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13679968 Received: from fgw23-7.mail.saunalahti.fi (fgw23-7.mail.saunalahti.fi [62.142.5.84]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 200E2185097 for ; Thu, 30 May 2024 08:58:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.84 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059520; cv=none; b=L5Ni9vvryoRbw4d+fr1X1xKRNBe8zmsIVKizIcNWEI/ewillTKeYCSyNCMI92JcuCx9m91dkgGxNGS8xBkFAFg8L7uwCXvvpqzUfo32YOl+oY4Kn43ejlDEo2NWAPREPAWi6ERRZ6C2H/N92UHZWcpqDmvIZeHaM+LCA5tBI+54= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059520; c=relaxed/simple; bh=xSiYxLlED4E+roogEfx5wbGd2XP9vUElO72j0ePBgtA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=DHLqE4fYGcuLaBxXgOsRRFGJfmFPhYcJLjpdBdoSgZc3xSZLWoramNI3HAeqwNNNHIyGL5tjEH0qaxfO709KRRODkXFkj0cCHyupEwiZl7G0WfR3FqcwF6hJjbPk4KSQ2REOzRIpJocAhYKaBeHSj8ZEw+u/UozyjwDAUV/nj2Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com; spf=fail smtp.mailfrom=gmail.com; arc=none smtp.client-ip=62.142.5.84 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=gmail.com Received: from localhost (88-113-26-230.elisa-laajakaista.fi [88.113.26.230]) by fgw21.mail.saunalahti.fi (Halon) with ESMTP id ccf349f8-1e62-11ef-aaf9-005056bdd08f; Thu, 30 May 2024 11:58:36 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Linus Walleij , AngeloGioacchino Del Regno , Daniel Golle , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mips@vger.kernel.org Cc: Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , Sean Wang , Matthias Brugger , Paul Cercueil , Lakshmi Sowjanya D , Andy Shevchenko Subject: [PATCH v3 10/11] pinctrl: mediatek: moore: Convert to use func member Date: Thu, 30 May 2024 11:55:19 +0300 Message-ID: <20240530085745.1539925-11-andy.shevchenko@gmail.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240530085745.1539925-1-andy.shevchenko@gmail.com> References: <20240530085745.1539925-1-andy.shevchenko@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Convert drivers to use func member embedded in struct function_desc, because other members will be removed to avoid duplication and desynchronisation of the generic pin function description. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Andy Shevchenko --- drivers/pinctrl/mediatek/pinctrl-moore.c | 10 +++++----- drivers/pinctrl/mediatek/pinctrl-moore.h | 4 +--- 2 files changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/pinctrl/mediatek/pinctrl-moore.c b/drivers/pinctrl/mediatek/pinctrl-moore.c index d972584c0519..aad4891223d3 100644 --- a/drivers/pinctrl/mediatek/pinctrl-moore.c +++ b/drivers/pinctrl/mediatek/pinctrl-moore.c @@ -56,7 +56,7 @@ static int mtk_pinmux_set_mux(struct pinctrl_dev *pctldev, return -EINVAL; dev_dbg(pctldev->dev, "enable function %s group %s\n", - func->name, grp->grp.name); + func->func.name, grp->grp.name); for (i = 0; i < grp->grp.npins; i++) { const struct mtk_pin_desc *desc; @@ -620,12 +620,12 @@ static int mtk_build_functions(struct mtk_pinctrl *hw) int i, err; for (i = 0; i < hw->soc->nfuncs ; i++) { - const struct function_desc *func = hw->soc->funcs + i; + const struct function_desc *function = hw->soc->funcs + i; + const struct pinfunction *func = &function->func; err = pinmux_generic_add_function(hw->pctrl, func->name, - func->group_names, - func->num_group_names, - func->data); + func->groups, func->ngroups, + function->data); if (err < 0) { dev_err(hw->dev, "Failed to register function %s\n", func->name); diff --git a/drivers/pinctrl/mediatek/pinctrl-moore.h b/drivers/pinctrl/mediatek/pinctrl-moore.h index 5945e4fe021f..229d19561e22 100644 --- a/drivers/pinctrl/mediatek/pinctrl-moore.h +++ b/drivers/pinctrl/mediatek/pinctrl-moore.h @@ -45,9 +45,7 @@ #define PINCTRL_PIN_FUNCTION(_name_, id) \ { \ - .name = _name_, \ - .group_names = id##_groups, \ - .num_group_names = ARRAY_SIZE(id##_groups), \ + .func = PINCTRL_PINFUNCTION(_name_, id##_groups, ARRAY_SIZE(id##_groups)), \ .data = NULL, \ } From patchwork Thu May 30 08:55:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 13679969 Received: from fgw23-7.mail.saunalahti.fi (fgw23-7.mail.saunalahti.fi [62.142.5.84]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 55B1417D35E for ; Thu, 30 May 2024 08:58:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.84 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059522; cv=none; b=UpAfinYTH0mFnYhFyuwa1z7zag58MV/V01PPeBKp5ihgq/zlybQv/+FhLoLPs5MxFXeDGg8JFEaVNMme+PFEDssoxF7lUmArcZEsD5Y+fRzeSVdBLunXlchpVXGyjL+Wd3ML7mbeJUF/62RfRqlTiGUwUlbd9DpEZ9psUOVlr2k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717059522; c=relaxed/simple; bh=AtdSj8Gi5BjDdlTV9ZqdN7OUIGwv22hj9Vwr0vi/QVA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=HvC6DXoqCWOIPY2KMAhk3y2NQgzCcG44AwtD1S/ihDQmKvVS0aEKVvpXzGfpc6XtMi9eKU+cm6mL5Ly9nGOrIsmv0cZJQIaKk/4E5YSCQjBYL8ws5loYbdM2QgAq8GI8LmHxGuULPBiRQbHgHKQUBab4qTKiIoIQro3jjXsBAgw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com; spf=fail smtp.mailfrom=gmail.com; arc=none smtp.client-ip=62.142.5.84 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=gmail.com Received: from localhost (88-113-26-230.elisa-laajakaista.fi [88.113.26.230]) by fgw22.mail.saunalahti.fi (Halon) with ESMTP id cd6d5db0-1e62-11ef-8e2e-005056bdf889; Thu, 30 May 2024 11:58:37 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Linus Walleij , AngeloGioacchino Del Regno , Daniel Golle , linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-mips@vger.kernel.org Cc: Dong Aisheng , Fabio Estevam , Shawn Guo , Jacky Bai , Pengutronix Kernel Team , Sascha Hauer , Sean Wang , Matthias Brugger , Paul Cercueil , Lakshmi Sowjanya D , Andy Shevchenko Subject: [PATCH v3 11/11] pinctrl: pinmux: Remove unused members from struct function_desc Date: Thu, 30 May 2024 11:55:20 +0300 Message-ID: <20240530085745.1539925-12-andy.shevchenko@gmail.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240530085745.1539925-1-andy.shevchenko@gmail.com> References: <20240530085745.1539925-1-andy.shevchenko@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Andy Shevchenko All drivers are converted to use embedded struct pinfunction. Remove unused members from struct function_desc. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/pinmux.h | 9 --------- 1 file changed, 9 deletions(-) diff --git a/drivers/pinctrl/pinmux.h b/drivers/pinctrl/pinmux.h index 9b57c1cc9d50..2965ec20b77f 100644 --- a/drivers/pinctrl/pinmux.h +++ b/drivers/pinctrl/pinmux.h @@ -134,16 +134,10 @@ static inline void pinmux_init_device_debugfs(struct dentry *devroot, /** * struct function_desc - generic function descriptor * @func: generic data of the pin function (name and groups of pins) - * @name: name of the function - * @group_names: array of pin group names - * @num_group_names: number of pin group names * @data: pin controller driver specific data */ struct function_desc { struct pinfunction func; - const char *name; - const char * const *group_names; - int num_group_names; void *data; }; @@ -151,9 +145,6 @@ struct function_desc { #define PINCTRL_FUNCTION_DESC(_name, _grps, _num_grps, _data) \ (struct function_desc) { \ .func = PINCTRL_PINFUNCTION(_name, _grps, _num_grps), \ - .name = _name, \ - .group_names = _grps, \ - .num_group_names = _num_grps, \ .data = _data, \ }