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J . Bottomley" , "Martin K . Petersen" Cc: Alim Akhtar , Avri Altman , Bart Van Assche , Minwoo Im , gost.dev@samsung.com, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, Jeuk Kim Subject: [PATCH 1/3] ufs: mcq: Add ufshcd_mcq_queue_cfg_addr helper Date: Fri, 31 May 2024 19:38:19 +0900 Message-Id: <20240531103821.1583934-2-minwoo.im@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240531103821.1583934-1-minwoo.im@samsung.com> Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprLJsWRmVeSWpSXmKPExsWy7bCmma7P6sg0g3cz+CwezNvGZvHy51U2 i2kffjJb3Dywk8liYz+Hxf2t1xgtLu+aw2bRfX0Hm8Xy4/+YLJ6dPsDswOVx+Yq3x7RJp9g8 Pj69xeLRt2UVo8fnTXIe7Qe6mQLYorJtMlITU1KLFFLzkvNTMvPSbZW8g+Od403NDAx1DS0t zJUU8hJzU22VXHwCdN0yc4AOU1IoS8wpBQoFJBYXK+nb2RTll5akKmTkF5fYKqUWpOQUmBfo FSfmFpfmpevlpZZYGRoYGJkCFSZkZ0z8PYu14Ax/Rdes1YwNjDN4uxg5OSQETCSmfbnG2MXI xSEksINRonnDZSjnE6PEoq//mUCqhAS+MUr8/B4J07F2x3IWiKK9jBK/bu9hhnB+M0p09K5m BqliE1CXaJj6igXEFhGoltjc/pcNpIhZoI9Jon32fFaQhLCAs8Slm08ZQWwWAVWJ/nUfwJp5 BWwk2h69ZYNYJy+x/+BZsDingK1Ey/+TbBA1ghInZz4BW8AMVNO8dTbYFRICjRwSlz7cgGp2 kTj4cSozhC0s8er4FnYIW0riZX8blF0u8fPNJEYIu0Li4KzbQL0cQLa9xLXnKSAms4CmxPpd +hBRZYkjt6C28kl0HP7LDhHmlehoE4KYoSzx8dAhqJ2SEssvvYa6xUPi4Zsv0HCbwChx/NpJ pgmMCrOQPDMLyTOzEBYvYGRexSiWWlCcm55abFRgAo/g5PzcTYzgdKrlsYNx9tsPeocYmTgY DzFKcDArifD+So9IE+JNSaysSi3Kjy8qzUktPsRoCgzqicxSosn5wISeVxJvaGJpYGJmZmhu ZGpgriTOe691boqQQHpiSWp2ampBahFMHxMHp1QDU/eRKa2H2tQDBD82sW/XENjTbv+G48nZ 6qiykl9NzDZsq3/5vXNgTNiqYCvsPH92qvuE6BOsF0TPe21Lemr59vGH8sYlzIUbfKR3B0jw HA9IWs244+RZplxNWzY+lxP81rI8G2uT3vjMnBLydNm1e7FM0Zy95ab/cl9v37jbe+bxT/vD 3Y9J7Qr5OIVxxq4vrK4HjATZP3q0Oekqbv81c9Uz68aDRy1b/3K9TKiSvu042eNuxvK4rtT5 qTelHr7f/eHfFJeqLd+t/l2Y8el+5nLTt+v3ZZ6ztH5SKB21yL04dsHC0z9W/p4795ZCwJ1A p94HPrGCuy5yLwif2PRb0HZPcdKJsDTesuqbcQGa1kosxRmJhlrMRcWJAFmCxtcwBAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrFLMWRmVeSWpSXmKPExsWy7bCSnK736sg0g6ULzCwezNvGZvHy51U2 i2kffjJb3Dywk8liYz+Hxf2t1xgtLu+aw2bRfX0Hm8Xy4/+YLJ6dPsDswOVx+Yq3x7RJp9g8 Pj69xeLRt2UVo8fnTXIe7Qe6mQLYorhsUlJzMstSi/TtErgyJv6exVpwhr+ia9ZqxgbGGbxd jJwcEgImEmt3LGfpYuTiEBLYzSjxfcY0doiEpMS+0zdZIWxhifstR1ghin4ySrz/foMRJMEm oC7RMPUVC4gtIlAtsbn9LxtIEbPANCaJRbMguoUFnCUu3XwK1sAioCrRv+4DM4jNK2Aj0fbo LRvEBnmJ/QfPgsU5BWwlWv6fBIsLAdWsvvySBaJeUOLkzCdgNjNQffPW2cwTGAVmIUnNQpJa wMi0ilEytaA4Nz032bDAMC+1XK84Mbe4NC9dLzk/dxMjOPi1NHYw3pv/T+8QIxMH4yFGCQ5m JRHeX+kRaUK8KYmVValF+fFFpTmpxYcYpTlYlMR5DWfMThESSE8sSc1OTS1ILYLJMnFwSjUw Naee/SF9/eeu2wI2d7/sOaGz6o78XIFVMotudBt5fY4xP7zmf3JbxLaHa5j8NYzq58/a0erT cnBnhFHIA2srpR+3k2JenZE75Ncqkbtjp3Lwh12r+h9tPDGnV2CzwpS6Fp77Sg4VURPvrg5T e/VsTTIH+5/00iT3Gb/sWjcL3t5/Qd31UquvZX31mdKosO/LZ29JFbnAz2B67uGcCcXrTKcs SzlfOkve+H+upPn7EpY6je0/7ZVunJBO/jPxxhGnAy80VU/O0kvQbflar8SS17ygWGp+Wcul u3p3Ne4/i3Y/9qB/neU+vQdhMkd83fJcV+m+01b+smma1PWL1suNZW5qRYQvmMwxbW5w6/Z+ BSWW4oxEQy3mouJEAIu0SmjtAgAA X-CMS-MailID: 20240531104947epcas2p1cd477921c1cd307d84f9ffc25b2c08a8 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20240531104947epcas2p1cd477921c1cd307d84f9ffc25b2c08a8 References: <20240531103821.1583934-1-minwoo.im@samsung.com> This helper returns an offset address of MCQ queue configuration registers. This is a prep patch for the following patch. Signed-off-by: Minwoo Im --- drivers/ufs/core/ufs-mcq.c | 14 ++++++++++++++ include/ufs/ufshcd.h | 1 + 2 files changed, 15 insertions(+) diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c index 52210c4c20dc..46faa54aea94 100644 --- a/drivers/ufs/core/ufs-mcq.c +++ b/drivers/ufs/core/ufs-mcq.c @@ -18,6 +18,7 @@ #include #define MAX_QUEUE_SUP GENMASK(7, 0) +#define QCFGPTR GENMASK(23, 16) #define UFS_MCQ_MIN_RW_QUEUES 2 #define UFS_MCQ_MIN_READ_QUEUES 0 #define UFS_MCQ_MIN_POLL_QUEUES 0 @@ -116,6 +117,19 @@ struct ufs_hw_queue *ufshcd_mcq_req_to_hwq(struct ufs_hba *hba, return &hba->uhq[hwq]; } +/** + * ufshcd_mcq_queue_cfg_addr - get an start address of the MCQ Queue Config + * Registers. + * @hba: per adapter instance + * + * Return: Start address of MCQ Queue Config Registers in HCI + */ +unsigned int ufshcd_mcq_queue_cfg_addr(struct ufs_hba *hba) +{ + return FIELD_GET(QCFGPTR, hba->mcq_capabilities) * 0x200; +} +EXPORT_SYMBOL_GPL(ufshcd_mcq_queue_cfg_addr); + /** * ufshcd_mcq_decide_queue_depth - decide the queue depth * @hba: per adapter instance diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index df68fb1d4f3f..9e0581115b34 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -1278,6 +1278,7 @@ void ufshcd_update_evt_hist(struct ufs_hba *hba, u32 id, u32 val); void ufshcd_hba_stop(struct ufs_hba *hba); void ufshcd_schedule_eh_work(struct ufs_hba *hba); void ufshcd_mcq_config_mac(struct ufs_hba *hba, u32 max_active_cmds); +unsigned int ufshcd_mcq_queue_cfg_addr(struct ufs_hba *hba); u32 ufshcd_mcq_read_cqis(struct ufs_hba *hba, int i); void ufshcd_mcq_write_cqis(struct ufs_hba *hba, u32 val, int i); unsigned long ufshcd_mcq_poll_cqe_lock(struct ufs_hba *hba, From patchwork Fri May 31 10:38:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Minwoo Im X-Patchwork-Id: 13681515 Received: from mailout3.samsung.com (mailout3.samsung.com [203.254.224.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A446C156F42 for ; Fri, 31 May 2024 10:49:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.33 ARC-Seal: i=1; a=rsa-sha256; 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Fri, 31 May 2024 19:49:47 +0900 (KST) Received: from localhost.dsn.sec.samsung.com (unknown [10.229.54.230]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20240531104947epsmtip1bd6f77365a18ee53f40c3fd56100775a~UjS5Gb4Sb0934709347epsmtip1L; Fri, 31 May 2024 10:49:47 +0000 (GMT) From: Minwoo Im To: "James E . J . Bottomley" , "Martin K . Petersen" Cc: Alim Akhtar , Avri Altman , Bart Van Assche , Minwoo Im , gost.dev@samsung.com, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, Jeuk Kim Subject: [PATCH 2/3] ufs: pci: Add support MCQ for QEMU-based UFS Date: Fri, 31 May 2024 19:38:20 +0900 Message-Id: <20240531103821.1583934-3-minwoo.im@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240531103821.1583934-1-minwoo.im@samsung.com> Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrIJsWRmVeSWpSXmKPExsWy7bCmma7P6sg0g61XpCwezNvGZvHy51U2 i2kffjJb3Dywk8liYz+Hxf2t1xgtLu+aw2bRfX0Hm8Xy4/+YLJ6dPsDswOVx+Yq3x7RJp9g8 Pj69xeLRt2UVo8fnTXIe7Qe6mQLYorJtMlITU1KLFFLzkvNTMvPSbZW8g+Od403NDAx1DS0t zJUU8hJzU22VXHwCdN0yc4AOU1IoS8wpBQoFJBYXK+nb2RTll5akKmTkF5fYKqUWpOQUmBfo FSfmFpfmpevlpZZYGRoYGJkCFSZkZzTsv81U8EK8Yu6cTtYGxi/CXYycHBICJhI3jnxi62Lk 4hAS2MMocWpWByOE84lRYtGmv8wQzjdGiROLnzDDtExqOcwEkdjLKLH67HwWCOc3o8Txt3sZ QarYBNQlGqa+YgGxRQSqJTa3/wVbwizQxyTRPns+axcjB4ewgKPE9dWGIDUsAqoS908tAuvl FbCRuHxyGRPENnmJ/QfPgm3mFLCVaPl/kg2iRlDi5MwnYPOZgWqat84GO1VCoJFD4s/7aYwQ zS4St46fZYewhSVeHd8CZUtJvOxvg7LLJX6+mQRVXyFxcNZtNpDbJATsJa49TwExmQU0Jdbv 0oeIKkscuQW1lU+i4/Bfdogwr0RHmxDEDGWJj4cOQYNKUmL5pddsELaHxLPPa6GBO4FR4tP2 XWwTGBVmIXlmFpJnZiEsXsDIvIpRKrWgODc9NdmowFA3L7UcHsnJ+bmbGMFpVct3B+Pr9X/1 DjEycTAeYpTgYFYS4f2VHpEmxJuSWFmVWpQfX1Sak1p8iNEUGNwTmaVEk/OBiT2vJN7QxNLA xMzM0NzI1MBcSZz3XuvcFCGB9MSS1OzU1ILUIpg+Jg5OqQambkO/lBmG5k9fL45ObZnwrPXv 7Sxv6fvybHnKlTwrb7/ZHfPQ0Uc6e4Pbb8t4L8153/99ntDwKcnSeb0jl2/f2jhfnhW3Q9T5 TntJTlu7/rfkWl/lludS9SVFZyzPblm5RfUYhzy3plvWH1tL2V2cbMqrIrNuS+kcn/Hv6SLp 45ueXOVZ8FPSeNmnb5O3Cf/gy5HRS/3uOXXSk27lltSHjgZzfjnoP791e56aiBbH4Q9HOi7v z1nRm2nL9Unu+h5DpYkPk85LteyM5Pq78OOCJXkLYp7rXD/2463WtuWWz6ZcCvgo0Xaq8VTu lP2NCZIGa0wMRD67ZO/JtuWNjXJ54z9Le9n/12/LGf7me/YVK7EUZyQaajEXFScCALMQ6w40 BAAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrJLMWRmVeSWpSXmKPExsWy7bCSnK736sg0gwVbLCwezNvGZvHy51U2 i2kffjJb3Dywk8liYz+Hxf2t1xgtLu+aw2bRfX0Hm8Xy4/+YLJ6dPsDswOVx+Yq3x7RJp9g8 Pj69xeLRt2UVo8fnTXIe7Qe6mQLYorhsUlJzMstSi/TtErgyGvbfZip4IV4xd04nawPjF+Eu Rk4OCQETiUkth5m6GLk4hAR2M0q8aX3EApGQlNh3+iYrhC0scb/lCCtE0U9GiY1b+sGK2ATU JRqmvgKzRQSqJTa3/2UDKWIWmMYksWgWSDcHh7CAo8T11YYgNSwCqhL3Ty1iBLF5BWwkLp9c xgSxQF5i/8GzzCA2p4CtRMv/k2wgthBQzerLL1kg6gUlTs58AmYzA9U3b53NPIFRYBaS1Cwk qQWMTKsYJVMLinPTc5MNCwzzUsv1ihNzi0vz0vWS83M3MYJDX0tjB+O9+f/0DjEycTAeYpTg YFYS4f2VHpEmxJuSWFmVWpQfX1Sak1p8iFGag0VJnNdwxuwUIYH0xJLU7NTUgtQimCwTB6dU A9P5Jae2/80WWjdd7Ilj+aZUc6a/TEaSoZZNZgKTgreefbjwO9vagBtGL5JW1M4pm/vqe1L8 yuT7Lxbd2GJebXc1MI0hUqc7wfbsvWdRW10q+Cz6bp5RlWLZve58ksOykuOz018aFOX9tth0 p1+mpKraZFJt9f/n3nuPiVbqriz4Uic4w3MN6/3FnDxR4bfMNzDFV0Ve1jWT7c+ZWHExy9Rf Z4+r9KT9PzwWzHIOVbO8zZne4JpTZX1EeHpE6LNnr1NnfJJ5I6F/cM7f+0GTf29a4yW9oMz9 qcTZC4KZKyuOt3keUbDO8qpX6F1yd21F3Y83GuFWUdskd1tVuqpObulJienymqipHcCrWC8T rcRSnJFoqMVcVJwIAHm00EfsAgAA X-CMS-MailID: 20240531104947epcas2p30506632eb56025711dfb5768e2f77154 X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20240531104947epcas2p30506632eb56025711dfb5768e2f77154 References: <20240531103821.1583934-1-minwoo.im@samsung.com> Recently, ufs-mcq feature has been introduced to QEMU hw/ufs device [1]. This patch adds MCQ support for upstream QEMU UFS PCI controller. This patch provides mandatory vops callbacks to make UFS controller work properly on MCQ mode. Operation and Runtime Config register stride is fixed to 48bytes which is implemented by qemu. [1] https://lore.kernel.org/qemu-devel/cover.1716876237.git.jeuk20.kim@samsung.com/ Signed-off-by: Minwoo Im --- drivers/ufs/host/ufshcd-pci.c | 48 ++++++++++++++++++++++++++++++++++- 1 file changed, 47 insertions(+), 1 deletion(-) diff --git a/drivers/ufs/host/ufshcd-pci.c b/drivers/ufs/host/ufshcd-pci.c index 0aca666d2199..d4d64a29390e 100644 --- a/drivers/ufs/host/ufshcd-pci.c +++ b/drivers/ufs/host/ufshcd-pci.c @@ -20,6 +20,8 @@ #include #include +#define MAX_SUPP_MAC 64 + struct ufs_host { void (*late_init)(struct ufs_hba *hba); }; @@ -446,6 +448,49 @@ static int ufs_intel_mtl_init(struct ufs_hba *hba) return ufs_intel_common_init(hba); } +static int ufs_redhat_get_hba_mac(struct ufs_hba *hba) +{ + return MAX_SUPP_MAC; +} + +static int ufs_redhat_mcq_config_resource(struct ufs_hba *hba) +{ + hba->mcq_base = hba->mmio_base + ufshcd_mcq_queue_cfg_addr(hba); + + return 0; +} + +static int ufs_redhat_op_runtime_config(struct ufs_hba *hba) +{ + struct ufshcd_mcq_opr_info_t *opr; + int i; + + u32 sqdao = ufsmcq_readl(hba, ufshcd_mcq_cfg_offset(REG_SQDAO, 0)); + u32 sqisao = ufsmcq_readl(hba, ufshcd_mcq_cfg_offset(REG_SQISAO, 0)); + u32 cqdao = ufsmcq_readl(hba, ufshcd_mcq_cfg_offset(REG_CQDAO, 0)); + u32 cqisao = ufsmcq_readl(hba, ufshcd_mcq_cfg_offset(REG_CQISAO, 0)); + + hba->mcq_opr[OPR_SQD].offset = sqdao; + hba->mcq_opr[OPR_SQIS].offset = sqisao; + hba->mcq_opr[OPR_CQD].offset = cqdao; + hba->mcq_opr[OPR_CQIS].offset = cqisao; + + for (i = 0; i < OPR_MAX; i++) { + opr = &hba->mcq_opr[i]; + opr->stride = 48; + opr->base = hba->mmio_base + opr->offset; + } + + return 0; +} + +static struct ufs_hba_variant_ops ufs_redhat_hba_vops = { + .name = "redhat-pci", + .get_hba_mac = ufs_redhat_get_hba_mac, + .mcq_config_resource = ufs_redhat_mcq_config_resource, + .op_runtime_config = ufs_redhat_op_runtime_config, +}; + static struct ufs_hba_variant_ops ufs_intel_cnl_hba_vops = { .name = "intel-pci", .init = ufs_intel_common_init, @@ -591,7 +636,8 @@ static const struct dev_pm_ops ufshcd_pci_pm_ops = { }; static const struct pci_device_id ufshcd_pci_tbl[] = { - { PCI_VENDOR_ID_REDHAT, 0x0013, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, + { PCI_VENDOR_ID_REDHAT, 0x0013, PCI_ANY_ID, PCI_ANY_ID, 0, 0, + (kernel_ulong_t)&ufs_redhat_hba_vops }, { PCI_VENDOR_ID_SAMSUNG, 0xC00C, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, { PCI_VDEVICE(INTEL, 0x9DFA), (kernel_ulong_t)&ufs_intel_cnl_hba_vops }, { PCI_VDEVICE(INTEL, 0x4B41), (kernel_ulong_t)&ufs_intel_ehl_hba_vops }, From patchwork Fri May 31 10:38:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Minwoo Im X-Patchwork-Id: 13681513 Received: from mailout2.samsung.com (mailout2.samsung.com [203.254.224.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A3CB2156F3B for ; Fri, 31 May 2024 10:49:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=203.254.224.25 ARC-Seal: i=1; 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Fri, 31 May 2024 19:49:48 +0900 (KST) Received: from localhost.dsn.sec.samsung.com (unknown [10.229.54.230]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20240531104947epsmtip1c63e4851994ea32a017f917a98adb709~UjS5JYUt-0934709347epsmtip1M; Fri, 31 May 2024 10:49:47 +0000 (GMT) From: Minwoo Im To: "James E . J . Bottomley" , "Martin K . Petersen" Cc: Alim Akhtar , Avri Altman , Bart Van Assche , Minwoo Im , gost.dev@samsung.com, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, Jeuk Kim Subject: [PATCH 3/3] ufs: mcq: Prevent no I/O queue case for MCQ Date: Fri, 31 May 2024 19:38:21 +0900 Message-Id: <20240531103821.1583934-4-minwoo.im@samsung.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240531103821.1583934-1-minwoo.im@samsung.com> Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprHJsWRmVeSWpSXmKPExsWy7bCmma7P6sg0g57J0hYP5m1js3j58yqb xbQPP5ktbh7YyWSxsZ/D4v7Wa4wWl3fNYbPovr6DzWL58X9MFs9OH2B24PK4fMXbY9qkU2we H5/eYvHo27KK0ePzJjmP9gPdTAFsUdk2GamJKalFCql5yfkpmXnptkrewfHO8aZmBoa6hpYW 5koKeYm5qbZKLj4Bum6ZOUCHKSmUJeaUAoUCEouLlfTtbIryS0tSFTLyi0tslVILUnIKzAv0 ihNzi0vz0vXyUkusDA0MjEyBChOyM25N3sRU0MRZ8ePFLKYGxlXsXYycHBICJhJ9dy+xdjFy cQgJ7GCU6OluZ4FwPjFKHO5pZYJzVk98yAjT8mvTTKiWnYwSG2fPYoRwfjNKXF/6kwmkik1A XaJh6isWEFtEoFpic/tfNpAiZoE+Jon22fNZQRLCAg4Sp94tZwaxWQRUJRbevwTWwCtgIzFt z3kWiHXyEvsPngWr4RSwlWj5f5INokZQ4uTMJ2A1zEA1zVtnM4MskBD4yi6xfe1cqGYXiWct 25ghbGGJV8e3QL0tJfH53V42CLtc4uebSVC/VUgcnHUbKM4BZNtLXHueAmIyC2hKrN+lDxFV ljhyC2orn0TH4b/sEGFeiY42IYgZyhIfDx2C2ikpsfzSa6g9HhIrb06Bhu4ERon5S44wTWBU mIXkmVlInpmFsHgBI/MqRrHUguLc9NRiowJjeAwn5+duYgQnVC33HYwz3n7QO8TIxMF4iFGC g1lJhPdXekSaEG9KYmVValF+fFFpTmrxIUZTYFBPZJYSTc4HpvS8knhDE0sDEzMzQ3MjUwNz JXHee61zU4QE0hNLUrNTUwtSi2D6mDg4pRqYzEScfym+/PpV7HdAVPc1toZl9xwan7wumHfq U0G3kcUyNhaBW/88t1YV/v9+6YTygpVzbY3+9lk7THZdf96if97r/QJH6lKFD+3I5nD69bzK IHEC1/otwb8u2/Tf+HhtxdOQ+GaWqD4Loz6Z27Yce2+oPqiV/xBz0vxFzIqUp5FKlhHdai+F wsOWrhEya11yl5lP2ZY17a7YAt3Tqww5fQRXBEvKyl3/LtrRYXsmo50t387Cck7Z+iV7mH5n Mmg+aj2+LjFRPLRFdP6fbb+/RvWpvbx+Jflb9oLi0pLD1zyzzRITXgVfepS7/vT639dVRCW7 ZGM5721O0JFXOzc9XWjJ0sYVD3duTdh07Y2iEktxRqKhFnNRcSIA1n/f6jEEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrGLMWRmVeSWpSXmKPExsWy7bCSnK7P6sg0gx8rGS0ezNvGZvHy51U2 i2kffjJb3Dywk8liYz+Hxf2t1xgtLu+aw2bRfX0Hm8Xy4/+YLJ6dPsDswOVx+Yq3x7RJp9g8 Pj69xeLRt2UVo8fnTXIe7Qe6mQLYorhsUlJzMstSi/TtErgybk3exFTQxFnx48UspgbGVexd jJwcEgImEr82zWTtYuTiEBLYzihx8OB1NoiEpMS+0zdZIWxhifstR6CKfjJKrFn5igUkwSag LtEwFcIWEaiW2Nz+lw2kiFlgGpPEolkQ3cICDhKn3i1nBrFZBFQlFt6/BNbAK2AjMW3PeRaI DfIS+w+eBavhFLCVaPl/EuwKIaCa1ZdfQtULSpyc+QTMZgaqb946m3kCo8AsJKlZSFILGJlW MYqmFhTnpucmFxjqFSfmFpfmpesl5+duYgQHvVbQDsZl6//qHWJk4mA8xCjBwawkwvsrPSJN iDclsbIqtSg/vqg0J7X4EKM0B4uSOK9yTmeKkEB6YklqdmpqQWoRTJaJg1OqgUmfseDuw9pl xhy885MYE6InrP/pqXBGOd5oh1nPz0+xBkovC1h4Lyj+FT3k71BzgTV5zws+iTu/XNmev2vL kKhICDdi0u/fpC72dm7u+oTrkj/PymhuFNqporXz/YmITZvdJE0P9lQy9G1OutZw6PMj564F Gayyi2UnheUVTDFnZDWtep9Rn+D7onheT2rb9uX9+1yatO4YRyp/4N4w64LIKalZHLNr4mVX rIuZ6t/qtTDFX2m9d4fMztdxETVb9k80E7jNu+K4mdbzaGH1sr0nJu3p/Oqu4LcmpmNKjpD5 waLNrPePsWUGW3AZnD4ZE20rzX96T5/e9l13Wa/F7Iic6TsxetFTuaYAJ/GJSizFGYmGWsxF xYkArvWw5+kCAAA= X-CMS-MailID: 20240531104948epcas2p1a70f31cd4a1aa5d36267b4187d75056b X-Msg-Generator: CA X-Sendblock-Type: AUTO_CONFIDENTIAL CMS-TYPE: 102P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20240531104948epcas2p1a70f31cd4a1aa5d36267b4187d75056b References: <20240531103821.1583934-1-minwoo.im@samsung.com> If hba_maxq equals poll_queues, which means there are no I/O queues (HCTX_TYPE_DEFAULT, HCTX_TYPE_READ), the very first hw queue will be allocated as HCTX_TYPE_POLL and it will be used as the dev_cmd_queue. In this case, device commands such as QUERY cannot be properly handled. This patch prevents the initialization of MCQ when the number of I/O queues is not set and only the number of POLL queues is set. Signed-off-by: Minwoo Im Reviewed-by: Bart Van Assche --- drivers/ufs/core/ufs-mcq.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/ufs/core/ufs-mcq.c b/drivers/ufs/core/ufs-mcq.c index 46faa54aea94..4bcae410c268 100644 --- a/drivers/ufs/core/ufs-mcq.c +++ b/drivers/ufs/core/ufs-mcq.c @@ -179,6 +179,15 @@ static int ufshcd_mcq_config_nr_queues(struct ufs_hba *hba) return -EOPNOTSUPP; } + /* + * Device should support at least one I/O queue to handle device + * commands via hba->dev_cmd_queue. + */ + if (hba_maxq == poll_queues) { + dev_err(hba->dev, "At least one non-poll queue required\n"); + return -EOPNOTSUPP; + } + rem = hba_maxq; if (rw_queues) {