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Addtional change during convert: - deprecate "sdhci,wp-inverted", "sdhci,1-bit-only". - Add "reg" and "interrupts" property. - change example "sdhci@2e000" to "mmc@2e000". - compatible string require fsl,-esdhc followed by fsl,esdhc to match most existed dts file. Signed-off-by: Frank Li --- Notes: pass dt_binding_check make ARCH=arm64 CROSS_COMPILE=aarch64-linux-gnu- -j8 dt_binding_check DT_SCHEMA_FILES=fsl-ls-esdhc.yaml SCHEMA Documentation/devicetree/bindings/processed-schema.json CHKDT Documentation/devicetree/bindings LINT Documentation/devicetree/bindings DTEX Documentation/devicetree/bindings/mmc/fsl-ls-esdhc.example.dts DTC_CHK Documentation/devicetree/bindings/mmc/fsl-ls-esdhc.example.dtb .../devicetree/bindings/mmc/fsl-esdhc.txt | 52 ---------- .../devicetree/bindings/mmc/fsl-ls-esdhc.yaml | 98 +++++++++++++++++++ 2 files changed, 98 insertions(+), 52 deletions(-) delete mode 100644 Documentation/devicetree/bindings/mmc/fsl-esdhc.txt create mode 100644 Documentation/devicetree/bindings/mmc/fsl-ls-esdhc.yaml diff --git a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt deleted file mode 100644 index edb8cadb95412..0000000000000 --- a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt +++ /dev/null @@ -1,52 +0,0 @@ -* Freescale Enhanced Secure Digital Host Controller (eSDHC) - -The Enhanced Secure Digital Host Controller provides an interface -for MMC, SD, and SDIO types of memory cards. - -This file documents differences between the core properties described -by mmc.txt and the properties used by the sdhci-esdhc driver. - -Required properties: - - compatible : should be "fsl,esdhc", or "fsl,-esdhc". - Possible compatibles for PowerPC: - "fsl,mpc8536-esdhc" - "fsl,mpc8378-esdhc" - "fsl,p2020-esdhc" - "fsl,p4080-esdhc" - "fsl,t1040-esdhc" - "fsl,t4240-esdhc" - Possible compatibles for ARM: - "fsl,ls1012a-esdhc" - "fsl,ls1028a-esdhc" - "fsl,ls1088a-esdhc" - "fsl,ls1043a-esdhc" - "fsl,ls1046a-esdhc" - "fsl,ls2080a-esdhc" - - clock-frequency : specifies eSDHC base clock frequency. - -Optional properties: - - sdhci,wp-inverted : specifies that eSDHC controller reports - inverted write-protect state; New devices should use the generic - "wp-inverted" property. - - sdhci,1-bit-only : specifies that a controller can only handle - 1-bit data transfers. New devices should use the generic - "bus-width = <1>" property. - - sdhci,auto-cmd12: specifies that a controller can only handle auto - CMD12. - - voltage-ranges : two cells are required, first cell specifies minimum - slot voltage (mV), second cell specifies maximum slot voltage (mV). - Several ranges could be specified. - - little-endian : If the host controller is little-endian mode, specify - this property. The default endian mode is big-endian. - -Example: - -sdhci@2e000 { - compatible = "fsl,mpc8378-esdhc", "fsl,esdhc"; - reg = <0x2e000 0x1000>; - interrupts = <42 0x8>; - interrupt-parent = <&ipic>; - /* Filled in by U-Boot */ - clock-frequency = <0>; - voltage-ranges = <3300 3300>; -}; diff --git a/Documentation/devicetree/bindings/mmc/fsl-ls-esdhc.yaml b/Documentation/devicetree/bindings/mmc/fsl-ls-esdhc.yaml new file mode 100644 index 0000000000000..cafc09c4f1234 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/fsl-ls-esdhc.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/fsl-ls-esdhc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale Enhanced Secure Digital Host Controller (eSDHC) + +description: + The Enhanced Secure Digital Host Controller provides an interface + for MMC, SD, and SDIO types of memory cards. + +maintainers: + - Frank Li + +properties: + compatible: + items: + - enum: + - fsl,mpc8536-esdhc + - fsl,mpc8378-esdhc + - fsl,p2020-esdhc + - fsl,p4080-esdhc + - fsl,t1040-esdhc + - fsl,t4240-esdhc + - fsl,ls1012a-esdhc + - fsl,ls1028a-esdhc + - fsl,ls1088a-esdhc + - fsl,ls1043a-esdhc + - fsl,ls1046a-esdhc + - fsl,ls2080a-esdhc + - const: fsl,esdhc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clock-frequency: + $ref: /schemas/types.yaml#/definitions/uint32 + description: specifies eSDHC base clock frequency. + + sdhci,wp-inverted: + $ref: /schemas/types.yaml#/definitions/flag + deprecated: true + description: + specifies that eSDHC controller reports + inverted write-protect state; New devices should use the generic + "wp-inverted" property. + + sdhci,1-bit-only: + $ref: /schemas/types.yaml#/definitions/flag + deprecated: true + description: + specifies that a controller can only handle + 1-bit data transfers. New devices should use the generic + "bus-width = <1>" property. + + sdhci,auto-cmd12: + $ref: /schemas/types.yaml#/definitions/flag + description: + specifies that a controller can only handle auto CMD12. + + voltage-ranges: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: specifies minimum slot voltage (mV). + - description: specifies maximum slot voltage (mV). + + little-endian: + $ref: /schemas/types.yaml#/definitions/flag + description: + If the host controller is little-endian mode, specify + this property. The default endian mode is big-endian. + +required: + - compatible + - reg + - interrupts + +allOf: + - $ref: sdhci-common.yaml# + +unevaluatedProperties: false + +examples: + - | + mmc@2e000 { + compatible = "fsl,mpc8378-esdhc", "fsl,esdhc"; + reg = <0x2e000 0x1000>; + interrupts = <42 0x8>; + interrupt-parent = <&ipic>; + /* Filled in by U-Boot */ + clock-frequency = <0>; + voltage-ranges = <3300 3300>; + };