From patchwork Sat Jun 1 15:03:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682490 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4EEEEC27C50 for ; Sat, 1 Jun 2024 15:04:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=m97WhT+IsfN3JOX/Fu4bLN5tmqTwIrWFxmEnRuNhqdY=; b=H39LXS6UPes+a+ toWMJ/1fTAE3XuwNhiatPPZ7pfKh7LZnv1VqIVPkZunIW/AmRAvAJ1DAO90RLvpbeooqdL7jPonwT P5BUd8/ZRylDJxBYzSmv3FGmkhAd2Faw9unDYwBH1HPgNMqoQQ4VtTdAKCLsr+r9mxVDRgIvvk3a5 PiPydQ1luhFH8i7QCPPncSBzn8Qk7+6DWDNLCWcjRx1Nr9lvlO6vUUIQR1OLwo+/xKv2jr5Z31fnz DDDEvSHg7RtIheX5KiCu0yFnMfICTOOux8D2aUbG9HOkNOhfb40iEAVw8sdmlTYN3x4ncEXI/E0+c wY5TxqDuG8kH8b5z5Deg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQHa-0000000CoV0-3ht4; Sat, 01 Jun 2024 15:04:34 +0000 Received: from mail-pf1-x436.google.com ([2607:f8b0:4864:20::436]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQHW-0000000CoSR-49VJ for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:04:32 +0000 Received: by mail-pf1-x436.google.com with SMTP id d2e1a72fcca58-7024494f7daso1614156b3a.3 for ; Sat, 01 Jun 2024 08:04:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254269; x=1717859069; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LT21c84koQW6P28bMKNqbqxIBzmYYGDGOP9emzpIfhE=; b=EZ0VYXAc1xiCTFsIr4OQUN+Ra9gJ8Q6LFePwXlE8H01mQ3XbFJetyfJ2dahGq11gfk LpWa5OMPjo3zyrrPCHSrMCUjxFB835PD3abUOsD2sJOFMmvwJSsZ3Db1lmLZXkUmtPpB KDzOg0ciAM8HAFxLKLhIzBwgs3Iv056X3fhVKpgd3r/bYKqRDt/s46kvZ1YysZP7r3i9 x3lsMLyXCFEzcyjLtnjPLYbboTB5cI7POA9VA/pqMV72M0XPiZprdBzv9I3Jjs/DhdEK ASFex7vPmTJSoosfHuoLyKhd32k9KU2MCiYci3iXvDh6dlY8kuLCE9G+0y9cWXy3Iuw1 bj1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254269; x=1717859069; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LT21c84koQW6P28bMKNqbqxIBzmYYGDGOP9emzpIfhE=; b=lsnTw8mj+PksgDYI+it0LiWvKovxiWnfOhtysWNjxsr7pziWBiGOZZvfMvfGF0BUES McVgvpy1FI/rApKSn820tPtacYhLkSPzWkv7OD0eIC9L2otoYnd3qNtz2Iw04MsZung0 V5PHTzSOJ0Gn/4ba4/gPYVwVXGc99JHxbVtC/1QvaPNjEYKP4TrCUw5Gl0JtV4X4ayjU TWHNDDx44b+QGoSUufMhf8AezSKfkjs3Gf837FBEy+pZYIW5Q2m+6DoWXPT0M2SiqKI3 N5/K0KWFv5MpoeWtVVLjC2/pkrfWHVwj+OLPoyavvcbBOQVfW4QzAc4EEbIuPx4sTPOY MFGA== X-Forwarded-Encrypted: i=1; AJvYcCW+CbfYG6PM2uc2Vaeue7Yv0lVUwB5xzZM4td+PyG7yFmJk3cACl1zPC7sDWKAes/ucUW54GGTd9H3oWzqKkx3WmPjQGvJ9D1A0WS0m8R7V X-Gm-Message-State: AOJu0Yyhx1ImQpvV8oXnmFsF25+owFjyEsvid5IrBlD+N1Drd1iuP+0v cMCJCDql+6afEpyLF9aRPhpTP12fgP7eYaBuhchCSgPwLLJooDf5iTRIbz9+QXM= X-Google-Smtp-Source: AGHT+IE+0q527LYQj/8mqm/zytyLNy9tU9xmt85/jtzTBKf15viH83WSKTg8Kh7QUVCdKAWk9UnLVQ== X-Received: by 2002:a05:6a00:114c:b0:6ec:d972:c3d8 with SMTP id d2e1a72fcca58-702477e521fmr5673180b3a.10.1717254268549; Sat, 01 Jun 2024 08:04:28 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.04.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:04:28 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 01/17] arm64: PCI: Migrate ACPI related functions to pci-acpi.c Date: Sat, 1 Jun 2024 20:33:55 +0530 Message-Id: <20240601150411.1929783-2-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_080431_065559_ECAE22E5 X-CRM114-Status: GOOD ( 21.20 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The functions defined in arm64 for ACPI support are required for RISC-V also. To avoid duplication, move these functions to common location. Signed-off-by: Sunil V L Acked-by: Bjorn Helgaas Acked-by: Will Deacon --- arch/arm64/kernel/pci.c | 191 ---------------------------------------- drivers/pci/pci-acpi.c | 182 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 182 insertions(+), 191 deletions(-) diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c index f872c57e9909..fd9a7bed83ce 100644 --- a/arch/arm64/kernel/pci.c +++ b/arch/arm64/kernel/pci.c @@ -6,28 +6,7 @@ * Copyright (C) 2014 ARM Ltd. */ -#include -#include -#include -#include -#include #include -#include -#include -#include - -#ifdef CONFIG_ACPI -/* - * Try to assign the IRQ number when probing a new device - */ -int pcibios_alloc_irq(struct pci_dev *dev) -{ - if (!acpi_disabled) - acpi_pci_irq_enable(dev); - - return 0; -} -#endif /* * raw_pci_read/write - Platform-specific PCI config space access. @@ -61,173 +40,3 @@ int pcibus_to_node(struct pci_bus *bus) EXPORT_SYMBOL(pcibus_to_node); #endif - -#ifdef CONFIG_ACPI - -struct acpi_pci_generic_root_info { - struct acpi_pci_root_info common; - struct pci_config_window *cfg; /* config space mapping */ -}; - -int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) -{ - struct pci_config_window *cfg = bus->sysdata; - struct acpi_device *adev = to_acpi_device(cfg->parent); - struct acpi_pci_root *root = acpi_driver_data(adev); - - return root->segment; -} - -int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) -{ - struct pci_config_window *cfg; - struct acpi_device *adev; - struct device *bus_dev; - - if (acpi_disabled) - return 0; - - cfg = bridge->bus->sysdata; - - /* - * On Hyper-V there is no corresponding ACPI device for a root bridge, - * therefore ->parent is set as NULL by the driver. And set 'adev' as - * NULL in this case because there is no proper ACPI device. - */ - if (!cfg->parent) - adev = NULL; - else - adev = to_acpi_device(cfg->parent); - - bus_dev = &bridge->bus->dev; - - ACPI_COMPANION_SET(&bridge->dev, adev); - set_dev_node(bus_dev, acpi_get_node(acpi_device_handle(adev))); - - return 0; -} - -static int pci_acpi_root_prepare_resources(struct acpi_pci_root_info *ci) -{ - struct resource_entry *entry, *tmp; - int status; - - status = acpi_pci_probe_root_resources(ci); - resource_list_for_each_entry_safe(entry, tmp, &ci->resources) { - if (!(entry->res->flags & IORESOURCE_WINDOW)) - resource_list_destroy_entry(entry); - } - return status; -} - -/* - * Lookup the bus range for the domain in MCFG, and set up config space - * mapping. - */ -static struct pci_config_window * -pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root) -{ - struct device *dev = &root->device->dev; - struct resource *bus_res = &root->secondary; - u16 seg = root->segment; - const struct pci_ecam_ops *ecam_ops; - struct resource cfgres; - struct acpi_device *adev; - struct pci_config_window *cfg; - int ret; - - ret = pci_mcfg_lookup(root, &cfgres, &ecam_ops); - if (ret) { - dev_err(dev, "%04x:%pR ECAM region not found\n", seg, bus_res); - return NULL; - } - - adev = acpi_resource_consumer(&cfgres); - if (adev) - dev_info(dev, "ECAM area %pR reserved by %s\n", &cfgres, - dev_name(&adev->dev)); - else - dev_warn(dev, FW_BUG "ECAM area %pR not reserved in ACPI namespace\n", - &cfgres); - - cfg = pci_ecam_create(dev, &cfgres, bus_res, ecam_ops); - if (IS_ERR(cfg)) { - dev_err(dev, "%04x:%pR error %ld mapping ECAM\n", seg, bus_res, - PTR_ERR(cfg)); - return NULL; - } - - return cfg; -} - -/* release_info: free resources allocated by init_info */ -static void pci_acpi_generic_release_info(struct acpi_pci_root_info *ci) -{ - struct acpi_pci_generic_root_info *ri; - - ri = container_of(ci, struct acpi_pci_generic_root_info, common); - pci_ecam_free(ri->cfg); - kfree(ci->ops); - kfree(ri); -} - -/* Interface called from ACPI code to setup PCI host controller */ -struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) -{ - struct acpi_pci_generic_root_info *ri; - struct pci_bus *bus, *child; - struct acpi_pci_root_ops *root_ops; - struct pci_host_bridge *host; - - ri = kzalloc(sizeof(*ri), GFP_KERNEL); - if (!ri) - return NULL; - - root_ops = kzalloc(sizeof(*root_ops), GFP_KERNEL); - if (!root_ops) { - kfree(ri); - return NULL; - } - - ri->cfg = pci_acpi_setup_ecam_mapping(root); - if (!ri->cfg) { - kfree(ri); - kfree(root_ops); - return NULL; - } - - root_ops->release_info = pci_acpi_generic_release_info; - root_ops->prepare_resources = pci_acpi_root_prepare_resources; - root_ops->pci_ops = (struct pci_ops *)&ri->cfg->ops->pci_ops; - bus = acpi_pci_root_create(root, root_ops, &ri->common, ri->cfg); - if (!bus) - return NULL; - - /* If we must preserve the resource configuration, claim now */ - host = pci_find_host_bridge(bus); - if (host->preserve_config) - pci_bus_claim_resources(bus); - - /* - * Assign whatever was left unassigned. If we didn't claim above, - * this will reassign everything. - */ - pci_assign_unassigned_root_bus_resources(bus); - - list_for_each_entry(child, &bus->children, node) - pcie_bus_configure_settings(child); - - return bus; -} - -void pcibios_add_bus(struct pci_bus *bus) -{ - acpi_pci_add_bus(bus); -} - -void pcibios_remove_bus(struct pci_bus *bus) -{ - acpi_pci_remove_bus(bus); -} - -#endif diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index 004575091596..e8d84fa435da 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -1519,3 +1520,184 @@ static int __init acpi_pci_init(void) return 0; } arch_initcall(acpi_pci_init); + +#if defined(CONFIG_ARM64) + +/* + * Try to assign the IRQ number when probing a new device + */ +int pcibios_alloc_irq(struct pci_dev *dev) +{ + if (!acpi_disabled) + acpi_pci_irq_enable(dev); + + return 0; +} + +struct acpi_pci_generic_root_info { + struct acpi_pci_root_info common; + struct pci_config_window *cfg; /* config space mapping */ +}; + +int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) +{ + struct pci_config_window *cfg = bus->sysdata; + struct acpi_device *adev = to_acpi_device(cfg->parent); + struct acpi_pci_root *root = acpi_driver_data(adev); + + return root->segment; +} + +int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge) +{ + struct pci_config_window *cfg; + struct acpi_device *adev; + struct device *bus_dev; + + if (acpi_disabled) + return 0; + + cfg = bridge->bus->sysdata; + + /* + * On Hyper-V there is no corresponding ACPI device for a root bridge, + * therefore ->parent is set as NULL by the driver. And set 'adev' as + * NULL in this case because there is no proper ACPI device. + */ + if (!cfg->parent) + adev = NULL; + else + adev = to_acpi_device(cfg->parent); + + bus_dev = &bridge->bus->dev; + + ACPI_COMPANION_SET(&bridge->dev, adev); + set_dev_node(bus_dev, acpi_get_node(acpi_device_handle(adev))); + + return 0; +} + +static int pci_acpi_root_prepare_resources(struct acpi_pci_root_info *ci) +{ + struct resource_entry *entry, *tmp; + int status; + + status = acpi_pci_probe_root_resources(ci); + resource_list_for_each_entry_safe(entry, tmp, &ci->resources) { + if (!(entry->res->flags & IORESOURCE_WINDOW)) + resource_list_destroy_entry(entry); + } + return status; +} + +/* + * Lookup the bus range for the domain in MCFG, and set up config space + * mapping. + */ +static struct pci_config_window * +pci_acpi_setup_ecam_mapping(struct acpi_pci_root *root) +{ + struct device *dev = &root->device->dev; + struct resource *bus_res = &root->secondary; + u16 seg = root->segment; + const struct pci_ecam_ops *ecam_ops; + struct resource cfgres; + struct acpi_device *adev; + struct pci_config_window *cfg; + int ret; + + ret = pci_mcfg_lookup(root, &cfgres, &ecam_ops); + if (ret) { + dev_err(dev, "%04x:%pR ECAM region not found\n", seg, bus_res); + return NULL; + } + + adev = acpi_resource_consumer(&cfgres); + if (adev) + dev_info(dev, "ECAM area %pR reserved by %s\n", &cfgres, + dev_name(&adev->dev)); + else + dev_warn(dev, FW_BUG "ECAM area %pR not reserved in ACPI namespace\n", + &cfgres); + + cfg = pci_ecam_create(dev, &cfgres, bus_res, ecam_ops); + if (IS_ERR(cfg)) { + dev_err(dev, "%04x:%pR error %ld mapping ECAM\n", seg, bus_res, + PTR_ERR(cfg)); + return NULL; + } + + return cfg; +} + +/* release_info: free resources allocated by init_info */ +static void pci_acpi_generic_release_info(struct acpi_pci_root_info *ci) +{ + struct acpi_pci_generic_root_info *ri; + + ri = container_of(ci, struct acpi_pci_generic_root_info, common); + pci_ecam_free(ri->cfg); + kfree(ci->ops); + kfree(ri); +} + +/* Interface called from ACPI code to setup PCI host controller */ +struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) +{ + struct acpi_pci_generic_root_info *ri; + struct pci_bus *bus, *child; + struct acpi_pci_root_ops *root_ops; + struct pci_host_bridge *host; + + ri = kzalloc(sizeof(*ri), GFP_KERNEL); + if (!ri) + return NULL; + + root_ops = kzalloc(sizeof(*root_ops), GFP_KERNEL); + if (!root_ops) { + kfree(ri); + return NULL; + } + + ri->cfg = pci_acpi_setup_ecam_mapping(root); + if (!ri->cfg) { + kfree(ri); + kfree(root_ops); + return NULL; + } + + root_ops->release_info = pci_acpi_generic_release_info; + root_ops->prepare_resources = pci_acpi_root_prepare_resources; + root_ops->pci_ops = (struct pci_ops *)&ri->cfg->ops->pci_ops; + bus = acpi_pci_root_create(root, root_ops, &ri->common, ri->cfg); + if (!bus) + return NULL; + + /* If we must preserve the resource configuration, claim now */ + host = pci_find_host_bridge(bus); + if (host->preserve_config) + pci_bus_claim_resources(bus); + + /* + * Assign whatever was left unassigned. If we didn't claim above, + * this will reassign everything. + */ + pci_assign_unassigned_root_bus_resources(bus); + + list_for_each_entry(child, &bus->children, node) + pcie_bus_configure_settings(child); + + return bus; +} + +void pcibios_add_bus(struct pci_bus *bus) +{ + acpi_pci_add_bus(bus); +} + +void pcibios_remove_bus(struct pci_bus *bus) +{ + acpi_pci_remove_bus(bus); +} + +#endif From patchwork Sat Jun 1 15:03:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682491 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A159EC25B7E for ; Sat, 1 Jun 2024 15:04:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=uYx/p9sbYg9EDfqMzM4KkKqK2a+pYwuqpWnn8Q7imh0=; b=TZH/cA5qJMcF8j 2akXXGkQRvmdcXDOhA0N/9CAFS5OStcLH8DxYtgi2cFVQ3B4yvgszVKgmJraMHe/ex5jXf/EtzRAv jczVUNPj+Xtya2hctdjoXNwpK2bs1LiI9GvYDF+8oCIRPE25kAyvZ0nQMV2nF6QiO6ZR92HTAbChQ w8g7EPI1fGTVVQmmQFXhCB+3bNoOaOcNq8EsUR41+jQk1WHR/+foyXBnvLsoSax2/pBdgdJ6Uyikm ZQL0mmtgrtfw66JvTw+UHQaNOECe4F4hGEB+U/8buD2/MVmcmJs7Db3Y7i2lZd39kPrBo7ufotqAq a73D39glZL8UQ5Z9V/hg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQHg-0000000CoYW-32ip; Sat, 01 Jun 2024 15:04:40 +0000 Received: from mail-oo1-xc29.google.com ([2607:f8b0:4864:20::c29]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQHd-0000000CoVx-20GN for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:04:39 +0000 Received: by mail-oo1-xc29.google.com with SMTP id 006d021491bc7-5ba090b0336so914828eaf.1 for ; Sat, 01 Jun 2024 08:04:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254276; x=1717859076; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=W2w7EI3TeN2iCf/DRtg4G2EgwNqxdEr1hmfQbDfWRcM=; b=X1mJtZL2mwL99dIZ+q+tQbFLLM3omKTgoL6TJQvmAwMA5o5SQNAVdhi82OmJvT52zX YvB9LxmH1wRT2wsQjBLpbyANh70Xx9IFjzdaGANhdXTwO73wK7A+pw0v/57hcvpWyVdO rDG0cAazwY76iEkWspgKtC8XKZakVnehrDSP8+A1uXfOjZrsecRdU8ARpEluK8Pq7ljJ c5KpknzX8v9aGA6frP/pw+kRx6Xtr/tgiBwMRVZMP4OINv/B8DXSvWy5el+nDUFLIz4U nglsWjJcdANm+TFANjadH8M8a6ZPH0DqBk85NZdpoyhUm5pgJH+khFoiz6I4r7Bmdl/o DFTQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254276; x=1717859076; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=W2w7EI3TeN2iCf/DRtg4G2EgwNqxdEr1hmfQbDfWRcM=; b=Os8y0454p9+Hs4qK6DkgaC6lO8ErIzEaxHZElFsFZWDWZiD0QgDUDJuaCVxh0HS/mJ n+OP1f22kmHcsL4Bsn6LimAZIdzFiNo/gHa0skN8y2dMMVb8KG0VdpftXaTSVlsoIa9b kwBE0iW81xPBAS12AD5QeD6iz3Qf87f8XCLytFNxndN5aiXpHH+nyUuyQBV/3ZzitcES Fl5+Kq5E/MDY75zwZcESA7njdmGIQrF80wCbL8ZBlyFclc05XFav242OA32uCIVlcst1 D/nzKMgyNjrgDXpndYQha23G0SXu47rOJ2Uitm5IJleObG/x6G9Y50cIN1cwm4igMQAz QZYA== X-Forwarded-Encrypted: i=1; AJvYcCUXOpoL0EvQMvQ5aB4D/qRkF+Q360rLIgk9SM7WzqhQIrihWo257CNHWcy+a7UBPDuUiC60v+UW8mSxSrulGXWdeIxxBJKrbDKDCpw2AM6n X-Gm-Message-State: AOJu0YwZ+61+iGs0KHJYP2g/oqyPMpvGhma2oJagLG1N9Lcn1koKu9JM v9zVhssbbaxQNNzup9t/ci3tlAV7sHytG7FQ1Zn+Vtr5w0rZHqYj2F9YPYbFkfQ= X-Google-Smtp-Source: AGHT+IGJwcsK8POtH2BMJmphYPRD+c46tpmn1qQdcpXrg0lGYUhORZGvMPcRjxjR7R/vaRNToWclfw== X-Received: by 2002:a05:6358:7601:b0:19b:8988:4f48 with SMTP id e5c5f4694b2df-19b898851f3mr287174455d.21.1717254275702; Sat, 01 Jun 2024 08:04:35 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.04.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:04:35 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 02/17] ACPI: scan: Add a weak function to reorder the IRQCHIP probe Date: Sat, 1 Jun 2024 20:33:56 +0530 Message-Id: <20240601150411.1929783-3-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_080437_773328_85A602DE X-CRM114-Status: GOOD ( 13.39 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Unlike OF framework, the irqchip probe using IRQCHIP_ACPI_DECLARE has no order defined. Depending on the Makefile is not a good idea. So, usually it is worked around by mandating only root interrupt controller probed using IRQCHIP_ACPI_DECLARE and other interrupt controllers are probed via cascade mechanism. However, this is also not a clean solution because if there are multiple root controllers (ex: RINTC in RISC-V which is per CPU) which need to be probed first, then the cascade will happen for every root controller. So, introduce a architecture specific weak function to order the probing of the interrupt controllers which can be implemented by different architectures as per their interrupt controller hierarchy. Signed-off-by: Sunil V L --- drivers/acpi/scan.c | 3 +++ include/linux/acpi.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index 503773707e01..b325b297bf77 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -2744,6 +2744,8 @@ static int __init acpi_match_madt(union acpi_subtable_headers *header, return 0; } +void __weak arch_sort_irqchip_probe(struct acpi_probe_entry *ap_head, int nr) { } + int __init __acpi_probe_device_table(struct acpi_probe_entry *ap_head, int nr) { int count = 0; @@ -2752,6 +2754,7 @@ int __init __acpi_probe_device_table(struct acpi_probe_entry *ap_head, int nr) return 0; mutex_lock(&acpi_probe_mutex); + arch_sort_irqchip_probe(ap_head, nr); for (ape = ap_head; nr; ape++, nr--) { if (ACPI_COMPARE_NAMESEG(ACPI_SIG_MADT, ape->id)) { acpi_probe_count = 0; diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 28c3fb2bef0d..ab3f2880d209 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -1332,6 +1332,8 @@ struct acpi_probe_entry { kernel_ulong_t driver_data; }; +void arch_sort_irqchip_probe(struct acpi_probe_entry *ap_head, int nr); + #define ACPI_DECLARE_PROBE_ENTRY(table, name, table_id, subtable, \ valid, data, fn) \ static const struct acpi_probe_entry __acpi_probe_##name \ From patchwork Sat Jun 1 15:03:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682492 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D5047C25B76 for ; Sat, 1 Jun 2024 15:04:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=D8yLoIHOFSMbatAwumo5L9hyaWXIwQuujjN+VWOKSbk=; b=seyeb7GGyvp6oU 3VmqhL8RCvOzZnfeoNL2oDlL+1bR6SnqTHm8DgjbLocJ0N6vxy86Bg8zegMK0k+2U/g+7nMpLSPO6 0FHlNc7/TYOIo3r97FAUzR2b20MVoHxPfMOaKBvLWm7JzbzzGh7SHHjM8HXE7L7iG9n8FOLzl37i3 prlECkaNvO1q53QIcyKAFOHZ5zE6tXMpSrFrkl/sbUbl5FIgpey+oDDn65hYsWUjNqXKXwFsinXHe X3cuBVW5zA+irtbxYXyoQjbXH3g6o/Zch0GfL9SX2k1DxQ4nIFjsHe0nHldJJhPDy3h3SNXezmcbO BfkJfAzdetoNMXCSwYfg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQHn-0000000CodD-45Q9; Sat, 01 Jun 2024 15:04:47 +0000 Received: from mail-pf1-x430.google.com ([2607:f8b0:4864:20::430]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQHj-0000000CoZt-45cK for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:04:45 +0000 Received: by mail-pf1-x430.google.com with SMTP id d2e1a72fcca58-702447766fdso1901444b3a.1 for ; Sat, 01 Jun 2024 08:04:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254283; x=1717859083; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2XPxdT6K3q9avtvxcOF9k8RyQ+CxCpXPedgopG0VTh8=; b=bdVVckZEfb1ZntETbpQOOZ32YouJwT6syQA98lbsmmSjDxXi99JX87Rq27uHcWFASZ C6tognisUbsDrWpHWpXcHsBc0t+wtfqjuUQV0ukDROmGlBHUsKThuJN6VLBjdjw5HTeX M4771V3BOLZkBUP4RkIjIBPygxFKTtxCle6vN1R9b3jTvw3RqiE4a8bnT2tL3prpn+1t CLRToVC1zoV9PVZnlEVxSEgOVYrg0GPDUAI9atZ8X8VxPkYKAJ+WuFt6ocRZD/omP7GN i968C3ZssB03zlRAbaxHXUcC9fCMdJPgnKti7pEroDvUJMm48JuaqtSnIcJrytK3ZNOa +HUw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254283; x=1717859083; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2XPxdT6K3q9avtvxcOF9k8RyQ+CxCpXPedgopG0VTh8=; b=Pk/lPmcOJd+GqfwlXZS5zuLi6tD6Nc/6/klx3MZiYOyEbSulPROqYI+/QaZxXDJWfe sXMZnd+H22Iiy+UrdyQGFapVCWqG4xA4pz5oXjStviyNFVPIsPlllw5gX9+iyXuppCGU GiNDO+/jWU8zkyzDHsbVK8KBaW65GBJU5xKjDupfiQwMo4KYLTdcJIPZxEEa8dpFEDRu TQOkHbYC88DQpxvp1oQfrMYnoOl7Rue8VAnn1vN3K4n28vruWEU35Hms132I+2tFuzBs 0FxymZLKFlvUkdhz/uDA2WtFrj1T3upAFI7aUf0LYzia5K07GfMQBD/GmlqP3oYzcy2c BV4w== X-Forwarded-Encrypted: i=1; AJvYcCUHTNMGPBkMonvSNem82M3BlWOSj6Os7HbdiuiTpt8IGfBtVTUU2pVKyQ8Y5hqh+8ryzHFLRin8QAWuqxswCNS1ErpSXZlghAUOPp6Qya0p X-Gm-Message-State: AOJu0YyP8HXU5yaB2B18NipLgCYOK+gT8eQ62x6JsZLAo43gP9Xk/GxS ZCYeHM+fjHKBhaK4GuOxMBeEsrGGxJEfsG8PRPHWVsKj4s0E0/EZKwwHbQT8R8E= X-Google-Smtp-Source: AGHT+IHSPHHuLlxYdhrhdQ1SLxLogYrmPMkhydYeNGjzqhZ539L1iLkZwGvrDzW2O9+TbFzfxEzXhQ== X-Received: by 2002:a05:6a20:3946:b0:1af:e3f1:9af7 with SMTP id adf61e73a8af0-1b26f204cfemr5557418637.36.1717254282646; Sat, 01 Jun 2024 08:04:42 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.04.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:04:42 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 03/17] ACPI: bus: Add acpi_riscv_init function Date: Sat, 1 Jun 2024 20:33:57 +0530 Message-Id: <20240601150411.1929783-4-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_080444_190479_9620CC9E X-CRM114-Status: GOOD ( 15.43 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add a new function for RISC-V to do architecture specific initialization similar to acpi_arm_init(). Some of the ACPI tables are architecture specific and there is no reason trying to find them on other architectures. Signed-off-by: Sunil V L --- drivers/acpi/bus.c | 1 + drivers/acpi/riscv/Makefile | 2 +- drivers/acpi/riscv/init.c | 12 ++++++++++++ include/linux/acpi.h | 6 ++++++ 4 files changed, 20 insertions(+), 1 deletion(-) create mode 100644 drivers/acpi/riscv/init.c diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c index 787eca838410..8d0710ade8c6 100644 --- a/drivers/acpi/bus.c +++ b/drivers/acpi/bus.c @@ -1457,6 +1457,7 @@ static int __init acpi_init(void) acpi_hest_init(); acpi_ghes_init(); acpi_arm_init(); + acpi_riscv_init(); acpi_scan_init(); acpi_ec_init(); acpi_debugfs_init(); diff --git a/drivers/acpi/riscv/Makefile b/drivers/acpi/riscv/Makefile index 86b0925f612d..877de00d1b50 100644 --- a/drivers/acpi/riscv/Makefile +++ b/drivers/acpi/riscv/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-y += rhct.o +obj-y += rhct.o init.o obj-$(CONFIG_ACPI_PROCESSOR_IDLE) += cpuidle.o obj-$(CONFIG_ACPI_CPPC_LIB) += cppc.o diff --git a/drivers/acpi/riscv/init.c b/drivers/acpi/riscv/init.c new file mode 100644 index 000000000000..5f7571143245 --- /dev/null +++ b/drivers/acpi/riscv/init.c @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2023-2024, Ventana Micro Systems Inc + * Author: Sunil V L + * + */ + +#include + +void __init acpi_riscv_init(void) +{ +} diff --git a/include/linux/acpi.h b/include/linux/acpi.h index ab3f2880d209..0c6d9539f737 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -1520,6 +1520,12 @@ void acpi_arm_init(void); static inline void acpi_arm_init(void) { } #endif +#ifdef CONFIG_RISCV +void acpi_riscv_init(void); +#else +static inline void acpi_riscv_init(void) { } +#endif + #ifdef CONFIG_ACPI_PCC void acpi_init_pcc(void); #else From patchwork Sat Jun 1 15:03:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682493 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 03E9FC25B7E for ; Sat, 1 Jun 2024 15:05:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=74cYcA7x4L4MdIo4DICsMl9ynh7Qzv6UC54lWUBSVcg=; b=APPs+A83cCXaz7 y1z5fK1eUzf8+zDJVSETHNYALYqhXcgXsXm6+uBvpe268+232XGpOCOAzFFXLkqtSF9qLdKryPJib G6sJn5HEPR9TcHbprjPpOD5OdIqhrr9bK8uzhXMIkRXxN3SjVYJsq/8K0JdAzvaZwSyjWSpedg5EJ 0o0hOQhuqZEWWtcWdfp0hj/6D1uNyIsJEGvV9XwhNytFcu4Wi1PpposWU8OrKCAMEIVPOFaLWVisj 1nSHGwz+eguMXCgQyIVL/cNvyjY8mx8Ct7oJpIgTm8TfwveR+3JYD2PlZarNoA17Xtm4zahmmNKso J6KyKuY2L/ftbHF6Fsww==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQI0-0000000ConR-0dCN; Sat, 01 Jun 2024 15:05:00 +0000 Received: from mail-pg1-x535.google.com ([2607:f8b0:4864:20::535]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQHr-0000000Cog4-2Gq1 for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:04:56 +0000 Received: by mail-pg1-x535.google.com with SMTP id 41be03b00d2f7-6c8c880f526so236926a12.3 for ; Sat, 01 Jun 2024 08:04:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254290; x=1717859090; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3Jv6JEZTD9c0qG8hE1F4MREKLvC6gRJSU0R0wzEFNGA=; b=NLiv9jFKCdOCkfhjn6FJpwcotKzOpqGbJXJDiSR68XfpbmcXdHfrMz4aFECQ8UpA5c JGP1QvcO4g4/2bgmbzVqYHkEijY5WTvL5GhpyI2J7U5y1t+8/wIqExroZpvSvImR5BeS oa6FrilSjZHA507SakitNJ+I8jPD2eGi2+hklksrAah8DoBBGuRpH36fUrQMIxHU0LYG x/0pLh3kPiGHHVvi+w0nTtUiggqTlPFUTRQMTByRw91+N4YXRuS4j3uN0if2ihPne3af TbNWNdn5mJe658nt0Eyc7b1if5+wG9X4oHrNRoc+8BryoggWcVK28RRN3GnIZpclpBRh fbaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254290; x=1717859090; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3Jv6JEZTD9c0qG8hE1F4MREKLvC6gRJSU0R0wzEFNGA=; b=Fzx8QUCl08c85yGRGFMOULtqYwTTFK6TKOAMLpmtXK71m4Yd1y8ugjzbW4BFgHwVRB ernuE4G6gsV5YH/OjdfDsv99S+3x5nh44rSZueIg23oWcUGbgtUsEc7h47TTHmNAyV2m 8AfCKMQMrCJEdIMx+8hfmaMN19H6dCm4oIzMJkvb05dKOBWQ3nvTNbw5+5+p6iw5pfnA Tauj/4iGb/rYEAVhcenl4UyCJS1gZ2p6rntPTOmcF1reheuaAT7eUDtvQV/woPv8MN0A O0O8cQSl5wmlKq3dxy5SvrLSQiHoiiwEDERGQ49v60Fz1qs+6s5uib7gqmRoqfczsN1V RAJA== X-Forwarded-Encrypted: i=1; AJvYcCV7W2BvWIgm6eFzrOdmnqiv4TwHiCAJTsY6QK9cjeH+zWhFMkTHXEYAPchrMv8wpUhAarQoTFu19xK+oO747gwnoPj5SNSCPDYtktee0tVt X-Gm-Message-State: AOJu0YwYaAfLoaM65WFemUZ1s9Y3JECqIp0OPMrhfUQm6KcKUF/tTWuL xwBq72RAtSCQcw60uYDbs7Ni4frCDvOS2P53imMz9OmK96FAapjVoD9GZsdC+tE= X-Google-Smtp-Source: AGHT+IGJ5D/8YHeQidHdEpKROK/FOw4K97CAfABtSV0CK04hYyLyYdtbkd2DgCCxUap3/7WmNzvvWg== X-Received: by 2002:a17:90a:9a96:b0:2b1:817d:982b with SMTP id 98e67ed59e1d1-2c1dc5701fbmr4453498a91.14.1717254289850; Sat, 01 Jun 2024 08:04:49 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.04.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:04:49 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 04/17] ACPI: scan: Refactor dependency creation Date: Sat, 1 Jun 2024 20:33:58 +0530 Message-Id: <20240601150411.1929783-5-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_080451_702407_E2FCFB2E X-CRM114-Status: GOOD ( 15.28 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Some architectures like RISC-V will use implicit dependencies like GSI map to create dependencies between interrupt controller and devices. To support doing that, the function which creates the dependency, is refactored bit and made public so that dependency can be added from outside of scan.c as well. Signed-off-by: Sunil V L --- drivers/acpi/scan.c | 86 ++++++++++++++++++++++------------------- include/acpi/acpi_bus.h | 1 + 2 files changed, 48 insertions(+), 39 deletions(-) diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index b325b297bf77..66038fc731fb 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -2004,6 +2004,49 @@ void acpi_scan_hotplug_enabled(struct acpi_hotplug_profile *hotplug, bool val) mutex_unlock(&acpi_scan_lock); } +int acpi_scan_add_dep(acpi_handle handle, struct acpi_handle_list *dep_devices) +{ + u32 count; + int i; + + for (count = 0, i = 0; i < dep_devices->count; i++) { + struct acpi_device_info *info; + struct acpi_dep_data *dep; + bool skip, honor_dep; + acpi_status status; + + status = acpi_get_object_info(dep_devices->handles[i], &info); + if (ACPI_FAILURE(status)) { + acpi_handle_debug(handle, "Error reading _DEP device info\n"); + continue; + } + + skip = acpi_info_matches_ids(info, acpi_ignore_dep_ids); + honor_dep = acpi_info_matches_ids(info, acpi_honor_dep_ids); + kfree(info); + + if (skip) + continue; + + dep = kzalloc(sizeof(*dep), GFP_KERNEL); + if (!dep) + continue; + + count++; + + dep->supplier = dep_devices->handles[i]; + dep->consumer = handle; + dep->honor_dep = honor_dep; + + mutex_lock(&acpi_dep_list_lock); + list_add_tail(&dep->node, &acpi_dep_list); + mutex_unlock(&acpi_dep_list_lock); + } + + acpi_handle_list_free(dep_devices); + return count; +} + static void acpi_scan_init_hotplug(struct acpi_device *adev) { struct acpi_hardware_id *hwid; @@ -2026,8 +2069,7 @@ static void acpi_scan_init_hotplug(struct acpi_device *adev) static u32 acpi_scan_check_dep(acpi_handle handle) { struct acpi_handle_list dep_devices; - u32 count; - int i; + u32 count = 0; /* * Check for _HID here to avoid deferring the enumeration of: @@ -2036,48 +2078,14 @@ static u32 acpi_scan_check_dep(acpi_handle handle) * Still, checking for _HID catches more then just these cases ... */ if (!acpi_has_method(handle, "_DEP") || !acpi_has_method(handle, "_HID")) - return 0; + return count; if (!acpi_evaluate_reference(handle, "_DEP", NULL, &dep_devices)) { acpi_handle_debug(handle, "Failed to evaluate _DEP.\n"); - return 0; + return count; } - for (count = 0, i = 0; i < dep_devices.count; i++) { - struct acpi_device_info *info; - struct acpi_dep_data *dep; - bool skip, honor_dep; - acpi_status status; - - status = acpi_get_object_info(dep_devices.handles[i], &info); - if (ACPI_FAILURE(status)) { - acpi_handle_debug(handle, "Error reading _DEP device info\n"); - continue; - } - - skip = acpi_info_matches_ids(info, acpi_ignore_dep_ids); - honor_dep = acpi_info_matches_ids(info, acpi_honor_dep_ids); - kfree(info); - - if (skip) - continue; - - dep = kzalloc(sizeof(*dep), GFP_KERNEL); - if (!dep) - continue; - - count++; - - dep->supplier = dep_devices.handles[i]; - dep->consumer = handle; - dep->honor_dep = honor_dep; - - mutex_lock(&acpi_dep_list_lock); - list_add_tail(&dep->node , &acpi_dep_list); - mutex_unlock(&acpi_dep_list_lock); - } - - acpi_handle_list_free(&dep_devices); + count += acpi_scan_add_dep(handle, &dep_devices); return count; } diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h index 1a4dfd7a1c4a..28a9b87c23fa 100644 --- a/include/acpi/acpi_bus.h +++ b/include/acpi/acpi_bus.h @@ -993,6 +993,7 @@ static inline void acpi_put_acpi_dev(struct acpi_device *adev) int acpi_wait_for_acpi_ipmi(void); +int acpi_scan_add_dep(acpi_handle handle, struct acpi_handle_list *dep_devices); #else /* CONFIG_ACPI */ static inline int register_acpi_bus_type(void *bus) { return 0; } From patchwork Sat Jun 1 15:03:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682494 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1F45AC25B7E for ; Sat, 1 Jun 2024 15:05:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5liTSG/Zqtz1Qx/6DwBrDU/BqRuOA8C95iUpabHxpvY=; b=pe9tehOE3NzCM3 iA9TIWEdZY/G9UAv5szIB8WUzIilULnF5Y5l/L5O1YfDDd8m75es1+EstlrdWfxVDfr04vuii6V0N 0cL4uASNLnPGsasib9tLB9osQAyiS+sMscL77ozQzrwhJ9tG137wPOwAhrUCGI/gJy9mX/eOmHoqX xH/SvW47UMJ7Cm4HO4Kc2bMKTgV01m/kFVdroQcvZubCssT6EwoNTr7aTIAWQL/lBaaG4IBZ6dkXR 8tlrQQA/D/zUcgcmVUnMOQQ2bv3vGAnojgWhz8CehouIYuNRxuuJFXH0YOejgZ/4m40kU0CYIsfLj g4Ytg61DkMpEqDR4YHcQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQI7-0000000Cotx-2oML; Sat, 01 Jun 2024 15:05:08 +0000 Received: from mail-pf1-x42c.google.com ([2607:f8b0:4864:20::42c]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQHy-0000000ColT-45oX for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:05:01 +0000 Received: by mail-pf1-x42c.google.com with SMTP id d2e1a72fcca58-701b0b0be38so2791812b3a.0 for ; Sat, 01 Jun 2024 08:04:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254297; x=1717859097; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=fMraijh7EdibSWZk0AZcru1m7VB53gCU3iTUEc1cnAQ=; b=bm7ayZ6E41NUUZ0wKQEA5iOzf++9whM/JoN5KA7N7eNGAVTdQOv2Z4fUNEHcgzoDGQ IJqtJAxoYDiox7TIXPLaZlfZWbTr5s2THlUrBLyZt7y79FxJejOw4Y2DQ5U8mwYIGQnJ y5QiD8rUcwbcyTC/NvO2PzWOHK0UXXd8erBX7xd3xR6Rbf2fy5AGLBzljLC0yHqOAw7l YNrQICsX3Nced9SLiTibUgeKght7p1wVQ2NUTQzpBlANPSt/1YVdnwXM0UBrfQdAzwZS K2oVRlQRaMO8PP/Pqas+ipFNJaqziEMue0E2Wsr/NfT7pUxydEcr5kXlbMKFi7aw3TeQ 48Yg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254297; x=1717859097; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=fMraijh7EdibSWZk0AZcru1m7VB53gCU3iTUEc1cnAQ=; b=F1/2xjuZHhvoXLpQe3h1Tvjr7hZshu+dIwOEZEj6Hg75zRFerhuDDCbV/boWpqGJqf kVyIy+LolrSG75ITnLVJsoagd6qsa2ZC/wx20TzylfKYGLoW7qok3wgSqba2VEbglgSE X83W9qvpmPT2diWg9H8nrR2UyhLP8OB6CCoujyQe4V6X7AIkd7hspONuSfHdU+UKJU7q XrAPyn7SuvCvRUSuTDRnDNbc6Cn0ddu3SOxYiRJIMp52vS74cboozBv5Kt9AaU+JJb74 EaKXUC11gGn0n6J9QmC4vhR+2HPE9j5liXb0IzliLzwRlVkrwJqAD85xzAMZjkps5dD5 Rrew== X-Forwarded-Encrypted: i=1; AJvYcCVJVEZdX6IMYVadMc6mnlV350Ygu0PpuR73ZMLDn4hn272wTeM0QtMRvp8wI5sIT94n2FAvHbWuUMeR63xvDbjQyQ4pVh3hnoDVF0wcNPXz X-Gm-Message-State: AOJu0YyXLhtfzROUph6T8j2+a+xeK4YtkDQWEm/dkGmSdHdIdeN09ocv FfRptI3gA+ufnY5n3VZP6Vw3yTjQ0r5vJ2u+ZRIHWwJWMjj5+FDUIcmv3XTGowI= X-Google-Smtp-Source: AGHT+IEKmyacfHakdX0P9GQl4t/BNHOtB7jRjgspK3iaFW5wKEhTYgTuLeBLCF/OOGDElEGcu+f4Dw== X-Received: by 2002:a05:6a21:32a1:b0:1af:ad46:cd4a with SMTP id adf61e73a8af0-1b26f16ea65mr5996794637.12.1717254296842; Sat, 01 Jun 2024 08:04:56 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.04.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:04:56 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 05/17] ACPI: scan: Add RISC-V interrupt controllers to honor list Date: Sat, 1 Jun 2024 20:33:59 +0530 Message-Id: <20240601150411.1929783-6-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_080459_226353_598948FF X-CRM114-Status: UNSURE ( 9.50 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org RISC-V PLIC and APLIC will have dependency from devices using GSI. So, add these devices to the honor list. Signed-off-by: Sunil V L --- drivers/acpi/scan.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index 66038fc731fb..6f3152170084 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -832,6 +832,8 @@ static const char * const acpi_honor_dep_ids[] = { "INTC1095", /* IVSC (ADL) driver must be loaded to allow i2c access to camera sensors */ "INTC100A", /* IVSC (RPL) driver must be loaded to allow i2c access to camera sensors */ "INTC10CF", /* IVSC (MTL) driver must be loaded to allow i2c access to camera sensors */ + "RSCV0001", /* RISC-V PLIC */ + "RSCV0002", /* RISC-V APLIC */ NULL }; From patchwork Sat Jun 1 15:04:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682495 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1EB47C25B76 for ; Sat, 1 Jun 2024 15:05:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=IHQvORr9HtOVH98sMwQG0iq/4omNPD5XZl9Lg9A9jkQ=; b=YZqNK0roe5vVc4 3CQhzAlviwGpQFIIq7okBkNvQYLpsCaNMQ7B1eQC9plYh+RkyQzalROWyCGHFo5q8KGQWpB4Pj0Jr UcboVJJSbbsZVJdWDzInQ9hYjgUh6mm4q8GDrQQTZvnrevWYg7RnLSo1bBARlc0VV2PlAHeqq6oWU VMrOWrz77H38WUc8PVXBOvr2+pYzN3ggDzpp0NUyxn/i+EnHTJ0bHrSq7q+EOe1RLQ0iAayG1KRX2 sba7APlIkfJMfAuR10zUmAKXCpWcrF9LcFY8eFhS6nfVkgr8Wsr7ulRM4niQWp70ejRRz+zAreZcg x/Ep1BiZZ3gssviU32zg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQIG-0000000Cp1G-3rP1; Sat, 01 Jun 2024 15:05:16 +0000 Received: from mail-il1-x12a.google.com ([2607:f8b0:4864:20::12a]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQI6-0000000Cor7-2EWt for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:05:12 +0000 Received: by mail-il1-x12a.google.com with SMTP id e9e14a558f8ab-37491216a53so3073205ab.2 for ; Sat, 01 Jun 2024 08:05:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254304; x=1717859104; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Z/CsLBy86VnyNo2isQPCT1WZPGBpvem+xh2ISHmLXVs=; b=KOOoMZxD4hXaZxIikTlth29RBu/2RWasdlHrhp2lii1+ml+8PgBDsJd1ejvLCRCcr8 2QdE463biQ+6ES36h3FQGDtl7oKzV1Ac0Z3A+9J4kZGKmwkcu4JGglCebIbZZZXJVbHg PEnMPK0To1hx5Xv5aFpQC/VcUmxP+Hct0/vV7iOfHth3iTEOAnrCmGHThGrE5qHcEkl+ RtI+GzxVE5+eZZs+he2Wt0VW38E12ZpPiurV4LXbnMcxexlcqQ4bJA3oOGQM6bl9S5hv W1BQbsboh1rRgodUhZh8piiCHdkrkqVMYh5TPd7+NUANCjtauu9/JcnDISXxSUDMg8F2 VlOg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254304; x=1717859104; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Z/CsLBy86VnyNo2isQPCT1WZPGBpvem+xh2ISHmLXVs=; b=qXqAvPe43ua6qvqDBgBzSx/DUFmRBo40PuoBywGRpxnO7L8UlbQ20W9+ZETOmjiFxe jfREiKnUQLDPDVQdYbyXzIlQMyMHKV3MWj5O9neeLjXyjLOWy6bZeucrb4FmZBpCgqQm 1TDw4G/gpgY3+vfPNMUIIsNgIuWF3bXSlOZK3Btkubw1PcjGpaxe6tG98fRr2okOmTeB hGmUSH5r4FoFsDUdx4gLLMrHIQZ/eavLR4y2HI+3JwBl2kviO5sZpK+Y8GAVfTLUYfzG 9/HR2bOlLVk3noumQQowZ2CXtPmG+XfRhOEFHxtrp1M1TPgXIv7I/kXjP7q86o/6PV+r PvnA== X-Forwarded-Encrypted: i=1; AJvYcCWYpVJ5Dyzemev4P4alVQLYiMWgRi7cR1uwOMn2gwppnqC6qXXHr7o3IPBlTXUJ6YpJWhory9XfQ/Je4FS095mCQ1Kkrlq0mJvdk55JXpY+ X-Gm-Message-State: AOJu0YxUAz3IDvHusOkqrjTG2Ep5Sw4PCKNgrpb+9itWt4cV89pDNmR4 ffSG/FQrKoGYbuFmRPIJQjxpvq2qKq57D/6nab7lTBIKHpeKUNSYEfNcts7LUgM= X-Google-Smtp-Source: AGHT+IF3OVauvlGO1nxR3XDABScTnbIuW6VxwtguVbngDcxS9MthKKzwc9GQNZ47KhPfz+utEVmKGg== X-Received: by 2002:a05:6e02:1a63:b0:374:5672:6791 with SMTP id e9e14a558f8ab-3748b97ee00mr54534805ab.8.1717254303897; Sat, 01 Jun 2024 08:05:03 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.04.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:05:03 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 06/17] ACPI: scan: Define weak function to populate dependencies Date: Sat, 1 Jun 2024 20:34:00 +0530 Message-Id: <20240601150411.1929783-7-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_080506_812343_6468C1CF X-CRM114-Status: GOOD ( 12.80 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Some architectures like RISC-V need to add dependencies without explicit _DEP. Define a weak function which can be implemented by the architecture. Signed-off-by: Sunil V L --- drivers/acpi/scan.c | 11 +++++++++++ include/acpi/acpi_bus.h | 1 + 2 files changed, 12 insertions(+) diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index 6f3152170084..918e71fc54cb 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -2068,11 +2068,22 @@ static void acpi_scan_init_hotplug(struct acpi_device *adev) } } +u32 __weak arch_acpi_add_auto_dep(acpi_handle handle) { return 0; } + static u32 acpi_scan_check_dep(acpi_handle handle) { struct acpi_handle_list dep_devices; u32 count = 0; + /* + * Some architectures like RISC-V need to add dependencies for + * all devices which use GSI to the interrupt controller so that + * interrupt controller is probed before any of those devices. + * Instead of mandating _DEP on all the devices, detect the + * dependency and add automatically. + */ + count += arch_acpi_add_auto_dep(handle); + /* * Check for _HID here to avoid deferring the enumeration of: * 1. PCI devices. diff --git a/include/acpi/acpi_bus.h b/include/acpi/acpi_bus.h index 28a9b87c23fa..5fba4075d764 100644 --- a/include/acpi/acpi_bus.h +++ b/include/acpi/acpi_bus.h @@ -994,6 +994,7 @@ static inline void acpi_put_acpi_dev(struct acpi_device *adev) int acpi_wait_for_acpi_ipmi(void); int acpi_scan_add_dep(acpi_handle handle, struct acpi_handle_list *dep_devices); +u32 arch_acpi_add_auto_dep(acpi_handle handle); #else /* CONFIG_ACPI */ static inline int register_acpi_bus_type(void *bus) { return 0; } From patchwork Sat Jun 1 15:04:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682496 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ABFE9C25B7E for ; Sat, 1 Jun 2024 15:05:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=y3kmCBTwl/0Hw7islljoPYCkmylWMecI+9U0iOH2rak=; b=Goavm0aNjBqw+K HGJOREw9TP5TRyqObvqfJfbTGfkbLjvWy/QDhe0Oeg42nQ4dlTLLSQGoxHjCQAv4f2GLOQLHuwZrz FcT8wLdOYyDtsn5/nV0pifhvYIqBWs2xB8S5glLIJ8NeIHLjuJaCWazzySWrHk5/mmxNrTnBtUSat zCf/vvyKalmX3i+gTxZtDlLWHE5evB2lRatYnnfa+eCOIymaCAeIEKilwM8Y5z02PJOd5Dztgnaj4 mbX4oWUiYn6b1BT5rQbtuQf3EilY148/CmattNMBs7BYS1mrqD1w0KkX7E9hxHLM2CqvAF/qViFBa 3OD4i1cq0AUDpL1wP2cQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQIR-0000000Cp9w-0UXZ; Sat, 01 Jun 2024 15:05:27 +0000 Received: from mail-pg1-x531.google.com ([2607:f8b0:4864:20::531]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQIC-0000000Cowp-1rcF for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:05:17 +0000 Received: by mail-pg1-x531.google.com with SMTP id 41be03b00d2f7-6c4f3e0e407so1042761a12.1 for ; Sat, 01 Jun 2024 08:05:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254311; x=1717859111; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=B4M/mYQsiafz27308Ygh9HE2jpjvmPpXdwbsDZU0p4U=; b=Lu5FO0hDdTzKu5klhu6L35awqwKtRIgyTVnXqaQ5L1bW5qFuB5ur9h521i5UarSa9i avjjbJ94FJylommcJ7qWUWEW/FF5F65WD4DZ4fYm00dU6K6srBDeaHLtnx2atY9j06o8 k72tqwDkd27ZAHhFow4cKOGAWxtTsPcprYQuVQvokQfCzwk2LsZ0iNI5OmWwrXby8FxY DPdc8HVbw/o7WqW90jN2ZI3XP8jMzQFbfqCMobd4LhcyGo43qRFiqCXX74zfZrFQR1Vt YQBlnxRu6/ju3ROQO6G/j9416jSNS3YIHjqW6yu6WAM/NZxfTjpYE0/t9GcC+Sxi5HlV eUhg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254311; x=1717859111; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=B4M/mYQsiafz27308Ygh9HE2jpjvmPpXdwbsDZU0p4U=; b=kAn8/c9H/LroLhLqj3xRe3jQ4t7ufqW01vvyGAwfOf/TnMnzSKFBunns2QQ8JNswGg 15BAstR5lhPVZkyIHkgYNaDzqvu4ZJqUzPoCImjIo9qwUSHEefLEKpC5zF7duBSMYbDS ErNPCNtDyQDtwxa18fARIWFe3H+jUnuPiPZrfauMCD1KrXomPct9MIQNYg+RJqaQoByC D+OQaz+1D+yY5keX5BLOqKrhjrGu/vlFVCXoHSOmEZKl+mtft7ywiI4lEqTeY/ssTnVb 1Mho3RKeUO4/Hxw/gRkfGtmtw8vHwRKD9jKHT9OzNBqwbnyLmklA5og2OBCBvgIGwucr J2cQ== X-Forwarded-Encrypted: i=1; AJvYcCWs+YvCUiCgjk9s6dCjR2Wl6H6uiNbT8EV0tmRQFlsQ2djfoy8kZqe5xuWEeh1Yz5rNIOl2747mBnxBSlWRp3gnKxJ0xL8Hrf9dY8OHqf26 X-Gm-Message-State: AOJu0YwAC52BlQe5oyaBiNLBgjAwFXRN1VjOUeMXfmHaZ0zEgi0tzp9c zXrrDg4Y3w/DSuWfRDcXV9Ay6nmaZnQuFcREpV82ZpwEZKwrioH1hkBXf5UAVmY= X-Google-Smtp-Source: AGHT+IH8CUtTilyts1LQmIwjtfiqczpJ90H7WVJzan1b3vUk1N8n0tjhHWRHLwYTOBrAh4nFvjs79Q== X-Received: by 2002:a17:90b:1bcd:b0:2c2:a2a:6151 with SMTP id 98e67ed59e1d1-2c20a2a631emr797621a91.39.1717254310835; Sat, 01 Jun 2024 08:05:10 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.05.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:05:10 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 07/17] ACPI: bus: Add RINTC IRQ model for RISC-V Date: Sat, 1 Jun 2024 20:34:01 +0530 Message-Id: <20240601150411.1929783-8-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_080513_276529_311E2602 X-CRM114-Status: GOOD ( 10.22 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add the IRQ model for RISC-V INTC so that acpi_set_irq_model can use this for RISC-V. Signed-off-by: Sunil V L --- drivers/acpi/bus.c | 3 +++ include/linux/acpi.h | 1 + 2 files changed, 4 insertions(+) diff --git a/drivers/acpi/bus.c b/drivers/acpi/bus.c index 8d0710ade8c6..d5286e39668e 100644 --- a/drivers/acpi/bus.c +++ b/drivers/acpi/bus.c @@ -1201,6 +1201,9 @@ static int __init acpi_bus_init_irq(void) case ACPI_IRQ_MODEL_LPIC: message = "LPIC"; break; + case ACPI_IRQ_MODEL_RINTC: + message = "RINTC"; + break; default: pr_info("Unknown interrupt routing model\n"); return -ENODEV; diff --git a/include/linux/acpi.h b/include/linux/acpi.h index 0c6d9539f737..3dd67ee09c39 100644 --- a/include/linux/acpi.h +++ b/include/linux/acpi.h @@ -107,6 +107,7 @@ enum acpi_irq_model_id { ACPI_IRQ_MODEL_PLATFORM, ACPI_IRQ_MODEL_GIC, ACPI_IRQ_MODEL_LPIC, + ACPI_IRQ_MODEL_RINTC, ACPI_IRQ_MODEL_COUNT }; From patchwork Sat Jun 1 15:04:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682497 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4A5ACC25B76 for ; Sat, 1 Jun 2024 15:05:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=laBypQgrBNX25j5KIMI8TsOanWJDTJoCwtevEMxMdLc=; b=cEMIU5w7wFiEd2 yhFhH88Vr7XH5S3TGaiOQl8NMwuJdwHStrsnrYt72ZwdGvrCcA/BWYAr5+EHGCIhTkPyuD2ffh5XO IgATyQhs1w4BjI4SJxVc6VBQYfx/2nHJzGAp4Kom/XoAoetpFcXET5QxO+1tfzZdIdpoYJm6LC95d 317xGkHNXpBTXy3MzXGcWwxId6CjdMBG6cCzDRVy6hgBPW7lBj4xEifa6VJ87QuZUIIEHKxbIweBT 9Bk1ONXzuYbDQKGln/M40fq0AlF61EleIRJd7zUhDdfaEAXImDMx0gJ8m8ejhcAZE/EOnkghMTh9g MBMU2NZtd/16w5E2ovkg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQIj-0000000CpRz-3i5T; Sat, 01 Jun 2024 15:05:45 +0000 Received: from mail-il1-x136.google.com ([2607:f8b0:4864:20::136]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQIK-0000000Cp2k-2KMa for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:05:27 +0000 Received: by mail-il1-x136.google.com with SMTP id e9e14a558f8ab-3748d68b7b8so6699695ab.1 for ; Sat, 01 Jun 2024 08:05:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254318; x=1717859118; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Xln7tORKkifGXhXo2mks++Fmg8FnhH/zBNmrN9CYLQo=; b=Bo5Z40wGsqHeZsA0AjWvAXtd3GUyt5Rq8jnU3/+AU6VJnFrP8C5ZU26uVvsSgxku6R uvmg1WYUvEBUIASpbeFFFh+TMIKFxHETf2n44ZY1Dc5Nt+fZBBuaoZJmUF9GVV4L4dR5 pPQrhywUbAiCB5Bun50UU/4FSoqtmdmZ4BMzVwkDm6lsIimdJZAEuOvN6DiX0WtypR5w HyFqhUvInpwZswA2Ocv04VzTnkBT4dizvF+0Fq+aLhtcnhiH5eZ6YRHQniRD0wqme98u e0N5FpDG7RSOHjWhgnV+0iiHL+SVJvKRchIy8AwIsXajOhqpLtQTfIqqo3r9vlFNcEPN PMRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254318; x=1717859118; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Xln7tORKkifGXhXo2mks++Fmg8FnhH/zBNmrN9CYLQo=; b=WJI2H/HhqUi2yIm9v2CmFFgT5JgZn6mV3o22tlH4P+YRuYCaymB5SvvRidwDzW3vVn tbfF2OhcB1HPbVM76ablhoRQEJosS6aJ40vNhCmb6ShoHvavGbnnMYNGeP3P2MZWyOYg Vhg/3kwMt8WZTBLq8hEJGWxSnJowFT8BKURt+w/mCxzkwhO0vk6tR2ptcYl06QNAbHVy OTgM5QEwUNeSQ4vmit4NXKQ+TJztXPJ+8IY2KICvVG44D9IQiGSPI/39VV9ANIfCGrAN 8aoaImbh3Bwwg9keH5gAxiIDV++bA8SxucARxNTqXTLfk6hTamMM8JFjfnvxPZRirIgX ss8w== X-Forwarded-Encrypted: i=1; AJvYcCUesP7UGBFaGa3ebdzpE6zv09d9wlInmw1NClk1BLd1VeNrnlABpv6aFKF6ExDJhUZbob0e0YGGjUjmDLe4gvvjVyi2KXIOHac1mo5V6DHS X-Gm-Message-State: AOJu0YyEW3avEJlXjJDslOoU3pM8fjsL0giW5c18SwU8mYGEP4f7RMVr UEi4rW9H+wc4Upc0BJtEWo+c7py6z9+DDkjGqetAcOAUvM550mtWnDqD4dY0ZVU= X-Google-Smtp-Source: AGHT+IGwBTAKeY5fhp4d/uHQX4CpW74WCuXLPUcacrekwQIOgiTzG+e+uX/rDZRV2vhHKygHe3+bDg== X-Received: by 2002:a05:6e02:198a:b0:374:5641:bb8f with SMTP id e9e14a558f8ab-3748b9dd6a4mr60478395ab.27.1717254317893; Sat, 01 Jun 2024 08:05:17 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.05.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:05:17 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 08/17] ACPI: pci_link: Clear the dependencies after probe Date: Sat, 1 Jun 2024 20:34:02 +0530 Message-Id: <20240601150411.1929783-9-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_080520_820970_0E872CFC X-CRM114-Status: GOOD ( 10.41 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org RISC-V platforms need to use dependencies between PCI host bridge, Link devices and the interrupt controllers to ensure probe order. The dependency is like below. Interrupt controller <-- Link Device <-- PCI Host bridge. If there is no dependency added between Link device and PCI Host Bridge, then the PCI end points can get probed prior to link device, unable to get mapping for INTx. So, add the link device's HID to dependency honor list and also clear it after its probe. Signed-off-by: Sunil V L --- drivers/acpi/pci_link.c | 2 ++ drivers/acpi/scan.c | 1 + 2 files changed, 3 insertions(+) diff --git a/drivers/acpi/pci_link.c b/drivers/acpi/pci_link.c index aa1038b8aec4..b727db968f33 100644 --- a/drivers/acpi/pci_link.c +++ b/drivers/acpi/pci_link.c @@ -748,6 +748,8 @@ static int acpi_pci_link_add(struct acpi_device *device, if (result) kfree(link); + acpi_dev_clear_dependencies(device); + return result < 0 ? result : 1; } diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index 918e71fc54cb..0280056a326b 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -834,6 +834,7 @@ static const char * const acpi_honor_dep_ids[] = { "INTC10CF", /* IVSC (MTL) driver must be loaded to allow i2c access to camera sensors */ "RSCV0001", /* RISC-V PLIC */ "RSCV0002", /* RISC-V APLIC */ + "PNP0C0F", /* PCI Link Device */ NULL }; From patchwork Sat Jun 1 15:04:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682498 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8CACDC25B76 for ; Sat, 1 Jun 2024 15:06:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=c3niWWTZ7ENUUWaXJhkjt6cTVvWk/a/LIq0iZNyZa4U=; b=n+zzF1cUjadlVB zPmpSCq1OXtbBczU2YvPjGnVhbxUZJvetrp0M5L3EN2EzPVM0mQCj7gstnaAlaHUFC3ICaV1HUKFN 9qTUCuLAQvX5szJOmR5C9TWV241NnirUkGKXTmFfcQGGThW3KPvP4W//aozOoiscFtFcSC9ONh3cK FVwk7dPkao0Z/rhB8SnwTm4HNaKtx/okIV2ZaQq4lPCfv4NEFJ8E6nQI30RfJmer/nwAcxzx9QMQf bQL7OZ1VNz95Nz0qBRSyK2h4UG8pnVjDhElfOKiZVACJCLBq4oru2OY1jZQQTRSkbeMrEwUr7NXvz yc+aJy0vA/RxUj5ADOEA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQIv-0000000Cpcn-33xn; Sat, 01 Jun 2024 15:05:57 +0000 Received: from mail-il1-x135.google.com ([2607:f8b0:4864:20::135]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQIS-0000000Cp9i-2lnl for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:05:36 +0000 Received: by mail-il1-x135.google.com with SMTP id e9e14a558f8ab-36dd6110186so12062455ab.0 for ; Sat, 01 Jun 2024 08:05:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254325; x=1717859125; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MFsOtJr39QOitF1KwZRd+YQFJB+PCc/GRrrdZlZj/hE=; b=dfZWoqEuYLsv/IAEW6FA6AqdCzyluk6fi5+dUWvRfwda+GOt4M7boz7qjD1yViM/vN YTUgyM5yCTpSrbCHZqsKqR4z3pHCuq5Tqd3AfRgtcUY7+E9Jvlj+yCbGF63teHk+0eyt 4mDVJ8fjOMCq6d2QBU7ffUR49+OOLIsjgZWc/DxSEc8MqF8yvW6DsW60hKU8Aj7nYcGP snJTfSSqwB63Hiqr/h1jKcfrnkvrySf7EbkYkrqYNLigZc/T1bbWFiP8CdhA8CXj8USc W/PQatvu6t9GkI/sWmn1wKiAjli+VRJHqU+Ha+z5zNAmazSEgxz0kuYCWONhJmMe4Zar 0Z2A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254325; x=1717859125; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MFsOtJr39QOitF1KwZRd+YQFJB+PCc/GRrrdZlZj/hE=; b=gK5hfNXH8OlCPRF4Bm3rgnD5MGaqXz1EO0jO6SB3G4jjj/mlE4L+6jpojxUf+Sjfqr 1iKxMEopqaLmSZ1yRJsQ0z/AiaMBBYdRMBVHXC53YflnmqsnB4GuNcDF/c3jDjbp59wv 6DndI7ITSnBOrDfLsbHgBkUGj9HBRo/sswUMds2r1X15B3bQLBxsbwFXaFGlcybCYdAl 5P3E/a18hSRl1APKjjMm+vA3IsWgIVp7vCXiIv0MReNDGXhuv+dxOitRVrMNH2KH2nkI JCrCAvyli6zO6IuctaOG0OTtlsut6yCh8poFBFOwuf4jWtAlxB/QvZpQvU5eJODbMmL+ wmKQ== X-Forwarded-Encrypted: i=1; AJvYcCUxk9rIU0lXmHJIXb4VCPwSB9mir6tIJ7sAIki6/0yYCtUc5+KVFmDwNCFYKSQfKQSmANPHa+RpqozKM9oo/8VyCws/invj0/DRVY+gqSLE X-Gm-Message-State: AOJu0YxwGWuT2n+KnRHwsOZP8//n2HjYfbQv+d2usRro71JN+bYtmRo5 gveLPYN5GUZNYFfE01DnPOrJrClm3mOriX+rBhgP5uHR1XsSZZL2QYci8hdm4Jg= X-Google-Smtp-Source: AGHT+IEJRIuFWfACl4C/2OdIIJGx8aK6TxTUuoEk2JLfaDxuwQLQymMr8D5iU52VLgMZ5cmUpvU7ag== X-Received: by 2002:a05:6e02:1d0b:b0:374:593f:913e with SMTP id e9e14a558f8ab-3748b98e53dmr55865925ab.14.1717254325230; Sat, 01 Jun 2024 08:05:25 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.05.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:05:24 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 09/17] ACPI: RISC-V: Implement PCI related functionality Date: Sat, 1 Jun 2024 20:34:03 +0530 Message-Id: <20240601150411.1929783-10-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_080529_855826_B309334F X-CRM114-Status: GOOD ( 13.72 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Replace the dummy implementation for PCI related functions with actual implementation. This needs ECAM and MCFG CONFIG options to be enabled for RISC-V. Signed-off-by: Sunil V L --- arch/riscv/Kconfig | 2 ++ arch/riscv/kernel/acpi.c | 33 +++++++++++++++------------------ drivers/pci/pci-acpi.c | 2 +- 3 files changed, 18 insertions(+), 19 deletions(-) diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index b94176e25be1..f143fbeea572 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -13,6 +13,7 @@ config 32BIT config RISCV def_bool y select ACPI_GENERIC_GSI if ACPI + select ACPI_MCFG if (ACPI && PCI) select ACPI_REDUCED_HARDWARE_ONLY if ACPI select ARCH_DMA_DEFAULT_COHERENT select ARCH_ENABLE_HUGEPAGE_MIGRATION if HUGETLB_PAGE && MIGRATION @@ -181,6 +182,7 @@ config RISCV select OF_EARLY_FLATTREE select OF_IRQ select PCI_DOMAINS_GENERIC if PCI + select PCI_ECAM if (ACPI && PCI) select PCI_MSI if PCI select RISCV_ALTERNATIVE if !XIP_KERNEL select RISCV_APLIC diff --git a/arch/riscv/kernel/acpi.c b/arch/riscv/kernel/acpi.c index e619edc8b0cc..41aa77c8484b 100644 --- a/arch/riscv/kernel/acpi.c +++ b/arch/riscv/kernel/acpi.c @@ -306,29 +306,26 @@ void __iomem *acpi_os_ioremap(acpi_physical_address phys, acpi_size size) #ifdef CONFIG_PCI /* - * These interfaces are defined just to enable building ACPI core. - * TODO: Update it with actual implementation when external interrupt - * controller support is added in RISC-V ACPI. + * raw_pci_read/write - Platform-specific PCI config space access. */ -int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, - int reg, int len, u32 *val) +int raw_pci_read(unsigned int domain, unsigned int bus, + unsigned int devfn, int reg, int len, u32 *val) { - return PCIBIOS_DEVICE_NOT_FOUND; + struct pci_bus *b = pci_find_bus(domain, bus); + + if (!b) + return PCIBIOS_DEVICE_NOT_FOUND; + return b->ops->read(b, devfn, reg, len, val); } -int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, - int reg, int len, u32 val) +int raw_pci_write(unsigned int domain, unsigned int bus, + unsigned int devfn, int reg, int len, u32 val) { - return PCIBIOS_DEVICE_NOT_FOUND; + struct pci_bus *b = pci_find_bus(domain, bus); + + if (!b) + return PCIBIOS_DEVICE_NOT_FOUND; + return b->ops->write(b, devfn, reg, len, val); } -int acpi_pci_bus_find_domain_nr(struct pci_bus *bus) -{ - return -1; -} - -struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) -{ - return NULL; -} #endif /* CONFIG_PCI */ diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c index e8d84fa435da..b5892d0fa68c 100644 --- a/drivers/pci/pci-acpi.c +++ b/drivers/pci/pci-acpi.c @@ -1521,7 +1521,7 @@ static int __init acpi_pci_init(void) } arch_initcall(acpi_pci_init); -#if defined(CONFIG_ARM64) +#if defined(CONFIG_ARM64) || defined(CONFIG_RISCV) /* * Try to assign the IRQ number when probing a new device From patchwork Sat Jun 1 15:04:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682499 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8EA45C25B76 for ; Sat, 1 Jun 2024 15:06:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=pETFBfsSYGoY1wXXFX6fORfEQl0WHgF1QcuZEjBDSHo=; b=is9np5lPluyX0V 4vEP4hlCdiEzmi72n8CqW1CEvAAhRfixZHePQbKY9kipYAbN8taUzDzl9F5wi4wCC+bwH063wfz3I F1x2YDM0ahomQA7CtXZfxFJ1tI+wJ2HLIGDnhnjptxzhRkcL6Swg2ZU9CVv36BnqrHhZO9/kmqJ6N DS2ny4umVatAvotYsndgYndVblOskV4eXJsKkO1O4u+jRp8QvpCHC5JttisQ+I8LaAB9H5MeIRhPy 6JiPdwB3dnASljNVm86iY4RpbrETU07bxNB3dps12fQRaEF2oRizPhAZT7NVkrPzxDDCdhdz0O8il Sv4nfTW/W/F9kCdKNuDw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQJB-0000000CprV-2FJl; Sat, 01 Jun 2024 15:06:13 +0000 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQIY-0000000CpFv-2qVX for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:05:42 +0000 Received: by mail-pf1-x42f.google.com with SMTP id d2e1a72fcca58-7024494f7daso1614671b3a.3 for ; Sat, 01 Jun 2024 08:05:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254332; x=1717859132; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Xxd/snqLqM7e5ONTmxzheAfPAEAmi9DZ2uBd4oJ/FYs=; b=ThvCtFB9iVorEzOZ5fHZevYjEnrFf+FPyqTxAlm4/rHAwKzKcqqYhjst4zdXp1vypX 6XRfwR0TbWA21VTgyfn67zv5VRs1UEyHl6NeuKI3uh05DTt0kndG4NmZcPMMa/+L0WGp mzpZ2FIvp3AoBVJCzPOXOxG4qoEC3YDUfC95NQYgOuEMFB0Czk7JAnLrutbKB73aYzy0 f4lPNGVQGdmN+5kG4kTUgaSxy/+lEMTM2yhRcxMFbVNKSG3BaQxuBE4cDTSd6BMZAmEO ZeJsHCOXWOumY/uoNN/o0RMjCB7KixF+cpRDpkDDOyO67gp5D7QM9a4/mz6SBpKcNVba YElw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254332; x=1717859132; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Xxd/snqLqM7e5ONTmxzheAfPAEAmi9DZ2uBd4oJ/FYs=; b=F3v2TIhQGczRb8YEAXAG5+IPPlJ4AlHAV6YcPAy39zQuroFuhRd3ZgoVRTpQRh6XZc 27vDY6RpnOVfWAl4F14VXoD7pzAjAifyheI0ZaP8whFTa2WAAG/9SpdXcrpvU1Lrfn6P L0hZYNocD9MCMvPgFc/+tMJa/yX3XGxncswhIy1ndLXIWIzYSZF+S83YWlDvCMhZGlHq Jdi55mCSVRDgewNX8CDy5KDko4vI8GBayQqB3b72tQ0XfTmkJzH8E7x71UxhyJAMyAsk ElAYcebOiXflyYzTfbXBlBQECn9irvV3LIxjJ6/4QfYbDmFw/tw0GLPBSoCkL+d1KD6e Dz/w== X-Forwarded-Encrypted: i=1; AJvYcCVq6s2OB0Eya8ay6PzoiavEthmnSeIWeYuWJk5HiaX7avADBB9l532o4OZ4IcxeZKF5tDlk/ozQkqoI/2zv80S5WLMtT+nJhnvENF3+n5UC X-Gm-Message-State: AOJu0YyghYqNDjLTcNyaT5PjLRmcLKdiskRJYe4ryyTS+NvF8MOnJt8h JjA+HMDP1rsWJZ1E2OmIezzq/p0CWGhvNMHn+upVNQHotI1W9o+tlK5fNPXOr4M= X-Google-Smtp-Source: AGHT+IFZLKdJXzy6Jd5qCfRWhIlRvV4goiwxMiN4v1BoHBszSCe89m9zjL1yy7W4W+xKrhKM387PnA== X-Received: by 2002:a05:6a00:2d11:b0:6f8:ddfe:8fc4 with SMTP id d2e1a72fcca58-70247803d99mr5506971b3a.19.1717254332202; Sat, 01 Jun 2024 08:05:32 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.05.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:05:31 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 10/17] ACPI: RISC-V: Implement function to reorder irqchip probe entries Date: Sat, 1 Jun 2024 20:34:04 +0530 Message-Id: <20240601150411.1929783-11-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_080535_080794_BD7936D2 X-CRM114-Status: GOOD ( 15.65 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org ACPI MADT entries for interrupt controllers don't have a way to describe the hierarchy. However, the hierarchy is known to the architecture and on RISC-V platforms, the MADT sub table types are ordered in the incremental order from the root controller which is RINTC. So, add architecture function for RISC-V to reorder the interrupt controller probing as per the hierarchy as below. Signed-off-by: Sunil V L --- drivers/acpi/riscv/Makefile | 2 +- drivers/acpi/riscv/irq.c | 32 ++++++++++++++++++++++++++++++++ 2 files changed, 33 insertions(+), 1 deletion(-) create mode 100644 drivers/acpi/riscv/irq.c diff --git a/drivers/acpi/riscv/Makefile b/drivers/acpi/riscv/Makefile index 877de00d1b50..a96fdf1e2cb8 100644 --- a/drivers/acpi/riscv/Makefile +++ b/drivers/acpi/riscv/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only -obj-y += rhct.o init.o +obj-y += rhct.o init.o irq.o obj-$(CONFIG_ACPI_PROCESSOR_IDLE) += cpuidle.o obj-$(CONFIG_ACPI_CPPC_LIB) += cppc.o diff --git a/drivers/acpi/riscv/irq.c b/drivers/acpi/riscv/irq.c new file mode 100644 index 000000000000..f56e103a501f --- /dev/null +++ b/drivers/acpi/riscv/irq.c @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2023-2024, Ventana Micro Systems Inc + * Author: Sunil V L + * + */ + +#include +#include + +static int irqchip_cmp_func(const void *in0, const void *in1) +{ + struct acpi_probe_entry *elem0 = (struct acpi_probe_entry *)in0; + struct acpi_probe_entry *elem1 = (struct acpi_probe_entry *)in1; + + return (elem0->type > elem1->type) - (elem0->type < elem1->type); +} + +/* + * RISC-V irqchips in MADT of ACPI spec are defined in the same order how + * they should be probed. Since IRQCHIP_ACPI_DECLARE doesn't define any + * order, this arch function will reorder the probe functions as per the + * required order for the architecture. + */ +void arch_sort_irqchip_probe(struct acpi_probe_entry *ap_head, int nr) +{ + struct acpi_probe_entry *ape = ap_head; + + if (nr == 1 || !ACPI_COMPARE_NAMESEG(ACPI_SIG_MADT, ape->id)) + return; + sort(ape, nr, sizeof(*ape), irqchip_cmp_func, NULL); +} From patchwork Sat Jun 1 15:04:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682519 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0E8E6C25B7E for ; Sat, 1 Jun 2024 16:17:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=QFq5xDfBlg/DEI1vIOXpnF3QP5uJe/4ImKurILL8koI=; b=lpxZV8bk2oqAMP uhUu41OYIRTYLLgI+gXQ58DJiy8Rjzunxr+mxIeOfqXYuC52aJkMoF3G/LTGw6nL8SOMn1WBYoBn2 wXjyVcoRLZ++mfL+Wu1sLajh8hcRIHndgpGqqBFs2v9dPJ4Sz9KoBmdAzYE4nxgM1Gmt26BI3hdaK Qg5MWRQlBCo1K+z18vs6miSTOOQugh4DJV+cWFvgpkK0x9CuLukIXuerPLQC+3oeV/+KW455DukuP 96DOvZ/xVzk/FgZ3GRR62Qy+pTp6uGfr7QQ5zPpcpIpZvR7l3vwACHnRud0XV5YOmJDV1u6GknKAi elpTkqtj8jJzszxsDkWw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDRPd-0000000CwO3-32Ps; Sat, 01 Jun 2024 16:16:57 +0000 Received: from mail-pf1-x435.google.com ([2607:f8b0:4864:20::435]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQIf-0000000CpMp-1vUJ for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:05:55 +0000 Received: by mail-pf1-x435.google.com with SMTP id d2e1a72fcca58-7024ac84ae4so1315043b3a.2 for ; Sat, 01 Jun 2024 08:05:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254339; x=1717859139; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Dz2b5NSEn3co4GBYyIFhq4o1B5yNhLUdwhxGlUjO5R4=; b=Vk4Tcb/0Bfcdp0khcjVDufR3JTA1E99xoN66FT3h48m9HSYHwPopAhuRM9/CLLOJZJ Sr6PaOeeV/TmFfEtizlUfD4khnkzJebLbGQ9+U0pooChPcImbFjBqBW/iAiogVus4quZ 7HhOMa9sYLLDOnt9ZJe3AadyyEmBbdYBCjeAZHZNRnEBQ9EpjlGXpViXUZ6/vk9aYAdq W6T4mJS+8LDU6GOa1yRVZH74Vn5R1QxlQyuB+fvzkm+cbaTTplXd/goeW1Yg3k7DJ3lZ pFtPyIAavGEGylrsBHRbWhiJsDt7LXOtgZ4IgE/nw9fhQaWu95cOGU6eVps1fAgGg8fc h6xg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254339; x=1717859139; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Dz2b5NSEn3co4GBYyIFhq4o1B5yNhLUdwhxGlUjO5R4=; b=Z8xFuufjMC6+h6OOycMfRVbXutkTaOS43ZRdXjoSsEvj9xTcihPW3gD6VQFlwwWF3A +7c8Xsiidu49JcxjECh40K1h3qf58cF0XU/GW7vnPnH4N1ZhfGQNk9Mhc8NjFiMtCGpl YgWIQlUDSMCoj4VKj89hVB8ukxcKT4CMzC/XUx+sXyzXWxnCiSkLHJb0DRNDvfn6GRbY 8bCL40ipzOfeWTnVGOsiP4d4U3fT1VJL+n/3DiBNMwFyaeoAgruhd+Dx/BiaDMFkkOCD B4Y8F9nOiBrhxK4g4Dzbp26cxahpgApcDD1Vxv7CnCG/m986otP8FapvkTn0BcigwUbN lMpQ== X-Forwarded-Encrypted: i=1; AJvYcCWedvoY7qgTvOv7ZDsU0l9veYZ4Kk38KRfeCY0gDQwLoRhiyMXANu0rO4o3mCwGA8GL9akuJR+4yhhcSWhhs5muZJIC3GmLTyMZRStS8yqx X-Gm-Message-State: AOJu0Yw1rxipmBP/0dgk5774tdtRslJxcgFFCiTAoYV/pSBJ66yDO6iN dwmk8QLIj/DSk9yFFBA8UDATFaD9NtpeNADRTvpObke8e/deS265HCgt8XuXEoU= X-Google-Smtp-Source: AGHT+IFi9FvR07K+9EvB/LtbP5RxfWdx62HcMAj5Tgp+bEEJtSdzuKB0A31tUE7N74MPsHLQ+KB8vQ== X-Received: by 2002:a05:6a21:3288:b0:1a8:2cc0:290a with SMTP id adf61e73a8af0-1b26f185b75mr5513828637.30.1717254339312; Sat, 01 Jun 2024 08:05:39 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.05.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:05:38 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 11/17] ACPI: RISC-V: Initialize GSI mapping structures Date: Sat, 1 Jun 2024 20:34:05 +0530 Message-Id: <20240601150411.1929783-12-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_080541_941257_669D20D3 X-CRM114-Status: GOOD ( 19.94 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org RISC-V has PLIC and APLIC in MADT as well as namespace devices. Initialize the list of those structures using MADT and namespace devices to create mapping between the ACPI handle and the GSI ranges. This will be used later to add dependencies. Signed-off-by: Sunil V L --- arch/riscv/include/asm/irq.h | 22 ++++++ drivers/acpi/riscv/init.c | 2 + drivers/acpi/riscv/init.h | 4 + drivers/acpi/riscv/irq.c | 142 +++++++++++++++++++++++++++++++++++ 4 files changed, 170 insertions(+) create mode 100644 drivers/acpi/riscv/init.h diff --git a/arch/riscv/include/asm/irq.h b/arch/riscv/include/asm/irq.h index 8e10a94430a2..44a0b128c602 100644 --- a/arch/riscv/include/asm/irq.h +++ b/arch/riscv/include/asm/irq.h @@ -16,4 +16,26 @@ void riscv_set_intc_hwnode_fn(struct fwnode_handle *(*fn)(void)); struct fwnode_handle *riscv_get_intc_hwnode(void); +#ifdef CONFIG_ACPI + +enum riscv_irqchip_type { + ACPI_RISCV_IRQCHIP_INTC = 0x00, + ACPI_RISCV_IRQCHIP_IMSIC = 0x01, + ACPI_RISCV_IRQCHIP_PLIC = 0x02, + ACPI_RISCV_IRQCHIP_APLIC = 0x03, +}; + +int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi_base, + u32 *id, u32 *nr_irqs, u32 *nr_idcs); +struct fwnode_handle *riscv_acpi_get_gsi_domain_id(u32 gsi); + +#else +static inline int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi_base, + u32 *id, u32 *nr_irqs, u32 *nr_idcs) +{ + return 0; +} + +#endif /* CONFIG_ACPI */ + #endif /* _ASM_RISCV_IRQ_H */ diff --git a/drivers/acpi/riscv/init.c b/drivers/acpi/riscv/init.c index 5f7571143245..22db97f7a772 100644 --- a/drivers/acpi/riscv/init.c +++ b/drivers/acpi/riscv/init.c @@ -6,7 +6,9 @@ */ #include +#include "init.h" void __init acpi_riscv_init(void) { + riscv_acpi_init_gsi_mapping(); } diff --git a/drivers/acpi/riscv/init.h b/drivers/acpi/riscv/init.h new file mode 100644 index 000000000000..0b9a07e4031f --- /dev/null +++ b/drivers/acpi/riscv/init.h @@ -0,0 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#include + +void __init riscv_acpi_init_gsi_mapping(void); diff --git a/drivers/acpi/riscv/irq.c b/drivers/acpi/riscv/irq.c index f56e103a501f..0473428e8d1e 100644 --- a/drivers/acpi/riscv/irq.c +++ b/drivers/acpi/riscv/irq.c @@ -7,6 +7,21 @@ #include #include +#include + +#include "init.h" + +struct riscv_ext_intc_list { + acpi_handle handle; + u32 gsi_base; + u32 nr_irqs; + u32 nr_idcs; + u32 id; + u32 type; + struct list_head list; +}; + +LIST_HEAD(ext_intc_list); static int irqchip_cmp_func(const void *in0, const void *in1) { @@ -30,3 +45,130 @@ void arch_sort_irqchip_probe(struct acpi_probe_entry *ap_head, int nr) return; sort(ape, nr, sizeof(*ape), irqchip_cmp_func, NULL); } + +static void riscv_acpi_update_gsi_handle(u32 gsi_base, acpi_handle handle) +{ + struct riscv_ext_intc_list *ext_intc_element; + struct list_head *i, *tmp; + + list_for_each_safe(i, tmp, &ext_intc_list) { + ext_intc_element = list_entry(i, struct riscv_ext_intc_list, list); + if (gsi_base == ext_intc_element->gsi_base) { + ext_intc_element->handle = handle; + return; + } + } + + acpi_handle_err(handle, "failed to find the GSI mapping entry\n"); +} + +int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi_base, + u32 *id, u32 *nr_irqs, u32 *nr_idcs) +{ + struct riscv_ext_intc_list *ext_intc_element; + struct list_head *i, *tmp; + + list_for_each_safe(i, tmp, &ext_intc_list) { + ext_intc_element = list_entry(i, struct riscv_ext_intc_list, list); + if (ext_intc_element->handle == ACPI_HANDLE_FWNODE(fwnode)) { + *gsi_base = ext_intc_element->gsi_base; + *id = ext_intc_element->id; + *nr_irqs = ext_intc_element->nr_irqs; + if (nr_idcs) + *nr_idcs = ext_intc_element->nr_idcs; + + return 0; + } + } + + return -ENODEV; +} + +struct fwnode_handle *riscv_acpi_get_gsi_domain_id(u32 gsi) +{ + struct riscv_ext_intc_list *ext_intc_element; + struct acpi_device *adev; + struct list_head *i, *tmp; + + list_for_each_safe(i, tmp, &ext_intc_list) { + ext_intc_element = list_entry(i, struct riscv_ext_intc_list, list); + if (gsi >= ext_intc_element->gsi_base && + gsi < (ext_intc_element->gsi_base + ext_intc_element->nr_irqs)) { + adev = acpi_fetch_acpi_dev(ext_intc_element->handle); + if (!adev) + return NULL; + + return acpi_fwnode_handle(adev); + } + } + + return NULL; +} + +static int __init riscv_acpi_register_ext_intc(u32 gsi_base, u32 nr_irqs, u32 nr_idcs, + u32 id, u32 type) +{ + struct riscv_ext_intc_list *ext_intc_element; + + ext_intc_element = kzalloc(sizeof(*ext_intc_element), GFP_KERNEL); + if (!ext_intc_element) + return -ENOMEM; + + ext_intc_element->gsi_base = gsi_base; + ext_intc_element->nr_irqs = nr_irqs; + ext_intc_element->nr_idcs = nr_idcs; + ext_intc_element->id = id; + list_add_tail(&ext_intc_element->list, &ext_intc_list); + return 0; +} + +static acpi_status __init riscv_acpi_create_gsi_map(acpi_handle handle, u32 level, + void *context, void **return_value) +{ + acpi_status status; + u64 gbase; + + if (!acpi_has_method(handle, "_GSB")) { + acpi_handle_err(handle, "_GSB method not found\n"); + return AE_OK; + } + + status = acpi_evaluate_integer(handle, "_GSB", NULL, &gbase); + if (ACPI_FAILURE(status)) { + acpi_handle_err(handle, "failed to evaluate _GSB method\n"); + return AE_OK; + } + + riscv_acpi_update_gsi_handle((u32)gbase, handle); + return AE_OK; +} + +static int __init riscv_acpi_aplic_parse_madt(union acpi_subtable_headers *header, + const unsigned long end) +{ + struct acpi_madt_aplic *aplic = (struct acpi_madt_aplic *)header; + + return riscv_acpi_register_ext_intc(aplic->gsi_base, aplic->num_sources, aplic->num_idcs, + aplic->id, ACPI_RISCV_IRQCHIP_APLIC); +} + +static int __init riscv_acpi_plic_parse_madt(union acpi_subtable_headers *header, + const unsigned long end) +{ + struct acpi_madt_plic *plic = (struct acpi_madt_plic *)header; + + return riscv_acpi_register_ext_intc(plic->gsi_base, plic->num_irqs, 0, + plic->id, ACPI_RISCV_IRQCHIP_PLIC); +} + +void __init riscv_acpi_init_gsi_mapping(void) +{ + /* There can be either PLIC or APLIC */ + if (acpi_table_parse_madt(ACPI_MADT_TYPE_PLIC, riscv_acpi_plic_parse_madt, 0) > 0) { + acpi_get_devices("RSCV0001", riscv_acpi_create_gsi_map, NULL, NULL); + return; + } + + if (acpi_table_parse_madt(ACPI_MADT_TYPE_APLIC, riscv_acpi_aplic_parse_madt, 0) > 0) + acpi_get_devices("RSCV0002", riscv_acpi_create_gsi_map, NULL, NULL); +} From patchwork Sat Jun 1 15:04:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682500 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A5142C25B76 for ; Sat, 1 Jun 2024 15:06:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WPOmeyvtS5Vq/5i/6bxJ/8z9LjtNUFVnz9ww+Ux0kqI=; b=P6Hz6Wqcgve3Zf yzigR/cLnMW3s0yAqd5ab6Bn/Vdrt9lHDU9ldXL0tu5sMRGv2Xub+1bwjx6B7Rqu07DExHb/GLD0N yWwm6zJbqoQbchnqvS80tHFwIWkNONFsO/bFDkcFuLMyuueKx3dMsZA2p0NOtfi1zlT4UAq7pB2QC /fhI5bGzRiGXFTFQ3XgElvdTCkvo0UWz3ye5v/8VcOACGEmNkx7/i1QeF1F5Jr11RLG6qAJPALvTj 33bIKqKeIxpwY3xl8Lba5YumCdCK47c+xhuJ7OWhhYWv59Dzpbc+ErNa16gn2wwk12bxfsR5c3hmX Ofg9ybXo3/n2Hfc56/PQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQJG-0000000CpwX-3fTn; Sat, 01 Jun 2024 15:06:18 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQIu-0000000CpbC-0OmO for linux-riscv@bombadil.infradead.org; Sat, 01 Jun 2024 15:05:56 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description; bh=BG93T+gcNC0mbkbP77au2VNz1Cnxnueu2TjA3uMrqLg=; b=n4U4cQD9h5YjJQXM82oxcIrJQ3 VuYObVwlSFbqAPUwxTR3+6UqQ4jDjKTvy7917Vp02xcS8dJGM905rnnWlkJP0JeayMLsmNNeiaD4k eazmI+PnnAcNnUslJLn6dKvrrl3TweMadk+ZaFjtV2EvJEiRSoXWxX4KsqqvJXOz8nmMFeMEvmsy8 TZQ4ZTj1j6gihEclFfaywAfh5oYwolXPkUvqwyrHCvEReSMDEoZUK01E0eHO97MfHyGj+MpMSp38c ul+L+jV/KcQoRc2LMlFNhzOUnwKxvIXfgV9C7wJye0dPX0K929fBTWsPX+KBqsFT2EALqux31i8UB Xbv7ufyw==; Received: from mail-pf1-x42b.google.com ([2607:f8b0:4864:20::42b]) by desiato.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQIo-0000000F3Wv-05yI for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:05:53 +0000 Received: by mail-pf1-x42b.google.com with SMTP id d2e1a72fcca58-7025cb09553so252589b3a.3 for ; Sat, 01 Jun 2024 08:05:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254346; x=1717859146; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=BG93T+gcNC0mbkbP77au2VNz1Cnxnueu2TjA3uMrqLg=; b=mfyqucJAwOBa0iRiGjOfWtysx8HkWpdtP06xh+n17RD69G9mNzxm4iGcoNH2uj6mve aFggJFw+xTjXboQMrOiJmOvWnKC9MrEnfubKeoPqy51OkIMM13Zrm6UQfGyTb/queUsD liHJTogCONuhuJSa6maduficNNeq++k53dS0oKeKC9YGzlhndDhIit/l6ZU6CMeA7vAf PubttHQiYC7zMmQVHPllAKNWuLzl9tGHd9RkSKGhMm4roQq8wLTLd2fyWwqmCiWOzGYl iD3ycBh9FD/wJLhZ275qCoR0OBxh88Jz19PvJIF6i9z/GvRV7KWHmMVJjPAgr5+ODGxY X/cg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254346; x=1717859146; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=BG93T+gcNC0mbkbP77au2VNz1Cnxnueu2TjA3uMrqLg=; b=AMTkQqbwcmw5Vh/l1YvliOJkSokN5HcRZVdz/gN9l+tBW+SYQibcSo+MaqUT6JnSq7 w29sPrc8eCwniKFo8fH1aIpcnFVAWXn/AE3COywaw3HQFEn15zmtBnQUfHQjy1ypOBJT dpzgiJ5FymSFG/pnAZpujaGFV5f6IT8pk3AywPass1Rcvw8K3IacK9dSUPZNQN++vzaR P2sEMJDphAY8oF+NfEZ5NDNhJjTRVeQMljO4KSP5pCDcMgYPW9V14JV2fWx3bcpiuJqj 4cw68BLaQw+b5bF5K+fBuo07cCjtiF4HyPj/kY1++VTiIxKuhEkP/pVgtheo2kf6GfBX 3LiQ== X-Forwarded-Encrypted: i=1; AJvYcCW5fxpHaKiNwJ35SPAzQ+jPzDLE6mwpGOlWzwVoh7yAhmZFGeX3x54g1UR7h54hXZppDcuh+8wkvt+ZR6I99hyBprjRvc7XpSai2msin4xv X-Gm-Message-State: AOJu0YznrqTK4iviQuKkWcLd1m01CcD3hiJw0sUFXVwXP4VKLP5isbVr kzjtopo8StuN/hS5g5zYIHAgBFcqhEiDbd1aTHUil1byYKV7E2Fb7o5ryXjgd+g= X-Google-Smtp-Source: AGHT+IGt8M7K1Q6B0sZgxbaoEdNcJvuzpgSkdhFy04fdredDtbILIAAzArLyrTUTnKrXnoT2rN90ng== X-Received: by 2002:a05:6a20:f386:b0:1a7:55f2:c92c with SMTP id adf61e73a8af0-1b26f254173mr5234362637.45.1717254346265; Sat, 01 Jun 2024 08:05:46 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.05.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:05:45 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 12/17] ACPI: RISC-V: Implement function to add implicit dependencies Date: Sat, 1 Jun 2024 20:34:06 +0530 Message-Id: <20240601150411.1929783-13-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_160550_929046_A55E7A6A X-CRM114-Status: GOOD ( 20.45 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org RISC-V interrupt controllers for wired interrupts are platform devices and hence their driver will be probed late. Also, APLIC which is one such interrupt controller can not be probed early since it needs MSI services. This needs a probing order between the interrupt controller driver and the device drivers. _DEP is typically used to indicate such dependencies. However, the dependency may be already available like GSI mapping. Hence, instead of an explicit _DEP, architecture can find the implicit dependencies and add to the dependency list. For RISC-V, add the dependencies for below use cases. 1) For devices which has IRQ resource, find out the interrupt controller using GSI number map and add the dependency. 2) For PCI host bridges: a) If _PRT indicate PCI link devices, add dependency on the link device. b) If _PRT indicates GSI, find out the interrupt controller using GSI number map and add the dependency. Signed-off-by: Sunil V L --- drivers/acpi/riscv/irq.c | 155 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 155 insertions(+) diff --git a/drivers/acpi/riscv/irq.c b/drivers/acpi/riscv/irq.c index 0473428e8d1e..2878ae48131f 100644 --- a/drivers/acpi/riscv/irq.c +++ b/drivers/acpi/riscv/irq.c @@ -21,6 +21,12 @@ struct riscv_ext_intc_list { struct list_head list; }; +struct acpi_irq_dep_ctx { + int rc; + unsigned int index; + acpi_handle handle; +}; + LIST_HEAD(ext_intc_list); static int irqchip_cmp_func(const void *in0, const void *in1) @@ -62,6 +68,21 @@ static void riscv_acpi_update_gsi_handle(u32 gsi_base, acpi_handle handle) acpi_handle_err(handle, "failed to find the GSI mapping entry\n"); } +static acpi_handle riscv_acpi_get_gsi_handle(u32 gsi) +{ + struct riscv_ext_intc_list *ext_intc_element; + struct list_head *i, *tmp; + + list_for_each_safe(i, tmp, &ext_intc_list) { + ext_intc_element = list_entry(i, struct riscv_ext_intc_list, list); + if (gsi >= ext_intc_element->gsi_base && + gsi < (ext_intc_element->gsi_base + ext_intc_element->nr_irqs)) + return ext_intc_element->handle; + } + + return NULL; +} + int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi_base, u32 *id, u32 *nr_irqs, u32 *nr_idcs) { @@ -172,3 +193,137 @@ void __init riscv_acpi_init_gsi_mapping(void) if (acpi_table_parse_madt(ACPI_MADT_TYPE_APLIC, riscv_acpi_aplic_parse_madt, 0) > 0) acpi_get_devices("RSCV0002", riscv_acpi_create_gsi_map, NULL, NULL); } + +static acpi_status riscv_acpi_irq_get_parent(struct acpi_resource *ares, void *context) +{ + struct acpi_irq_dep_ctx *ctx = context; + struct acpi_resource_irq *irq; + struct acpi_resource_extended_irq *eirq; + + switch (ares->type) { + case ACPI_RESOURCE_TYPE_IRQ: + irq = &ares->data.irq; + if (ctx->index >= irq->interrupt_count) { + ctx->index -= irq->interrupt_count; + return AE_OK; + } + ctx->handle = riscv_acpi_get_gsi_handle(irq->interrupts[ctx->index]); + return AE_CTRL_TERMINATE; + case ACPI_RESOURCE_TYPE_EXTENDED_IRQ: + eirq = &ares->data.extended_irq; + if (eirq->producer_consumer == ACPI_PRODUCER) + return AE_OK; + + if (ctx->index >= eirq->interrupt_count) { + ctx->index -= eirq->interrupt_count; + return AE_OK; + } + + /* Support GSIs only */ + if (eirq->resource_source.string_length) + return AE_OK; + + ctx->handle = riscv_acpi_get_gsi_handle(eirq->interrupts[ctx->index]); + return AE_CTRL_TERMINATE; + } + + return AE_OK; +} + +static int riscv_acpi_irq_get_dep(acpi_handle handle, unsigned int index, acpi_handle *gsi_handle) +{ + struct acpi_irq_dep_ctx ctx = {-EINVAL, index, NULL}; + + if (!gsi_handle) + return 0; + + acpi_walk_resources(handle, METHOD_NAME__CRS, riscv_acpi_irq_get_parent, &ctx); + *gsi_handle = ctx.handle; + if (*gsi_handle) + return 1; + + return 0; +} + +static u32 riscv_acpi_add_prt_dep(acpi_handle handle) +{ + struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL }; + struct acpi_pci_routing_table *entry; + struct acpi_handle_list dep_devices; + acpi_handle gsi_handle; + acpi_handle link_handle; + acpi_status status; + u32 count = 0; + + status = acpi_get_irq_routing_table(handle, &buffer); + if (ACPI_FAILURE(status)) { + acpi_handle_err(handle, "failed to get IRQ routing table\n"); + kfree(buffer.pointer); + return 0; + } + + entry = buffer.pointer; + while (entry && (entry->length > 0)) { + if (entry->source[0]) { + acpi_get_handle(handle, entry->source, &link_handle); + dep_devices.count = 1; + dep_devices.handles = kcalloc(1, sizeof(*dep_devices.handles), GFP_KERNEL); + if (!dep_devices.handles) { + acpi_handle_err(handle, "failed to allocate memory\n"); + continue; + } + + dep_devices.handles[0] = link_handle; + count += acpi_scan_add_dep(handle, &dep_devices); + } else { + gsi_handle = riscv_acpi_get_gsi_handle(entry->source_index); + dep_devices.count = 1; + dep_devices.handles = kcalloc(1, sizeof(*dep_devices.handles), GFP_KERNEL); + if (!dep_devices.handles) { + acpi_handle_err(handle, "failed to allocate memory\n"); + continue; + } + + dep_devices.handles[0] = gsi_handle; + count += acpi_scan_add_dep(handle, &dep_devices); + } + + entry = (struct acpi_pci_routing_table *) + ((unsigned long)entry + entry->length); + } + + kfree(buffer.pointer); + return count; +} + +static u32 riscv_acpi_add_irq_dep(acpi_handle handle) +{ + struct acpi_handle_list dep_devices; + acpi_handle gsi_handle; + u32 count = 0; + int i; + + for (i = 0; + riscv_acpi_irq_get_dep(handle, i, &gsi_handle); + i++) { + dep_devices.count = 1; + dep_devices.handles = kcalloc(1, sizeof(*dep_devices.handles), GFP_KERNEL); + if (!dep_devices.handles) { + acpi_handle_err(handle, "failed to allocate memory\n"); + continue; + } + + dep_devices.handles[0] = gsi_handle; + count += acpi_scan_add_dep(handle, &dep_devices); + } + + return count; +} + +u32 arch_acpi_add_auto_dep(acpi_handle handle) +{ + if (acpi_has_method(handle, "_PRT")) + return riscv_acpi_add_prt_dep(handle); + + return riscv_acpi_add_irq_dep(handle); +} From patchwork Sat Jun 1 15:04:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682520 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 043A3C25B76 for ; Sat, 1 Jun 2024 16:17:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=0BlXgetF1Fi3EM6/X9S4DsnXPU191VoSIlZhcX81fkU=; b=RAsbaLQRxQmepX NFLnRMRxoH7ru91eqF8G86fv9EhJPDDk4UOddEzQUzHRQr8/PBVVIPwtf5dzUjXtyBNl/7CL6m7Tn yRQ6pCEzjoZmGi6B/G7dkO7vILs9VfCxI5BMN2AScOPQ8gXigoMA0+V2y9V6Awv+avCj+Y0qz04+f HpMsNX4KuLxnYj2ZREjcxmHcCXGOIKkVu+5iOZaDNCoOzwmjbV74HIIpPvAy191aa1w9CeWHQlXWe LnW639fPgjHtZpZxtNpD1KRs8r4L/wR9EkKywLqz1WSR74oo4EeEj/bfdXKnQNhlIo3lnzrtna5RR 18qHbyEw3wrY3elwl4UA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDRPe-0000000CwOB-2f88; Sat, 01 Jun 2024 16:16:58 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQJ0-0000000CpgI-0kKT for linux-riscv@bombadil.infradead.org; Sat, 01 Jun 2024 15:06:02 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description; bh=Ix1ya63KBdI8Z0XgPmU9L/YxtTKVM9YoT3mmPmDGYrI=; b=dyjWoKFiNF7DHmgCR0Yo8O4wwb RFJ0cGENNmNNy6zIWNAsXsPwRkJ9Qs8+WXZUefH5vWbyFqLDwyiDAVWHMfCMZYCeGrzPQPAT0ZVpl hZA0nX/h29M+XyQDW1JcrUdc/xAEDnJXlcnXWYWGxOPcVhZWRFo5dpN0Yonfyy3dLPRJwTTGqPxVY qe5sl/VF6E/AUHMxRhKrhrvYYEDNojVnx8I7/gwrNMWf8WHDHjARJ2jNX1FDqW7LnX9Olc3lMQEb1 oD4zFB8AfF0NngrTLUN2sqoa0tI/WPtBX5m0ZCCAgMkuTiAyEoJT9E/0a3U4+tCFE5skqjk8mvDCZ lvQuZ+qw==; Received: from mail-pf1-x433.google.com ([2607:f8b0:4864:20::433]) by desiato.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQIu-0000000F3Y8-3P9I for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:06:00 +0000 Received: by mail-pf1-x433.google.com with SMTP id d2e1a72fcca58-70255d5ddb8so447156b3a.0 for ; Sat, 01 Jun 2024 08:05:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254354; x=1717859154; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Ix1ya63KBdI8Z0XgPmU9L/YxtTKVM9YoT3mmPmDGYrI=; b=YlpP2p6JVb5vcE95gsxtpAy/jDlR/K+z1ok655N5DdvohqQeqMdryORN4GlkhKR97w StdPm7L5wjU1VHhggrdF5nufMUbD3POvfWT/wlRLAyhYf8bgLRBjWPcWZyl9bJkyHuoo Anct1l0wE+7quSQaPkibqLKXVKnSRJro5H4bn86gmZciwoHXSgX5WtVYQqrzQCJAlASr x77Gpr3engv4xec20e66A0zYKPlXvic0kNQ4zdr7S9AKbAMUkW7DuOansc0vTFwcUmOf ysbBUcS5zwo29kXSd11kFKdKjZ5e/+SBuAKBIVBrj1dZyE2gGEIybjwuMTioIgVlkku0 sprQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254354; x=1717859154; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Ix1ya63KBdI8Z0XgPmU9L/YxtTKVM9YoT3mmPmDGYrI=; b=PnlZYJ5MJZ0E0cJuvswoM1KRnsHIAs1ZfaiYsRW8VyfI8o5YrWTqf4JjZzHsDZvvMK jqctx7MArE6pcaS5XBDZXGFql1MOwadtoM6oe/80W8CjBRwI4ftCsFZNa24n/zl+5tFJ KKNOYhkz5IH2CLlcVWKxTjzriHGi5Utxn8INFdiibBs1CDqhNwHBYBPu4Qt3ZomRkn/8 57pEHnKAVjCgurwS6IEnF4p89liigKS1RjkJLIau2XaGBMM2qZSLjzH89Q6vGPcKM92/ vG9bLfPap3uiQACL8EUeBRXvNxkb4NOKsoUZh3c41zNPPiXrNLSFU36Jyx0+MHlayasv R3WQ== X-Forwarded-Encrypted: i=1; AJvYcCUGbhOgSrmiN+qne9+fb7aQa6In+Ha5iRO++PxA0WbOc7PYOcKYqj16Y8++Kn2cpfgcncW2XMr4jeaC5hOfiPV7Qn4gGQ71BIRZ+AghkNsA X-Gm-Message-State: AOJu0YxhBjZG5Xn125sd0DTdP5vu6Q5i0yA+8uYMIfmX6lDELZD8uiUw x3uK8LGjj1+/ZXN4u4xJJJaAPrEMHN/Je+huz64xGoeBQ5fihGX5i132Uif9Ra4= X-Google-Smtp-Source: AGHT+IFPfDTfjt04oqk3q/MnI8wec/rdNH1fBWtlh1LZy3yCp1vhuEJfNDXv5tm5xoTuwiRZpnV72g== X-Received: by 2002:a05:6a20:914e:b0:1af:4ea2:5424 with SMTP id adf61e73a8af0-1b26f20d7e3mr5216779637.33.1717254353608; Sat, 01 Jun 2024 08:05:53 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.05.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:05:52 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 13/17] irqchip/riscv-intc: Add ACPI support for AIA Date: Sat, 1 Jun 2024 20:34:07 +0530 Message-Id: <20240601150411.1929783-14-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_160557_390645_0F1530C1 X-CRM114-Status: GOOD ( 15.25 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org The RINTC subtype structure in MADT also has information about other interrupt controllers. Save this information and provide interfaces to retrieve them when required by corresponding drivers. Signed-off-by: Sunil V L --- arch/riscv/include/asm/irq.h | 33 ++++++++++++ drivers/irqchip/irq-riscv-intc.c | 90 ++++++++++++++++++++++++++++++++ 2 files changed, 123 insertions(+) diff --git a/arch/riscv/include/asm/irq.h b/arch/riscv/include/asm/irq.h index 44a0b128c602..51d86f0b80d2 100644 --- a/arch/riscv/include/asm/irq.h +++ b/arch/riscv/include/asm/irq.h @@ -12,6 +12,8 @@ #include +#define INVALID_CONTEXT UINT_MAX + void riscv_set_intc_hwnode_fn(struct fwnode_handle *(*fn)(void)); struct fwnode_handle *riscv_get_intc_hwnode(void); @@ -28,6 +30,11 @@ enum riscv_irqchip_type { int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi_base, u32 *id, u32 *nr_irqs, u32 *nr_idcs); struct fwnode_handle *riscv_acpi_get_gsi_domain_id(u32 gsi); +unsigned long acpi_get_intc_index_hartid(u32 index); +unsigned long acpi_get_ext_intc_parent_hartid(unsigned int plic_id, unsigned int ctxt_idx); +unsigned int acpi_get_plic_nr_contexts(unsigned int plic_id); +unsigned int acpi_get_plic_context(unsigned int plic_id, unsigned int ctxt_idx); +int __init acpi_get_imsic_mmio_info(u32 index, struct resource *res); #else static inline int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi_base, @@ -36,6 +43,32 @@ static inline int riscv_acpi_get_gsi_info(struct fwnode_handle *fwnode, u32 *gsi return 0; } +static inline unsigned long acpi_get_intc_index_hartid(u32 index) +{ + return INVALID_HARTID; +} + +static inline unsigned long acpi_get_ext_intc_parent_hartid(unsigned int plic_id, + unsigned int ctxt_idx) +{ + return INVALID_HARTID; +} + +static inline unsigned int acpi_get_plic_nr_contexts(unsigned int plic_id) +{ + return INVALID_CONTEXT; +} + +static inline unsigned int acpi_get_plic_context(unsigned int plic_id, unsigned int ctxt_idx) +{ + return INVALID_CONTEXT; +} + +static inline int __init acpi_get_imsic_mmio_info(u32 index, struct resource *res) +{ + return 0; +} + #endif /* CONFIG_ACPI */ #endif /* _ASM_RISCV_IRQ_H */ diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c index 4f3a12383a1e..3c6494f1cb02 100644 --- a/drivers/irqchip/irq-riscv-intc.c +++ b/drivers/irqchip/irq-riscv-intc.c @@ -250,6 +250,85 @@ IRQCHIP_DECLARE(andes, "andestech,cpu-intc", riscv_intc_init); #ifdef CONFIG_ACPI +struct rintc_data { + union { + u32 ext_intc_id; + struct { + u32 context_id : 16, + reserved : 8, + aplic_plic_id : 8; + }; + }; + unsigned long hart_id; + u64 imsic_addr; + u32 imsic_size; +}; + +static u32 nr_rintc; +static struct rintc_data *rintc_acpi_data[NR_CPUS]; + +#define for_each_matching_plic(_plic_id) \ + unsigned int _plic; \ + \ + for (_plic = 0; _plic < nr_rintc; _plic++) \ + if (rintc_acpi_data[_plic]->aplic_plic_id != _plic_id) \ + continue; \ + else + +unsigned int acpi_get_plic_nr_contexts(unsigned int plic_id) +{ + unsigned int nctx = 0; + + for_each_matching_plic(plic_id) + nctx++; + + return nctx; +} + +static struct rintc_data *get_plic_context(unsigned int plic_id, unsigned int ctxt_idx) +{ + unsigned int ctxt = 0; + + for_each_matching_plic(plic_id) { + if (ctxt == ctxt_idx) + return rintc_acpi_data[_plic]; + + ctxt++; + } + + return NULL; +} + +unsigned long acpi_get_ext_intc_parent_hartid(unsigned int plic_id, unsigned int ctxt_idx) +{ + struct rintc_data *data = get_plic_context(plic_id, ctxt_idx); + + return data ? data->hart_id : INVALID_HARTID; +} + +unsigned int acpi_get_plic_context(unsigned int plic_id, unsigned int ctxt_idx) +{ + struct rintc_data *data = get_plic_context(plic_id, ctxt_idx); + + return data ? data->context_id : INVALID_CONTEXT; +} + +unsigned long acpi_get_intc_index_hartid(u32 index) +{ + return index >= nr_rintc ? INVALID_HARTID : rintc_acpi_data[index]->hart_id; +} + +int acpi_get_imsic_mmio_info(u32 index, struct resource *res) +{ + if (index >= nr_rintc) + return -1; + + res->start = rintc_acpi_data[index]->imsic_addr; + res->end = res->start + rintc_acpi_data[index]->imsic_size - 1; + res->flags = IORESOURCE_MEM; + return 0; +} + static int __init riscv_intc_acpi_init(union acpi_subtable_headers *header, const unsigned long end) { @@ -258,6 +337,15 @@ static int __init riscv_intc_acpi_init(union acpi_subtable_headers *header, int rc; rintc = (struct acpi_madt_rintc *)header; + rintc_acpi_data[nr_rintc] = kzalloc(sizeof(*rintc_acpi_data[0]), GFP_KERNEL); + if (!rintc_acpi_data[nr_rintc]) + return -ENOMEM; + + rintc_acpi_data[nr_rintc]->ext_intc_id = rintc->ext_intc_id; + rintc_acpi_data[nr_rintc]->hart_id = rintc->hart_id; + rintc_acpi_data[nr_rintc]->imsic_addr = rintc->imsic_addr; + rintc_acpi_data[nr_rintc]->imsic_size = rintc->imsic_size; + nr_rintc++; /* * The ACPI MADT will have one INTC for each CPU (or HART) @@ -277,6 +365,8 @@ static int __init riscv_intc_acpi_init(union acpi_subtable_headers *header, rc = riscv_intc_init_common(fn, &riscv_intc_chip); if (rc) irq_domain_free_fwnode(fn); + else + acpi_set_irq_model(ACPI_IRQ_MODEL_RINTC, riscv_acpi_get_gsi_domain_id); return rc; } From patchwork Sat Jun 1 15:04:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682502 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4680CC25B76 for ; Sat, 1 Jun 2024 15:06:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=D0SrgCWjOYxh1kudrw/KfLlywkoEeCzh6QrrrElGr64=; b=CiyNtRe5NVP/OZ 5mg3ZG2asQF60W3E1kkNTEXsJ6DEyUQiz9R+t2wrlAS+6z6KwwAt6OlSHl6mpGAcY3SoVonlBQ2ni j4+8YXUT/TniRXJWfQrntbYcn+MU9Edr/nR8koP0+7BXQSrgNQXGVLORD/kQFpXi1Hrpq0lW5W7N5 buir8awMHQAtDGNyy8qIIrbqEJ/adc9KwYJTwHVGXzsECSM9fm+ENirgcKpnF3ypJW7OY+TSz8iM8 dVyI5jhKN8eBMdjH3yzTiTW3gU+QK1iE+7UJrXliNIqi8xncpxDlxOOt1e0x622XnEEFJMsL5YfF3 t9zmwISwbiFxCpoqYX3Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQJn-0000000CqOg-18fF; Sat, 01 Jun 2024 15:06:51 +0000 Received: from mail-pf1-x42f.google.com ([2607:f8b0:4864:20::42f]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQJ0-0000000CpgL-07lD for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:06:25 +0000 Received: by mail-pf1-x42f.google.com with SMTP id d2e1a72fcca58-7024494f7daso1614791b3a.3 for ; Sat, 01 Jun 2024 08:06:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254360; x=1717859160; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=3PWsEZjmDFCls294wVt5rkIwO83PA99zSOvcBamPy6U=; b=Lo0AWaW8/Z2YIqyfoX1wGiC49tEtVeWB3KB9DtU/cEOQ9SA/T7iFdAwJW6luBO0VvA TG4e/cvkpHX3BVi9e/y2jr9DNQ1vSlKZQd7lG82MZ6AFikqb7TP6Z2w5FyGWsLQJANfG t3Oy/3/OKldIS1rBadbdaXUMT8Rb1+kqcb9BvneWVesVTpQRYi9XvaBTpgfwJZq/jyUI pwuSvib3UMuTvSo0hOTNLNCrZ0unouz4PgLcWNMGbB+KCJHSbaPcSYdWe340uUHBfmII 3ZBi730FPkj/ZT4Ps4SRpjaRXthz0fMJwPTz03PJMcbV9gytGNmPnHR3osr2oqjKvDDw EWaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254360; x=1717859160; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3PWsEZjmDFCls294wVt5rkIwO83PA99zSOvcBamPy6U=; b=pxW7h8kcT9ww4Oft6NHCRiy0mSo8gB7m0MT0B6b8u0tF7SRKoG2HLD/NI8/HyGc5MB JyTMgqLBIaJfmYQuTtTKDib+QD9aVaes/gscPdBER86mNMv1LAq+spc2hwU20UHfbdMi NL2ua+ArDm+7zB7moYeCwvwt9lvhJqIwnWoqvHWasDAEIKRf/epW9a6mAaxew9JgIVEV aArDRJ3ZTg8VNAit0Z9nsuBXRCb5uzutCpPqq60Lftnc4/smQCGsSyFwy9PM5Ix+Hm/V 4KYGOshADfH0HA4nsT6OOqs4OBkoWnWfq9SqRu2t3jHWs7NiBhWL84ljD0i/NZeFFy4T voXQ== X-Forwarded-Encrypted: i=1; AJvYcCUfKZl6qX4c//Sdkp4hQPgN1D1OkO4dmEtWpJIgGI5XS3BX/pF5wnDOvYCs50GHSOfrtpqA2rp0jzQYj7BTtdsl8W6wEn/kcXzpcrtrqst0 X-Gm-Message-State: AOJu0Yzj1A0nkwAfHEK79VA4zgC3NFRQ+Nf1Okl+zQHKZa8cEmrTjFJk 8lai1b7/qDcG0y4eOVD5cyxNQPSEmeU9FARfN0oz4VUz4HajJl2WKbrHf6iq1d8= X-Google-Smtp-Source: AGHT+IFCMwJXYdknheI4VS/aPP1tbqbAGPqO3DadWwdo/Evl6cETwOaxePiXpISSwiqztkqdIn5wYA== X-Received: by 2002:a05:6a20:a115:b0:1b1:e7de:4d36 with SMTP id adf61e73a8af0-1b26f0f1b28mr5381872637.2.1717254360532; Sat, 01 Jun 2024 08:06:00 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.05.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:06:00 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 14/17] irqchip/riscv-imsic-state: Create separate function for DT Date: Sat, 1 Jun 2024 20:34:08 +0530 Message-Id: <20240601150411.1929783-15-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_080602_724237_D3424E2C X-CRM114-Status: GOOD ( 15.52 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org While populating IMSIC global structure, many fields are initialized using DT properties. Make the code which uses DT properties as separate function so that it is easier to add ACPI support later. No functionality added/changed. Suggested-by: Thomas Gleixner Signed-off-by: Sunil V L --- drivers/irqchip/irq-riscv-imsic-state.c | 97 ++++++++++++++----------- 1 file changed, 55 insertions(+), 42 deletions(-) diff --git a/drivers/irqchip/irq-riscv-imsic-state.c b/drivers/irqchip/irq-riscv-imsic-state.c index 5479f872e62b..f9e70832863a 100644 --- a/drivers/irqchip/irq-riscv-imsic-state.c +++ b/drivers/irqchip/irq-riscv-imsic-state.c @@ -510,6 +510,60 @@ static int __init imsic_matrix_init(void) return 0; } +static int __init imsic_populate_global_dt(struct fwnode_handle *fwnode, + struct imsic_global_config *global, + u32 *nr_parent_irqs) +{ + int rc; + + /* Find number of guest index bits in MSI address */ + rc = of_property_read_u32(to_of_node(fwnode), "riscv,guest-index-bits", + &global->guest_index_bits); + if (rc) + global->guest_index_bits = 0; + + /* Find number of HART index bits */ + rc = of_property_read_u32(to_of_node(fwnode), "riscv,hart-index-bits", + &global->hart_index_bits); + if (rc) { + /* Assume default value */ + global->hart_index_bits = __fls(*nr_parent_irqs); + if (BIT(global->hart_index_bits) < *nr_parent_irqs) + global->hart_index_bits++; + } + + /* Find number of group index bits */ + rc = of_property_read_u32(to_of_node(fwnode), "riscv,group-index-bits", + &global->group_index_bits); + if (rc) + global->group_index_bits = 0; + + /* + * Find first bit position of group index. + * If not specified assumed the default APLIC-IMSIC configuration. + */ + rc = of_property_read_u32(to_of_node(fwnode), "riscv,group-index-shift", + &global->group_index_shift); + if (rc) + global->group_index_shift = IMSIC_MMIO_PAGE_SHIFT * 2; + + /* Find number of interrupt identities */ + rc = of_property_read_u32(to_of_node(fwnode), "riscv,num-ids", + &global->nr_ids); + if (rc) { + pr_err("%pfwP: number of interrupt identities not found\n", fwnode); + return rc; + } + + /* Find number of guest interrupt identities */ + rc = of_property_read_u32(to_of_node(fwnode), "riscv,num-guest-ids", + &global->nr_guest_ids); + if (rc) + global->nr_guest_ids = global->nr_ids; + + return 0; +} + static int __init imsic_get_parent_hartid(struct fwnode_handle *fwnode, u32 index, unsigned long *hartid) { @@ -578,50 +632,9 @@ static int __init imsic_parse_fwnode(struct fwnode_handle *fwnode, return -EINVAL; } - /* Find number of guest index bits in MSI address */ - rc = of_property_read_u32(to_of_node(fwnode), "riscv,guest-index-bits", - &global->guest_index_bits); + rc = imsic_populate_global_dt(fwnode, global, nr_parent_irqs); if (rc) - global->guest_index_bits = 0; - - /* Find number of HART index bits */ - rc = of_property_read_u32(to_of_node(fwnode), "riscv,hart-index-bits", - &global->hart_index_bits); - if (rc) { - /* Assume default value */ - global->hart_index_bits = __fls(*nr_parent_irqs); - if (BIT(global->hart_index_bits) < *nr_parent_irqs) - global->hart_index_bits++; - } - - /* Find number of group index bits */ - rc = of_property_read_u32(to_of_node(fwnode), "riscv,group-index-bits", - &global->group_index_bits); - if (rc) - global->group_index_bits = 0; - - /* - * Find first bit position of group index. - * If not specified assumed the default APLIC-IMSIC configuration. - */ - rc = of_property_read_u32(to_of_node(fwnode), "riscv,group-index-shift", - &global->group_index_shift); - if (rc) - global->group_index_shift = IMSIC_MMIO_PAGE_SHIFT * 2; - - /* Find number of interrupt identities */ - rc = of_property_read_u32(to_of_node(fwnode), "riscv,num-ids", - &global->nr_ids); - if (rc) { - pr_err("%pfwP: number of interrupt identities not found\n", fwnode); return rc; - } - - /* Find number of guest interrupt identities */ - rc = of_property_read_u32(to_of_node(fwnode), "riscv,num-guest-ids", - &global->nr_guest_ids); - if (rc) - global->nr_guest_ids = global->nr_ids; /* Sanity check guest index bits */ i = BITS_PER_LONG - IMSIC_MMIO_PAGE_SHIFT; From patchwork Sat Jun 1 15:04:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682508 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9F135C25B7E for ; Sat, 1 Jun 2024 15:07:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ajWKWTzAVjqb1AHrQBrAkZJaYkioIkKMFWLrr35yt7M=; b=Zd9zM0GSSTcRPp sHAkt+HJ4DJ42WphJz1Eg6hKJzFo61aesOTmDruh7cB4UtJ07KpNvTB9OKa1g2At/YSvdUfeipTWD 0M34KkGhkL+NXruy/H1laB9Y8biMabJ3nnoJuVNqGhBm1OeBQykxERMu3+BqiqqfavfxYxugXAKJQ u6McLMGSEQ6qinlEa6Xk1jL4OaGsQd3457f62f5G/GuDDFTT5a4wOUkirhzM+aXE6YKGPoJw66Vdy ul9OBp687c5Sky7vcnnoNCBbMmBTtDBfEKW+p8DjSN0vJqvSiUNaK8J4aLyxXvvfjI9X8xvz4hzBh 5jreTuy3yw8koJNIYzvw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQKH-0000000CqpA-0aC8; Sat, 01 Jun 2024 15:07:21 +0000 Received: from mail-pf1-x433.google.com ([2607:f8b0:4864:20::433]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQJ8-0000000CpnK-1er5 for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:06:40 +0000 Received: by mail-pf1-x433.google.com with SMTP id d2e1a72fcca58-702548b056aso619335b3a.1 for ; Sat, 01 Jun 2024 08:06:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254368; x=1717859168; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bieOckQA/OdAZamZYetSX8Y5sqY4/SqoIaxENg7tXYU=; b=hUsZBUUbHFiNn+aZkQT+XZPH0CFb3K5ZjwawrlsobDgAmb8Vv77WW5wG/kC2fFWLnB 1kzZUeRotTFiyXDwTgybYx1QkcXEB0L1XixMw/B2FmZiv8Uhs2GgwYjx1RvRTyBldvhF KtSpCOPGI2kTQ76VF+bpwz9MomGvt9pbqf8HegAVpd4FmAaF+pybni0n5JY/6Ov7RIjp w4oZPU+9FHqPMO9bwwBPGcA0DmfmZdM0mz4NwMuOSmk7xstQtV2W4msXf3o/Kjrjk18H SjlRPeG32MiYhVRM7c5a8HNAhbwpMW5TWvMJYIyUNAuQlmD1iQZpRX0/WMeZa1wODSUT 2Ccw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254368; x=1717859168; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bieOckQA/OdAZamZYetSX8Y5sqY4/SqoIaxENg7tXYU=; b=NDARxb/VPYy4FLUhSvFQsMjfg7wXpHRKlFRAX7gonzQ4bJWv0CAO3fSw8sL4/Mdk7K cvgA+pVp7BNpnvyiAwtH52ekOwLSOzzYkFK934Oe+waRf5+AdKCftrKAArxLSYMa990X Xhddptci/dWdX5xc64WjAY/OFA7+6ssMm3rDocslccHofvOClZ4bqgHX/fzJvzgEmR7z OriKwJFgNpTPMfdNnrelUEsBGyYiDohYa83dqJyYCnuVbJuCKZeNHvWHUCJBtP0kKADH x9JWUhGzsddz6z+IjE8GugXsJYrKVAXR5/kUwstjLOVFWCO/10oYwVOJvSwSLHfqAwLj KJaQ== X-Forwarded-Encrypted: i=1; AJvYcCUOyAapc0o1Za/HI/kKwAmMqBDkDsEvWYhiFj0KDU62/y1+L8zORuKZMAY6DEEQHb8SM0+loC7acxHz1qg7Gytb5UGqdgp02Vb+Rk9XebCh X-Gm-Message-State: AOJu0Yyk+klaCpRj6/YjYqtoQ4IIQiaAGoodb0/bPNuRMCfBM/CXnVWQ XXXN7fVD89jzwpd15qw5L0nlIXbqekrbyWyN+v6WEWise9+wug5yZ0eK5xmsDMc= X-Google-Smtp-Source: AGHT+IGpQemm+8CE4X9z9ez/Hldkhjrfn9X2HmSTqIXMuf45inJMRNs9j84XQDLO/okfZoTL3FB5+w== X-Received: by 2002:a05:6a20:9188:b0:1b0:14a0:c873 with SMTP id adf61e73a8af0-1b26f185930mr5757294637.35.1717254368009; Sat, 01 Jun 2024 08:06:08 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.06.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:06:06 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 15/17] irqchip/riscv-imsic: Add ACPI support Date: Sat, 1 Jun 2024 20:34:09 +0530 Message-Id: <20240601150411.1929783-16-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_080611_329149_10601605 X-CRM114-Status: GOOD ( 25.42 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org RISC-V IMSIC interrupt controller provides IPI and MSI support. Currently, DT based drivers setup the IPI feature early during boot but defer setting up the MSI functionality. However, in ACPI systems, PCI subsystem is probed early and assume MSI controller is already setup. Hence, both IPI and MSI features need to be initialized early itself. Signed-off-by: Sunil V L --- drivers/irqchip/irq-riscv-imsic-early.c | 64 +++++++++++++++++++++- drivers/irqchip/irq-riscv-imsic-platform.c | 32 +++++++++-- drivers/irqchip/irq-riscv-imsic-state.c | 57 +++++++++++-------- drivers/irqchip/irq-riscv-imsic-state.h | 2 +- include/linux/irqchip/riscv-imsic.h | 9 +++ 5 files changed, 134 insertions(+), 30 deletions(-) diff --git a/drivers/irqchip/irq-riscv-imsic-early.c b/drivers/irqchip/irq-riscv-imsic-early.c index 4fbb37074d29..c5c2e6929a2f 100644 --- a/drivers/irqchip/irq-riscv-imsic-early.c +++ b/drivers/irqchip/irq-riscv-imsic-early.c @@ -5,13 +5,16 @@ */ #define pr_fmt(fmt) "riscv-imsic: " fmt +#include #include #include #include #include #include #include +#include #include +#include #include #include @@ -182,7 +185,7 @@ static int __init imsic_early_dt_init(struct device_node *node, struct device_no int rc; /* Setup IMSIC state */ - rc = imsic_setup_state(fwnode); + rc = imsic_setup_state(fwnode, NULL); if (rc) { pr_err("%pfwP: failed to setup state (error %d)\n", fwnode, rc); return rc; @@ -199,3 +202,62 @@ static int __init imsic_early_dt_init(struct device_node *node, struct device_no } IRQCHIP_DECLARE(riscv_imsic, "riscv,imsics", imsic_early_dt_init); + +#ifdef CONFIG_ACPI + +static struct fwnode_handle *imsic_acpi_fwnode; + +struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev) +{ + return imsic_acpi_fwnode; +} + +static int __init imsic_early_acpi_init(union acpi_subtable_headers *header, + const unsigned long end) +{ + struct acpi_madt_imsic *imsic = (struct acpi_madt_imsic *)header; + int rc; + + imsic_acpi_fwnode = irq_domain_alloc_named_fwnode("imsic"); + if (!imsic_acpi_fwnode) { + pr_err("unable to allocate IMSIC FW node\n"); + return -ENOMEM; + } + + /* Setup IMSIC state */ + rc = imsic_setup_state(imsic_acpi_fwnode, imsic); + if (rc) { + pr_err("%pfwP: failed to setup state (error %d)\n", imsic_acpi_fwnode, rc); + return rc; + } + + /* Do early setup of IMSIC state and IPIs */ + rc = imsic_early_probe(imsic_acpi_fwnode); + if (rc) { + irq_domain_free_fwnode(imsic_acpi_fwnode); + imsic_acpi_fwnode = NULL; + return rc; + } + + rc = imsic_platform_acpi_probe(imsic_acpi_fwnode); + +#ifdef CONFIG_PCI + if (!rc) + pci_msi_register_fwnode_provider(&imsic_acpi_get_fwnode); +#endif + + if (rc) + pr_err("%pfwP: failed to register IMSIC for MSI functionality (error %d)\n", + imsic_acpi_fwnode, rc); + + /* + * Even if imsic_platform_acpi_probe() fails, the IPI part of IMSIC can + * continue to work. So, no need to return failure. This is similar to + * DT where IPI works but MSI probe fails for some reason. + */ + return 0; +} + +IRQCHIP_ACPI_DECLARE(riscv_imsic, ACPI_MADT_TYPE_IMSIC, NULL, + 1, imsic_early_acpi_init); +#endif diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/irq-riscv-imsic-platform.c index 11723a763c10..64905e6f52d7 100644 --- a/drivers/irqchip/irq-riscv-imsic-platform.c +++ b/drivers/irqchip/irq-riscv-imsic-platform.c @@ -5,6 +5,7 @@ */ #define pr_fmt(fmt) "riscv-imsic: " fmt +#include #include #include #include @@ -348,18 +349,37 @@ int imsic_irqdomain_init(void) return 0; } -static int imsic_platform_probe(struct platform_device *pdev) +static int imsic_platform_probe_common(struct fwnode_handle *fwnode) { - struct device *dev = &pdev->dev; - - if (imsic && imsic->fwnode != dev->fwnode) { - dev_err(dev, "fwnode mismatch\n"); + if (imsic && imsic->fwnode != fwnode) { + pr_err("%pfwP: fwnode mismatch\n", fwnode); return -ENODEV; } return imsic_irqdomain_init(); } +static int imsic_platform_dt_probe(struct platform_device *pdev) +{ + return imsic_platform_probe_common(pdev->dev.fwnode); +} + +#ifdef CONFIG_ACPI + +/* + * On ACPI based systems, PCI enumeration happens early during boot in + * acpi_scan_init(). PCI enumeration expects MSI domain setup before + * it calls pci_set_msi_domain(). Hence, unlike in DT where + * imsic-platform drive probe happens late during boot, ACPI based + * systems need to setup the MSI domain early. + */ +int imsic_platform_acpi_probe(struct fwnode_handle *fwnode) +{ + return imsic_platform_probe_common(fwnode); +} + +#endif + static const struct of_device_id imsic_platform_match[] = { { .compatible = "riscv,imsics" }, {} @@ -370,6 +390,6 @@ static struct platform_driver imsic_platform_driver = { .name = "riscv-imsic", .of_match_table = imsic_platform_match, }, - .probe = imsic_platform_probe, + .probe = imsic_platform_dt_probe, }; builtin_platform_driver(imsic_platform_driver); diff --git a/drivers/irqchip/irq-riscv-imsic-state.c b/drivers/irqchip/irq-riscv-imsic-state.c index f9e70832863a..73faa64bffda 100644 --- a/drivers/irqchip/irq-riscv-imsic-state.c +++ b/drivers/irqchip/irq-riscv-imsic-state.c @@ -5,6 +5,7 @@ */ #define pr_fmt(fmt) "riscv-imsic: " fmt +#include #include #include #include @@ -564,18 +565,36 @@ static int __init imsic_populate_global_dt(struct fwnode_handle *fwnode, return 0; } +static int __init imsic_populate_global_acpi(struct fwnode_handle *fwnode, + struct imsic_global_config *global, + u32 *nr_parent_irqs, void *opaque) +{ + struct acpi_madt_imsic *imsic = (struct acpi_madt_imsic *)opaque; + + global->guest_index_bits = imsic->guest_index_bits; + global->hart_index_bits = imsic->hart_index_bits; + global->group_index_bits = imsic->group_index_bits; + global->group_index_shift = imsic->group_index_shift; + global->nr_ids = imsic->num_ids; + global->nr_guest_ids = imsic->num_guest_ids; + return 0; +} + static int __init imsic_get_parent_hartid(struct fwnode_handle *fwnode, u32 index, unsigned long *hartid) { struct of_phandle_args parent; int rc; - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ - if (!is_of_node(fwnode)) - return -EINVAL; + if (!is_of_node(fwnode)) { + if (hartid) + *hartid = acpi_get_intc_index_hartid(index); + + if (!hartid || (*hartid == INVALID_HARTID)) + return -EINVAL; + + return 0; + } rc = of_irq_parse_one(to_of_node(fwnode), index, &parent); if (rc) @@ -594,12 +613,8 @@ static int __init imsic_get_parent_hartid(struct fwnode_handle *fwnode, static int __init imsic_get_mmio_resource(struct fwnode_handle *fwnode, u32 index, struct resource *res) { - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ if (!is_of_node(fwnode)) - return -EINVAL; + return acpi_get_imsic_mmio_info(index, res); return of_address_to_resource(to_of_node(fwnode), index, res); } @@ -607,20 +622,14 @@ static int __init imsic_get_mmio_resource(struct fwnode_handle *fwnode, static int __init imsic_parse_fwnode(struct fwnode_handle *fwnode, struct imsic_global_config *global, u32 *nr_parent_irqs, - u32 *nr_mmios) + u32 *nr_mmios, + void *opaque) { unsigned long hartid; struct resource res; int rc; u32 i; - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ - if (!is_of_node(fwnode)) - return -EINVAL; - *nr_parent_irqs = 0; *nr_mmios = 0; @@ -632,7 +641,11 @@ static int __init imsic_parse_fwnode(struct fwnode_handle *fwnode, return -EINVAL; } - rc = imsic_populate_global_dt(fwnode, global, nr_parent_irqs); + if (is_of_node(fwnode)) + rc = imsic_populate_global_dt(fwnode, global, nr_parent_irqs); + else + rc = imsic_populate_global_acpi(fwnode, global, nr_parent_irqs, opaque); + if (rc) return rc; @@ -701,7 +714,7 @@ static int __init imsic_parse_fwnode(struct fwnode_handle *fwnode, return 0; } -int __init imsic_setup_state(struct fwnode_handle *fwnode) +int __init imsic_setup_state(struct fwnode_handle *fwnode, void *opaque) { u32 i, j, index, nr_parent_irqs, nr_mmios, nr_handlers = 0; struct imsic_global_config *global; @@ -742,7 +755,7 @@ int __init imsic_setup_state(struct fwnode_handle *fwnode) } /* Parse IMSIC fwnode */ - rc = imsic_parse_fwnode(fwnode, global, &nr_parent_irqs, &nr_mmios); + rc = imsic_parse_fwnode(fwnode, global, &nr_parent_irqs, &nr_mmios, opaque); if (rc) goto out_free_local; diff --git a/drivers/irqchip/irq-riscv-imsic-state.h b/drivers/irqchip/irq-riscv-imsic-state.h index 5ae2f69b035b..391e44280827 100644 --- a/drivers/irqchip/irq-riscv-imsic-state.h +++ b/drivers/irqchip/irq-riscv-imsic-state.h @@ -102,7 +102,7 @@ void imsic_vector_debug_show_summary(struct seq_file *m, int ind); void imsic_state_online(void); void imsic_state_offline(void); -int imsic_setup_state(struct fwnode_handle *fwnode); +int imsic_setup_state(struct fwnode_handle *fwnode, void *opaque); int imsic_irqdomain_init(void); #endif diff --git a/include/linux/irqchip/riscv-imsic.h b/include/linux/irqchip/riscv-imsic.h index faf0b800b1b0..7494952c5518 100644 --- a/include/linux/irqchip/riscv-imsic.h +++ b/include/linux/irqchip/riscv-imsic.h @@ -8,6 +8,8 @@ #include #include +#include +#include #include #define IMSIC_MMIO_PAGE_SHIFT 12 @@ -84,4 +86,11 @@ static inline const struct imsic_global_config *imsic_get_global_config(void) #endif +#ifdef CONFIG_ACPI +int imsic_platform_acpi_probe(struct fwnode_handle *fwnode); +struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev); +#else +static inline struct fwnode_handle *imsic_acpi_get_fwnode(struct device *dev) { return NULL; } +#endif + #endif From patchwork Sat Jun 1 15:04:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682501 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 76D69C25B7E for ; Sat, 1 Jun 2024 15:06:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=RPkox104ukAhZmO40aBVesey4Qgr2QwWK+1SckmYCXY=; b=O6D/y09dlkEREh d1VuMbE1Q843wRZLCU+qlSVl40aCl/IRac6z3yM3JQyMVW6Pa5eAG28zUNwqyAWxrkMnbYjdndgkK Xbwif9POovNtfOVpCALA7mNjia5TBe1e+zaT8p2Xq5C4xkeBnE7IYR3LPW0R+XfkUDeOkEvis3mm1 1EvOPe5VnrTMR8NMsSeO2Z8mGKofxxF16gJtEmkvqaHPbkk292031TPSWbuVojuWooTfWRL3wOW64 o8tyu2uJCu4oZ7qC36TE34wbBGsYk3CRKXjdOgkaEzzpLmpMmwDO9CDBPQWs5bVfO5D0i9WOxQkMa 7iDG5ZZeFnFfrMAPC4jQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQJj-0000000CqM7-2qEN; Sat, 01 Jun 2024 15:06:47 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQJM-0000000Cq03-0T9U for linux-riscv@bombadil.infradead.org; Sat, 01 Jun 2024 15:06:24 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description; bh=DRgQ4J8YfksV/Gcn1aZkdoBTGJR4bgqwnPhHrgwgqwc=; b=A6PIAsaNkXKAWmkKMqNbx/LpcD nmYxoxs/pBKAolXXcuhfIvBtbfmPG8bHbF9DTS/+gzATIyQB43LsNjnVWwdFxppcNSiY8C7Ox6Ga6 IPxxhUopPhwg9umRtoc42c72r1ZdoZN5lqDkXFjxeP3uIqhn16e/lwqnqlOxTN7FIed7MmYnbmrnX E15ZL+dDZRj1mTpArzfzw9GTFcWVbpwZxEvn2csB3H7rw/rfyRFZzXBoQA2mxtvGH3NfYU262yKZe k925FdOWoIswl0tNvdsDqk4I5Z1kVVLhDSWcMtGVoWCxkI1xIf8SQ75V4kGqFMIqOPwS0Fg7wc2p7 Z+5ibCQw==; Received: from mail-pf1-x433.google.com ([2607:f8b0:4864:20::433]) by desiato.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQJG-0000000F3bY-20LF for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:06:21 +0000 Received: by mail-pf1-x433.google.com with SMTP id d2e1a72fcca58-701ae8698d8so2390874b3a.0 for ; Sat, 01 Jun 2024 08:06:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254375; x=1717859175; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DRgQ4J8YfksV/Gcn1aZkdoBTGJR4bgqwnPhHrgwgqwc=; b=R3CqmyJMbszpb5cebXpqAGDosZr8W4W7Cf3HO4FqrSFL9miw77LhSRwwa+p8Ud3YCE M1GVi2+VXBiO7egpkA320fovndxLNhoLsjTh9m4Fu81EsHkWi2Pag95QBZnTossJiYtw t0GcsYfEHo73XToI0AX1PComo9t2Ie46PvoM6GyyyaqIzFWGJfrHfCqXnX1TRa23XwMt 0x3zATH60TpLdyPB8uW5TZx8VbQpeLouPDb+W4n//a1fL7oyReAz7BIeIFSLuTMdn2++ 3eTGv7vyd420kCuNAk4fJx57gEDnOYklogh4Cg3aO8G5zLUOFA3SFcu+2dCuXYk8FFsZ v1zw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254375; x=1717859175; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DRgQ4J8YfksV/Gcn1aZkdoBTGJR4bgqwnPhHrgwgqwc=; b=XAV98KOqc1VUdPxsc7irbX8dQt1Pq4Ob3fDlUDN8iPHRBiZbEqi7zuVdMzivnkmZgl CjvYat69RdtK5b40kzdEYuXLVhQuIEfJ64s90WQAyESd6UF+Frh1ltoYXnjra4VrxbJ+ DQyw575xi9H0jyzoUkytmqHNrT1l+lw/CC3kUgCeowBT6I+tYGl2mp/UfFKvuAO8ZO0D bo05ZcL3o5hYnWqeYzSHGR3Ae4SZfPCCeeveEZkXSUt0NExqI0HatIZ2oqJGvuI4ZUlI WX1ctz2M1H1S5qXXqUmoP531MrxpAmL8317mM2z/a62Ghq381HA1LxBZ5/iyIHaXqIl8 GmWg== X-Forwarded-Encrypted: i=1; AJvYcCU1yb7/MLzKcfscJ5s3T4X9nhwgGzszF4DnKvvMFmwj3TtnIIJt3+fsi6mENJ9ZQSxWdFeaNZ7lTOTmLUt/cAxon2rv5JVgqRX6ELeQRzbx X-Gm-Message-State: AOJu0Yx3b1aI2ap/pLASeYXdXkShA5FGiEiP2u45nms5jJxPtgYZeXFj 80zYAYxd6oeb/kS4Nncu4/EA4QvMq1Op9h2TuBfYjNuaysXhnbIavZ1vWl/P5qs= X-Google-Smtp-Source: AGHT+IFU6JKmResfgB0jJdbEODfj1EWOkBHlEYzPPEI1h1vZvVKa5zFXkvWGxZojFLKJau0PKL7BKw== X-Received: by 2002:a05:6a21:32a0:b0:1a7:94ea:a9b4 with SMTP id adf61e73a8af0-1b26f1855f2mr5494518637.32.1717254375001; Sat, 01 Jun 2024 08:06:15 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.06.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:06:14 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 16/17] irqchip/riscv-aplic: Add ACPI support Date: Sat, 1 Jun 2024 20:34:10 +0530 Message-Id: <20240601150411.1929783-17-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_160619_519575_B2A9425C X-CRM114-Status: GOOD ( 25.90 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add ACPI support in APLIC drivers. Use the mapping created early during boot to get the details about the APLIC. Signed-off-by: Sunil V L --- drivers/irqchip/irq-riscv-aplic-direct.c | 22 +++++--- drivers/irqchip/irq-riscv-aplic-main.c | 68 ++++++++++++++++-------- drivers/irqchip/irq-riscv-aplic-main.h | 1 + drivers/irqchip/irq-riscv-aplic-msi.c | 9 +++- 4 files changed, 68 insertions(+), 32 deletions(-) diff --git a/drivers/irqchip/irq-riscv-aplic-direct.c b/drivers/irqchip/irq-riscv-aplic-direct.c index 4a3ffe856d6c..34540a0ca4da 100644 --- a/drivers/irqchip/irq-riscv-aplic-direct.c +++ b/drivers/irqchip/irq-riscv-aplic-direct.c @@ -4,6 +4,7 @@ * Copyright (C) 2022 Ventana Micro Systems Inc. */ +#include #include #include #include @@ -189,17 +190,22 @@ static int aplic_direct_starting_cpu(unsigned int cpu) } static int aplic_direct_parse_parent_hwirq(struct device *dev, u32 index, - u32 *parent_hwirq, unsigned long *parent_hartid) + u32 *parent_hwirq, unsigned long *parent_hartid, + struct aplic_priv *priv) { struct of_phandle_args parent; + unsigned long hartid; int rc; - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ - if (!is_of_node(dev->fwnode)) - return -EINVAL; + if (!is_of_node(dev->fwnode)) { + hartid = acpi_get_ext_intc_parent_hartid(priv->id, index); + if (hartid == INVALID_HARTID) + return -ENODEV; + + *parent_hartid = hartid; + *parent_hwirq = RV_IRQ_EXT; + return 0; + } rc = of_irq_parse_one(to_of_node(dev->fwnode), index, &parent); if (rc) @@ -237,7 +243,7 @@ int aplic_direct_setup(struct device *dev, void __iomem *regs) /* Setup per-CPU IDC and target CPU mask */ current_cpu = get_cpu(); for (i = 0; i < priv->nr_idcs; i++) { - rc = aplic_direct_parse_parent_hwirq(dev, i, &hwirq, &hartid); + rc = aplic_direct_parse_parent_hwirq(dev, i, &hwirq, &hartid, priv); if (rc) { dev_warn(dev, "parent irq for IDC%d not found\n", i); continue; diff --git a/drivers/irqchip/irq-riscv-aplic-main.c b/drivers/irqchip/irq-riscv-aplic-main.c index 774a0c97fdab..c1fd328ddf7d 100644 --- a/drivers/irqchip/irq-riscv-aplic-main.c +++ b/drivers/irqchip/irq-riscv-aplic-main.c @@ -4,8 +4,10 @@ * Copyright (C) 2022 Ventana Micro Systems Inc. */ +#include #include #include +#include #include #include #include @@ -125,39 +127,50 @@ static void aplic_init_hw_irqs(struct aplic_priv *priv) writel(0, priv->regs + APLIC_DOMAINCFG); } +#ifdef CONFIG_ACPI +static const struct acpi_device_id aplic_acpi_match[] = { + { "RSCV0002", 0 }, + {} +}; +MODULE_DEVICE_TABLE(acpi, aplic_acpi_match); + +#endif + int aplic_setup_priv(struct aplic_priv *priv, struct device *dev, void __iomem *regs) { struct of_phandle_args parent; int rc; - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ - if (!is_of_node(dev->fwnode)) - return -EINVAL; - /* Save device pointer and register base */ priv->dev = dev; priv->regs = regs; - /* Find out number of interrupt sources */ - rc = of_property_read_u32(to_of_node(dev->fwnode), "riscv,num-sources", - &priv->nr_irqs); - if (rc) { - dev_err(dev, "failed to get number of interrupt sources\n"); - return rc; - } + if (is_of_node(dev->fwnode)) { + /* Find out number of interrupt sources */ + rc = of_property_read_u32(to_of_node(dev->fwnode), "riscv,num-sources", + &priv->nr_irqs); + if (rc) { + dev_err(dev, "failed to get number of interrupt sources\n"); + return rc; + } - /* - * Find out number of IDCs based on parent interrupts - * - * If "msi-parent" property is present then we ignore the - * APLIC IDCs which forces the APLIC driver to use MSI mode. - */ - if (!of_property_present(to_of_node(dev->fwnode), "msi-parent")) { - while (!of_irq_parse_one(to_of_node(dev->fwnode), priv->nr_idcs, &parent)) - priv->nr_idcs++; + /* + * Find out number of IDCs based on parent interrupts + * + * If "msi-parent" property is present then we ignore the + * APLIC IDCs which forces the APLIC driver to use MSI mode. + */ + if (!of_property_present(to_of_node(dev->fwnode), "msi-parent")) { + while (!of_irq_parse_one(to_of_node(dev->fwnode), priv->nr_idcs, &parent)) + priv->nr_idcs++; + } + } else { + rc = riscv_acpi_get_gsi_info(dev->fwnode, &priv->gsi_base, &priv->id, + &priv->nr_irqs, &priv->nr_idcs); + if (rc) { + dev_err(dev, "failed to find GSI mapping\n"); + return rc; + } } /* Setup initial state APLIC interrupts */ @@ -186,6 +199,9 @@ static int aplic_probe(struct platform_device *pdev) */ if (is_of_node(dev->fwnode)) msi_mode = of_property_present(to_of_node(dev->fwnode), "msi-parent"); + else + msi_mode = imsic_acpi_get_fwnode(NULL) ? 1 : 0; + if (msi_mode) rc = aplic_msi_setup(dev, regs); else @@ -193,6 +209,11 @@ static int aplic_probe(struct platform_device *pdev) if (rc) dev_err(dev, "failed to setup APLIC in %s mode\n", msi_mode ? "MSI" : "direct"); +#ifdef CONFIG_ACPI + if (!acpi_disabled) + acpi_dev_clear_dependencies(ACPI_COMPANION(dev)); +#endif + return rc; } @@ -205,6 +226,7 @@ static struct platform_driver aplic_driver = { .driver = { .name = "riscv-aplic", .of_match_table = aplic_match, + .acpi_match_table = ACPI_PTR(aplic_acpi_match), }, .probe = aplic_probe, }; diff --git a/drivers/irqchip/irq-riscv-aplic-main.h b/drivers/irqchip/irq-riscv-aplic-main.h index 4393927d8c80..9fbf45c7b4f7 100644 --- a/drivers/irqchip/irq-riscv-aplic-main.h +++ b/drivers/irqchip/irq-riscv-aplic-main.h @@ -28,6 +28,7 @@ struct aplic_priv { u32 gsi_base; u32 nr_irqs; u32 nr_idcs; + u32 id; void __iomem *regs; struct aplic_msicfg msicfg; }; diff --git a/drivers/irqchip/irq-riscv-aplic-msi.c b/drivers/irqchip/irq-riscv-aplic-msi.c index 028444af48bd..f5020241e0ed 100644 --- a/drivers/irqchip/irq-riscv-aplic-msi.c +++ b/drivers/irqchip/irq-riscv-aplic-msi.c @@ -157,6 +157,7 @@ static const struct msi_domain_template aplic_msi_template = { int aplic_msi_setup(struct device *dev, void __iomem *regs) { const struct imsic_global_config *imsic_global; + struct irq_domain *msi_domain; struct aplic_priv *priv; struct aplic_msicfg *mc; phys_addr_t pa; @@ -239,8 +240,14 @@ int aplic_msi_setup(struct device *dev, void __iomem *regs) * IMSIC and the IMSIC MSI domains are created later through * the platform driver probing so we set it explicitly here. */ - if (is_of_node(dev->fwnode)) + if (is_of_node(dev->fwnode)) { of_msi_configure(dev, to_of_node(dev->fwnode)); + } else { + msi_domain = irq_find_matching_fwnode(imsic_acpi_get_fwnode(dev), + DOMAIN_BUS_PLATFORM_MSI); + if (msi_domain) + dev_set_msi_domain(dev, msi_domain); + } } if (!msi_create_device_irq_domain(dev, MSI_DEFAULT_DOMAIN, &aplic_msi_template, From patchwork Sat Jun 1 15:04:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sunil V L X-Patchwork-Id: 13682503 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E5F54C25B7E for ; Sat, 1 Jun 2024 15:07:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=2JOXDYdUVN6rMCziP4ROYLm2lA+tk9p/jqEiRo8ZYI4=; b=yztjirE92jO4EX i3ps5ACQBicHkh/endg2eueD17zL1/psXyoaGUMR/Pq1I1Hj3v1yFvrh1SYXPrmzQpf6N3eCiKGFK gherP62JrkmDrNsrkZUB7O7ASqKeizv5ATEb8sijLP+z3Et3uzIMHFHto8RtO/nQ21QfpqduQTwRG rJvInEJ66s40VkXxPcSztV5/gRH/xOUF4kUfZdXIpB7kt9GnJmjQgK/Oz2RF8JTfZNvO1zC+zBT+e Wy7yg+8nAnGm7A2FJJElbQQbyiJDYwfGI4FeWiMCZ3hsF+xBe7t9Q9w+wj4O3zJP/hImfp1b4ZwP4 Sboc3yCtK2DZiiXOHaIA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQK2-0000000Cqc6-1HRt; Sat, 01 Jun 2024 15:07:06 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQJU-0000000Cq7l-2TaW for linux-riscv@bombadil.infradead.org; Sat, 01 Jun 2024 15:06:32 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Transfer-Encoding:MIME-Version :References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Type:Content-ID:Content-Description; bh=zW4fXjPpT42pLVv05FwYUtW5DHy0qyH2wbeyOWXak5Q=; b=K+15u6qpldrPopfeTNzo6N1OEY EYnYQyOGvdtYp6DWpYOgvBbxr1pI8KrMXOPLpR75g7sGWxK5EwpffkBh7iLp47B2pbO/Wn0alp1Gg ZfxzI12CV8WurzwNR1vKLbjljMsEsnNFgUVuP1qrrkPtoB0bZYQKcYu3zTaaFH1o4J+G49NmBi8FX 9cXyQEnb4Frk0JlTYiPMwvxvJBPvXXpSnbpIQK3BqexZWYDeB4A+/ky5jljYMGcH1gQ2sg4Rp6bFa BvUasN+O/kKTyfXp9zOJKhABl6MqOYk7gK3H8fbEbYyy62O0adUb2zshAbvU9hY+W+2RnPxYl4NdA hE7SdABg==; Received: from mail-pf1-x432.google.com ([2607:f8b0:4864:20::432]) by desiato.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sDQJQ-0000000F3dF-1fm2 for linux-riscv@lists.infradead.org; Sat, 01 Jun 2024 15:06:30 +0000 Received: by mail-pf1-x432.google.com with SMTP id d2e1a72fcca58-702555eb23bso537802b3a.1 for ; Sat, 01 Jun 2024 08:06:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1717254382; x=1717859182; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zW4fXjPpT42pLVv05FwYUtW5DHy0qyH2wbeyOWXak5Q=; b=Ps1VlsC9wfAcC/Uu8fcr3mVl+sZ19JqmhraNH28MEFV0Mj8Bwq3Z3PVzqJUP49bPLg s4FfFu0tOj7CY0FWN9xQpbMXyIeCJlccNPK6lqYlqBT3CsVPDOZnRAi1u/lN9EPmpIxX ge+JH4rfjCNIiRScDjY2wb1kUA3nB38OH7cV9dHtvtwr1kALfsudCHj3CeGQd77LMMw1 /aO4pHO6ZloW6qPPy8/H8cbITKHUSrqt6IUxqXyp2tzlvgaaLx8+5CSVQcU4vCBA2riS 9GC7MGHkVxGNCQ1pwWKT5JK3aWId8faIOrKYGeCtfyAcwcBVhFdBBjTQBoO5lKx1qrQr tjsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717254382; x=1717859182; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zW4fXjPpT42pLVv05FwYUtW5DHy0qyH2wbeyOWXak5Q=; b=K+YJ8/KKpU/+C17J5/yRIqaqfCG6h4Guw0w0NrOJSzC0+6O1g8YgGT7MjQweX22MEw 8lU/oo+s/CqVVS6k1BYL8cfMTQyIxAmWXxkMBsCU4Lz0ltMxvSyxdlexN5YgzEg2a1ce EiXR1OkpeRdBCke94dn+pRibzwUXoWsbAMqKjcGAemLQf/1TeI/LvOPXhME+Ep2O6GZZ KFN7dkh3jAe5+7zo+JQMs6F4P0V9fo/huxryKy8O4G5lzLvfzbZlIQDZnGJ2YGspkdPM za+VJj/sKHP49zp+e6+waMpqy6s97L90P4oj6ThBSmSeD95BOSqx1/na3Tu2SVqYB5HY GD9Q== X-Forwarded-Encrypted: i=1; AJvYcCUdXsV8ENzXz/gvuOG9kPHNstuT53ZOzc8F88QovQK8Nt/mvenwjjUXfFjaVOeAxcVjAIqq4qC0+FF05F9ueT6yHGXN3Z77BRSlk4YuI0pw X-Gm-Message-State: AOJu0YxLtFjPveZsh+pQykiU4LkE/V8NxP2MlNzq1Dw8TJ6zcY9XTHcy HVei3BduibbksA7Da5sNqoJwHFcE2A3G4omwgPN55cJ+JVUxbXcubA+Sbvix81A= X-Google-Smtp-Source: AGHT+IFuXEPFBN0We6rdV6a/iSYDuKPWGhuoDCz5EfXXYkEbKpU23aOijuX7nTlft734/9HFXfeWsA== X-Received: by 2002:a05:6a20:1595:b0:1ad:9413:d5c3 with SMTP id adf61e73a8af0-1b26f1428b1mr5444483637.17.1717254382443; Sat, 01 Jun 2024 08:06:22 -0700 (PDT) Received: from sunil-pc.Dlink ([106.51.187.237]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-6c35a4ba741sm2559410a12.85.2024.06.01.08.06.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 01 Jun 2024 08:06:21 -0700 (PDT) From: Sunil V L To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org, linux-pci@vger.kernel.org, acpica-devel@lists.linux.dev Subject: [PATCH v6 17/17] irqchip/sifive-plic: Add ACPI support Date: Sat, 1 Jun 2024 20:34:11 +0530 Message-Id: <20240601150411.1929783-18-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20240601150411.1929783-1-sunilvl@ventanamicro.com> References: <20240601150411.1929783-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240601_160628_801740_AEF36FB6 X-CRM114-Status: GOOD ( 22.35 ) X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marc Zyngier , Albert Ou , Haibo1 Xu , "Rafael J . Wysocki" , Catalin Marinas , Anup Patel , Atish Kumar Patra , Robert Moore , Andy Shevchenko , Samuel Holland , Conor Dooley , Palmer Dabbelt , Paul Walmsley , Bjorn Helgaas , =?utf-8?b?QmrDtnJuIFTDtnBlbA==?= , Thomas Gleixner , Andrew Jones , Will Deacon , Len Brown Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Add ACPI support in PLIC driver. Use the mapping created early during boot to get details about the PLIC. Signed-off-by: Sunil V L Co-developed-by: Haibo Xu Signed-off-by: Haibo Xu --- drivers/irqchip/irq-sifive-plic.c | 94 ++++++++++++++++++++++++------- 1 file changed, 73 insertions(+), 21 deletions(-) diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c index 8fb183ced1e7..89c04f257f81 100644 --- a/drivers/irqchip/irq-sifive-plic.c +++ b/drivers/irqchip/irq-sifive-plic.c @@ -3,6 +3,7 @@ * Copyright (C) 2017 SiFive * Copyright (C) 2018 Christoph Hellwig */ +#include #include #include #include @@ -70,6 +71,8 @@ struct plic_priv { unsigned long plic_quirks; unsigned int nr_irqs; unsigned long *prio_save; + u32 gsi_base; + int id; }; struct plic_handler { @@ -324,6 +327,10 @@ static int plic_irq_domain_translate(struct irq_domain *d, { struct plic_priv *priv = d->host_data; + /* For DT, gsi_base is always zero. */ + if (fwspec->param[0] >= priv->gsi_base) + fwspec->param[0] = fwspec->param[0] - priv->gsi_base; + if (test_bit(PLIC_QUIRK_EDGE_INTERRUPT, &priv->plic_quirks)) return irq_domain_translate_twocell(d, fwspec, hwirq, type); @@ -424,18 +431,37 @@ static const struct of_device_id plic_match[] = { {} }; +#ifdef CONFIG_ACPI + +static const struct acpi_device_id plic_acpi_match[] = { + { "RSCV0001", 0 }, + {} +}; +MODULE_DEVICE_TABLE(acpi, plic_acpi_match); + +#endif static int plic_parse_nr_irqs_and_contexts(struct platform_device *pdev, - u32 *nr_irqs, u32 *nr_contexts) + u32 *nr_irqs, u32 *nr_contexts, + u32 *gsi_base, u32 *id) { struct device *dev = &pdev->dev; int rc; - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ - if (!is_of_node(dev->fwnode)) - return -EINVAL; + if (!is_of_node(dev->fwnode)) { + rc = riscv_acpi_get_gsi_info(dev->fwnode, gsi_base, id, nr_irqs, NULL); + if (rc) { + dev_err(dev, "failed to find GSI mapping\n"); + return rc; + } + + *nr_contexts = acpi_get_plic_nr_contexts(*id); + if (WARN_ON(!*nr_contexts)) { + dev_err(dev, "no PLIC context available\n"); + return -EINVAL; + } + + return 0; + } rc = of_property_read_u32(to_of_node(dev->fwnode), "riscv,ndev", nr_irqs); if (rc) { @@ -449,23 +475,29 @@ static int plic_parse_nr_irqs_and_contexts(struct platform_device *pdev, return -EINVAL; } + *gsi_base = 0; + *id = 0; + return 0; } static int plic_parse_context_parent(struct platform_device *pdev, u32 context, - u32 *parent_hwirq, int *parent_cpu) + u32 *parent_hwirq, int *parent_cpu, u32 id) { struct device *dev = &pdev->dev; struct of_phandle_args parent; unsigned long hartid; int rc; - /* - * Currently, only OF fwnode is supported so extend this - * function for ACPI support. - */ - if (!is_of_node(dev->fwnode)) - return -EINVAL; + if (!is_of_node(dev->fwnode)) { + hartid = acpi_get_ext_intc_parent_hartid(id, context); + if (hartid == INVALID_HARTID) + return -EINVAL; + + *parent_cpu = riscv_hartid_to_cpuid(hartid); + *parent_hwirq = RV_IRQ_EXT; + return 0; + } rc = of_irq_parse_one(to_of_node(dev->fwnode), context, &parent); if (rc) @@ -490,7 +522,9 @@ static int plic_probe(struct platform_device *pdev) struct irq_domain *domain; struct plic_priv *priv; irq_hw_number_t hwirq; + int id, context_id; bool cpuhp_setup; + u32 gsi_base; if (is_of_node(dev->fwnode)) { const struct of_device_id *id; @@ -500,7 +534,7 @@ static int plic_probe(struct platform_device *pdev) plic_quirks = (unsigned long)id->data; } - error = plic_parse_nr_irqs_and_contexts(pdev, &nr_irqs, &nr_contexts); + error = plic_parse_nr_irqs_and_contexts(pdev, &nr_irqs, &nr_contexts, &gsi_base, &id); if (error) return error; @@ -511,6 +545,8 @@ static int plic_probe(struct platform_device *pdev) priv->dev = dev; priv->plic_quirks = plic_quirks; priv->nr_irqs = nr_irqs; + priv->gsi_base = gsi_base; + priv->id = id; priv->regs = devm_platform_ioremap_resource(pdev, 0); if (WARN_ON(!priv->regs)) @@ -521,12 +557,22 @@ static int plic_probe(struct platform_device *pdev) return -ENOMEM; for (i = 0; i < nr_contexts; i++) { - error = plic_parse_context_parent(pdev, i, &parent_hwirq, &cpu); + error = plic_parse_context_parent(pdev, i, &parent_hwirq, &cpu, priv->id); if (error) { dev_warn(dev, "hwirq for context%d not found\n", i); continue; } + if (is_of_node(dev->fwnode)) { + context_id = i; + } else { + context_id = acpi_get_plic_context(priv->id, i); + if (context_id == INVALID_CONTEXT) { + dev_warn(dev, "invalid context id for context%d\n", i); + continue; + } + } + /* * Skip contexts other than external interrupts for our * privilege level. @@ -572,10 +618,10 @@ static int plic_probe(struct platform_device *pdev) cpumask_set_cpu(cpu, &priv->lmask); handler->present = true; handler->hart_base = priv->regs + CONTEXT_BASE + - i * CONTEXT_SIZE; + context_id * CONTEXT_SIZE; raw_spin_lock_init(&handler->enable_lock); handler->enable_base = priv->regs + CONTEXT_ENABLE_BASE + - i * CONTEXT_ENABLE_SIZE; + context_id * CONTEXT_ENABLE_SIZE; handler->priv = priv; handler->enable_save = devm_kcalloc(dev, DIV_ROUND_UP(nr_irqs, 32), @@ -591,8 +637,8 @@ static int plic_probe(struct platform_device *pdev) nr_handlers++; } - priv->irqdomain = irq_domain_add_linear(to_of_node(dev->fwnode), nr_irqs + 1, - &plic_irqdomain_ops, priv); + priv->irqdomain = irq_domain_create_linear(dev->fwnode, nr_irqs + 1, + &plic_irqdomain_ops, priv); if (WARN_ON(!priv->irqdomain)) goto fail_cleanup_contexts; @@ -619,13 +665,18 @@ static int plic_probe(struct platform_device *pdev) } } +#ifdef CONFIG_ACPI + if (!acpi_disabled) + acpi_dev_clear_dependencies(ACPI_COMPANION(dev)); +#endif + dev_info(dev, "mapped %d interrupts with %d handlers for %d contexts.\n", nr_irqs, nr_handlers, nr_contexts); return 0; fail_cleanup_contexts: for (i = 0; i < nr_contexts; i++) { - if (plic_parse_context_parent(pdev, i, &parent_hwirq, &cpu)) + if (plic_parse_context_parent(pdev, i, &parent_hwirq, &cpu, priv->id)) continue; if (parent_hwirq != RV_IRQ_EXT || cpu < 0) continue; @@ -644,6 +695,7 @@ static struct platform_driver plic_driver = { .driver = { .name = "riscv-plic", .of_match_table = plic_match, + .acpi_match_table = ACPI_PTR(plic_acpi_match), }, .probe = plic_probe, };