From patchwork Sun Jun 2 14:36:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 13682898 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-lj1-f178.google.com (mail-lj1-f178.google.com [209.85.208.178]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C6A13DBBF; Sun, 2 Jun 2024 14:36:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.178 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339006; cv=none; b=KHGf/I+y4N6ApNhizIsOBHWCa8lyKVgY0h2J45DcTSU7Oupmj26iN5E9BEyRKA75qDQFKiTn037Ol3x2dp2nyJNTB2f2n5Ft6I/P1q+bdwLA3hjVbW3aDn+eLlXLrEPKf9Uv1D9y/ILfOR3BIl14ZwwvXPaaT4bFSlSD9BlEraA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339006; c=relaxed/simple; bh=HKd+U5CDCJq1sAkohvaBdQJfgDvEMWTiR6NKfKP+qm0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cyxSu0PW/Ct5xESMJMCKvrPQEnoDlbVPxI3Lu7ak6UIKuSGhjXOTe5OUi8H6keLO3ue81xjr05GmnglSCOntmcz0TVjGTDR2bXm0GkxqCkSgQFaxjlv8F7cTopBD6t/xeeOwn3VmFTHTV5rpdi3iMnH39XS+9O+83X30Wv6YiP0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=ENHS5eeq; arc=none smtp.client-ip=209.85.208.178 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ENHS5eeq" Received: by mail-lj1-f178.google.com with SMTP id 38308e7fff4ca-2e96f29884dso41685761fa.0; Sun, 02 Jun 2024 07:36:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1717339003; x=1717943803; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=riZO9gpWg+72DwRvoZciAprxyAK6Sq4iImVOkfuj2k8=; b=ENHS5eeqRUfSiU6mf8dbCceEjj0nw830ECc82/FOy04M3eth+pWckL5RZNked3Zw1o lQoMqN1UxE4Ave26Xn/J7n0Gbvt+Zs8WBLoWh6TIN1lXUziD3xX61r+nCttZwRBLxv5B mJbOjJEiDtcWpy1z+b2/6hVo+hQtSKZFsZy4+skIBhIAMBHTERI23yuycCWxvYVyJNbg T+x4KTZ7OLq1l9bIjvUNOUKmYPkgNJC5WO3ijtcssSiUsLGyyazqWuqDXfew2IX5Xnxl /g14xHF/qSFWAbbS2d0bV068MHhDENlOCRVYauok5DbtS+X48nsVM5FgqGmREhU7FASr 6x5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717339003; x=1717943803; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=riZO9gpWg+72DwRvoZciAprxyAK6Sq4iImVOkfuj2k8=; b=V4M0mkjME1ofucxwkmVtNLalWW+hn873xDs5zOv5EkNQvy0vGsBdoYIBrQHGyKuMLV W6BtYpUuZV2E/w8d5y7JpGFb7kgF/0InTxRkkG7xGUrzUCC0UvhD6jDI1hyPNIUogWp8 +Y59EN8NSWZ8CsW2kX6s5728wAtUTMM93dH6Oh2Zx2/Ta6k2ixxuXGMLDJdQ3xwwwzww a/HAv3Q3lja5ysy5Ah3rkecyltY0nswVsNNQ/dNBOn7pjhKe3/B1bBV/RP01JG2XSZtO OpNALzdkraUYty98n3dLhBtJIiMzWgCAlBTUALY9UEGGGmhZfZNNsYnNe5uy9TRT8o4g 3C9w== X-Forwarded-Encrypted: i=1; AJvYcCVmWC58JEEvpnWCDf332cJ9tvBFokPx00QSKeuxGG9D7/sVspsfQ5FfM609W1umx0q3qI13kacUiqSpPxlPxQbGhEF5BWT7ZXecEHQKmuErhZDGSq1lG+r0NK3AubJ0ItN42OlujT9HesWv1c6l4yDjcdLIxyWA1DmCDmYdVWljew== X-Gm-Message-State: AOJu0YwTBGYX0/ELY50pDXJbfA5g6bjmrEhJzxsuHnYgkv4S7z3cNdme yCPD6nHchNbIY9upkXErkGNCjNw9iM6Sjp3rTJ/vBRaSXosWYllS X-Google-Smtp-Source: AGHT+IG/nqO6KddNLN4fpmEQxGgs5n8RHQTH8IjsI3YbjSKU5j1KmcjSR/VTeLrOiH7DXm32Jlu6Mw== X-Received: by 2002:a2e:9141:0:b0:2e5:1dae:1789 with SMTP id 38308e7fff4ca-2ea9512f6d0mr48251181fa.22.1717339002935; Sun, 02 Jun 2024 07:36:42 -0700 (PDT) Received: from localhost ([178.178.142.64]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2ea91cefc4fsm9282471fa.118.2024.06.02.07.36.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jun 2024 07:36:42 -0700 (PDT) From: Serge Semin To: Andrew Lunn , Heiner Kallweit , Russell King , Alexandre Torgue , Jose Abreu , Jose Abreu , Vladimir Oltean , Florian Fainelli , Maxime Chevallier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Serge Semin , Sagar Cheluvegowda , Abhishek Chauhan , Andrew Halaney , Jiawen Wu , Mengyuan Lou , Tomer Maimon , openbmc@lists.ozlabs.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 01/10] net: pcs: xpcs: Move native device ID macro to linux/pcs/pcs-xpcs.h Date: Sun, 2 Jun 2024 17:36:15 +0300 Message-ID: <20240602143636.5839-2-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240602143636.5839-1-fancer.lancer@gmail.com> References: <20240602143636.5839-1-fancer.lancer@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org One of the next commits will alter the DW XPCS driver to support setting a custom device ID for the particular MDIO-device detected on the platform. The generic DW XPCS ID can be used as a custom ID as well in case if the DW XPCS-device was erroneously synthesized with no or some undefined ID. In addition to that having all supported DW XPCS device IDs defined in a single place will improve the code maintainability and readability. Note while at it rename the macros to being shorter and looking alike to the already defined NXP XPCS ID macro. Signed-off-by: Serge Semin --- Changelog v2: - Alter the commit log so one would refer to the DW XPCS driver change and would describe the change clearer. (@Russell) - s/sinle/single (@Vladimir) --- drivers/net/pcs/pcs-xpcs.c | 8 ++++---- drivers/net/pcs/pcs-xpcs.h | 3 --- include/linux/pcs/pcs-xpcs.h | 2 ++ 3 files changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c index 31525fe9c32e..99adbf15ab36 100644 --- a/drivers/net/pcs/pcs-xpcs.c +++ b/drivers/net/pcs/pcs-xpcs.c @@ -1343,16 +1343,16 @@ static const struct xpcs_compat nxp_sja1110_xpcs_compat[DW_XPCS_INTERFACE_MAX] = static const struct xpcs_id xpcs_id_list[] = { { - .id = SYNOPSYS_XPCS_ID, - .mask = SYNOPSYS_XPCS_MASK, + .id = DW_XPCS_ID, + .mask = DW_XPCS_ID_MASK, .compat = synopsys_xpcs_compat, }, { .id = NXP_SJA1105_XPCS_ID, - .mask = SYNOPSYS_XPCS_MASK, + .mask = DW_XPCS_ID_MASK, .compat = nxp_sja1105_xpcs_compat, }, { .id = NXP_SJA1110_XPCS_ID, - .mask = SYNOPSYS_XPCS_MASK, + .mask = DW_XPCS_ID_MASK, .compat = nxp_sja1110_xpcs_compat, }, }; diff --git a/drivers/net/pcs/pcs-xpcs.h b/drivers/net/pcs/pcs-xpcs.h index 96c36b32ca99..369e9196f45a 100644 --- a/drivers/net/pcs/pcs-xpcs.h +++ b/drivers/net/pcs/pcs-xpcs.h @@ -6,9 +6,6 @@ * Author: Jose Abreu */ -#define SYNOPSYS_XPCS_ID 0x7996ced0 -#define SYNOPSYS_XPCS_MASK 0xffffffff - /* Vendor regs access */ #define DW_VENDOR BIT(15) diff --git a/include/linux/pcs/pcs-xpcs.h b/include/linux/pcs/pcs-xpcs.h index da3a6c30f6d2..8dfe90295f12 100644 --- a/include/linux/pcs/pcs-xpcs.h +++ b/include/linux/pcs/pcs-xpcs.h @@ -12,6 +12,8 @@ #define NXP_SJA1105_XPCS_ID 0x00000010 #define NXP_SJA1110_XPCS_ID 0x00000020 +#define DW_XPCS_ID 0x7996ced0 +#define DW_XPCS_ID_MASK 0xffffffff /* AN mode */ #define DW_AN_C73 1 From patchwork Sun Jun 2 14:36:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 13682899 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-lj1-f170.google.com (mail-lj1-f170.google.com [209.85.208.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 239D44594C; Sun, 2 Jun 2024 14:36:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339008; cv=none; b=V1JUBJOuwnyJhmq5UXabwlpnCguRg+jL4ugTi6Sx4o6EMclx01PNzDUPTYoqwGLRFWEwQSIN3Wb67hG4HaM/YinH0UUVMmp3j+5SonfrubCPReCZIYHyroyswSw1E2bqXIvj6eCjs7E4/mpJjQIjxfsd9F5tRtq72w99ANrjhgI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339008; c=relaxed/simple; bh=pkJ7+HFghe8xVV2bDKTNlz9IEgLjoMzukY7F8ROLww4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sEhGGXJJqqSJxPQRcdeD/8mwSzjifpW0J5tws5v03DMvJ7vdmkApWFBEWkptqJxA9Zi6EeontjM55RNGZD0Uyc9PnoZTS9wlO9rxgZ52cNo03/IrzeDmQntQdXDCkygdOXRQxGLUYya1FjskAFUuKmAEbjtwu/JsywnCVhbymeo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=ncXmT4oD; arc=none smtp.client-ip=209.85.208.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="ncXmT4oD" Received: by mail-lj1-f170.google.com with SMTP id 38308e7fff4ca-2e95a60dfcdso42835291fa.1; Sun, 02 Jun 2024 07:36:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1717339005; x=1717943805; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hNtSE/Sz58dIQftFvxUpsZScMic73JvgAp5RjxHCtMo=; b=ncXmT4oDxBOurRmURuukpFQN6tLMm+8YIQQlUaipa/QUzY5JCXh0b0BggzQ4MlDhPA wuqFc5MHqndcvSVOG/SNWkdQ9wt/J66XbMWhuJaB+JtkerSL1ldFrjUlXP5Ilzk6Md1W M+CPS48EA94k8VFPGW5R0/1WtYF6CJCojdVvaAnb66EetHwCCuESXpdkonuMOsKdeUZI 8AP21UQW68uNptajkXHQIiNH9HPeGuJ8eigVKd8hgimqqXEZI91ubUyuTpbX6mkD+2oE flqKB/hCNoNMGuX93h86JN2jd07CZCFzIpd0TF7vW4PJUpdOc7SXLNw7lPv3yijHabOA WkdQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717339005; x=1717943805; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hNtSE/Sz58dIQftFvxUpsZScMic73JvgAp5RjxHCtMo=; b=X/tpTUooUwSbezXs8+bVbr3dLDDUJM8wFHRoNCFN7qb8jBNxfEZ54nZRfDbUehwf34 XhGpnRFgc0UT9KDXtYEUp0/kF8tpCiuZq7aZvi6iCQl29ZnMZwT+IOoO8eWri0P1nMxF zy4B2svHiZeXmMidr7KoCL062HM/Xulfo8mEXiniRt+dufMTrkZ/iPs1b5Z2RIkhlnjq AyQuo4XFz+1ab/fmM+dCW5SWlaST/KnjWps5VgxXuU4Mn9IskPaEiZ3A9EvFuAHdsLcW AAdVSHjNccliV35jQyT/0z9ZQ2FgzyQwTI9WO/qoq/waQ1VlHFARi3LRRahSRVpJ/3AV JWWQ== X-Forwarded-Encrypted: i=1; AJvYcCV8FHqrxEfPcPdkEfhHwIuQrIiRgLtev28EAEV+cVS30r3ndDniHsZ5eYltqJGpgZZFUL+/DrLcq5Zv8Ux5vzLuBHyAEu1YS/TfwNc1M0upBTq50eXG8EALwPgefas9o2IZ7oOm05SLZgeNCk6E51FcdkQ93PuIK63yKqiwbVlzFQ== X-Gm-Message-State: AOJu0Yw9grzPXwYl9tC6f7dxNQ9WUHM2BnM1YoK3gCxMWgKC4Xgc54dO O1p0apXHKvNhr2HHEVHt0hnfWDWcij0NKdOoS0x0iwtQYpJU1eoC X-Google-Smtp-Source: AGHT+IENxA9A975RgQqj4dZWXkCNJxoPKV4V++dmEk34UHUscmDHWyMvHKh7+h7hfi6Novv707U5Sw== X-Received: by 2002:a2e:2409:0:b0:2e6:cb01:aeef with SMTP id 38308e7fff4ca-2ea951e02a3mr45725411fa.36.1717339005047; Sun, 02 Jun 2024 07:36:45 -0700 (PDT) Received: from localhost ([178.178.142.64]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2ea91bb5411sm8990621fa.53.2024.06.02.07.36.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jun 2024 07:36:44 -0700 (PDT) From: Serge Semin To: Andrew Lunn , Heiner Kallweit , Russell King , Alexandre Torgue , Jose Abreu , Jose Abreu , Vladimir Oltean , Florian Fainelli , Maxime Chevallier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Serge Semin , Sagar Cheluvegowda , Abhishek Chauhan , Andrew Halaney , Jiawen Wu , Mengyuan Lou , Tomer Maimon , openbmc@lists.ozlabs.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 02/10] net: pcs: xpcs: Split up xpcs_create() body to sub-functions Date: Sun, 2 Jun 2024 17:36:16 +0300 Message-ID: <20240602143636.5839-3-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240602143636.5839-1-fancer.lancer@gmail.com> References: <20240602143636.5839-1-fancer.lancer@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org As an initial preparation before adding the fwnode-based DW XPCS device support let's split the xpcs_create() function code up to a set of the small sub-functions. Thus the xpcs_create() implementation will get to look simpler and turn to be more coherent. Further updates will just touch the new sub-functions a bit: add platform-specific device info, add the reference clock getting and enabling. The xpcs_create() method will now contain the next static methods calls: xpcs_create_data() - create the DW XPCS device descriptor, pre-initialize it' fields and increase the mdio device refcount-er; xpcs_init_id() - find XPCS ID instance and save it in the device descriptor; xpcs_init_iface() - find MAC/PCS interface descriptor and perform basic initialization specific to it: soft-reset, disable polling. The update doesn't imply any semantic change but merely makes the code looking simpler and more ready for adding new features support. Note the xpcs_destroy() has been moved to being defined below the xpcs_create_mdiodev() function as the driver now implies having the protagonist-then-antagonist functions definition order. Signed-off-by: Serge Semin --- Changelog v2: - Preserve the strict refcount-ing pattern. (@Russell) --- drivers/net/pcs/pcs-xpcs.c | 102 +++++++++++++++++++++++++------------ 1 file changed, 69 insertions(+), 33 deletions(-) diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c index 99adbf15ab36..2dcfd0ff069a 100644 --- a/drivers/net/pcs/pcs-xpcs.c +++ b/drivers/net/pcs/pcs-xpcs.c @@ -1365,12 +1365,9 @@ static const struct phylink_pcs_ops xpcs_phylink_ops = { .pcs_link_up = xpcs_link_up, }; -static struct dw_xpcs *xpcs_create(struct mdio_device *mdiodev, - phy_interface_t interface) +static struct dw_xpcs *xpcs_create_data(struct mdio_device *mdiodev) { struct dw_xpcs *xpcs; - u32 xpcs_id; - int i, ret; xpcs = kzalloc(sizeof(*xpcs), GFP_KERNEL); if (!xpcs) @@ -1378,59 +1375,89 @@ static struct dw_xpcs *xpcs_create(struct mdio_device *mdiodev, mdio_device_get(mdiodev); xpcs->mdiodev = mdiodev; + xpcs->pcs.ops = &xpcs_phylink_ops; + xpcs->pcs.neg_mode = true; + xpcs->pcs.poll = true; + + return xpcs; +} + +static void xpcs_free_data(struct dw_xpcs *xpcs) +{ + mdio_device_put(xpcs->mdiodev); + kfree(xpcs); +} + +static int xpcs_init_id(struct dw_xpcs *xpcs) +{ + u32 xpcs_id; + int i, ret; xpcs_id = xpcs_get_id(xpcs); for (i = 0; i < ARRAY_SIZE(xpcs_id_list); i++) { const struct xpcs_id *entry = &xpcs_id_list[i]; - const struct xpcs_compat *compat; if ((xpcs_id & entry->mask) != entry->id) continue; xpcs->id = entry; - compat = xpcs_find_compat(entry, interface); - if (!compat) { - ret = -ENODEV; - goto out; - } + break; + } - ret = xpcs_dev_flag(xpcs); - if (ret) - goto out; + if (!xpcs->id) + return -ENODEV; - xpcs->pcs.ops = &xpcs_phylink_ops; - xpcs->pcs.neg_mode = true; + ret = xpcs_dev_flag(xpcs); + if (ret < 0) + return ret; - if (xpcs->dev_flag != DW_DEV_TXGBE) { - xpcs->pcs.poll = true; + return 0; +} - ret = xpcs_soft_reset(xpcs, compat); - if (ret) - goto out; - } +static int xpcs_init_iface(struct dw_xpcs *xpcs, phy_interface_t interface) +{ + const struct xpcs_compat *compat; - return xpcs; + compat = xpcs_find_compat(xpcs->id, interface); + if (!compat) + return -EINVAL; + + if (xpcs->dev_flag == DW_DEV_TXGBE) { + xpcs->pcs.poll = false; + return 0; } - ret = -ENODEV; + return xpcs_soft_reset(xpcs, compat); +} + +static struct dw_xpcs *xpcs_create(struct mdio_device *mdiodev, + phy_interface_t interface) +{ + struct dw_xpcs *xpcs; + int ret; + + xpcs = xpcs_create_data(mdiodev); + if (IS_ERR(xpcs)) + return xpcs; + + ret = xpcs_init_id(xpcs); + if (ret) + goto out; + + ret = xpcs_init_iface(xpcs, interface); + if (ret) + goto out; + + return xpcs; out: - mdio_device_put(mdiodev); - kfree(xpcs); + xpcs_free_data(xpcs); return ERR_PTR(ret); } -void xpcs_destroy(struct dw_xpcs *xpcs) -{ - if (xpcs) - mdio_device_put(xpcs->mdiodev); - kfree(xpcs); -} -EXPORT_SYMBOL_GPL(xpcs_destroy); - struct dw_xpcs *xpcs_create_mdiodev(struct mii_bus *bus, int addr, phy_interface_t interface) { @@ -1455,5 +1482,14 @@ struct dw_xpcs *xpcs_create_mdiodev(struct mii_bus *bus, int addr, } EXPORT_SYMBOL_GPL(xpcs_create_mdiodev); +void xpcs_destroy(struct dw_xpcs *xpcs) +{ + if (!xpcs) + return; + + xpcs_free_data(xpcs); +} +EXPORT_SYMBOL_GPL(xpcs_destroy); + MODULE_DESCRIPTION("Synopsys DesignWare XPCS library"); MODULE_LICENSE("GPL v2"); From patchwork Sun Jun 2 14:36:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 13682900 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-lf1-f46.google.com (mail-lf1-f46.google.com [209.85.167.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 377DD4F5F9; Sun, 2 Jun 2024 14:36:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339011; cv=none; b=CfLeRgrbQfQ31xGXKTN1o3HzjUaCHtOCc+RpdhJpVUzaLr1LtlcHkWXjgTx0aEtpKUZ7/giEYmXNQfOAa7RxtGZ9sBJw/MiIhwIAQ/kN2rUBMxGuYFcW71wQ8a6MhPrd4MWiKOdjot0hEVXjINO0dsbuJxZpu4WV8Luslvhzx3Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339011; c=relaxed/simple; bh=942HWtrrwMZHj8NhKUHjxOd6FxhubpGj857au8oAFIQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=GMWz6PcvRIToqUW4+taMZNSluCxQa/q7yxVbZBwlS9Ee9NOwLCPDGG7YyGIu3z9MvKrTrntSZMht7KbUY/jg1CrPyVfLq4MXqxt9xDz0r2UD0xMIkKX0nkx31DTxbh8duUxuQkM/EOQ90ePbc5QNLRffTN/guKdEjjtJgFq9DqE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=JJST1o34; arc=none smtp.client-ip=209.85.167.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="JJST1o34" Received: by mail-lf1-f46.google.com with SMTP id 2adb3069b0e04-52b90038cf7so1787994e87.0; Sun, 02 Jun 2024 07:36:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1717339007; x=1717943807; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=l1aUmiEcMZ+VAXZ9+5FXW90knS868BRwEpAdgXfPTGM=; b=JJST1o34POs2uLNTtTJGTpEgDGGuHaDs+j4yV3D6UmHXEIqNt7h8fwXP/mmNtY4zjA MqtnhZdMACo1kBPJZoUBkPdgFBrR+1U55FF4qnLHn38usvGWRwusQHWRrMXrofVDQX6w LEskAp4zW4GH2/T2QiIZ/uARP3wbWt9Gbt0E02uZWzsLaB77sMm45dG4hor8hxXYFkln wJpAsN+3p+Tjpp6bJ7/tCw8QYLaqKOd8G5iN4nydvTq67ctBauvpAtWVHOwROQLFqSMI MZq3QYDpmnOjTcPoWfOzCzTJxMwbMcMn/kvHcA1SP8jAXD4dEHh+opVdqdC3E5UbUkBz ozvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717339007; x=1717943807; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=l1aUmiEcMZ+VAXZ9+5FXW90knS868BRwEpAdgXfPTGM=; b=jGZd26fm2fIsKwMDaLdLtQRRVY1nr/+aUDfme01o+s8Ro/e+huvnAkYNjvi/RTFlz4 sc8s2FTnuStmw9C3dkS4GW0puOHML27u1sW69PjnUONDHT7PEHtNhMwgVorNfQeWdpAv HK1y9HIe+PgcN54vicYrVSo/AxHvMpwUyocE6nP3THRqR+iMIXUQeVsgTZbM1P3YEN7D ZPdD5GX0Ow9QqmaB628wxOJlusB1/4C81c5bA3jwrsR8qIEEw9jhphTKul3TMBzPJwfe kpRQflN5ufAzqFGYeHZv53GfJfNXMqZsYW1VQGG/VFLM/AEQ/5Kq/CHLtrybCXNvcbCY DNBw== X-Forwarded-Encrypted: i=1; AJvYcCX+014frxuotM3D/C3yXmQquO1pk4w3HIFS99ePAfTlHX8X9ouBdALYW2iyeQPyVaNF2pEnbd9WWfqLDei+goxUd2SsHFOj15xCRoeQkyFG4RQk7DddB5qeXxq523xAq5EGq7W3qdw+h7vgWBbgA1zM8U3WLKtMgcxP7/6uJApUoA== X-Gm-Message-State: AOJu0YwIqxr+G83FP4OPMtgvEIrgFRgCHQ3U3W0s05aCL/A5xffVk3Lt L32kLyhRN11CbZxQsRSbADygm6X6KySbqHNnE0/uRTcInRcGY5Tn X-Google-Smtp-Source: AGHT+IFQIkTMVlNgNktVJJk2l6Dn1nauzPWvJqXGt6FVgZVFK7u+tMEKQScgX/2bTN7d7XbmjOV/Jg== X-Received: by 2002:a05:6512:3145:b0:52b:51ad:13f with SMTP id 2adb3069b0e04-52b896c1515mr4088383e87.49.1717339007085; Sun, 02 Jun 2024 07:36:47 -0700 (PDT) Received: from localhost ([178.178.142.64]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-52b8dcb41e6sm641305e87.266.2024.06.02.07.36.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jun 2024 07:36:46 -0700 (PDT) From: Serge Semin To: Andrew Lunn , Heiner Kallweit , Russell King , Alexandre Torgue , Jose Abreu , Jose Abreu , Vladimir Oltean , Florian Fainelli , Maxime Chevallier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Serge Semin , Sagar Cheluvegowda , Abhishek Chauhan , Andrew Halaney , Jiawen Wu , Mengyuan Lou , Tomer Maimon , openbmc@lists.ozlabs.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 03/10] net: pcs: xpcs: Convert xpcs_id to dw_xpcs_desc Date: Sun, 2 Jun 2024 17:36:17 +0300 Message-ID: <20240602143636.5839-4-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240602143636.5839-1-fancer.lancer@gmail.com> References: <20240602143636.5839-1-fancer.lancer@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org A structure with the PCS/PMA MMD IDs data is being introduced in one of the next commits. In order to prevent the names ambiguity let's convert the xpcs_id structure name to dw_xpcs_desc. The later version is more suitable since the structure content is indeed the device descriptor containing the data and callbacks required for the driver to correctly set the device up. Signed-off-by: Serge Semin --- Changelog v2: - This is a new patch introduced on v2 stage of the review. --- drivers/net/pcs/pcs-xpcs.c | 30 +++++++++++++++--------------- include/linux/pcs/pcs-xpcs.h | 4 ++-- 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c index 2dcfd0ff069a..48c61975db22 100644 --- a/drivers/net/pcs/pcs-xpcs.c +++ b/drivers/net/pcs/pcs-xpcs.c @@ -151,19 +151,19 @@ struct xpcs_compat { int (*pma_config)(struct dw_xpcs *xpcs); }; -struct xpcs_id { +struct dw_xpcs_desc { u32 id; u32 mask; const struct xpcs_compat *compat; }; -static const struct xpcs_compat *xpcs_find_compat(const struct xpcs_id *id, - phy_interface_t interface) +static const struct xpcs_compat * +xpcs_find_compat(const struct dw_xpcs_desc *desc, phy_interface_t interface) { int i, j; for (i = 0; i < DW_XPCS_INTERFACE_MAX; i++) { - const struct xpcs_compat *compat = &id->compat[i]; + const struct xpcs_compat *compat = &desc->compat[i]; for (j = 0; j < compat->num_interfaces; j++) if (compat->interface[j] == interface) @@ -177,7 +177,7 @@ int xpcs_get_an_mode(struct dw_xpcs *xpcs, phy_interface_t interface) { const struct xpcs_compat *compat; - compat = xpcs_find_compat(xpcs->id, interface); + compat = xpcs_find_compat(xpcs->desc, interface); if (!compat) return -ENODEV; @@ -612,7 +612,7 @@ static int xpcs_validate(struct phylink_pcs *pcs, unsigned long *supported, int i; xpcs = phylink_pcs_to_xpcs(pcs); - compat = xpcs_find_compat(xpcs->id, state->interface); + compat = xpcs_find_compat(xpcs->desc, state->interface); if (!compat) return -EINVAL; @@ -633,7 +633,7 @@ void xpcs_get_interfaces(struct dw_xpcs *xpcs, unsigned long *interfaces) int i, j; for (i = 0; i < DW_XPCS_INTERFACE_MAX; i++) { - const struct xpcs_compat *compat = &xpcs->id->compat[i]; + const struct xpcs_compat *compat = &xpcs->desc->compat[i]; for (j = 0; j < compat->num_interfaces; j++) __set_bit(compat->interface[j], interfaces); @@ -853,7 +853,7 @@ int xpcs_do_config(struct dw_xpcs *xpcs, phy_interface_t interface, const struct xpcs_compat *compat; int ret; - compat = xpcs_find_compat(xpcs->id, interface); + compat = xpcs_find_compat(xpcs->desc, interface); if (!compat) return -ENODEV; @@ -1118,7 +1118,7 @@ static void xpcs_get_state(struct phylink_pcs *pcs, const struct xpcs_compat *compat; int ret; - compat = xpcs_find_compat(xpcs->id, state->interface); + compat = xpcs_find_compat(xpcs->desc, state->interface); if (!compat) return; @@ -1341,7 +1341,7 @@ static const struct xpcs_compat nxp_sja1110_xpcs_compat[DW_XPCS_INTERFACE_MAX] = }, }; -static const struct xpcs_id xpcs_id_list[] = { +static const struct dw_xpcs_desc xpcs_desc_list[] = { { .id = DW_XPCS_ID, .mask = DW_XPCS_ID_MASK, @@ -1395,18 +1395,18 @@ static int xpcs_init_id(struct dw_xpcs *xpcs) xpcs_id = xpcs_get_id(xpcs); - for (i = 0; i < ARRAY_SIZE(xpcs_id_list); i++) { - const struct xpcs_id *entry = &xpcs_id_list[i]; + for (i = 0; i < ARRAY_SIZE(xpcs_desc_list); i++) { + const struct dw_xpcs_desc *entry = &xpcs_desc_list[i]; if ((xpcs_id & entry->mask) != entry->id) continue; - xpcs->id = entry; + xpcs->desc = entry; break; } - if (!xpcs->id) + if (!xpcs->desc) return -ENODEV; ret = xpcs_dev_flag(xpcs); @@ -1420,7 +1420,7 @@ static int xpcs_init_iface(struct dw_xpcs *xpcs, phy_interface_t interface) { const struct xpcs_compat *compat; - compat = xpcs_find_compat(xpcs->id, interface); + compat = xpcs_find_compat(xpcs->desc, interface); if (!compat) return -EINVAL; diff --git a/include/linux/pcs/pcs-xpcs.h b/include/linux/pcs/pcs-xpcs.h index 8dfe90295f12..e706bd16b986 100644 --- a/include/linux/pcs/pcs-xpcs.h +++ b/include/linux/pcs/pcs-xpcs.h @@ -28,11 +28,11 @@ /* dev_flag */ #define DW_DEV_TXGBE BIT(0) -struct xpcs_id; +struct dw_xpcs_desc; struct dw_xpcs { + const struct dw_xpcs_desc *desc; struct mdio_device *mdiodev; - const struct xpcs_id *id; struct phylink_pcs pcs; phy_interface_t interface; int dev_flag; From patchwork Sun Jun 2 14:36:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 13682901 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-lj1-f170.google.com (mail-lj1-f170.google.com [209.85.208.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 131B1548F7; Sun, 2 Jun 2024 14:36:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.170 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339012; cv=none; b=jt0wqMVboavV92immuoAwAYcuJn/ZLt/ThvvOcFGLa2nRyhFFw/okgdA6B7/w7/ANpCUcbhcprMfeiep5b0keFTplf3tMa3j5e7mAf1fqtoll/mrxuBChASXOt557Qz5gkUjcTKQvSCegdsW7ZbcHQRtxs42SlkYa9SjdVrWNcI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339012; c=relaxed/simple; bh=k4gkAz+Zl8rzR8GG8wrdRjpIs+MSbIxwVH7f99/7BJI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mk1NWTG/TvX/p3FqDN9WPl+eCJwKLJ07GCrlSffumI7Ur73utSgGnC5V3DsdKvh3Bi1b8SZIB1+NiaA3+JCs6E+uLI1c3OkM8B9uHXSXYE7hpykk5vLztJ/exQ8SwtKSjyIOFKbnLdMcKtpEIPzLTofxUuAZwAOkXb0wx1HttMk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=eiPkrf9Q; arc=none smtp.client-ip=209.85.208.170 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="eiPkrf9Q" Received: by mail-lj1-f170.google.com with SMTP id 38308e7fff4ca-2e95a1eff78so47006851fa.0; Sun, 02 Jun 2024 07:36:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1717339009; x=1717943809; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=EEjeTMFoJBv+1cocMj3lNi4jSjrQ54Kw3PRV3mrle98=; b=eiPkrf9QY5JDC9+/ljT/lCnXBWr1y4+rUiwUrIIn0XY/xUy77c2ael7eQiBn/P5svA FGeRvw0XeTkLAMctnECzWEEa4g120xo8iIYYHAutYV7xojpDZvzFD3tMq8GHnVxWHHnu wIIQESJf9PhNQsW7EzOS664QgqmfiJ8LOA0FJVcrubUh4BfHe/okf0k7j1owT+Cpi5jr iF6BqnArn68Lcd9BO7ZuO5c8FOb3vHoFtaE+GS3xHNtQZXnNWxsMQTMt6UfwktR41lr+ uxeKMHSYKe10W/n7pK6THIDqTe2FE+8sXznMBDEFJUMjNQXagSkmj7izWRF6Z7R5uRCW 8c0g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717339009; x=1717943809; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EEjeTMFoJBv+1cocMj3lNi4jSjrQ54Kw3PRV3mrle98=; b=Mc7LYGf2ux7I1tj821apR0UfoEtCfyOQjvqFPGmjXgNZ2LhoViCo3Y/CIGyJh8if2o KrNvrUK3gtd51pRqB1ffihcs5Uym3DIFgsAje21r59Qy86yPTNHdGdvtkCldDRGUGNlm /+RKAYrcx4FZ6y8QQz4t4Px1Mquoqa90s2twod+YpUfMuzlQn+c9xwH/jf4/6fGewjyX 6naX1nXrultHQTh332xjcBoqrMYXeKfc/XOqq902S6hmv/LdB1OMpYAB7KtvIUFSpvLl /u35lIYwVrpanoMfGvrpiK/iXmtJLj4sPALbU4IObr0Up2FZEc7Ydof+MaXtEmgaAJKn iNsw== X-Forwarded-Encrypted: i=1; AJvYcCXbSq04ZhT+6Ww2nrZAxZdT0Xh0GCWjh5l7V6C7SIwfpvNIQ4TM6CF7KjLDJzKnDD+BiCUkdmOeh49bDeF4TLAr28ObGtjLrGYX1DMD+Erw6NpdszSh9U/7PzmrKPp9Lk8j14dnA1JF6CxlSdZIX8+hmlCNOACr/MxGj87l1mBXzw== X-Gm-Message-State: AOJu0YwnZ940VxtBMyBWLHRq/vcy+qtrwh8BzBoat/uFkizIQrdJfSnP Uv8UYqG5vprhR1txroN5NyQvSCtPG7CiFfOnBHzyNLT7T4O+0ruB X-Google-Smtp-Source: AGHT+IECFWr2eN8AS3zjjnqwWdWxEdkSN5s216Gg8Y6ZUNUm8wBCeEqyvFu7aGOr2W1PCG7UzKs+oQ== X-Received: by 2002:a2e:b5a9:0:b0:2ea:8e94:a2ea with SMTP id 38308e7fff4ca-2ea95108166mr50557881fa.6.1717339009135; Sun, 02 Jun 2024 07:36:49 -0700 (PDT) Received: from localhost ([178.178.142.64]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2ea91bb49ebsm9383051fa.34.2024.06.02.07.36.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jun 2024 07:36:48 -0700 (PDT) From: Serge Semin To: Andrew Lunn , Heiner Kallweit , Russell King , Alexandre Torgue , Jose Abreu , Jose Abreu , Vladimir Oltean , Florian Fainelli , Maxime Chevallier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Serge Semin , Sagar Cheluvegowda , Abhishek Chauhan , Andrew Halaney , Jiawen Wu , Mengyuan Lou , Tomer Maimon , openbmc@lists.ozlabs.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 04/10] net: pcs: xpcs: Convert xpcs_compat to dw_xpcs_compat Date: Sun, 2 Jun 2024 17:36:18 +0300 Message-ID: <20240602143636.5839-5-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240602143636.5839-1-fancer.lancer@gmail.com> References: <20240602143636.5839-1-fancer.lancer@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The xpcs_compat structure has been left as the only dw-prefix-less structure since the previous commit. Let's unify at least the structures naming in the driver by adding the dw_-prefix to it. Signed-off-by: Serge Semin --- Changelog v2: - This is a new patch introduced on v2 stage of the review. --- drivers/net/pcs/pcs-xpcs.c | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c index 48c61975db22..0af6b5995113 100644 --- a/drivers/net/pcs/pcs-xpcs.c +++ b/drivers/net/pcs/pcs-xpcs.c @@ -143,7 +143,7 @@ enum { DW_XPCS_INTERFACE_MAX, }; -struct xpcs_compat { +struct dw_xpcs_compat { const int *supported; const phy_interface_t *interface; int num_interfaces; @@ -154,16 +154,16 @@ struct xpcs_compat { struct dw_xpcs_desc { u32 id; u32 mask; - const struct xpcs_compat *compat; + const struct dw_xpcs_compat *compat; }; -static const struct xpcs_compat * +static const struct dw_xpcs_compat * xpcs_find_compat(const struct dw_xpcs_desc *desc, phy_interface_t interface) { int i, j; for (i = 0; i < DW_XPCS_INTERFACE_MAX; i++) { - const struct xpcs_compat *compat = &desc->compat[i]; + const struct dw_xpcs_compat *compat = &desc->compat[i]; for (j = 0; j < compat->num_interfaces; j++) if (compat->interface[j] == interface) @@ -175,7 +175,7 @@ xpcs_find_compat(const struct dw_xpcs_desc *desc, phy_interface_t interface) int xpcs_get_an_mode(struct dw_xpcs *xpcs, phy_interface_t interface) { - const struct xpcs_compat *compat; + const struct dw_xpcs_compat *compat; compat = xpcs_find_compat(xpcs->desc, interface); if (!compat) @@ -185,7 +185,7 @@ int xpcs_get_an_mode(struct dw_xpcs *xpcs, phy_interface_t interface) } EXPORT_SYMBOL_GPL(xpcs_get_an_mode); -static bool __xpcs_linkmode_supported(const struct xpcs_compat *compat, +static bool __xpcs_linkmode_supported(const struct dw_xpcs_compat *compat, enum ethtool_link_mode_bit_indices linkmode) { int i; @@ -277,7 +277,7 @@ static int xpcs_poll_reset(struct dw_xpcs *xpcs, int dev) } static int xpcs_soft_reset(struct dw_xpcs *xpcs, - const struct xpcs_compat *compat) + const struct dw_xpcs_compat *compat) { int ret, dev; @@ -418,7 +418,7 @@ static void xpcs_config_usxgmii(struct dw_xpcs *xpcs, int speed) } static int _xpcs_config_aneg_c73(struct dw_xpcs *xpcs, - const struct xpcs_compat *compat) + const struct dw_xpcs_compat *compat) { int ret, adv; @@ -463,7 +463,7 @@ static int _xpcs_config_aneg_c73(struct dw_xpcs *xpcs, } static int xpcs_config_aneg_c73(struct dw_xpcs *xpcs, - const struct xpcs_compat *compat) + const struct dw_xpcs_compat *compat) { int ret; @@ -482,7 +482,7 @@ static int xpcs_config_aneg_c73(struct dw_xpcs *xpcs, static int xpcs_aneg_done_c73(struct dw_xpcs *xpcs, struct phylink_link_state *state, - const struct xpcs_compat *compat, u16 an_stat1) + const struct dw_xpcs_compat *compat, u16 an_stat1) { int ret; @@ -607,7 +607,7 @@ static int xpcs_validate(struct phylink_pcs *pcs, unsigned long *supported, const struct phylink_link_state *state) { __ETHTOOL_DECLARE_LINK_MODE_MASK(xpcs_supported) = { 0, }; - const struct xpcs_compat *compat; + const struct dw_xpcs_compat *compat; struct dw_xpcs *xpcs; int i; @@ -633,7 +633,7 @@ void xpcs_get_interfaces(struct dw_xpcs *xpcs, unsigned long *interfaces) int i, j; for (i = 0; i < DW_XPCS_INTERFACE_MAX; i++) { - const struct xpcs_compat *compat = &xpcs->desc->compat[i]; + const struct dw_xpcs_compat *compat = &xpcs->desc->compat[i]; for (j = 0; j < compat->num_interfaces; j++) __set_bit(compat->interface[j], interfaces); @@ -850,7 +850,7 @@ static int xpcs_config_2500basex(struct dw_xpcs *xpcs) int xpcs_do_config(struct dw_xpcs *xpcs, phy_interface_t interface, const unsigned long *advertising, unsigned int neg_mode) { - const struct xpcs_compat *compat; + const struct dw_xpcs_compat *compat; int ret; compat = xpcs_find_compat(xpcs->desc, interface); @@ -915,7 +915,7 @@ static int xpcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, static int xpcs_get_state_c73(struct dw_xpcs *xpcs, struct phylink_link_state *state, - const struct xpcs_compat *compat) + const struct dw_xpcs_compat *compat) { bool an_enabled; int pcs_stat1; @@ -1115,7 +1115,7 @@ static void xpcs_get_state(struct phylink_pcs *pcs, struct phylink_link_state *state) { struct dw_xpcs *xpcs = phylink_pcs_to_xpcs(pcs); - const struct xpcs_compat *compat; + const struct dw_xpcs_compat *compat; int ret; compat = xpcs_find_compat(xpcs->desc, state->interface); @@ -1269,7 +1269,7 @@ static u32 xpcs_get_id(struct dw_xpcs *xpcs) return 0xffffffff; } -static const struct xpcs_compat synopsys_xpcs_compat[DW_XPCS_INTERFACE_MAX] = { +static const struct dw_xpcs_compat synopsys_xpcs_compat[DW_XPCS_INTERFACE_MAX] = { [DW_XPCS_USXGMII] = { .supported = xpcs_usxgmii_features, .interface = xpcs_usxgmii_interfaces, @@ -1314,7 +1314,7 @@ static const struct xpcs_compat synopsys_xpcs_compat[DW_XPCS_INTERFACE_MAX] = { }, }; -static const struct xpcs_compat nxp_sja1105_xpcs_compat[DW_XPCS_INTERFACE_MAX] = { +static const struct dw_xpcs_compat nxp_sja1105_xpcs_compat[DW_XPCS_INTERFACE_MAX] = { [DW_XPCS_SGMII] = { .supported = xpcs_sgmii_features, .interface = xpcs_sgmii_interfaces, @@ -1324,7 +1324,7 @@ static const struct xpcs_compat nxp_sja1105_xpcs_compat[DW_XPCS_INTERFACE_MAX] = }, }; -static const struct xpcs_compat nxp_sja1110_xpcs_compat[DW_XPCS_INTERFACE_MAX] = { +static const struct dw_xpcs_compat nxp_sja1110_xpcs_compat[DW_XPCS_INTERFACE_MAX] = { [DW_XPCS_SGMII] = { .supported = xpcs_sgmii_features, .interface = xpcs_sgmii_interfaces, @@ -1418,7 +1418,7 @@ static int xpcs_init_id(struct dw_xpcs *xpcs) static int xpcs_init_iface(struct dw_xpcs *xpcs, phy_interface_t interface) { - const struct xpcs_compat *compat; + const struct dw_xpcs_compat *compat; compat = xpcs_find_compat(xpcs->desc, interface); if (!compat) From patchwork Sun Jun 2 14:36:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 13682902 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-lj1-f174.google.com (mail-lj1-f174.google.com [209.85.208.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 446895A4E9; Sun, 2 Jun 2024 14:36:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339015; cv=none; b=ZujNWn/ELBzzKdBuR/ndPRpCH7bjdNFrQ2giGscaFlI1/P5J91hcq43LnTTRHxKZsBWdjCtxuryJ6F4kZqC6fGmIVzhy5R7P10IIoPRBCbkg7oTumgZLFA0YxKvlQhZWup515HyUnR5RvazUatKmLczziJYqf1m+D0FgrsBWoXs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339015; c=relaxed/simple; bh=//3x9KLXbVkQe7MYIjyhxJSEDTmX3RZxXuNJnmLHUVo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=WEoWoGLXgt1eDeA0gMmsWb2Sb2Tujm+v2PxpCEksz4ZXt2Y4+w/0LPTBnZPGRQAfcK3S+l2eKOnOE/exsSiyAwlkG0Is56vhPYpbYvY8P5Gd9E5+n6lsXCV4uw6ITLWwF8Yg2JRqIuFFWtUFdCgYvWu4CoYKxCkoxzHAz0Za/q0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=EofF5Fog; arc=none smtp.client-ip=209.85.208.174 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="EofF5Fog" Received: by mail-lj1-f174.google.com with SMTP id 38308e7fff4ca-2eaa80cb4d3so10258671fa.1; Sun, 02 Jun 2024 07:36:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1717339011; x=1717943811; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DtB2YK+hWybOfhRjGVARuGF16LYCosZHExgsepw9jig=; b=EofF5FogbhlfV2mcsuAi22/7hzldn+O0BLvYT48yK9TBA/MW2Ka5ojXuIZ4VV3OS+R oeZ9uGtuT0wTzS6DhlXs+aMibcwdSs7YNIQlFSGcXrZq90U9USlSLwTnyLHApON7EBK9 am/l+dRHwp+kKlZAcZLt4ahScaLtUwQaOv8lXm0z8DbJMO8VO1EienUtY3L1WxpDmuAr ebNfl5yShaLzel3ofx4UaG0yNll3bNNgHJ6Y2BeTdlD5KvNE3MO7tI8MZmL4Sw7hUSsx OzKQmNvb4onc9hEyzfnaGNwLFNFI33R5KhEckkAt1MZZeS+UR12Y+zfynYYKsRBBtSUP gNrg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717339011; x=1717943811; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DtB2YK+hWybOfhRjGVARuGF16LYCosZHExgsepw9jig=; b=bz4ztCQuzRwLEK+1nfoAv0Ol0tMstt0N9k4uldEXxXjWJ7gXGu92B2WBjg/hyvcFA7 kKaB7Krk2v9bVQIDumzXG4X3spPxc2sb0mkiHr/K3eYANYwKPqVITfp8lDzOc5HXKM7w nTc2iL/JVxmoYpJfNl0xWuv9HaoeWpmKU/wVAJQmNFwCL+o4X+SzbMM7zrH3kw7ADh3U CCM/MJFVz3P5SU/twidPlHUPUgdhpGOCzOYCvYV3Z1yrk2BbN6Gxa1wmfaXCb3ezrT7I 2nWdHOQzSLqeK3uZ8If8YCL+3CctWr12RywLO0T65VeLIgg6LmIFl4qzjlAmkJzwRe+0 Tgow== X-Forwarded-Encrypted: i=1; AJvYcCVaySqWrW0KIpwMyr6jOKbzZBaBomwqrH0xXC71fT32QBYWtDev76pNuaTqV/vqOxTfSFcRrKKzrsJ7xXjWFBCkWrgaBo/W4UaIr/gUPHZkcX9pHwZHX4RahzqCry+pAv6wt2+2v17ACy9SPihSfPoNqV8UObZYq4HMvWa1Ihh7iA== X-Gm-Message-State: AOJu0YxlkiN9aJq9JW1AYFEaN9jXj2FKcrUyD5F0JuS8YU5OqdbRUU41 qfHEZbn2DgfeNSJBoKB5Vrn13TUw389irMllKhrR6t5s952gd8V3 X-Google-Smtp-Source: AGHT+IHLgFJKesBDixxC7oFrM3RN9eBC4bFxamFBSzSfxrHVjwzy5Cuk37vcBpzIslVRsZW9vP7p2g== X-Received: by 2002:a05:6512:24a:b0:524:1fea:7626 with SMTP id 2adb3069b0e04-52b89563679mr5605764e87.32.1717339011355; Sun, 02 Jun 2024 07:36:51 -0700 (PDT) Received: from localhost ([178.178.142.64]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-52b84d8e575sm955158e87.289.2024.06.02.07.36.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jun 2024 07:36:50 -0700 (PDT) From: Serge Semin To: Andrew Lunn , Heiner Kallweit , Russell King , Alexandre Torgue , Jose Abreu , Jose Abreu , Vladimir Oltean , Florian Fainelli , Maxime Chevallier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Serge Semin , Sagar Cheluvegowda , Abhishek Chauhan , Andrew Halaney , Jiawen Wu , Mengyuan Lou , Tomer Maimon , openbmc@lists.ozlabs.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 05/10] net: pcs: xpcs: Introduce DW XPCS info structure Date: Sun, 2 Jun 2024 17:36:19 +0300 Message-ID: <20240602143636.5839-6-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240602143636.5839-1-fancer.lancer@gmail.com> References: <20240602143636.5839-1-fancer.lancer@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org The being introduced structure will preserve the PCS and PMA IDs retrieved from the respective DW XPCS MMDs or potentially pre-defined by the client drivers. (The later change will be introduced later in the framework of the commit adding the memory-mapped DW XPCS devices support.) The structure fields are filled in in the xpcs_get_id() function, which used to be responsible for the PCS Device ID getting only. Besides of the PCS ID the method now fetches the PMA/PMD IDs too from MMD 1, which used to be done in xpcs_dev_flag(). The retrieved PMA ID will be from now utilized for the PMA-specific tweaks like it was introduced for the Wangxun TxGBE PCS in the commit f629acc6f210 ("net: pcs: xpcs: support to switch mode for Wangxun NICs"). Note 1. The xpcs_get_id() error-handling semantics has been changed. From now the error number will be returned from the function. There is no point in the next IOs or saving 0xffs and then looping over the actual device IDs if device couldn't be reached. -ENODEV will be returned if the very first IO operation failed thus indicating that no device could be found. Note 2. The PCS and PMA IDs macros have been converted to enum'es. The enum'es will be populated later in another commit with the virtual IDs identifying the DW XPCS devices which have some platform-specifics, but have been synthesized with the default PCS/PMA ID. Signed-off-by: Serge Semin --- Changelog v2: - This is a new patch introduced due to the commit adding the Wangxun TXGbe PCS support. --- drivers/net/pcs/pcs-xpcs.c | 104 +++++++++++++++++------------------ include/linux/pcs/pcs-xpcs.h | 28 ++++++---- 2 files changed, 67 insertions(+), 65 deletions(-) diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c index 0af6b5995113..e8d5fd43a357 100644 --- a/drivers/net/pcs/pcs-xpcs.c +++ b/drivers/net/pcs/pcs-xpcs.c @@ -237,29 +237,6 @@ int xpcs_write_vpcs(struct dw_xpcs *xpcs, int reg, u16 val) return xpcs_write_vendor(xpcs, MDIO_MMD_PCS, reg, val); } -static int xpcs_dev_flag(struct dw_xpcs *xpcs) -{ - int ret, oui; - - ret = xpcs_read(xpcs, MDIO_MMD_PMAPMD, MDIO_DEVID1); - if (ret < 0) - return ret; - - oui = ret; - - ret = xpcs_read(xpcs, MDIO_MMD_PMAPMD, MDIO_DEVID2); - if (ret < 0) - return ret; - - ret = (ret >> 10) & 0x3F; - oui |= ret << 16; - - if (oui == DW_OUI_WX) - xpcs->dev_flag = DW_DEV_TXGBE; - - return 0; -} - static int xpcs_poll_reset(struct dw_xpcs *xpcs, int dev) { /* Poll until the reset bit clears (50ms per retry == 0.6 sec) */ @@ -684,7 +661,7 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, { int ret, mdio_ctrl, tx_conf; - if (xpcs->dev_flag == DW_DEV_TXGBE) + if (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID) xpcs_write_vpcs(xpcs, DW_VR_XS_PCS_DIG_CTRL1, DW_CL37_BP | DW_EN_VSMMD1); /* For AN for C37 SGMII mode, the settings are :- @@ -722,7 +699,7 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, ret |= (DW_VR_MII_PCS_MODE_C37_SGMII << DW_VR_MII_AN_CTRL_PCS_MODE_SHIFT & DW_VR_MII_PCS_MODE_MASK); - if (xpcs->dev_flag == DW_DEV_TXGBE) { + if (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID) { ret |= DW_VR_MII_AN_CTRL_8BIT; /* Hardware requires it to be PHY side SGMII */ tx_conf = DW_VR_MII_TX_CONFIG_PHY_SIDE_SGMII; @@ -744,7 +721,7 @@ static int xpcs_config_aneg_c37_sgmii(struct dw_xpcs *xpcs, else ret &= ~DW_VR_MII_DIG_CTRL1_MAC_AUTO_SW; - if (xpcs->dev_flag == DW_DEV_TXGBE) + if (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID) ret |= DW_VR_MII_DIG_CTRL1_PHY_MODE_CTRL; ret = xpcs_write(xpcs, MDIO_MMD_VEND2, DW_VR_MII_DIG_CTRL1, ret); @@ -766,7 +743,7 @@ static int xpcs_config_aneg_c37_1000basex(struct dw_xpcs *xpcs, int ret, mdio_ctrl, adv; bool changed = 0; - if (xpcs->dev_flag == DW_DEV_TXGBE) + if (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID) xpcs_write_vpcs(xpcs, DW_VR_XS_PCS_DIG_CTRL1, DW_CL37_BP | DW_EN_VSMMD1); /* According to Chap 7.12, to set 1000BASE-X C37 AN, AN must @@ -857,7 +834,7 @@ int xpcs_do_config(struct dw_xpcs *xpcs, phy_interface_t interface, if (!compat) return -ENODEV; - if (xpcs->dev_flag == DW_DEV_TXGBE) { + if (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID) { ret = txgbe_xpcs_switch_mode(xpcs, interface); if (ret) return ret; @@ -1229,44 +1206,66 @@ static void xpcs_an_restart(struct phylink_pcs *pcs) } } -static u32 xpcs_get_id(struct dw_xpcs *xpcs) +static int xpcs_get_id(struct dw_xpcs *xpcs) { int ret; u32 id; - /* First, search C73 PCS using PCS MMD */ + /* First, search C73 PCS using PCS MMD 3. Return ENODEV if communication + * failed indicating that device couldn't be reached. + */ ret = xpcs_read(xpcs, MDIO_MMD_PCS, MII_PHYSID1); if (ret < 0) - return 0xffffffff; + return -ENODEV; id = ret << 16; ret = xpcs_read(xpcs, MDIO_MMD_PCS, MII_PHYSID2); if (ret < 0) - return 0xffffffff; + return ret; - /* If Device IDs are not all zeros or all ones, - * we found C73 AN-type device + id |= ret; + + /* If Device IDs are not all zeros or ones, then 10GBase-X/R or C73 + * KR/KX4 PCS found. Otherwise fallback to detecting 1000Base-X or C37 + * PCS in MII MMD 31. */ - if ((id | ret) && (id | ret) != 0xffffffff) - return id | ret; + if (!id || id == 0xffffffff) { + ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_PHYSID1); + if (ret < 0) + return ret; + + id = ret << 16; + + ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_PHYSID2); + if (ret < 0) + return ret; - /* Next, search C37 PCS using Vendor-Specific MII MMD */ - ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_PHYSID1); + id |= ret; + } + + xpcs->info.pcs = id; + + /* Find out PMA/PMD ID from MMD 1 device ID registers */ + ret = xpcs_read(xpcs, MDIO_MMD_PMAPMD, MDIO_DEVID1); if (ret < 0) - return 0xffffffff; + return ret; - id = ret << 16; + id = ret; - ret = xpcs_read(xpcs, MDIO_MMD_VEND2, MII_PHYSID2); + ret = xpcs_read(xpcs, MDIO_MMD_PMAPMD, MDIO_DEVID2); if (ret < 0) - return 0xffffffff; + return ret; + + /* Note the inverted dword order and masked out Model/Revision numbers + * with respect to what is done with the PCS ID... + */ + ret = (ret >> 10) & 0x3F; + id |= ret << 16; - /* If Device IDs are not all zeros, we found C37 AN-type device */ - if (id | ret) - return id | ret; + xpcs->info.pma = id; - return 0xffffffff; + return 0; } static const struct dw_xpcs_compat synopsys_xpcs_compat[DW_XPCS_INTERFACE_MAX] = { @@ -1390,15 +1389,16 @@ static void xpcs_free_data(struct dw_xpcs *xpcs) static int xpcs_init_id(struct dw_xpcs *xpcs) { - u32 xpcs_id; int i, ret; - xpcs_id = xpcs_get_id(xpcs); + ret = xpcs_get_id(xpcs); + if (ret < 0) + return ret; for (i = 0; i < ARRAY_SIZE(xpcs_desc_list); i++) { const struct dw_xpcs_desc *entry = &xpcs_desc_list[i]; - if ((xpcs_id & entry->mask) != entry->id) + if ((xpcs->info.pcs & entry->mask) != entry->id) continue; xpcs->desc = entry; @@ -1409,10 +1409,6 @@ static int xpcs_init_id(struct dw_xpcs *xpcs) if (!xpcs->desc) return -ENODEV; - ret = xpcs_dev_flag(xpcs); - if (ret < 0) - return ret; - return 0; } @@ -1424,7 +1420,7 @@ static int xpcs_init_iface(struct dw_xpcs *xpcs, phy_interface_t interface) if (!compat) return -EINVAL; - if (xpcs->dev_flag == DW_DEV_TXGBE) { + if (xpcs->info.pma == WX_TXGBE_XPCS_PMA_10G_ID) { xpcs->pcs.poll = false; return 0; } diff --git a/include/linux/pcs/pcs-xpcs.h b/include/linux/pcs/pcs-xpcs.h index e706bd16b986..1dc60f5e653f 100644 --- a/include/linux/pcs/pcs-xpcs.h +++ b/include/linux/pcs/pcs-xpcs.h @@ -9,11 +9,7 @@ #include #include - -#define NXP_SJA1105_XPCS_ID 0x00000010 -#define NXP_SJA1110_XPCS_ID 0x00000020 -#define DW_XPCS_ID 0x7996ced0 -#define DW_XPCS_ID_MASK 0xffffffff +#include /* AN mode */ #define DW_AN_C73 1 @@ -22,20 +18,30 @@ #define DW_AN_C37_1000BASEX 4 #define DW_10GBASER 5 -/* device vendor OUI */ -#define DW_OUI_WX 0x0018fc80 +struct dw_xpcs_desc; -/* dev_flag */ -#define DW_DEV_TXGBE BIT(0) +enum dw_xpcs_pcs_id { + NXP_SJA1105_XPCS_ID = 0x00000010, + NXP_SJA1110_XPCS_ID = 0x00000020, + DW_XPCS_ID = 0x7996ced0, + DW_XPCS_ID_MASK = 0xffffffff, +}; -struct dw_xpcs_desc; +enum dw_xpcs_pma_id { + WX_TXGBE_XPCS_PMA_10G_ID = 0x0018fc80, +}; + +struct dw_xpcs_info { + u32 pcs; + u32 pma; +}; struct dw_xpcs { + struct dw_xpcs_info info; const struct dw_xpcs_desc *desc; struct mdio_device *mdiodev; struct phylink_pcs pcs; phy_interface_t interface; - int dev_flag; }; int xpcs_get_an_mode(struct dw_xpcs *xpcs, phy_interface_t interface); From patchwork Sun Jun 2 14:36:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 13682903 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-lf1-f48.google.com (mail-lf1-f48.google.com [209.85.167.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C8D7B664C6; Sun, 2 Jun 2024 14:36:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339017; cv=none; b=Mp3qW2yrCAgOUiYvZjVqc7rckb3MvktLQWhzxJhT7rPMP/BYv2XR6XeVanRWDx49DAAUFtYNJFjT3rRGarMspgxqXvKNglDxOyycdhoS1xj7Ad7FTV2cFtnmuJPXh/S0hafBIa45asxEBYJrNRXzZICaIqWVKAYcTZ7M6bZAUhM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339017; c=relaxed/simple; bh=GHLa9eW7nXLKJN7GAD/YbS+QvkHmlF6GBBzmHwVUH8s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=rjcQ9hQuXgk1pCqq6qQyR4HHpHI5zn9Y+0ivRxikM0VJiQDjLImbdb82wHmUjaHYWkp8J16X/BQPiFvrU8D+x3xXDT6vEEV6d6CphuqYRXi5SC8OMmQPhxFG5/5nQkIZfwhmq84bwGsFtmRrbPymomPAY3PUYBLsw4ziVtu75E8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=llpKECYN; arc=none smtp.client-ip=209.85.167.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="llpKECYN" Received: by mail-lf1-f48.google.com with SMTP id 2adb3069b0e04-52b8e0e98adso2511481e87.0; Sun, 02 Jun 2024 07:36:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1717339014; x=1717943814; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Dl+LGarOyxT8j4YojtyaSAfvFQWXeJMpYxDCX8TzbE4=; b=llpKECYNGlbJa0Nk5hYu/22IzEa+WLX4KOVxlCPjQE/A+1CyteiQo5/vR3CGc/7FE8 3qGDyX+AFH6Jt7qoEj9LgPQ3cDN46Vv1A0HJYbPsCW48ibb7lBxCmOyM1P6w1+tYiNFU EX1eVBXzxRlm8SxCe/diyBqF/bT+UfbvcQsA/j4V9ayoL/fPkuuH/T1/yg2wi7XHw3WY mArePKfv6oZuiJtVuZMC+7pc2PW/ZlodADS/4ITR3f0tNEU5XrW6Y9ebpTvHOUFASx95 /QsPaKuUoo0X6flYAYLLJ1yquESHJ3EWfO2BVAbs8AfL+sL/RGSsW73K/OWjT3886M4N cfeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717339014; x=1717943814; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Dl+LGarOyxT8j4YojtyaSAfvFQWXeJMpYxDCX8TzbE4=; b=kvZwx4WkSA8+NbsjBlz3gH8gU1fgg+1UAhMdXazPIE6sqSLSNQWPan5qKV0uQpgr1i nhPk5e0rnCutscD+tDm3Ef4YKtG/j1uO46wyRAlCizH3tWgQhgrbdr4kyAqSXH+t0jKk Bk9qxT01zs0oEHJ9wilytJ5TGcuzFyk/80C1FPZrhOPPgPTzsZFMgBSeyvpVWOe6WDHX ox4S5mencF3dFEtEutxAFUyPViryVmBO6cYqa0hmZttBXcGFaY1VFJ1KFx2jq1fM31nx l8YlmMp96tHy9xzwiUNYocyrY+m6v6+vDVFzvz6utd4PqDK7GmYPbFKBoDWi/LL0REQ3 FzOg== X-Forwarded-Encrypted: i=1; AJvYcCUku9v+46ySDgA0CLoKbWoSFLrRT5Djzisv8uR9wTlvHJyAfZKSfn+0wfL7++3xnX6h9f22vhn5QGCzrzf07aY5RyMHH5HBYxnWfUmhAa1pm6ouJh7NkZS0kSU/gjTak30mszJrIJTkdG5yx+4gkiga5eIoZAri/ngU2n9nBZQDew== X-Gm-Message-State: AOJu0Yy//5nXHfC7ZZ6IqE93fpGgwK9zx08xz/ipOoQKu7NcxY8kSz6s hkUDb2WNDbIGCGUE6vMmhJ9Sisitwyg7atOUxq7UXz9J1MTi37df X-Google-Smtp-Source: AGHT+IG9A9+aPM7LWHLUZMZ13ql+h6wgBzijmSAf5TnSE582UtzoIEOPiQkQaci+dc385JZ92IKbhg== X-Received: by 2002:a19:384d:0:b0:529:c0c6:faad with SMTP id 2adb3069b0e04-52b89596984mr4646645e87.28.1717339014019; Sun, 02 Jun 2024 07:36:54 -0700 (PDT) Received: from localhost ([178.178.142.64]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-52b84d764bbsm956841e87.179.2024.06.02.07.36.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jun 2024 07:36:53 -0700 (PDT) From: Serge Semin To: Andrew Lunn , Heiner Kallweit , Russell King , Alexandre Torgue , Jose Abreu , Jose Abreu , Vladimir Oltean , Florian Fainelli , Maxime Chevallier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring Cc: Serge Semin , Sagar Cheluvegowda , Abhishek Chauhan , Andrew Halaney , Jiawen Wu , Mengyuan Lou , Tomer Maimon , openbmc@lists.ozlabs.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 06/10] dt-bindings: net: Add Synopsys DW xPCS bindings Date: Sun, 2 Jun 2024 17:36:20 +0300 Message-ID: <20240602143636.5839-7-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240602143636.5839-1-fancer.lancer@gmail.com> References: <20240602143636.5839-1-fancer.lancer@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Synopsys DesignWare XPCS IP-core is a Physical Coding Sublayer (PCS) layer providing an interface between the Media Access Control (MAC) and Physical Medium Attachment Sublayer (PMA) through a Media independent interface. From software point of view it exposes IEEE std. Clause 45 CSR space and can be accessible either by MDIO or MCI/APB3 bus interfaces. In the former case the PCS device is supposed to be defined under the respective MDIO bus DT-node. In the later case the DW xPCS will be just a normal IO memory-mapped device. Besides of that DW XPCS DT-nodes can have an interrupt signal and clock source properties specified. The former one indicates the Clause 73/37 auto-negotiation events like: negotiation page received, AN is completed or incompatible link partner. The clock DT-properties can describe up to three clock sources: peripheral bus clock source, internal reference clock and the externally connected reference clock. Finally the DW XPCS IP-core can be optionally synthesized with a vendor-specific interface connected to the Synopsys PMA (also called DesignWare Consumer/Enterprise PHY). Alas that isn't auto-detectable in a portable way. So if the DW XPCS device has the respective PMA attached then it should be reflected in the DT-node compatible string so the driver would be aware of the PMA-specific device capabilities (mainly connected with CSRs available for the fine-tunings). Signed-off-by: Serge Semin --- Changelog v2: - Drop the Management Interface DT-node bindings. DW xPCS with MCI/APB3 interface is just a normal memory-mapped device. --- .../bindings/net/pcs/snps,dw-xpcs.yaml | 133 ++++++++++++++++++ 1 file changed, 133 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/pcs/snps,dw-xpcs.yaml diff --git a/Documentation/devicetree/bindings/net/pcs/snps,dw-xpcs.yaml b/Documentation/devicetree/bindings/net/pcs/snps,dw-xpcs.yaml new file mode 100644 index 000000000000..7927bceefbf3 --- /dev/null +++ b/Documentation/devicetree/bindings/net/pcs/snps,dw-xpcs.yaml @@ -0,0 +1,133 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/pcs/snps,dw-xpcs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Synopsys DesignWare Ethernet PCS + +maintainers: + - Serge Semin + +description: + Synopsys DesignWare Ethernet Physical Coding Sublayer provides an interface + between Media Access Control and Physical Medium Attachment Sublayer through + the Media Independent Interface (XGMII, USXGMII, XLGMII, GMII, etc) + controlled by means of the IEEE std. Clause 45 registers set. The PCS can be + optionally synthesized with a vendor-specific interface connected to + Synopsys PMA (also called DesignWare Consumer/Enterprise PHY) although in + general it can be used to communicate with any compatible PHY. + + The PCS CSRs can be accessible either over the Ethernet MDIO bus or directly + by means of the APB3/MCI interfaces. In the later case the XPCS can be mapped + right to the system IO memory space. + +properties: + compatible: + oneOf: + - description: Synopsys DesignWare XPCS with none or unknown PMA + const: snps,dw-xpcs + - description: Synopsys DesignWare XPCS with Consumer Gen1 3G PMA + const: snps,dw-xpcs-gen1-3g + - description: Synopsys DesignWare XPCS with Consumer Gen2 3G PMA + const: snps,dw-xpcs-gen2-3g + - description: Synopsys DesignWare XPCS with Consumer Gen2 6G PMA + const: snps,dw-xpcs-gen2-6g + - description: Synopsys DesignWare XPCS with Consumer Gen4 3G PMA + const: snps,dw-xpcs-gen4-3g + - description: Synopsys DesignWare XPCS with Consumer Gen4 6G PMA + const: snps,dw-xpcs-gen4-6g + - description: Synopsys DesignWare XPCS with Consumer Gen5 10G PMA + const: snps,dw-xpcs-gen5-10g + - description: Synopsys DesignWare XPCS with Consumer Gen5 12G PMA + const: snps,dw-xpcs-gen5-12g + + reg: + items: + - description: + In case of the MDIO management interface this just a 5-bits ID + of the MDIO bus device. If DW XPCS CSRs space is accessed over the + MCI or APB3 management interfaces, then the space mapping can be + either 'direct' or 'indirect'. In the former case all Clause 45 + registers are contiguously mapped within the address space + MMD '[20:16]', Reg '[15:0]'. In the later case the space is divided + to the multiple 256 register sets. There is a special viewport CSR + which is responsible for the set selection. The upper part of + the CSR address MMD+REG[20:8] is supposed to be written in there + so the corresponding subset would be mapped to the lowest 255 CSRs. + + reg-names: + items: + - enum: [ direct, indirect ] + + reg-io-width: + description: + The way the CSRs are mapped to the memory is platform depended. Since + each Clause 45 CSR is of 16-bits wide the access instructions must be + two bytes aligned at least. + default: 2 + enum: [ 2, 4 ] + + interrupts: + description: + System interface interrupt output (sbd_intr_o) indicating Clause 73/37 + auto-negotiation events':' Page received, AN is completed or incompatible + link partner. + maxItems: 1 + + clocks: + description: + Both MCI and APB3 interfaces are supposed to be equipped with a clock + source connected via the clk_csr_i line. + + PCS/PMA layer can be clocked by an internal reference clock source + (phyN_core_refclk) or by an externally connected (phyN_pad_refclk) clock + generator. Both clocks can be supplied at a time. + minItems: 1 + maxItems: 3 + + clock-names: + minItems: 1 + maxItems: 3 + anyOf: + - items: + enum: [ core, pad ] + - items: + enum: [ pclk, core, pad ] + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + + ethernet-pcs@1f05d000 { + compatible = "snps,dw-xpcs"; + reg = <0x1f05d000 0x1000>; + reg-names = "indirect"; + + reg-io-width = <4>; + + interrupts = <79 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&ccu_pclk>, <&ccu_core>, <&ccu_pad>; + clock-names = "pclk", "core", "pad"; + }; + - | + mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + ethernet-pcs@0 { + compatible = "snps,dw-xpcs"; + reg = <0>; + + clocks = <&ccu_core>, <&ccu_pad>; + clock-names = "core", "pad"; + }; + }; +... From patchwork Sun Jun 2 14:36:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 13682904 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-lf1-f52.google.com (mail-lf1-f52.google.com [209.85.167.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 17B296EB4A; Sun, 2 Jun 2024 14:36:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339022; cv=none; b=dPej8BxueU9GtHojXNTQ7t3IqeW15NyaPVcwaOe7i5Iq3fYZnXcnLoIjfXbAwsQ/Eeu4Xjp/JJJkBsgZbk9BffddhxSu3Q0g1CnVRiksnpeiNA1KlnZTkS+YBV3kQaMPCRaJokRVH6RVXIm3wdhh91belic9YGjrrQqdumUJ0CQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339022; c=relaxed/simple; bh=ve01MIedvo8jvaXJ84ebeu4oDxktqdyHOP8iH7L4ivY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fdE1bxqAh6uNQxdgYydj6Hh+hbsiBJ+TY181GtQYUCsVi6AXHSWOOkqeuupGwjJVCjyB+4verBvL4lMmN1N2JMr2WTH5iWvXWfp74cpoRXqAUGar7rqUar6Kciu2qJ0tcn+Iq19VrDr6PrXMlYvVFWSkMvDR+Ra9Svh1MGuwatM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=LumrAMTl; arc=none smtp.client-ip=209.85.167.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="LumrAMTl" Received: by mail-lf1-f52.google.com with SMTP id 2adb3069b0e04-52b92e73e2fso1302129e87.2; Sun, 02 Jun 2024 07:36:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1717339017; x=1717943817; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QGv3NbBqPiem8aYcRxFdqQkSRQ9pcDiqUHD8qSmG7rM=; b=LumrAMTl2r5v43CO4tztH1WXla+jmhfIz1jreXjiWbQNfYT/PtbTanaqSSHiR3zcm3 /GPT4c2MNaKjTjKjjkyU9icQzqx9xac31yF0zSMUlQa6cuOt4Sp1w5VTa2meA13vBVqY byTDylObS0N0Mhv17htCJatMPA3jWJqxrbC8YY1ftj0YIDD3tHNq+HDTjSgF1o4AVyOz gdDdMVAVkrrGekwY92pc35XPBKTMPNCe8dZgGBhTW0dY+kG689udqGIM5IThHZLyENqc H8w4SB0+XtnghGBQir/2dPe4Vk+Qshadqc5FTclztc3RD7M5s21Q6OHQSLqovhsxvJk2 iLjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717339017; x=1717943817; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QGv3NbBqPiem8aYcRxFdqQkSRQ9pcDiqUHD8qSmG7rM=; b=ag+4M8XSvGpCWIUXzgkLEKCLCnj9BK+2GieRxKU/OmcAzvXEMY0aNaRoWYT+Di8F97 0xQbPptmS27J+Lwzh4ieQuKGG5U+nbSp/hhRCIQHlFHQE0SqcTZsKAyQVuoz+vc63xqv hYPf0UjjnWrRbejnVrmO6TNFdj5Av82nh+kEr3Fk9tyfcwUyGEPp0O/DlTRcJdgoMSNz sHE/DeV8Ic8/VkPkOm0D1jNYgnma2uBxSgGivfPHyUsMXso1tn+XBvB01i4NGWhTgmtI dBSBi4kVcNShxHHim3nMofGdglVAm8B9OQJ4AKtzz1n5ozPPlw6flDTpEQqcGqh1pPwZ 3D/Q== X-Forwarded-Encrypted: i=1; AJvYcCUBPbIsMMl6z+UUffthNFSoT0QXFAoG7wRVKm2LudlMLYlIqbfqV/pt+yOAUVle4XWiNAj+f57UbUNZJ65rC3iZKiR3NzKLKmTlGMNz7G1HZPqnU4Nk/EcCdQr1u1QQVstRJK/JhxADWLGCYf0tXzeEeAX0pi8EZUvFq70hakcH9w== X-Gm-Message-State: AOJu0YxxIk3WcnmpYXWVUNE8EsmfE5Sf/jVBwf9dI8KTdnCcEBmW+aJ4 PxbUTcHqawq/T8EsESelZThkam8PS0yCcApeGNeB62stjRgSZV+A X-Google-Smtp-Source: AGHT+IFkb663DNOyqdsore0QGUpv7EOg2/8eNJ3suh3po+h9pXROfK9knMlzsNFdFPcXReK5ys+FeQ== X-Received: by 2002:a05:6512:54e:b0:52b:7945:a434 with SMTP id 2adb3069b0e04-52b8957aecfmr4486424e87.28.1717339016875; Sun, 02 Jun 2024 07:36:56 -0700 (PDT) Received: from localhost ([178.178.142.64]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-52b84d75fe2sm961334e87.128.2024.06.02.07.36.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jun 2024 07:36:56 -0700 (PDT) From: Serge Semin To: Andrew Lunn , Heiner Kallweit , Russell King , Alexandre Torgue , Jose Abreu , Jose Abreu , Vladimir Oltean , Florian Fainelli , Maxime Chevallier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Serge Semin , Sagar Cheluvegowda , Abhishek Chauhan , Andrew Halaney , Jiawen Wu , Mengyuan Lou , Tomer Maimon , openbmc@lists.ozlabs.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 07/10] net: pcs: xpcs: Add Synopsys DW xPCS platform device driver Date: Sun, 2 Jun 2024 17:36:21 +0300 Message-ID: <20240602143636.5839-8-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240602143636.5839-1-fancer.lancer@gmail.com> References: <20240602143636.5839-1-fancer.lancer@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Synopsys DesignWare XPCS IP-core can be synthesized with the device CSRs being accessible over the MCI or APB3 interface instead of the MDIO bus (see the CSR_INTERFACE HDL parameter). Thus all the PCS registers can be just memory mapped and be a subject of the standard MMIO operations of course taking into account the peculiarities of the Clause C45 CSRs mapping. From that perspective the DW XPCS devices would look as just normal platform devices for the kernel. On the other hand in order to have the DW XPCS devices handled by the pcs-xpcs.c driver they need to be registered in the framework of the MDIO-subsystem. So the suggested change is about providing a DW XPCS platform device driver registering a virtual MDIO-bus with a single MDIO-device representing the DW XPCS device. DW XPCS platform device is supposed to be described by the respective compatible string "snps,dw-xpcs" (or with the PMA-specific compatible string), CSRs memory space and optional peripheral bus and reference clock sources. Depending on the INDIRECT_ACCESS IP-core synthesize parameter the memory-mapped reg-space can be represented as either directly or indirectly mapped Clause 45 space. In the former case the particular address is determined based on the MMD device and the registers offset (5 + 16 bits all together) within the device reg-space. In the later case there is only 8 lower address bits are utilized for the registers mapping (255 CSRs). The upper bits are supposed to be written into the respective viewport CSR in order to select the respective MMD sub-page. Note, only the peripheral bus clock source is requested in the platform device probe procedure. The core and pad clocks handling has been implemented in the framework of the xpcs_create() method intentionally since the clocks-related setups are supposed to be performed later, during the DW XPCS main configuration procedures. (For instance they will be required for the DW Gen5 10G PMA configuration.) Signed-off-by: Serge Semin --- Changelog v2: - This is a new patch created by merging in two former patches: [PATCH net-next 09/16] net: mdio: Add Synopsys DW XPCS management interface support [PATCH net-next 10/16] net: pcs: xpcs: Add generic DW XPCS MDIO-device support - Drop inline'es from the statically defined in *.c methods. (@Maxime) --- drivers/net/pcs/Kconfig | 6 +- drivers/net/pcs/Makefile | 3 +- drivers/net/pcs/pcs-xpcs-plat.c | 460 ++++++++++++++++++++++++++++++++ drivers/net/pcs/pcs-xpcs.c | 63 ++++- drivers/net/pcs/pcs-xpcs.h | 6 + include/linux/pcs/pcs-xpcs.h | 18 ++ 6 files changed, 547 insertions(+), 9 deletions(-) create mode 100644 drivers/net/pcs/pcs-xpcs-plat.c diff --git a/drivers/net/pcs/Kconfig b/drivers/net/pcs/Kconfig index 87cf308fc6d8..f6aa437473de 100644 --- a/drivers/net/pcs/Kconfig +++ b/drivers/net/pcs/Kconfig @@ -6,11 +6,11 @@ menu "PCS device drivers" config PCS_XPCS - tristate + tristate "Synopsys DesignWare Ethernet XPCS" select PHYLINK help - This module provides helper functions for Synopsys DesignWare XPCS - controllers. + This module provides a driver and helper functions for Synopsys + DesignWare XPCS controllers. config PCS_LYNX tristate diff --git a/drivers/net/pcs/Makefile b/drivers/net/pcs/Makefile index fb1694192ae6..4f7920618b90 100644 --- a/drivers/net/pcs/Makefile +++ b/drivers/net/pcs/Makefile @@ -1,7 +1,8 @@ # SPDX-License-Identifier: GPL-2.0 # Makefile for Linux PCS drivers -pcs_xpcs-$(CONFIG_PCS_XPCS) := pcs-xpcs.o pcs-xpcs-nxp.o pcs-xpcs-wx.o +pcs_xpcs-$(CONFIG_PCS_XPCS) := pcs-xpcs.o pcs-xpcs-plat.o \ + pcs-xpcs-nxp.o pcs-xpcs-wx.o obj-$(CONFIG_PCS_XPCS) += pcs_xpcs.o obj-$(CONFIG_PCS_LYNX) += pcs-lynx.o diff --git a/drivers/net/pcs/pcs-xpcs-plat.c b/drivers/net/pcs/pcs-xpcs-plat.c new file mode 100644 index 000000000000..5b706f6939a6 --- /dev/null +++ b/drivers/net/pcs/pcs-xpcs-plat.c @@ -0,0 +1,460 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Synopsys DesignWare XPCS platform device driver + * + * Copyright (C) 2024 Serge Semin + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "pcs-xpcs.h" + +/* Page select register for the indirect MMIO CSRs access */ +#define DW_VR_CSR_VIEWPORT 0xff + +struct dw_xpcs_plat { + struct platform_device *pdev; + struct mii_bus *bus; + bool reg_indir; + int reg_width; + void __iomem *reg_base; + struct clk *pclk; +}; + +static ptrdiff_t xpcs_mmio_addr_format(int dev, int reg) +{ + return FIELD_PREP(0x1f0000, dev) | FIELD_PREP(0xffff, reg); +} + +static u16 xpcs_mmio_addr_page(ptrdiff_t csr) +{ + return FIELD_GET(0x1fff00, csr); +} + +static ptrdiff_t xpcs_mmio_addr_offset(ptrdiff_t csr) +{ + return FIELD_GET(0xff, csr); +} + +static int xpcs_mmio_read_reg_indirect(struct dw_xpcs_plat *pxpcs, + int dev, int reg) +{ + ptrdiff_t csr, ofs; + u16 page; + int ret; + + csr = xpcs_mmio_addr_format(dev, reg); + page = xpcs_mmio_addr_page(csr); + ofs = xpcs_mmio_addr_offset(csr); + + ret = pm_runtime_resume_and_get(&pxpcs->pdev->dev); + if (ret) + return ret; + + switch (pxpcs->reg_width) { + case 4: + writel(page, pxpcs->reg_base + (DW_VR_CSR_VIEWPORT << 2)); + ret = readl(pxpcs->reg_base + (ofs << 2)); + break; + default: + writew(page, pxpcs->reg_base + (DW_VR_CSR_VIEWPORT << 1)); + ret = readw(pxpcs->reg_base + (ofs << 1)); + break; + } + + pm_runtime_put(&pxpcs->pdev->dev); + + return ret; +} + +static int xpcs_mmio_write_reg_indirect(struct dw_xpcs_plat *pxpcs, + int dev, int reg, u16 val) +{ + ptrdiff_t csr, ofs; + u16 page; + int ret; + + csr = xpcs_mmio_addr_format(dev, reg); + page = xpcs_mmio_addr_page(csr); + ofs = xpcs_mmio_addr_offset(csr); + + ret = pm_runtime_resume_and_get(&pxpcs->pdev->dev); + if (ret) + return ret; + + switch (pxpcs->reg_width) { + case 4: + writel(page, pxpcs->reg_base + (DW_VR_CSR_VIEWPORT << 2)); + writel(val, pxpcs->reg_base + (ofs << 2)); + break; + default: + writew(page, pxpcs->reg_base + (DW_VR_CSR_VIEWPORT << 1)); + writew(val, pxpcs->reg_base + (ofs << 1)); + break; + } + + pm_runtime_put(&pxpcs->pdev->dev); + + return 0; +} + +static int xpcs_mmio_read_reg_direct(struct dw_xpcs_plat *pxpcs, + int dev, int reg) +{ + ptrdiff_t csr; + int ret; + + csr = xpcs_mmio_addr_format(dev, reg); + + ret = pm_runtime_resume_and_get(&pxpcs->pdev->dev); + if (ret) + return ret; + + switch (pxpcs->reg_width) { + case 4: + ret = readl(pxpcs->reg_base + (csr << 2)); + break; + default: + ret = readw(pxpcs->reg_base + (csr << 1)); + break; + } + + pm_runtime_put(&pxpcs->pdev->dev); + + return ret; +} + +static int xpcs_mmio_write_reg_direct(struct dw_xpcs_plat *pxpcs, + int dev, int reg, u16 val) +{ + ptrdiff_t csr; + int ret; + + csr = xpcs_mmio_addr_format(dev, reg); + + ret = pm_runtime_resume_and_get(&pxpcs->pdev->dev); + if (ret) + return ret; + + switch (pxpcs->reg_width) { + case 4: + writel(val, pxpcs->reg_base + (csr << 2)); + break; + default: + writew(val, pxpcs->reg_base + (csr << 1)); + break; + } + + pm_runtime_put(&pxpcs->pdev->dev); + + return 0; +} + +static int xpcs_mmio_read_c22(struct mii_bus *bus, int addr, int reg) +{ + struct dw_xpcs_plat *pxpcs = bus->priv; + + if (addr != 0) + return -ENODEV; + + if (pxpcs->reg_indir) + return xpcs_mmio_read_reg_indirect(pxpcs, MDIO_MMD_VEND2, reg); + else + return xpcs_mmio_read_reg_direct(pxpcs, MDIO_MMD_VEND2, reg); +} + +static int xpcs_mmio_write_c22(struct mii_bus *bus, int addr, int reg, u16 val) +{ + struct dw_xpcs_plat *pxpcs = bus->priv; + + if (addr != 0) + return -ENODEV; + + if (pxpcs->reg_indir) + return xpcs_mmio_write_reg_indirect(pxpcs, MDIO_MMD_VEND2, reg, val); + else + return xpcs_mmio_write_reg_direct(pxpcs, MDIO_MMD_VEND2, reg, val); +} + +static int xpcs_mmio_read_c45(struct mii_bus *bus, int addr, int dev, int reg) +{ + struct dw_xpcs_plat *pxpcs = bus->priv; + + if (addr != 0) + return -ENODEV; + + if (pxpcs->reg_indir) + return xpcs_mmio_read_reg_indirect(pxpcs, dev, reg); + else + return xpcs_mmio_read_reg_direct(pxpcs, dev, reg); +} + +static int xpcs_mmio_write_c45(struct mii_bus *bus, int addr, int dev, + int reg, u16 val) +{ + struct dw_xpcs_plat *pxpcs = bus->priv; + + if (addr != 0) + return -ENODEV; + + if (pxpcs->reg_indir) + return xpcs_mmio_write_reg_indirect(pxpcs, dev, reg, val); + else + return xpcs_mmio_write_reg_direct(pxpcs, dev, reg, val); +} + +static struct dw_xpcs_plat *xpcs_plat_create_data(struct platform_device *pdev) +{ + struct dw_xpcs_plat *pxpcs; + + pxpcs = devm_kzalloc(&pdev->dev, sizeof(*pxpcs), GFP_KERNEL); + if (!pxpcs) + return ERR_PTR(-ENOMEM); + + pxpcs->pdev = pdev; + + dev_set_drvdata(&pdev->dev, pxpcs); + + return pxpcs; +} + +static int xpcs_plat_init_res(struct dw_xpcs_plat *pxpcs) +{ + struct platform_device *pdev = pxpcs->pdev; + struct device *dev = &pdev->dev; + resource_size_t spc_size; + struct resource *res; + + if (!device_property_read_u32(dev, "reg-io-width", &pxpcs->reg_width)) { + if (pxpcs->reg_width != 2 && pxpcs->reg_width != 4) { + dev_err(dev, "Invalid reg-space data width\n"); + return -EINVAL; + } + } else { + pxpcs->reg_width = 2; + } + + res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "direct") ?: + platform_get_resource_byname(pdev, IORESOURCE_MEM, "indirect"); + if (!res) { + dev_err(dev, "No reg-space found\n"); + return -EINVAL; + } + + if (!strcmp(res->name, "indirect")) + pxpcs->reg_indir = true; + + if (pxpcs->reg_indir) + spc_size = pxpcs->reg_width * SZ_256; + else + spc_size = pxpcs->reg_width * SZ_2M; + + if (resource_size(res) < spc_size) { + dev_err(dev, "Invalid reg-space size\n"); + return -EINVAL; + } + + pxpcs->reg_base = devm_ioremap_resource(dev, res); + if (IS_ERR(pxpcs->reg_base)) { + dev_err(dev, "Failed to map reg-space\n"); + return PTR_ERR(pxpcs->reg_base); + } + + return 0; +} + +static int xpcs_plat_init_clk(struct dw_xpcs_plat *pxpcs) +{ + struct device *dev = &pxpcs->pdev->dev; + int ret; + + pxpcs->pclk = devm_clk_get(dev, "pclk"); + if (IS_ERR(pxpcs->pclk)) + return dev_err_probe(dev, PTR_ERR(pxpcs->pclk), + "Failed to get ref clock\n"); + + pm_runtime_set_active(dev); + ret = devm_pm_runtime_enable(dev); + if (ret) { + dev_err(dev, "Failed to enable runtime-PM\n"); + return ret; + } + + return 0; +} + +static int xpcs_plat_init_bus(struct dw_xpcs_plat *pxpcs) +{ + struct device *dev = &pxpcs->pdev->dev; + static atomic_t id = ATOMIC_INIT(-1); + int ret; + + pxpcs->bus = devm_mdiobus_alloc_size(dev, 0); + if (!pxpcs->bus) + return -ENOMEM; + + pxpcs->bus->name = "DW XPCS MCI/APB3"; + pxpcs->bus->read = xpcs_mmio_read_c22; + pxpcs->bus->write = xpcs_mmio_write_c22; + pxpcs->bus->read_c45 = xpcs_mmio_read_c45; + pxpcs->bus->write_c45 = xpcs_mmio_write_c45; + pxpcs->bus->phy_mask = ~0; + pxpcs->bus->parent = dev; + pxpcs->bus->priv = pxpcs; + + snprintf(pxpcs->bus->id, MII_BUS_ID_SIZE, + "dwxpcs-%x", atomic_inc_return(&id)); + + /* MDIO-bus here serves as just a back-end engine abstracting out + * the MDIO and MCI/APB3 IO interfaces utilized for the DW XPCS CSRs + * access. + */ + ret = devm_mdiobus_register(dev, pxpcs->bus); + if (ret) { + dev_err(dev, "Failed to create MDIO bus\n"); + return ret; + } + + return 0; +} + +/* Note there is no need in the next function antagonist because the MDIO-bus + * de-registration will effectively remove and destroy all the MDIO-devices + * registered on the bus. + */ +static int xpcs_plat_init_dev(struct dw_xpcs_plat *pxpcs) +{ + struct device *dev = &pxpcs->pdev->dev; + struct mdio_device *mdiodev; + int ret; + + /* There is a single memory-mapped DW XPCS device */ + mdiodev = mdio_device_create(pxpcs->bus, 0); + if (IS_ERR(mdiodev)) + return PTR_ERR(mdiodev); + + /* Associate the FW-node with the device structure so it can be looked + * up later. Make sure DD-core is aware of the OF-node being re-used. + */ + device_set_node(&mdiodev->dev, fwnode_handle_get(dev_fwnode(dev))); + mdiodev->dev.of_node_reused = true; + + /* Pass the data further so the DW XPCS driver core could use it */ + mdiodev->dev.platform_data = (void *)device_get_match_data(dev); + + ret = mdio_device_register(mdiodev); + if (ret) { + dev_err(dev, "Failed to register MDIO device\n"); + goto err_clean_data; + } + + return 0; + +err_clean_data: + mdiodev->dev.platform_data = NULL; + + fwnode_handle_put(dev_fwnode(&mdiodev->dev)); + device_set_node(&mdiodev->dev, NULL); + + mdio_device_free(mdiodev); + + return ret; +} + +static int xpcs_plat_probe(struct platform_device *pdev) +{ + struct dw_xpcs_plat *pxpcs; + int ret; + + pxpcs = xpcs_plat_create_data(pdev); + if (IS_ERR(pxpcs)) + return PTR_ERR(pxpcs); + + ret = xpcs_plat_init_res(pxpcs); + if (ret) + return ret; + + ret = xpcs_plat_init_clk(pxpcs); + if (ret) + return ret; + + ret = xpcs_plat_init_bus(pxpcs); + if (ret) + return ret; + + ret = xpcs_plat_init_dev(pxpcs); + if (ret) + return ret; + + return 0; +} + +static int __maybe_unused xpcs_plat_pm_runtime_suspend(struct device *dev) +{ + struct dw_xpcs_plat *pxpcs = dev_get_drvdata(dev); + + clk_disable_unprepare(pxpcs->pclk); + + return 0; +} + +static int __maybe_unused xpcs_plat_pm_runtime_resume(struct device *dev) +{ + struct dw_xpcs_plat *pxpcs = dev_get_drvdata(dev); + + return clk_prepare_enable(pxpcs->pclk); +} + +const struct dev_pm_ops xpcs_plat_pm_ops = { + SET_RUNTIME_PM_OPS(xpcs_plat_pm_runtime_suspend, + xpcs_plat_pm_runtime_resume, + NULL) +}; + +DW_XPCS_INFO_DECLARE(xpcs_generic, DW_XPCS_ID_NATIVE, DW_XPCS_PMA_ID_NATIVE); +DW_XPCS_INFO_DECLARE(xpcs_pma_gen1_3g, DW_XPCS_ID_NATIVE, DW_XPCS_PMA_GEN1_3G_ID); +DW_XPCS_INFO_DECLARE(xpcs_pma_gen2_3g, DW_XPCS_ID_NATIVE, DW_XPCS_PMA_GEN2_3G_ID); +DW_XPCS_INFO_DECLARE(xpcs_pma_gen2_6g, DW_XPCS_ID_NATIVE, DW_XPCS_PMA_GEN2_6G_ID); +DW_XPCS_INFO_DECLARE(xpcs_pma_gen4_3g, DW_XPCS_ID_NATIVE, DW_XPCS_PMA_GEN4_3G_ID); +DW_XPCS_INFO_DECLARE(xpcs_pma_gen4_6g, DW_XPCS_ID_NATIVE, DW_XPCS_PMA_GEN4_6G_ID); +DW_XPCS_INFO_DECLARE(xpcs_pma_gen5_10g, DW_XPCS_ID_NATIVE, DW_XPCS_PMA_GEN5_10G_ID); +DW_XPCS_INFO_DECLARE(xpcs_pma_gen5_12g, DW_XPCS_ID_NATIVE, DW_XPCS_PMA_GEN5_12G_ID); + +static const struct of_device_id xpcs_of_ids[] = { + { .compatible = "snps,dw-xpcs", .data = &xpcs_generic }, + { .compatible = "snps,dw-xpcs-gen1-3g", .data = &xpcs_pma_gen1_3g }, + { .compatible = "snps,dw-xpcs-gen2-3g", .data = &xpcs_pma_gen2_3g }, + { .compatible = "snps,dw-xpcs-gen2-6g", .data = &xpcs_pma_gen2_6g }, + { .compatible = "snps,dw-xpcs-gen4-3g", .data = &xpcs_pma_gen4_3g }, + { .compatible = "snps,dw-xpcs-gen4-6g", .data = &xpcs_pma_gen4_6g }, + { .compatible = "snps,dw-xpcs-gen5-10g", .data = &xpcs_pma_gen5_10g }, + { .compatible = "snps,dw-xpcs-gen5-12g", .data = &xpcs_pma_gen5_12g }, + { /* sentinel */ }, +}; +MODULE_DEVICE_TABLE(of, xpcs_of_ids); + +static struct platform_driver xpcs_plat_driver = { + .probe = xpcs_plat_probe, + .driver = { + .name = "dwxpcs", + .pm = &xpcs_plat_pm_ops, + .of_match_table = xpcs_of_ids, + }, +}; +module_platform_driver(xpcs_plat_driver); + +MODULE_DESCRIPTION("Synopsys DesignWare XPCS platform device driver"); +MODULE_AUTHOR("Signed-off-by: Serge Semin "); +MODULE_LICENSE("GPL"); diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c index e8d5fd43a357..8f7e3af64fcc 100644 --- a/drivers/net/pcs/pcs-xpcs.c +++ b/drivers/net/pcs/pcs-xpcs.c @@ -6,6 +6,7 @@ * Author: Jose Abreu */ +#include #include #include #include @@ -1244,7 +1245,9 @@ static int xpcs_get_id(struct dw_xpcs *xpcs) id |= ret; } - xpcs->info.pcs = id; + /* Set the PCS ID if it hasn't been pre-initialized */ + if (xpcs->info.pcs == DW_XPCS_ID_NATIVE) + xpcs->info.pcs = id; /* Find out PMA/PMD ID from MMD 1 device ID registers */ ret = xpcs_read(xpcs, MDIO_MMD_PMAPMD, MDIO_DEVID1); @@ -1263,7 +1266,9 @@ static int xpcs_get_id(struct dw_xpcs *xpcs) ret = (ret >> 10) & 0x3F; id |= ret << 16; - xpcs->info.pma = id; + /* Set the PMA ID if it hasn't been pre-initialized */ + if (xpcs->info.pma == DW_XPCS_PMA_ID_NATIVE) + xpcs->info.pma = id; return 0; } @@ -1387,10 +1392,49 @@ static void xpcs_free_data(struct dw_xpcs *xpcs) kfree(xpcs); } +static int xpcs_init_clks(struct dw_xpcs *xpcs) +{ + static const char *ids[DW_XPCS_NUM_CLKS] = { + [DW_XPCS_CORE_CLK] = "core", + [DW_XPCS_PAD_CLK] = "pad", + }; + struct device *dev = &xpcs->mdiodev->dev; + int ret, i; + + for (i = 0; i < DW_XPCS_NUM_CLKS; ++i) + xpcs->clks[i].id = ids[i]; + + ret = clk_bulk_get_optional(dev, DW_XPCS_NUM_CLKS, xpcs->clks); + if (ret) + return dev_err_probe(dev, ret, "Failed to get clocks\n"); + + ret = clk_bulk_prepare_enable(DW_XPCS_NUM_CLKS, xpcs->clks); + if (ret) + return dev_err_probe(dev, ret, "Failed to enable clocks\n"); + + return 0; +} + +static void xpcs_clear_clks(struct dw_xpcs *xpcs) +{ + clk_bulk_disable_unprepare(DW_XPCS_NUM_CLKS, xpcs->clks); + + clk_bulk_put(DW_XPCS_NUM_CLKS, xpcs->clks); +} + static int xpcs_init_id(struct dw_xpcs *xpcs) { + const struct dw_xpcs_info *info; int i, ret; + info = dev_get_platdata(&xpcs->mdiodev->dev); + if (!info) { + xpcs->info.pcs = DW_XPCS_ID_NATIVE; + xpcs->info.pma = DW_XPCS_PMA_ID_NATIVE; + } else { + xpcs->info = *info; + } + ret = xpcs_get_id(xpcs); if (ret < 0) return ret; @@ -1438,17 +1482,24 @@ static struct dw_xpcs *xpcs_create(struct mdio_device *mdiodev, if (IS_ERR(xpcs)) return xpcs; + ret = xpcs_init_clks(xpcs); + if (ret) + goto out_free_data; + ret = xpcs_init_id(xpcs); if (ret) - goto out; + goto out_clear_clks; ret = xpcs_init_iface(xpcs, interface); if (ret) - goto out; + goto out_clear_clks; return xpcs; -out: +out_clear_clks: + xpcs_clear_clks(xpcs); + +out_free_data: xpcs_free_data(xpcs); return ERR_PTR(ret); @@ -1483,6 +1534,8 @@ void xpcs_destroy(struct dw_xpcs *xpcs) if (!xpcs) return; + xpcs_clear_clks(xpcs); + xpcs_free_data(xpcs); } EXPORT_SYMBOL_GPL(xpcs_destroy); diff --git a/drivers/net/pcs/pcs-xpcs.h b/drivers/net/pcs/pcs-xpcs.h index 369e9196f45a..fa05adfae220 100644 --- a/drivers/net/pcs/pcs-xpcs.h +++ b/drivers/net/pcs/pcs-xpcs.h @@ -6,6 +6,9 @@ * Author: Jose Abreu */ +#include +#include + /* Vendor regs access */ #define DW_VENDOR BIT(15) @@ -117,6 +120,9 @@ /* VR MII EEE Control 1 defines */ #define DW_VR_MII_EEE_TRN_LPI BIT(0) /* Transparent Mode Enable */ +#define DW_XPCS_INFO_DECLARE(_name, _pcs, _pma) \ + static const struct dw_xpcs_info _name = { .pcs = _pcs, .pma = _pma } + int xpcs_read(struct dw_xpcs *xpcs, int dev, u32 reg); int xpcs_write(struct dw_xpcs *xpcs, int dev, u32 reg, u16 val); int xpcs_read_vpcs(struct dw_xpcs *xpcs, int reg); diff --git a/include/linux/pcs/pcs-xpcs.h b/include/linux/pcs/pcs-xpcs.h index 1dc60f5e653f..813be644647f 100644 --- a/include/linux/pcs/pcs-xpcs.h +++ b/include/linux/pcs/pcs-xpcs.h @@ -7,6 +7,8 @@ #ifndef __LINUX_PCS_XPCS_H #define __LINUX_PCS_XPCS_H +#include +#include #include #include #include @@ -21,6 +23,7 @@ struct dw_xpcs_desc; enum dw_xpcs_pcs_id { + DW_XPCS_ID_NATIVE = 0, NXP_SJA1105_XPCS_ID = 0x00000010, NXP_SJA1110_XPCS_ID = 0x00000020, DW_XPCS_ID = 0x7996ced0, @@ -28,6 +31,14 @@ enum dw_xpcs_pcs_id { }; enum dw_xpcs_pma_id { + DW_XPCS_PMA_ID_NATIVE = 0, + DW_XPCS_PMA_GEN1_3G_ID, + DW_XPCS_PMA_GEN2_3G_ID, + DW_XPCS_PMA_GEN2_6G_ID, + DW_XPCS_PMA_GEN4_3G_ID, + DW_XPCS_PMA_GEN4_6G_ID, + DW_XPCS_PMA_GEN5_10G_ID, + DW_XPCS_PMA_GEN5_12G_ID, WX_TXGBE_XPCS_PMA_10G_ID = 0x0018fc80, }; @@ -36,10 +47,17 @@ struct dw_xpcs_info { u32 pma; }; +enum dw_xpcs_clock { + DW_XPCS_CORE_CLK, + DW_XPCS_PAD_CLK, + DW_XPCS_NUM_CLKS, +}; + struct dw_xpcs { struct dw_xpcs_info info; const struct dw_xpcs_desc *desc; struct mdio_device *mdiodev; + struct clk_bulk_data clks[DW_XPCS_NUM_CLKS]; struct phylink_pcs pcs; phy_interface_t interface; }; From patchwork Sun Jun 2 14:36:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 13682905 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-lj1-f181.google.com (mail-lj1-f181.google.com [209.85.208.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 28946757E8; Sun, 2 Jun 2024 14:37:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.181 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339022; cv=none; b=ls4BpU8iW2bKSr5qXVX6PiW1m/jI9MXUJQwjBXjLM3Dr28lVbshI4alCrQr/bpGLOeBj/a5xcmeLbIesY6vv1RfKm/eUsv6teBZJcfvJwmHGSOIgNZV8zew+ZVNIsHmzpVuOb7C3JUdj2o44ZnIKwnVkoFx7Y955gKFnSb1HBes= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339022; c=relaxed/simple; bh=b+hmzCrEDZFrYbYiNIshirXH/vP+OZ7MY1T5RLbh4Ec=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=A33+6ZeSRxypK6ucxCMdzxSH5t9Rca9z9QVBnU9XJLEi/XoRJPXnhWA2W6A3ZvAGzn1nGXe5py2Sgd5yWbt4b7+f4zyOHv/IVvWGFt7PFzt9tpgiHBHOXOGoH9Q5lbOTvXqwSGphJq17AR7UhTSUEC1L3JtECMgiBi1RrRlJkzk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Km1mhUbK; arc=none smtp.client-ip=209.85.208.181 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Km1mhUbK" Received: by mail-lj1-f181.google.com with SMTP id 38308e7fff4ca-2e724bc466fso40218871fa.3; Sun, 02 Jun 2024 07:37:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1717339019; x=1717943819; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Q4aGTiAPBTBiXTU5Af6ILBXeRCSgwACWrEB026RZEFk=; b=Km1mhUbKhjO0LAFzWr+nc/LLg+vARc0TdxAwPtu17kR+X/sdgCY39bjK8xNaQYpQJp SL2pHK2vHbgIJXmgCZ6c8kR6RkYzl60LnjI3W1cgME+4nwYD7N9TVaPTJ2/kVdc4dz6S zPIoZa4QIwLyX+Vtagw1bllogRLQM2O30o52Mit8FIkSFr22wLczBKurkmQLZw5mjGa/ W2mwW6j0ekD5s9xBz57npXSxTvX2vuX8txLCL14fP14FtIM5NX2vSAMnuQUuinCFQ8FB QD7xysoc/LjCw9SlzHpDPjYheGyv+tWtNTWeYlaWiqYspzWQ930iu45pvrqC+yuv6TIn c02w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717339019; x=1717943819; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Q4aGTiAPBTBiXTU5Af6ILBXeRCSgwACWrEB026RZEFk=; b=EVK1ZuCUAbs++F6SNWx7GgCiSd6m1a6MVay9XKhktAXvcaWAVDIADwH+zNACa1TNPu xBu/AlAjA0dRpesaq8k4tkW1aqQXmgrVn6eMoM0j+pSIdmLgH341Hc1GifKH8JbQR0FA 5eElqg/tJMxA3zh24c2evFpKwB9Eh9rgM6VN6X9nC0ZcfPHL1qsVLFj817QTr7V/8kc6 pnzZzRR2xuDiY9C3C80b1gzIDw1Pm1nt/ZH6El60eSkw3M3mfYh2lsbMaiEP38Wa4qmi /aVIGJi7f1GxdtKZR1OFM7DrqPRTY7hU2Gi+sfslLLi1VF6IK+Z86U4tMQ32H4I9YJpV u6Zg== X-Forwarded-Encrypted: i=1; AJvYcCVJ0lNX6tOODgPqqBrrisL9110SnXkCAyvBnzzljEy1dIUl2emVNgQb6pfq/V8IK8/BcxpualzmqEaS+h4gy86m0FQW1Af5vwaCSSi91aNkHA6tUkf1uj3/P2swYezAOsv+9m+aRGy04a5htPMqhMnV8kb2eOCj69d318pbzMN9Xg== X-Gm-Message-State: AOJu0Yx1551qQ9XS7kXyw4RLeUENi7UAjY7wV9UiltzInB2HOQxEXU2P rLtLHu3PaIbavx4w/gO+G5YCN+bzZgXc8MwX82EIF40gzQ81VEPz X-Google-Smtp-Source: AGHT+IF+oobCAxds4AhiGxi+LGxB+KYDlBE57HkX5WVkoQfOlVO4ykFSLc4rqzw0TKa2a6kiImbqSA== X-Received: by 2002:ac2:4354:0:b0:52b:404:914f with SMTP id 2adb3069b0e04-52b8958aed8mr4401137e87.34.1717339019150; Sun, 02 Jun 2024 07:36:59 -0700 (PDT) Received: from localhost ([178.178.142.64]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-52b93500e57sm420576e87.46.2024.06.02.07.36.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jun 2024 07:36:58 -0700 (PDT) From: Serge Semin To: Andrew Lunn , Heiner Kallweit , Russell King , Alexandre Torgue , Jose Abreu , Jose Abreu , Vladimir Oltean , Florian Fainelli , Maxime Chevallier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Serge Semin , Sagar Cheluvegowda , Abhishek Chauhan , Andrew Halaney , Jiawen Wu , Mengyuan Lou , Tomer Maimon , openbmc@lists.ozlabs.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next v2 08/10] net: pcs: xpcs: Add fwnode-based descriptor creation method Date: Sun, 2 Jun 2024 17:36:22 +0300 Message-ID: <20240602143636.5839-9-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240602143636.5839-1-fancer.lancer@gmail.com> References: <20240602143636.5839-1-fancer.lancer@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org It's now possible to have the DW XPCS device defined as a standard platform device for instance in the platform DT-file. Although that functionality is useless unless there is a way to have the device found by the client drivers (STMMAC/DW *MAC, NXP SJA1105 Eth Switch, etc). Provide such ability by means of the xpcs_create_fwnode() method. It needs to be called with the device DW XPCS fwnode instance passed. That node will be then used to find the MDIO-device instance in order to create the DW XPCS descriptor. Note the method semantics and name is similar to what has been recently introduced in the Lynx PCS driver. Signed-off-by: Serge Semin --- Changelog v2: - Use the function name and semantics similar to the Lynx PCS driver. - Add kdoc describing the DW XPCS create functions. --- drivers/net/pcs/pcs-xpcs.c | 50 ++++++++++++++++++++++++++++++++++++ include/linux/pcs/pcs-xpcs.h | 3 +++ 2 files changed, 53 insertions(+) diff --git a/drivers/net/pcs/pcs-xpcs.c b/drivers/net/pcs/pcs-xpcs.c index 8f7e3af64fcc..d45fa6514884 100644 --- a/drivers/net/pcs/pcs-xpcs.c +++ b/drivers/net/pcs/pcs-xpcs.c @@ -10,7 +10,9 @@ #include #include #include +#include #include +#include #include "pcs-xpcs.h" @@ -1505,6 +1507,16 @@ static struct dw_xpcs *xpcs_create(struct mdio_device *mdiodev, return ERR_PTR(ret); } +/** + * xpcs_create_mdiodev() - create a DW xPCS instance with the MDIO @addr + * @bus: pointer to the MDIO-bus descriptor for the device to be looked at + * @addr: device MDIO-bus ID + * @requested PHY interface + * + * If successful, returns a pointer to the DW XPCS handle. Otherwise returns + * -ENODEV if device couldn't be found on the bus, other negative errno related + * to the data allocation and MDIO-bus communications. + */ struct dw_xpcs *xpcs_create_mdiodev(struct mii_bus *bus, int addr, phy_interface_t interface) { @@ -1529,6 +1541,44 @@ struct dw_xpcs *xpcs_create_mdiodev(struct mii_bus *bus, int addr, } EXPORT_SYMBOL_GPL(xpcs_create_mdiodev); +/** + * xpcs_create_fwnode() - Create a DW xPCS instance from @fwnode + * @node: fwnode handle poining to the DW XPCS device + * @interface: requested PHY interface + * + * If successful, returns a pointer to the DW XPCS handle. Otherwise returns + * -ENODEV if the fwnode is marked unavailable or device couldn't be found on + * the bus, -EPROBE_DEFER if the respective MDIO-device instance couldn't be + * found, other negative errno related to the data allocations and MDIO-bus + * communications. + */ +struct dw_xpcs *xpcs_create_fwnode(struct fwnode_handle *fwnode, + phy_interface_t interface) +{ + struct mdio_device *mdiodev; + struct dw_xpcs *xpcs; + + if (!fwnode_device_is_available(fwnode)) + return ERR_PTR(-ENODEV); + + mdiodev = fwnode_mdio_find_device(fwnode); + if (!mdiodev) + return ERR_PTR(-EPROBE_DEFER); + + xpcs = xpcs_create(mdiodev, interface); + + /* xpcs_create() has taken a refcount on the mdiodev if it was + * successful. If xpcs_create() fails, this will free the mdio + * device here. In any case, we don't need to hold our reference + * anymore, and putting it here will allow mdio_device_put() in + * xpcs_destroy() to automatically free the mdio device. + */ + mdio_device_put(mdiodev); + + return xpcs; +} +EXPORT_SYMBOL_GPL(xpcs_create_fwnode); + void xpcs_destroy(struct dw_xpcs *xpcs) { if (!xpcs) diff --git a/include/linux/pcs/pcs-xpcs.h b/include/linux/pcs/pcs-xpcs.h index 813be644647f..b4a4eb6c8866 100644 --- a/include/linux/pcs/pcs-xpcs.h +++ b/include/linux/pcs/pcs-xpcs.h @@ -8,6 +8,7 @@ #define __LINUX_PCS_XPCS_H #include +#include #include #include #include @@ -72,6 +73,8 @@ int xpcs_config_eee(struct dw_xpcs *xpcs, int mult_fact_100ns, int enable); struct dw_xpcs *xpcs_create_mdiodev(struct mii_bus *bus, int addr, phy_interface_t interface); +struct dw_xpcs *xpcs_create_fwnode(struct fwnode_handle *fwnode, + phy_interface_t interface); void xpcs_destroy(struct dw_xpcs *xpcs); #endif /* __LINUX_PCS_XPCS_H */ From patchwork Sun Jun 2 14:36:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 13682906 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-lf1-f49.google.com (mail-lf1-f49.google.com [209.85.167.49]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 31619763E7; Sun, 2 Jun 2024 14:37:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.49 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339024; cv=none; b=u4zE5VW+gOpytlBqQD5/hob30ZX5U1aiK6QlH20oigBYgBd6BG1tKn9wsESlFl3ujvX42lVVebaWwNHysysPz8jff54j4p47SL67kvC2zKMnK6EXbQKa/LEmLy+1KPHXl6dZzH3lzfOc9++aplbYfA54RxXkUv3DKUqt5sNyCi8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339024; c=relaxed/simple; bh=6YA0qQck5rrALyZPnAu3fKQKni/OD78aR0XOtu0VSYs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=UOetzJ56gx3i9fXfj4rZp3T5IhRCXswyDzZHlqvVXU3TJBV9M4oA/vWsRFhwgpMzP0pUxaFDyNc4MONANKdTweI/o3Fx3yWk5EVxvTwtVEAEqQBN3+JypjpM+HdxzEAq8lNoaIW3M5n1B78Z37gKckh2TFVA9QBuQpvU2QxxQdw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=WKz61syp; arc=none smtp.client-ip=209.85.167.49 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="WKz61syp" Received: by mail-lf1-f49.google.com with SMTP id 2adb3069b0e04-52b88740a93so2439286e87.3; Sun, 02 Jun 2024 07:37:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1717339021; x=1717943821; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=7vjMvBNpGJ2YRY1Cb9nA1dqsGS8aAwxtGRodJv9KKVo=; b=WKz61sypK1a5CHvSBRPhbokg09bD1eIE/kMEQB8JuWlhfmyyODvd4fPwai7Djbk2Yh oztA33sbHOrFUdJSCMo4AP1giBAjQ/86/a5KVkS7YpqXTMYNHv7/1d+9n0n/d3z61+ej W+lyp4m/mocHsMTwom06gzflofTa7B+RgeJ5vwYIHMW70Vnx0Wqm2rx9QQ0QOUyUNGIc 2HjMdEqUV/Ipfa5JEwU+npn/cOjOac0lUo+D3jWFTTccM4aPCSL657Ds88aMu8OgkJ6y fsNUR3P2UKsOEJtnT5OJG2HQJa2UShnMsK9BiyTLjAAWYjyOf2j3wGPGgWPtN/r5gD6m R0fw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717339021; x=1717943821; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=7vjMvBNpGJ2YRY1Cb9nA1dqsGS8aAwxtGRodJv9KKVo=; b=DshgClFil3bctltjx9hKIQEP5Kqu/wjKBUQbwTrIlEazXEKFELUuG0B5PweV5PcpXS 2nVt1V7F481OmiCZ3ZnNFFnncvZV3nUMtuBdYoUZq5wKFjm/f6Kb6a0VPxEgrG0uWBKQ n5ebybaayx15Oj+36Mak2MzklwPNvC0k38Pstxv0iTaNtlTPLeLTXCloW/5k2xlGFe46 KZNh54ZK5fFejcqdOo9NGUXa515dUHLilDwAvUWYLAEgioC9f4dTDJSMOHqh11Y4Y0DN n9+13qV4jj1ZsACC5j60GUJdqNr/1+vuN4zf2fkrhRPvbsbqHl7mdFYCqA0gmA9WKLhU x4vA== X-Forwarded-Encrypted: i=1; AJvYcCW7JQUUUri186lsxi4/wvUuEzwV26aQNmc7a4xOy0/as5h7L23KyW43LO24Qdbt1PkmzDS9eZxOUEXl7scYI+scs+A5K/jM23+t4Nz2bAS+Azx+cZVwflO24L71ZgNWXD0nfZnJGCrj+x3xJaFGSb+ecgRBEKbwjFVP+phAWtqpUw== X-Gm-Message-State: AOJu0YzyND2IlsZ0woFzDBTRQIJV9pn/BNB83YTAUecj98SBKLo7UT3M QpdrsV5GLEVLgOtAcvqYlnJm4pOE0quAj2P/quR0iAw8xKxUml4v X-Google-Smtp-Source: AGHT+IF+Hex+g3j4f6h2pCksD9/xzuP9uZz4YvqyQTtFSMyXUw0x6Mqvz4SNvUNBrOtKz3gPvsNgXg== X-Received: by 2002:a05:6512:4c6:b0:52b:5f39:9221 with SMTP id 2adb3069b0e04-52b896f183fmr4063497e87.64.1717339021163; Sun, 02 Jun 2024 07:37:01 -0700 (PDT) Received: from localhost ([178.178.142.64]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-52b98fb5c5asm152445e87.16.2024.06.02.07.37.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jun 2024 07:37:00 -0700 (PDT) From: Serge Semin To: Andrew Lunn , Heiner Kallweit , Russell King , Alexandre Torgue , Jose Abreu , Jose Abreu , Vladimir Oltean , Florian Fainelli , Maxime Chevallier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin Cc: Serge Semin , Sagar Cheluvegowda , Abhishek Chauhan , Andrew Halaney , Jiawen Wu , Mengyuan Lou , Tomer Maimon , openbmc@lists.ozlabs.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next v2 09/10] net: stmmac: Create DW XPCS device with particular address Date: Sun, 2 Jun 2024 17:36:23 +0300 Message-ID: <20240602143636.5839-10-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240602143636.5839-1-fancer.lancer@gmail.com> References: <20240602143636.5839-1-fancer.lancer@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Currently the only STMMAC platform driver using the DW XPCS code is the Intel mGBE device driver. (It can be determined by finding all the drivers having the stmmac_mdio_bus_data::has_xpcs flag set.) At the same time the low-level platform driver masks out the DW XPCS MDIO-address from being auto-detected as PHY by the MDIO subsystem core. Seeing the PCS MDIO ID is known the procedure of the DW XPCS device creation can be simplified by dropping the loop over all the MDIO IDs. From now the DW XPCS device descriptor will be created for the pre-defined MDIO-bus address. Note besides this shall speed up a bit the Intel mGBE probing. Signed-off-by: Serge Semin --- Changelog v2: - This is a new patch introduced on v2 stage of the review. --- drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c | 1 + drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 15 ++++----------- include/linux/stmmac.h | 1 + 3 files changed, 6 insertions(+), 11 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c index 56649edb18cd..e60b7e955c35 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-intel.c @@ -586,6 +586,7 @@ static int intel_mgbe_common_data(struct pci_dev *pdev, if (plat->phy_interface == PHY_INTERFACE_MODE_SGMII || plat->phy_interface == PHY_INTERFACE_MODE_1000BASEX) { plat->mdio_bus_data->has_xpcs = true; + plat->mdio_bus_data->xpcs_addr = INTEL_MGBE_XPCS_ADDR; plat->mdio_bus_data->default_an_inband = true; } diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c index aa43117134d3..807789d7309a 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c @@ -499,8 +499,7 @@ int stmmac_pcs_setup(struct net_device *ndev) { struct dw_xpcs *xpcs = NULL; struct stmmac_priv *priv; - int ret = -ENODEV; - int mode, addr; + int addr, mode, ret; priv = netdev_priv(ndev); mode = priv->plat->phy_interface; @@ -509,15 +508,9 @@ int stmmac_pcs_setup(struct net_device *ndev) ret = priv->plat->pcs_init(priv); } else if (priv->plat->mdio_bus_data && priv->plat->mdio_bus_data->has_xpcs) { - /* Try to probe the XPCS by scanning all addresses */ - for (addr = 0; addr < PHY_MAX_ADDR; addr++) { - xpcs = xpcs_create_mdiodev(priv->mii, addr, mode); - if (IS_ERR(xpcs)) - continue; - - ret = 0; - break; - } + addr = priv->plat->mdio_bus_data->xpcs_addr; + xpcs = xpcs_create_mdiodev(priv->mii, addr, mode); + ret = PTR_ERR_OR_ZERO(xpcs); } else { return 0; } diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h index f337286623bb..a11b850d3672 100644 --- a/include/linux/stmmac.h +++ b/include/linux/stmmac.h @@ -83,6 +83,7 @@ struct stmmac_priv; struct stmmac_mdio_bus_data { unsigned int phy_mask; unsigned int has_xpcs; + unsigned int xpcs_addr; unsigned int default_an_inband; int *irqs; int probed_phy_irq; From patchwork Sun Jun 2 14:36:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 13682907 X-Patchwork-Delegate: kuba@kernel.org Received: from mail-lf1-f41.google.com (mail-lf1-f41.google.com [209.85.167.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E0A6F78C79; Sun, 2 Jun 2024 14:37:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339026; cv=none; b=t5J+Cyz8K30jod1emSapFK/B7yCGpRXbyO6ZZZHtXwp3UdaIEnFbNQJXAEA4hCLNuTuopgIrq3+JgP+qZW26LtZpvbg0dr/eCg4lqhqFq3u7fEKJq3Cm1JhkD92n+nDrgJfFa7HUSRtCIdawG7B3BY2i9gFIpklUedJBmG0ZZLs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717339026; c=relaxed/simple; bh=IgeH3NtZfgVCNuT/fZC/EjAkaOCyYtD8Ar2FpuVB4Ak=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=p8Ze5B3yKEDbBq1favrvLnHc5k0HtqAkGas2NzOh6/xk8UgpfXc85F616QtjSFLMgUd2xvgCyyWzE+tCumoWdA+s84drYbFEvZpd5pztDcpBcy8a/Gy2FPMxhJuIi+rKmLjRNehqtwUgWX5+wZ+uV5KkhRvfTfCqeDvo10V0q8U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=MzgnCH8f; arc=none smtp.client-ip=209.85.167.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="MzgnCH8f" Received: by mail-lf1-f41.google.com with SMTP id 2adb3069b0e04-52b919d1fc0so780276e87.0; Sun, 02 Jun 2024 07:37:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1717339023; x=1717943823; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dU7sOuoCnE7DZBaFJYawXWXaLrHsBgPyxKdpukglgGI=; b=MzgnCH8fIEvlVeENCVv2NJnCW/o3q3mBfChHp334+anYG371Dpsx96kLCcsJoOM60L kIPuH3NhiUvb8iN8XQfKwGF9l3fu/z+4T2UYFw816coboERULLCXjOnv65UyfpNKesek zxbtHCA3riPW6eBY/smUDPnkTOHrIOwiOmix5qfvZpI8wJ17aQVc8/0y2L6GydPFvp3b K5z7wsFqf7nXITQJDImA9quBf3k4N7dvWKZ3sFOjK6PVC2JFXUnbtTsG9dQaFnsRj14I mjTeYreJKryUkZLFKJ/74i75HHPqKSMhYDbOKT2P5TgUx0VIH/a84KTeP1ybQ7VbXpGr k8ng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717339023; x=1717943823; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dU7sOuoCnE7DZBaFJYawXWXaLrHsBgPyxKdpukglgGI=; b=CnxUAcCT9QSMeGbQJ++uONbxdKWOahW3rkuj2Yzhyj4LfCcy4r6v+lRvq5M9syrJo7 ANlWeibIm7T3e6sI9FFjjQWcsU7qkMPUU2bcKMxH+x3pU1SonMUlHHse7JohlyxajraJ QrcqdcT6Cj7NryNLiy+JjHiuv8cCRtO8BBua+DGl1VlT2C13EJuStraQYp/Ip8m0SpGP L0HkQSdFIK5TDJY7P8DMTxLr0QwQNj6jjHAz6RMcSDqVOSYgOBWcj1kR2WFD1T6s/rDx FLlOG3XABcoxtE0mZWSXjDCADAvxtQGd3VPp19KUoInhsuyLo5JY0pkb2Xvl2wQn+tsv QiIA== X-Forwarded-Encrypted: i=1; AJvYcCWCphfqYwfl7ncxupRJKbc/bg4rkauhCqq+QxPVOk3EAhAjkpb7Utge5EoWv8KfCAmqBviroExvxZ4AKR7pPZIi/xy892AcbB22FuHwXvsgtPsroNHQPxfpMznSJ/4Tv1mVCWdV819QQKy7kOn/IfOeFRvkxFX7eKkcbiKqPeclJg== X-Gm-Message-State: AOJu0YyQ00SJlVcLURRWCw6bnAm3UYh0FW1g3WDOt33bknGBtl+by/J9 cS9xi1aeIs6YPRd0XqMiSYHafpDufIx04BE99NF9GQxSbMpewrNO X-Google-Smtp-Source: AGHT+IGG30UwFOotd/0Zdrr/C30omiONtB0LV+xIFdYgqxXQLjQdJQlWg/j2uttrnvCHheKu72hvDg== X-Received: by 2002:a19:5f53:0:b0:52b:8912:2843 with SMTP id 2adb3069b0e04-52b89122a59mr1943524e87.32.1717339022871; Sun, 02 Jun 2024 07:37:02 -0700 (PDT) Received: from localhost ([178.178.142.64]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-52b84d34b18sm966116e87.12.2024.06.02.07.37.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jun 2024 07:37:02 -0700 (PDT) From: Serge Semin To: Andrew Lunn , Heiner Kallweit , Russell King , Alexandre Torgue , Jose Abreu , Jose Abreu , Vladimir Oltean , Florian Fainelli , Maxime Chevallier , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin Cc: Serge Semin , Sagar Cheluvegowda , Abhishek Chauhan , Andrew Halaney , Jiawen Wu , Mengyuan Lou , Tomer Maimon , openbmc@lists.ozlabs.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org Subject: [PATCH net-next v2 10/10] net: stmmac: Add DW XPCS specified via "pcs-handle" support Date: Sun, 2 Jun 2024 17:36:24 +0300 Message-ID: <20240602143636.5839-11-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240602143636.5839-1-fancer.lancer@gmail.com> References: <20240602143636.5839-1-fancer.lancer@gmail.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Recently the DW XPCS DT-bindings have been introduced and the DW XPCS driver has been altered to support the DW XPCS registered as a platform device. In order to have the DW XPCS DT-device accessed from the STMMAC driver let's alter the STMMAC PCS-setup procedure to support the "pcs-handle" property containing the phandle reference to the DW XPCS device DT-node. The respective fwnode will be then passed to the xpcs_create_fwnode() function which in its turn will create the DW XPCS descriptor utilized in the main driver for the PCS-related setups. Signed-off-by: Serge Semin --- drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c index 807789d7309a..dc040051aa53 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_mdio.c @@ -497,15 +497,22 @@ int stmmac_mdio_reset(struct mii_bus *bus) int stmmac_pcs_setup(struct net_device *ndev) { + struct fwnode_handle *devnode, *pcsnode; struct dw_xpcs *xpcs = NULL; struct stmmac_priv *priv; int addr, mode, ret; priv = netdev_priv(ndev); mode = priv->plat->phy_interface; + devnode = priv->plat->port_node; if (priv->plat->pcs_init) { ret = priv->plat->pcs_init(priv); + } else if (fwnode_property_present(devnode, "pcs-handle")) { + pcsnode = fwnode_find_reference(devnode, "pcs-handle", 0); + xpcs = xpcs_create_fwnode(pcsnode, mode); + fwnode_handle_put(pcsnode); + ret = PTR_ERR_OR_ZERO(xpcs); } else if (priv->plat->mdio_bus_data && priv->plat->mdio_bus_data->has_xpcs) { addr = priv->plat->mdio_bus_data->xpcs_addr; @@ -515,10 +522,8 @@ int stmmac_pcs_setup(struct net_device *ndev) return 0; } - if (ret) { - dev_warn(priv->device, "No xPCS found\n"); - return ret; - } + if (ret) + return dev_err_probe(priv->device, ret, "No xPCS found\n"); priv->hw->xpcs = xpcs;