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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Inochi Amaoto , Paul Walmsley , Palmer Dabbelt , Albert Ou , Jisheng Zhang Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Haylen Chu Subject: [PATCH v2 1/3] dt-bindings: thermal: sophgo,cv180x-thermal: Add Sophgo CV180x thermal Date: Tue, 4 Jun 2024 12:54:19 +0000 Message-ID: X-Mailer: git-send-email 2.45.2 In-Reply-To: References: X-TMN: [+ImABJjERh4UXXPYTHM1l2EeXgXjRUA4] X-ClientProxiedBy: SI2PR06CA0011.apcprd06.prod.outlook.com (2603:1096:4:186::16) To SG2PR01MB4218.apcprd01.prod.exchangelabs.com (2603:1096:4:1ca::8) X-Microsoft-Original-Message-ID: <20240604125420.22638-2-heylenay@outlook.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SG2PR01MB4218:EE_|SG2PR01MB4386:EE_ X-MS-Office365-Filtering-Correlation-Id: a8be5eb6-0ab5-4ab7-7607-08dc8495888c X-Microsoft-Antispam: BCL:0;ARA:14566002|461199019|440099019|3412199016|1602099003|1710799017; X-Microsoft-Antispam-Message-Info: EqxwBX7dckghar72CBlMS69z7Tjg8ivANyYBmAbog+mq8s/c/oRLqpHl2442XR0gUxiwFTnTcLo3qLrfBo2QyO0SZb7igbSFY3VpI7GzYhaTEOQJz1Npmtfsl/gAAbq0hcXNaGJoQPM99rHAGhTVlWflzGIekO6vQPE74xtLSy+w7yxAnf/OdGqKPutUpOjjVonOb16m7pN834nDucUvEW+DpvmX8y1ZRZVFrkUPOW5qdiT2sj5jqIR33u+Mk86Oj9KpA7FOmqk93aOtyfWQbniWjLgYOLwhR2tD0kaRZmHQj7gsLCgK61WmJasrz8ZermFk95ew4ZeHj/mMc8SeWen+ht8XXFFWu5DdP0A5PomuieB6IaovsrsTiDkcB01nGLT5sCAYhhJsLlzTLH/xiwoxriaM/6ewBxzoCdl0e4xihObb5mp6leMNG40kYqr8+Ai//8U6ZRUPKQJigKLNlWxqZm3LSNjQSnXo4CxslnJ7OZtpWddiAf9c5wBbcDq1Tmbb52pn7B3RmDRkofHwHNYiofeEdYQKzR0NEHAudlPcXWJvo6n4OTy9fSW55qQnmP4fAFy2EFV70TyRcK+/0CofmHLlgBHjzllZFyIZNAImimwBCV4iNjhCiGB10cE0i3Q4Sosv9aXGebM6wXjrRxAGY7xYUvTUBT0H3hv4GIhGG548yK4OgV+dEynB5QRX08I/dR3gaSeVsXKbe9fqQw== X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 2e8mta+YiHVwgiwrNNP5GHVUkx9J4c/3yL7ybAC/Sgt5rHKPKd2m5qyRMtR2luhtHFIr8p7xSFXG1MhKIkeJo80ev+Fh6vC3kaba3utubPU54iRnWKMzEte3zM8mcp6mkmBesyuhZ3HoR+VtDI1tF7GV6FQmc+JyhCmJeTparG4dsBBZDOH7dJYJrC/9hi9oER4chNkCS03gOafUHc7U3cR3+DKOSJh8DsJDXAfClD9t2IMrLJhBlijvUgiPSVxGH+tbNaHrrRqdXlaDRcO30LZP/wDx8EgXK179rAmsz5jfX+tF+FSQAjS+CQPQbolfGUcLNo2YdLQ1ICsolYZKX5kqU4Vl1pX5A8RasEC6uK6Smfy10de8EuBXfyyN+ZJXAA8PwFjC8AbxGhUd3TsIIZm0eNZXPtJNCsfwfS8K+Rnv2jrdzm3bpLj1fzmqmsxe+29X1K53LR8QuWBTSOB7ukOSbDNKm/dhPeV9Qm8oZFXA5XzykOpvah+Oj8CIH66K8oSF/HJ1PuwQn1i/SeXcgFkCdBWBabwslKxXK/fSog12trXbBPJWP6/T2qOJLjeSgtgikzAiRHbYSFXK034hn7ilaqtP+JpGEQmqfR2oEa7aqGEltfaRcOP76P3TtGrrfJswv2S5cPZQeWsz8OOlMmRcU8XPFjFynRSl9E6zObkd9wkb1Bb0j7isy9RgYHAK9Zmzy1U4d06f/ybzSLBO8StwehhTq++QPgYyaAIjqmFPeffa9+z5WOLG/0rDQ1SbQJvLdSaEk0QVXq9p7H8Fy2IeMmjDvPEOfNnMJ1LjnbVOBROLyCT9ORNMRSf8jF7yvaXXaJ7+b9zDwNz1EzoY2vRGyhu2Lc0rMqPhU8tAIC7Qo0K/c1+6IxItIN8PN6SLR102YqivWIpQ+m4Ein/iPsECFqriyROtdiD4SwXSq+5DX/+q0BFveq0+wb4Hz3aVyGG5z3+BLps7IngE5ltZCJPYNoV/iKPJchTCmlm0r/KHDUvDwykHbViSC/OoHaeaZEcFW1ILgUD6Ex6Z9T2c9DasMXAbtQjpodJTVwyWSnsboHRcNecVUDHKywcSoMeuFEplhQkrj3u7RUpH8kv9W4Xk8DpmEoguaPUbAsxAlPdFD8hSzphSC8H2gMKJuLQnDgJwSjgMuHWobAdukQswyCYU3M4Ai3m1G7163KuQsNVFlc8/exZsIEsWVllFljuVsTwMu1XuHZfLin722HODKAqX9uHYpdZXtQ+UJPKrHRI= X-OriginatorOrg: outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: a8be5eb6-0ab5-4ab7-7607-08dc8495888c X-MS-Exchange-CrossTenant-AuthSource: SG2PR01MB4218.apcprd01.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Jun 2024 12:54:56.2905 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 84df9e7f-e9f6-40af-b435-aaaaaaaaaaaa X-MS-Exchange-CrossTenant-RMS-PersistedConsumerOrg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-Transport-CrossTenantHeadersStamped: SG2PR01MB4386 Add devicetree binding documentation for thermal sensors integrated in Sophgo CV180X SoCs. Signed-off-by: Haylen Chu --- .../thermal/sophgo,cv180x-thermal.yaml | 82 +++++++++++++++++++ 1 file changed, 82 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml diff --git a/Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml b/Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml new file mode 100644 index 000000000000..1c3a6f74ff1d --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/sophgo,cv180x-thermal.yaml @@ -0,0 +1,82 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/sophgo,cv180x-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo CV180x on-SoC Thermal Sensor + +maintainers: + - Haylen Chu + +description: Binding for Sophgo CV180x on-SoC thermal sensor + +properties: + compatible: + enum: + - sophgo,cv1800-thermal + - sophgo,cv180x-thermal + + reg: + maxItems: 1 + + clocks: + description: The thermal sensor clock + + clock-names: + const: clk_tempsen + + accumulation-period: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Accumulation period for a sample + oneOf: + - const: 0 + description: 512 ticks + - const: 1 + description: 1024 ticks + - const: 2 + description: 2048 ticks + - const: 3 + description: 4096 ticks + default: 2 + + chop-period: + $ref: /schemas/types.yaml#/definitions/uint32 + description: ADC chop period + oneOf: + - const: 0 + description: 128 ticks + - const: 1 + description: 256 ticks + - const: 2 + description: 512 ticks + - const: 3 + description: 1024 ticks + default: 3 + + sample-cycle-us: + description: Period between samples + default: 1000000 + + '#thermal-sensor-cells': + const: 0 + +required: + - compatible + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + thermal-sensor@30e0000 { + compatible = "sophgo,cv180x-thermal"; + reg = <0x30e0000 0x100>; + clocks = <&clk CLK_TEMPSEN>; + clock-names = "clk_tempsen"; + #thermal-sensor-cells = <0>; + }; +... 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Signed-off-by: Haylen Chu --- arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 30 +++++++++++++++++++++++++ arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 8 +++++++ 2 files changed, 38 insertions(+) diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi index ec9530972ae2..9e669ab35380 100644 --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi @@ -12,6 +12,34 @@ memory@80000000 { device_type = "memory"; reg = <0x80000000 0x4000000>; }; + + thermal-zones { + soc-thermal-0 { + polling-delay-passive = <1000>; + polling-delay = <1000>; + thermal-sensors = <&soc_temp>; + + trips { + soc_passive: soc-passive { + temperature = <75000>; + hysteresis = <5000>; + type = "passive"; + }; + + soc_hot: soc-hot { + temperature = <85000>; + hysteresis = <5000>; + type = "hot"; + }; + + soc_critical: soc-critical { + temperature = <100000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; }; &plic { @@ -25,3 +53,5 @@ &clint { &clk { compatible = "sophgo,cv1800-clk"; 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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Inochi Amaoto , Paul Walmsley , Palmer Dabbelt , Albert Ou , Jisheng Zhang Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Haylen Chu Subject: [PATCH v2 3/3] thermal: cv180x: Add cv180x thermal driver support Date: Tue, 4 Jun 2024 12:54:21 +0000 Message-ID: X-Mailer: git-send-email 2.45.2 In-Reply-To: References: X-TMN: [jYzV8WUlZZem+HhUVIccfPJ2rrcKCb+D] X-ClientProxiedBy: SI2PR06CA0011.apcprd06.prod.outlook.com (2603:1096:4:186::16) To SG2PR01MB4218.apcprd01.prod.exchangelabs.com (2603:1096:4:1ca::8) X-Microsoft-Original-Message-ID: <20240604125420.22638-4-heylenay@outlook.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SG2PR01MB4218:EE_|SG2PR01MB4386:EE_ X-MS-Office365-Filtering-Correlation-Id: 9ec3ca15-df09-4b39-11af-08dc84958d1f X-Microsoft-Antispam: BCL:0;ARA:14566002|461199019|440099019|3412199016|1710799017; X-Microsoft-Antispam-Message-Info: 58g5iBJwMgmXkrklc+q6j3fX8RsEVieO7cie01SKPu6Cdpm6KEOfE7g3A7mre+robF2qBo9Kn0vDurduvipbfUd09x6kah/N6JdqQJuGltmhse+DpWqpmR5dNU6NZC0siRMew5WQBPDhQKTe43Y4hAaeim/oMF6c4+HtYlUT3cLBRGOZUl+/7SRsayeFXJp6T5Sklw/CrOK8BC+EIGW9kzbbeAFqYAZxdR1kPTYKRRCcIPyUJvTd2gxaC7eOMYqXR/JnZgYP9kGHZha03Ml/Hhfk+kGQ39qfMNjtNMKPJSAWKNVzdzd0BGnYAyRBuhf833TqBwVY/iDtLOYyRc5Ok8YyIl8fxUurXjGuE02zOXJGitV3s+oAxUGkvjKHsTxF6lO8bdwuZYPgsRgGJIVEDqYz4FDh5jFDRgX7uvN/giiauFB+B80NZZLkrDKoAMQYBBBKj8P7W3xOnjM3inYXqe95SuBX/saIaa1eOqZ4yIqpvD5/2dlUD7DF1l2rdk8v8yG7dQYpyFntEPqL3VptxrTtcPJQ0FzPv8Bnvf3TfP7rZ7qbKxymcs/BlDmnOyPSdvWH9EGq5HHvZmgBV2xEnkJYgC7vCtABkcVrZVwWI9xmdfHv4hHscXoLJxFRgEsi X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: frDY9DXy5+9hP6k+9MXT8MJtaXkivddU4i2ii69vjnLFU6/jksDSeD78r6GdanomkX7dXsuQDGW/pxAvfYGvraXO3jHCD+s0I2B0hgXzYefBCJ+m1/jmnbZBi9voVyzd1hU4rxKrsp2PYAn20MsdcrHsE1sOqZcYWB0tx8rKfnRzJEdzWUqrSrE1rfdo2oxPP+DyAMEftq+LT/Z+URhf1vlWz0sVKwX+fgYYAPCxyp02T05ht668sq1vzcTjggrErxQaw0xS03ie3gxtuJeAk5VpLMyg3T0HGZWp4l2NnKMhvUYPxqQuKKycry8AUhDu9M9OA2fMa8scPAXbxjITVnKon6+fEl8yuiquK55v0V6pOwn7EeCM0WjOhS2Xrb6VXurGf5LulnoFc3RC/e3617jE77l9aqEUWWvIc+vo4dhrXQxcczrRjdCaWGXqohQX0wwU3O9rgyhVNJr6VcbJ+K9DHTBZ0hlmlIzOxBEoyJQGjIs4Zj1O5U/ojDuj7HJHySQzREHW2t9N6/PNFPUv06VtHGauz9jBVLsDCLvrWFgtW6CVzoo3jCQOFCp2kZX4jqe8vxifVfJwpEVLSdFKYpF0lsIWIOK+pdjvcykwdIh6ZvEIQi4uZcb+9cKH85ZDfBssdiJmGtclk9uTVIf+xs2Mbg6Ub6LE/Ib7Sg55+UwpMh94XiKS6arIETqnPSxZ1e1Rzp5NU7hdZpVnu24kC0hqgYES6wlVp20/Dt59D2+s4BD13O7rUEmKJToFmoj7iCNlzubmZb/Knp4U+czyN3wmcC76/KkOCLPkNt+6bhg99nNpif5Orj/XlC5F6wPM9ODMF2L+BQMpmxdtHOjhcQvZdZCVB045hx6+WnWjNybWos6UjFVztDKbMWzjPNJAmUxCPHmfcDFIRrJk+Ft16vm8AdRuAVu/SMNSGwFf8iU6P/c3w+RP97EBSF1zv9byyM/LnqJcDiHh7GAYWoyi6OY6K4oxf2t9n+MWMNl1TxBcolevi/rpSivzJRi/O3bCezyUF7EfRDw8w6h0j+A80ypYAXtE5gcjtrfVCBYfmF6Pc4yX+0wKidrIyULghcFagfQfk1lIpd2wiskFHLcdYTersdktnBJQejKfAo8QbLjVxzJXBjXNdlVQr70/TWIZW/T8+omI9lRckXHHVV10aOfTR2iGo8vNiKqOhFg5FLZP22ny/QwID4t4mKOEL2GFYdyldmE0Y42+UFGBQKbIymmpQw20oP6aLKavqYZ38p0= X-OriginatorOrg: outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 9ec3ca15-df09-4b39-11af-08dc84958d1f X-MS-Exchange-CrossTenant-AuthSource: SG2PR01MB4218.apcprd01.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Jun 2024 12:55:03.7176 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 84df9e7f-e9f6-40af-b435-aaaaaaaaaaaa X-MS-Exchange-CrossTenant-RMS-PersistedConsumerOrg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-Transport-CrossTenantHeadersStamped: SG2PR01MB4386 Add support for cv180x SoCs integrated thermal sensors. Signed-off-by: Haylen Chu --- drivers/thermal/Kconfig | 6 + drivers/thermal/Makefile | 1 + drivers/thermal/cv180x_thermal.c | 262 +++++++++++++++++++++++++++++++ 3 files changed, 269 insertions(+) create mode 100644 drivers/thermal/cv180x_thermal.c diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index 204ed89a3ec9..f53c973a361d 100644 --- a/drivers/thermal/Kconfig +++ b/drivers/thermal/Kconfig @@ -514,4 +514,10 @@ config LOONGSON2_THERMAL is higher than the high temperature threshold or lower than the low temperature threshold, the interrupt will occur. +config CV180X_THERMAL + tristate "Temperature sensor driver for Sophgo CV180X" + help + If you say yes here you get support for thermal sensor integrated in + Sophgo CV180X SoCs. + endif diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile index 5cdf7d68687f..5b59bde8a579 100644 --- a/drivers/thermal/Makefile +++ b/drivers/thermal/Makefile @@ -65,3 +65,4 @@ obj-$(CONFIG_AMLOGIC_THERMAL) += amlogic_thermal.o obj-$(CONFIG_SPRD_THERMAL) += sprd_thermal.o obj-$(CONFIG_KHADAS_MCU_FAN_THERMAL) += khadas_mcu_fan.o obj-$(CONFIG_LOONGSON2_THERMAL) += loongson2_thermal.o +obj-$(CONFIG_CV180X_THERMAL) += cv180x_thermal.o diff --git a/drivers/thermal/cv180x_thermal.c b/drivers/thermal/cv180x_thermal.c new file mode 100644 index 000000000000..89425e2b75a2 --- /dev/null +++ b/drivers/thermal/cv180x_thermal.c @@ -0,0 +1,262 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 Sophgo Inc. + * Copyright (C) 2024 Haylen Chu + */ + +#include +#include +#include +#include +#include +#include +#include + +#define TEMPSEN_VERSION 0x0 +#define TEMPSEN_CTRL 0x4 +#define TEMPSEN_CTRL_EN BIT(0) +#define TEMPSEN_CTRL_SEL_MASK GENMASK(7, 4) +#define TEMPSEN_CTRL_SEL_OFFSET 4 +#define TEMPSEN_STATUS 0x8 +#define TEMPSEN_SET 0xc +#define TEMPSEN_SET_CHOPSEL_MASK GENMASK(5, 4) +#define TEMPSEN_SET_CHOPSEL_OFFSET 4 +#define TEMPSEN_SET_CHOPSEL_128T 0 +#define TEMPSEN_SET_CHOPSEL_256T 1 +#define TEMPSEN_SET_CHOPSEL_512T 2 +#define TEMPSEN_SET_CHOPSEL_1024T 3 +#define TEMPSEN_SET_ACCSEL_MASK GENMASK(7, 6) +#define TEMPSEN_SET_ACCSEL_OFFSET 6 +#define TEMPSEN_SET_ACCSEL_512T 0 +#define TEMPSEN_SET_ACCSEL_1024T 1 +#define TEMPSEN_SET_ACCSEL_2048T 2 +#define TEMPSEN_SET_ACCSEL_4096T 3 +#define TEMPSEN_SET_CYC_CLKDIV_MASK GENMASK(15, 8) +#define TEMPSEN_SET_CYC_CLKDIV_OFFSET 8 +#define TEMPSEN_INTR_EN 0x10 +#define TEMPSEN_INTR_CLR 0x14 +#define TEMPSEN_INTR_STA 0x18 +#define TEMPSEN_INTR_RAW 0x1c +#define TEMPSEN_RESULT(n) (0x20 + (n) * 4) +#define TEMPSEN_RESULT_RESULT_MASK GENMASK(12, 0) +#define TEMPSEN_RESULT_MAX_RESULT_MASK GENMASK(28, 16) +#define TEMPSEN_RESULT_CLR_MAX_RESULT BIT(31) +#define TEMPSEN_AUTO_PERIOD 0x64 +#define TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK GENMASK(23, 0) +#define TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET 0 + +struct cv180x_thermal_zone { + struct device *dev; + void __iomem *base; + struct clk *clk_tempsen; + u32 chop_period; + u32 accum_period; + u32 sample_cycle; +}; + +static void cv180x_thermal_init(struct cv180x_thermal_zone *ctz) +{ + void __iomem *base = ctz->base; + u32 regval; + + writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR); + writel(TEMPSEN_RESULT_CLR_MAX_RESULT, base + TEMPSEN_RESULT(0)); + + regval = readl(base + TEMPSEN_SET); + regval &= ~TEMPSEN_SET_CHOPSEL_MASK; + regval &= ~TEMPSEN_SET_ACCSEL_MASK; + regval &= ~TEMPSEN_SET_CYC_CLKDIV_MASK; + regval |= ctz->chop_period << TEMPSEN_SET_CHOPSEL_OFFSET; + regval |= ctz->accum_period << TEMPSEN_SET_ACCSEL_OFFSET; + regval |= 0x31 << TEMPSEN_SET_CYC_CLKDIV_OFFSET; + writel(regval, base + TEMPSEN_SET); + + regval = readl(base + TEMPSEN_AUTO_PERIOD); + regval &= ~TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK; + regval |= ctz->sample_cycle << TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET; + writel(regval, base + TEMPSEN_AUTO_PERIOD); + + regval = readl(base + TEMPSEN_CTRL); + regval &= ~TEMPSEN_CTRL_SEL_MASK; + regval |= 1 << TEMPSEN_CTRL_SEL_OFFSET; + regval |= TEMPSEN_CTRL_EN; + writel(regval, base + TEMPSEN_CTRL); +} + +static void cv180x_thermal_deinit(struct cv180x_thermal_zone *ct) +{ + void __iomem *base = ct->base; + u32 regval; + + regval = readl(base + TEMPSEN_CTRL); + regval &= ~(TEMPSEN_CTRL_SEL_MASK | TEMPSEN_CTRL_EN); + writel(regval, base + TEMPSEN_CTRL); + + writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR); +} + +/* + * Raw register value to temperature (mC) formula: + * + * read_val * 1000 * 716 + * Temperature = ----------------------- - 273000 + * divider + * + * where divider should be ticks number of accumulation period, + * e.g. 2048 for TEMPSEN_CTRL_ACCSEL_2048T + */ +static int cv180x_calc_temp(struct cv180x_thermal_zone *ctz, u32 result) +{ + u32 divider = (u32)(512 * int_pow(2, ctz->accum_period)); + + return (result * 1000) * 716 / divider - 273000; +} + +static int cv180x_get_temp(struct thermal_zone_device *tdev, int *temperature) +{ + struct cv180x_thermal_zone *ctz = thermal_zone_device_priv(tdev); + void __iomem *base = ctz->base; + u32 result; + + result = readl(base + TEMPSEN_RESULT(0)) & TEMPSEN_RESULT_RESULT_MASK; + *temperature = cv180x_calc_temp(ctz, result); + + return 0; +} + +static const struct thermal_zone_device_ops cv180x_thermal_ops = { + .get_temp = cv180x_get_temp, +}; + +static const struct of_device_id cv180x_thermal_of_match[] = { + { .compatible = "sophgo,cv1800-thermal" }, + { .compatible = "sophgo,cv180x-thermal" }, + {}, +}; +MODULE_DEVICE_TABLE(of, cv180x_thermal_of_match); + +static int +cv180x_parse_dt(struct cv180x_thermal_zone *ctz) +{ + struct device_node *np = ctz->dev->of_node; + + if (of_property_read_u32(np, "accumulation-period", + &ctz->accum_period)) { + ctz->accum_period = TEMPSEN_SET_ACCSEL_2048T; + } else { + if (ctz->accum_period < TEMPSEN_SET_ACCSEL_512T || + ctz->accum_period > TEMPSEN_SET_ACCSEL_4096T) { + dev_err(ctz->dev, "invalid accumulation period %d\n", + ctz->accum_period); + return -EINVAL; + } + } + + if (of_property_read_u32(np, "chop-period", &ctz->chop_period)) { + ctz->chop_period = TEMPSEN_SET_CHOPSEL_1024T; + } else { + if (ctz->chop_period < TEMPSEN_SET_CHOPSEL_128T || + ctz->chop_period > TEMPSEN_SET_CHOPSEL_1024T) { + dev_err(ctz->dev, "invalid chop period %d\n", + ctz->chop_period); + return -EINVAL; + } + } + + if (of_property_read_u32(np, "sample-cycle-us", &ctz->sample_cycle)) + ctz->sample_cycle = 1000000; + + return 0; +} + +static int cv180x_thermal_probe(struct platform_device *pdev) +{ + struct cv180x_thermal_zone *ctz; + struct thermal_zone_device *tz; + struct resource *res; + int ret; + + ctz = devm_kzalloc(&pdev->dev, sizeof(*ctz), GFP_KERNEL); + if (!ctz) + return -ENOMEM; + + ctz->dev = &pdev->dev; + + ret = cv180x_parse_dt(ctz); + if (ret) + return dev_err_probe(&pdev->dev, ret, "failed to parse dt\n"); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + ctz->base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(ctz->base)) + return dev_err_probe(&pdev->dev, PTR_ERR(ctz->base), + "failed to map tempsen registers\n"); + + ctz->clk_tempsen = devm_clk_get(&pdev->dev, "clk_tempsen"); + if (IS_ERR(ctz->clk_tempsen)) + return dev_err_probe(&pdev->dev, PTR_ERR(ctz->clk_tempsen), + "failed to get clk_tempsen\n"); + + clk_prepare_enable(ctz->clk_tempsen); + + cv180x_thermal_init(ctz); + + tz = devm_thermal_of_zone_register(&pdev->dev, 0, ctz, + &cv180x_thermal_ops); + if (IS_ERR(tz)) + return dev_err_probe(&pdev->dev, PTR_ERR(tz), + "failed to register thermal zone\n"); + + platform_set_drvdata(pdev, ctz); + + return 0; +} + +static int cv180x_thermal_remove(struct platform_device *pdev) +{ + struct cv180x_thermal_zone *ctz = platform_get_drvdata(pdev); + + cv180x_thermal_deinit(ctz); + clk_disable_unprepare(ctz->clk_tempsen); + + return 0; +} + +static int __maybe_unused cv180x_thermal_suspend(struct device *dev) +{ + struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev); + + cv180x_thermal_deinit(ctz); + clk_disable_unprepare(ctz->clk_tempsen); + + return 0; +} + +static int __maybe_unused cv180x_thermal_resume(struct device *dev) +{ + struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev); + + clk_prepare_enable(ctz->clk_tempsen); + cv180x_thermal_init(ctz); + + return 0; +} + +static SIMPLE_DEV_PM_OPS(cv180x_thermal_pm_ops, + cv180x_thermal_suspend, cv180x_thermal_resume); + +static struct platform_driver cv180x_thermal_driver = { + .probe = cv180x_thermal_probe, + .remove = cv180x_thermal_remove, + .driver = { + .name = "cv180x-thermal", + .pm = &cv180x_thermal_pm_ops, + .of_match_table = cv180x_thermal_of_match, + }, +}; + +module_platform_driver(cv180x_thermal_driver); + +MODULE_DESCRIPTION("Sophgo CV180x thermal driver"); +MODULE_AUTHOR("Haylen Chu "); +MODULE_LICENSE("GPL");