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([110.93.11.116]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4215814e7cbsm26222295e9.39.2024.06.05.08.30.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jun 2024 08:30:23 -0700 (PDT) From: Krzysztof Kozlowski To: Shawn Guo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev Cc: Krzysztof Kozlowski Subject: [PATCH 1/3] arm64: dts: freescale: use defines for interrupts Date: Wed, 5 Jun 2024 17:30:18 +0200 Message-ID: <20240605153020.104717-1-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Replace hard-coded interrupt parts (GIC, flags) with standard defines for readability. No changes in resulting DTBs. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Peng Fan --- .../arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 54 +++---- .../arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 6 +- .../arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 108 +++++++------- .../arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 2 +- .../arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 48 +++---- .../arm64/boot/dts/freescale/fsl-ls2080a.dtsi | 2 +- .../arm64/boot/dts/freescale/fsl-ls2088a.dtsi | 2 +- .../arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 136 +++++++++--------- .../arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 4 +- 9 files changed, 181 insertions(+), 181 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi index a0f7bbd691a0..cfb77a76a240 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi @@ -74,15 +74,15 @@ coreclk: coreclk { timer { compatible = "arm,armv8-timer"; - interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */ - <1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */ - <1 11 IRQ_TYPE_LEVEL_LOW>,/* Virtual PPI */ - <1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */ + interrupts = ,/* Physical Secure PPI */ + ,/* Physical Non-Secure PPI */ + ,/* Virtual PPI */ + ;/* Hypervisor PPI */ }; pmu { compatible = "arm,cortex-a53-pmu"; - interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; }; gic: interrupt-controller@1400000 { @@ -93,7 +93,7 @@ gic: interrupt-controller@1400000 { <0x0 0x1402000 0 0x2000>, /* GICC */ <0x0 0x1404000 0 0x2000>, /* GICH */ <0x0 0x1406000 0 0x2000>; /* GICV */ - interrupts = <1 9 IRQ_TYPE_LEVEL_LOW>; + interrupts = ; }; reboot { @@ -159,7 +159,7 @@ QORIQ_CLK_PLL_DIV(1)>, esdhc0: esdhc@1560000 { compatible = "fsl,ls1012a-esdhc", "fsl,esdhc"; reg = <0x0 0x1560000 0x0 0x10000>; - interrupts = <0 62 0x4>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; voltage-ranges = <1800 1800 3300 3300>; @@ -178,7 +178,7 @@ scfg: scfg@1570000 { esdhc1: esdhc@1580000 { compatible = "fsl,ls1012a-esdhc", "fsl,esdhc"; reg = <0x0 0x1580000 0x0 0x10000>; - interrupts = <0 65 0x4>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; voltage-ranges = <1800 1800 3300 3300>; @@ -305,7 +305,7 @@ clockgen: clocking@1ee1000 { tmu: tmu@1f00000 { compatible = "fsl,qoriq-tmu"; reg = <0x0 0x1f00000 0x0 0x10000>; - interrupts = <0 33 0x4>; + interrupts = ; fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x60062>; fsl,tmu-calibration = <0x00000000 0x00000025>, @@ -355,7 +355,7 @@ i2c0: i2c@2180000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2180000 0x0 0x10000>; - interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; scl-gpios = <&gpio0 2 0>; @@ -367,7 +367,7 @@ i2c1: i2c@2190000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2190000 0x0 0x10000>; - interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; scl-gpios = <&gpio0 13 0>; @@ -379,7 +379,7 @@ dspi: spi@2100000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2100000 0x0 0x10000>; - interrupts = <0 64 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clock-names = "dspi"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; @@ -391,7 +391,7 @@ dspi: spi@2100000 { duart0: serial@21c0500 { compatible = "fsl,ns16550", "ns16550a"; reg = <0x00 0x21c0500 0x0 0x100>; - interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; status = "disabled"; @@ -400,7 +400,7 @@ duart0: serial@21c0500 { duart1: serial@21c0600 { compatible = "fsl,ns16550", "ns16550a"; reg = <0x00 0x21c0600 0x0 0x100>; - interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; status = "disabled"; @@ -409,7 +409,7 @@ duart1: serial@21c0600 { gpio0: gpio@2300000 { compatible = "fsl,qoriq-gpio"; reg = <0x0 0x2300000 0x0 0x10000>; - interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -419,7 +419,7 @@ gpio0: gpio@2300000 { gpio1: gpio@2310000 { compatible = "fsl,qoriq-gpio"; reg = <0x0 0x2310000 0x0 0x10000>; - interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -430,7 +430,7 @@ wdog0: watchdog@2ad0000 { compatible = "fsl,ls1012a-wdt", "fsl,imx21-wdt"; reg = <0x0 0x2ad0000 0x0 0x10000>; - interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; big-endian; }; @@ -439,7 +439,7 @@ sai1: sai@2b50000 { #sound-dai-cells = <0>; compatible = "fsl,vf610-sai"; reg = <0x0 0x2b50000 0x0 0x10000>; - interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>, <&clockgen QORIQ_CLK_PLATFORM_PLL @@ -459,7 +459,7 @@ sai2: sai@2b60000 { #sound-dai-cells = <0>; compatible = "fsl,vf610-sai"; reg = <0x0 0x2b60000 0x0 0x10000>; - interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>, <&clockgen QORIQ_CLK_PLATFORM_PLL @@ -481,8 +481,8 @@ edma0: dma-controller@2c00000 { reg = <0x0 0x2c00000 0x0 0x10000>, <0x0 0x2c10000 0x0 0x10000>, <0x0 0x2c20000 0x0 0x10000>; - interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>, - <0 103 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; interrupt-names = "edma-tx", "edma-err"; dma-channels = <32>; big-endian; @@ -496,7 +496,7 @@ QORIQ_CLK_PLL_DIV(4)>, usb0: usb@2f00000 { compatible = "snps,dwc3"; reg = <0x0 0x2f00000 0x0 0x10000>; - interrupts = <0 60 0x4>; + interrupts = ; dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; @@ -509,7 +509,7 @@ sata: sata@3200000 { reg = <0x0 0x3200000 0x0 0x10000>, <0x0 0x20140520 0x0 0x4>; reg-names = "ahci", "sata-ecc"; - interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; dma-coherent; @@ -519,7 +519,7 @@ sata: sata@3200000 { usb1: usb@8600000 { compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr"; reg = <0x0 0x8600000 0x0 0x1000>; - interrupts = <0 139 0x4>; + interrupts = ; dr_mode = "host"; phy_type = "ulpi"; }; @@ -528,7 +528,7 @@ msi: msi-controller1@1572000 { compatible = "fsl,ls1012a-msi"; reg = <0x0 0x1572000 0x0 0x8>; msi-controller; - interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; }; pcie1: pcie@3400000 { @@ -536,8 +536,8 @@ pcie1: pcie@3400000 { reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */ <0x40 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <0 118 0x4>, /* controller interrupt */ - <0 117 0x4>; /* PME interrupt */ + interrupts = , /* controller interrupt */ + ; /* PME interrupt */ interrupt-names = "aer", "pme"; #address-cells = <3>; #size-cells = <2>; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi index 70b8731029c4..18aa02a0ebff 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi @@ -859,8 +859,8 @@ QORIQ_CLK_PLL_DIV(16)>, malidp0: display@f080000 { compatible = "arm,mali-dp500"; reg = <0x0 0xf080000 0x0 0x10000>; - interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>, - <0 223 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; interrupt-names = "DE", "SE"; clocks = <&dpclk>, <&clockgen QORIQ_CLK_HWACCEL 2>, @@ -1024,7 +1024,7 @@ dpclk: clock-controller@f1f0000 { tmu: tmu@1f80000 { compatible = "fsl,qoriq-tmu"; reg = <0x0 0x1f80000 0x0 0x10000>; - interrupts = <0 23 0x4>; + interrupts = ; fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>; fsl,tmu-calibration = <0x00000000 0x00000024>, diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi index 8ee6d8c0ef61..1f5ae061e7e3 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi @@ -268,19 +268,19 @@ sec-crit { timer { compatible = "arm,armv8-timer"; - interrupts = <1 13 0xf08>, /* Physical Secure PPI */ - <1 14 0xf08>, /* Physical Non-Secure PPI */ - <1 11 0xf08>, /* Virtual PPI */ - <1 10 0xf08>; /* Hypervisor PPI */ + interrupts = , + , + , + ; fsl,erratum-a008585; }; pmu { compatible = "arm,cortex-a53-pmu"; - interrupts = <0 106 0x4>, - <0 107 0x4>, - <0 95 0x4>, - <0 97 0x4>; + interrupts = , + , + , + ; interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, @@ -295,7 +295,7 @@ gic: interrupt-controller@1400000 { <0x0 0x1402000 0 0x2000>, /* GICC */ <0x0 0x1404000 0 0x2000>, /* GICH */ <0x0 0x1406000 0 0x2000>; /* GICV */ - interrupts = <1 9 0xf08>; + interrupts = ; }; soc: soc { @@ -352,7 +352,7 @@ crypto: crypto@1700000 { #size-cells = <1>; ranges = <0x0 0x00 0x1700000 0x100000>; reg = <0x00 0x1700000 0x0 0x100000>; - interrupts = <0 75 0x4>; + interrupts = ; dma-coherent; sec_jr0: jr@10000 { @@ -360,7 +360,7 @@ sec_jr0: jr@10000 { "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring"; reg = <0x10000 0x10000>; - interrupts = <0 71 0x4>; + interrupts = ; }; sec_jr1: jr@20000 { @@ -368,7 +368,7 @@ sec_jr1: jr@20000 { "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring"; reg = <0x20000 0x10000>; - interrupts = <0 72 0x4>; + interrupts = ; }; sec_jr2: jr@30000 { @@ -376,7 +376,7 @@ sec_jr2: jr@30000 { "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring"; reg = <0x30000 0x10000>; - interrupts = <0 73 0x4>; + interrupts = ; }; sec_jr3: jr@40000 { @@ -384,7 +384,7 @@ sec_jr3: jr@40000 { "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring"; reg = <0x40000 0x10000>; - interrupts = <0 74 0x4>; + interrupts = ; }; }; @@ -405,7 +405,7 @@ dcfg: dcfg@1ee0000 { ifc: memory-controller@1530000 { compatible = "fsl,ifc"; reg = <0x0 0x1530000 0x0 0x10000>; - interrupts = <0 43 0x4>; + interrupts = ; }; qspi: spi@1550000 { @@ -415,7 +415,7 @@ qspi: spi@1550000 { reg = <0x0 0x1550000 0x0 0x10000>, <0x0 0x40000000 0x0 0x4000000>; reg-names = "QuadSPI", "QuadSPI-memory"; - interrupts = <0 99 0x4>; + interrupts = ; clock-names = "qspi_en", "qspi"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>, @@ -427,7 +427,7 @@ QORIQ_CLK_PLL_DIV(1)>, esdhc: esdhc@1560000 { compatible = "fsl,ls1043a-esdhc", "fsl,esdhc"; reg = <0x0 0x1560000 0x0 0x10000>; - interrupts = <0 62 0x4>; + interrupts = ; clock-frequency = <0>; voltage-ranges = <1800 1800 3300 3300>; sdhci,auto-cmd12; @@ -438,14 +438,14 @@ esdhc: esdhc@1560000 { ddr: memory-controller@1080000 { compatible = "fsl,qoriq-memory-controller"; reg = <0x0 0x1080000 0x0 0x1000>; - interrupts = <0 144 0x4>; + interrupts = ; big-endian; }; tmu: tmu@1f00000 { compatible = "fsl,qoriq-tmu"; reg = <0x0 0x1f00000 0x0 0x10000>; - interrupts = <0 33 0x4>; + interrupts = ; fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>; fsl,tmu-calibration = <0x00000000 0x00000023>, @@ -518,7 +518,7 @@ dspi0: spi@2100000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2100000 0x0 0x10000>; - interrupts = <0 64 0x4>; + interrupts = ; clock-names = "dspi"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; @@ -532,7 +532,7 @@ i2c0: i2c@2180000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2180000 0x0 0x10000>; - interrupts = <0 56 0x4>; + interrupts = ; clock-names = "i2c"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; @@ -547,7 +547,7 @@ i2c1: i2c@2190000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2190000 0x0 0x10000>; - interrupts = <0 57 0x4>; + interrupts = ; clock-names = "i2c"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; @@ -560,7 +560,7 @@ i2c2: i2c@21a0000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x21a0000 0x0 0x10000>; - interrupts = <0 58 0x4>; + interrupts = ; clock-names = "i2c"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; @@ -573,7 +573,7 @@ i2c3: i2c@21b0000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x21b0000 0x0 0x10000>; - interrupts = <0 59 0x4>; + interrupts = ; clock-names = "i2c"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; @@ -584,7 +584,7 @@ i2c3: i2c@21b0000 { duart0: serial@21c0500 { compatible = "fsl,ns16550", "ns16550a"; reg = <0x00 0x21c0500 0x0 0x100>; - interrupts = <0 54 0x4>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; }; @@ -592,7 +592,7 @@ duart0: serial@21c0500 { duart1: serial@21c0600 { compatible = "fsl,ns16550", "ns16550a"; reg = <0x00 0x21c0600 0x0 0x100>; - interrupts = <0 54 0x4>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; }; @@ -600,7 +600,7 @@ duart1: serial@21c0600 { duart2: serial@21d0500 { compatible = "fsl,ns16550", "ns16550a"; reg = <0x0 0x21d0500 0x0 0x100>; - interrupts = <0 55 0x4>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; }; @@ -608,7 +608,7 @@ duart2: serial@21d0500 { duart3: serial@21d0600 { compatible = "fsl,ns16550", "ns16550a"; reg = <0x0 0x21d0600 0x0 0x100>; - interrupts = <0 55 0x4>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; }; @@ -616,7 +616,7 @@ duart3: serial@21d0600 { gpio1: gpio@2300000 { compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2300000 0x0 0x10000>; - interrupts = <0 66 0x4>; + interrupts = ; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -626,7 +626,7 @@ gpio1: gpio@2300000 { gpio2: gpio@2310000 { compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2310000 0x0 0x10000>; - interrupts = <0 67 0x4>; + interrupts = ; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -636,7 +636,7 @@ gpio2: gpio@2310000 { gpio3: gpio@2320000 { compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2320000 0x0 0x10000>; - interrupts = <0 68 0x4>; + interrupts = ; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -646,7 +646,7 @@ gpio3: gpio@2320000 { gpio4: gpio@2330000 { compatible = "fsl,ls1043a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2330000 0x0 0x10000>; - interrupts = <0 134 0x4>; + interrupts = ; gpio-controller; #gpio-cells = <2>; interrupt-controller; @@ -721,7 +721,7 @@ data-only@0 { lpuart0: serial@2950000 { compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2950000 0x0 0x1000>; - interrupts = <0 48 0x4>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_SYSCLK 0>; clock-names = "ipg"; status = "disabled"; @@ -730,7 +730,7 @@ lpuart0: serial@2950000 { lpuart1: serial@2960000 { compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2960000 0x0 0x1000>; - interrupts = <0 49 0x4>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; clock-names = "ipg"; @@ -740,7 +740,7 @@ lpuart1: serial@2960000 { lpuart2: serial@2970000 { compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2970000 0x0 0x1000>; - interrupts = <0 50 0x4>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; clock-names = "ipg"; @@ -750,7 +750,7 @@ lpuart2: serial@2970000 { lpuart3: serial@2980000 { compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2980000 0x0 0x1000>; - interrupts = <0 51 0x4>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; clock-names = "ipg"; @@ -760,7 +760,7 @@ lpuart3: serial@2980000 { lpuart4: serial@2990000 { compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x2990000 0x0 0x1000>; - interrupts = <0 52 0x4>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; clock-names = "ipg"; @@ -770,7 +770,7 @@ lpuart4: serial@2990000 { lpuart5: serial@29a0000 { compatible = "fsl,ls1021a-lpuart"; reg = <0x0 0x29a0000 0x0 0x1000>; - interrupts = <0 53 0x4>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; clock-names = "ipg"; @@ -780,7 +780,7 @@ lpuart5: serial@29a0000 { wdog0: watchdog@2ad0000 { compatible = "fsl,ls1043a-wdt", "fsl,imx21-wdt"; reg = <0x0 0x2ad0000 0x0 0x10000>; - interrupts = <0 83 0x4>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; clock-names = "wdog"; @@ -793,8 +793,8 @@ edma0: dma-controller@2c00000 { reg = <0x0 0x2c00000 0x0 0x10000>, <0x0 0x2c10000 0x0 0x10000>, <0x0 0x2c20000 0x0 0x10000>; - interrupts = <0 103 0x4>, - <0 103 0x4>; + interrupts = , + ; interrupt-names = "edma-tx", "edma-err"; dma-channels = <32>; big-endian; @@ -815,7 +815,7 @@ aux_bus: aux_bus { usb0: usb@2f00000 { compatible = "snps,dwc3"; reg = <0x0 0x2f00000 0x0 0x10000>; - interrupts = <0 60 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; @@ -827,7 +827,7 @@ usb0: usb@2f00000 { usb1: usb@3000000 { compatible = "snps,dwc3"; reg = <0x0 0x3000000 0x0 0x10000>; - interrupts = <0 61 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; @@ -839,7 +839,7 @@ usb1: usb@3000000 { usb2: usb@3100000 { compatible = "snps,dwc3"; reg = <0x0 0x3100000 0x0 0x10000>; - interrupts = <0 63 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; @@ -853,7 +853,7 @@ sata: sata@3200000 { reg = <0x0 0x3200000 0x0 0x10000>, <0x0 0x20140520 0x0 0x4>; reg-names = "ahci", "sata-ecc"; - interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; dma-coherent; @@ -864,21 +864,21 @@ msi1: msi-controller1@1571000 { compatible = "fsl,ls1043a-msi"; reg = <0x0 0x1571000 0x0 0x8>; msi-controller; - interrupts = <0 116 0x4>; + interrupts = ; }; msi2: msi-controller2@1572000 { compatible = "fsl,ls1043a-msi"; reg = <0x0 0x1572000 0x0 0x8>; msi-controller; - interrupts = <0 126 0x4>; + interrupts = ; }; msi3: msi-controller3@1573000 { compatible = "fsl,ls1043a-msi"; reg = <0x0 0x1573000 0x0 0x8>; msi-controller; - interrupts = <0 160 0x4>; + interrupts = ; }; pcie1: pcie@3400000 { @@ -886,8 +886,8 @@ pcie1: pcie@3400000 { reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */ <0x40 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH>, - <0 118 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; interrupt-names = "pme", "aer"; #address-cells = <3>; #size-cells = <2>; @@ -913,8 +913,8 @@ pcie2: pcie@3500000 { reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */ <0x48 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <0 127 IRQ_TYPE_LEVEL_HIGH>, - <0 128 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; interrupt-names = "pme", "aer"; #address-cells = <3>; #size-cells = <2>; @@ -940,8 +940,8 @@ pcie3: pcie@3600000 { reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */ <0x50 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <0 161 IRQ_TYPE_LEVEL_HIGH>, - <0 162 IRQ_TYPE_LEVEL_HIGH>; + interrupts = , + ; interrupt-names = "pme", "aer"; #address-cells = <3>; #size-cells = <2>; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 754a64be739c..e5fcfc690ffc 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -441,7 +441,7 @@ clockgen: clocking@1ee1000 { tmu: tmu@1f00000 { compatible = "fsl,qoriq-tmu"; reg = <0x0 0x1f00000 0x0 0x10000>; - interrupts = <0 33 0x4>; + interrupts = ; fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>; fsl,tmu-calibration = /* Calibration data group 1 */ diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi index 604bf88d70b3..91589b907ec8 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi @@ -118,7 +118,7 @@ gic: interrupt-controller@6000000 { <0x0 0x0c0c0000 0 0x2000>, /* GICC */ <0x0 0x0c0d0000 0 0x1000>, /* GICH */ <0x0 0x0c0e0000 0 0x20000>; /* GICV */ - interrupts = <1 9 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; #address-cells = <2>; #size-cells = <2>; ranges; @@ -183,10 +183,10 @@ soc-crit { timer { compatible = "arm,armv8-timer"; - interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */ - <1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */ - <1 11 IRQ_TYPE_LEVEL_LOW>,/* Virtual PPI */ - <1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */ + interrupts = ,/* Physical Secure PPI */ + ,/* Physical Non-Secure PPI */ + ,/* Virtual PPI */ + ;/* Hypervisor PPI */ }; pmu { @@ -280,7 +280,7 @@ sfp: efuse@1e80000 { tmu: tmu@1f80000 { compatible = "fsl,qoriq-tmu"; reg = <0x0 0x1f80000 0x0 0x10000>; - interrupts = <0 23 0x4>; + interrupts = ; fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x70062>; fsl,tmu-calibration = /* Calibration data group 1 */ @@ -347,7 +347,7 @@ duart0: serial@21c0500 { reg = <0x0 0x21c0500 0x0 0x100>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; - interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; status = "disabled"; }; @@ -356,14 +356,14 @@ duart1: serial@21c0600 { reg = <0x0 0x21c0600 0x0 0x100>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; - interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; status = "disabled"; }; gpio0: gpio@2300000 { compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2300000 0x0 0x10000>; - interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; little-endian; gpio-controller; #gpio-cells = <2>; @@ -374,7 +374,7 @@ gpio0: gpio@2300000 { gpio1: gpio@2310000 { compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2310000 0x0 0x10000>; - interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; little-endian; gpio-controller; #gpio-cells = <2>; @@ -385,7 +385,7 @@ gpio1: gpio@2310000 { gpio2: gpio@2320000 { compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2320000 0x0 0x10000>; - interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; little-endian; gpio-controller; #gpio-cells = <2>; @@ -396,7 +396,7 @@ gpio2: gpio@2320000 { gpio3: gpio@2330000 { compatible = "fsl,ls1088a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2330000 0x0 0x10000>; - interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; little-endian; gpio-controller; #gpio-cells = <2>; @@ -407,7 +407,7 @@ gpio3: gpio@2330000 { ifc: memory-controller@2240000 { compatible = "fsl,ifc"; reg = <0x0 0x2240000 0x0 0x20000>; - interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; little-endian; #address-cells = <2>; #size-cells = <1>; @@ -419,7 +419,7 @@ i2c0: i2c@2000000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2000000 0x0 0x10000>; - interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(8)>; status = "disabled"; @@ -430,7 +430,7 @@ i2c1: i2c@2010000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2010000 0x0 0x10000>; - interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(8)>; status = "disabled"; @@ -441,7 +441,7 @@ i2c2: i2c@2020000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2020000 0x0 0x10000>; - interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(8)>; status = "disabled"; @@ -452,7 +452,7 @@ i2c3: i2c@2030000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2030000 0x0 0x10000>; - interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(8)>; status = "disabled"; @@ -477,7 +477,7 @@ QORIQ_CLK_PLL_DIV(4)>, esdhc: esdhc@2140000 { compatible = "fsl,ls1088a-esdhc", "fsl,esdhc"; reg = <0x0 0x2140000 0x0 0x10000>; - interrupts = <0 28 0x4>; /* Level high type */ + interrupts = ; clock-frequency = <0>; clocks = <&clockgen QORIQ_CLK_HWACCEL 1>; voltage-ranges = <1800 1800 3300 3300>; @@ -490,7 +490,7 @@ esdhc: esdhc@2140000 { usb0: usb@3100000 { compatible = "snps,dwc3"; reg = <0x0 0x3100000 0x0 0x10000>; - interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; @@ -501,7 +501,7 @@ usb0: usb@3100000 { usb1: usb@3110000 { compatible = "snps,dwc3"; reg = <0x0 0x3110000 0x0 0x10000>; - interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; @@ -514,7 +514,7 @@ sata: sata@3200000 { reg = <0x0 0x3200000 0x0 0x10000>, <0x7 0x100520 0x0 0x4>; reg-names = "ahci", "sata-ecc"; - interrupts = <0 133 IRQ_TYPE_LEVEL_HIGH>; + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; dma-coherent; @@ -565,7 +565,7 @@ pcie1: pcie@3400000 { reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */ <0x20 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */ + interrupts = ; /* aer interrupt */ interrupt-names = "aer"; #address-cells = <3>; #size-cells = <2>; @@ -604,7 +604,7 @@ pcie2: pcie@3500000 { reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */ <0x28 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <0 113 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */ + interrupts = ; /* aer interrupt */ interrupt-names = "aer"; #address-cells = <3>; #size-cells = <2>; @@ -642,7 +642,7 @@ pcie3: pcie@3600000 { reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */ <0x30 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <0 118 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */ + interrupts = ; /* aer interrupt */ interrupt-names = "aer"; #address-cells = <3>; #size-cells = <2>; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi index 8352197cea6f..e9bc1f4fa13c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls2080a.dtsi @@ -15,7 +15,7 @@ / { pmu { compatible = "arm,cortex-a57-pmu"; - interrupts = <1 7 0x8>; /* PMU PPI, Level low type */ + interrupts = ; }; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi index 245bbd615c81..60c422560e33 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls2088a.dtsi @@ -15,7 +15,7 @@ / { pmu { compatible = "arm,cortex-a72-pmu"; - interrupts = <1 7 0x8>; /* PMU PPI, Level low type */ + interrupts = ; }; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi index ccba0a135b24..cc305e629bdc 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi @@ -58,7 +58,7 @@ gic: interrupt-controller@6000000 { #size-cells = <2>; ranges; interrupt-controller; - interrupts = <1 9 0x4>; + interrupts = ; its: msi-controller@6020000 { compatible = "arm,gic-v3-its"; @@ -314,7 +314,7 @@ extirq: interrupt-controller@14 { tmu: tmu@1f80000 { compatible = "fsl,qoriq-tmu"; reg = <0x0 0x1f80000 0x0 0x10000>; - interrupts = <0 23 0x4>; + interrupts = ; fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>; fsl,tmu-calibration = <0x00000000 0x00000026>, @@ -362,7 +362,7 @@ serial0: serial@21c0500 { reg = <0x0 0x21c0500 0x0 0x100>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; - interrupts = <0 32 0x4>; /* Level high type */ + interrupts = ; }; serial1: serial@21c0600 { @@ -370,7 +370,7 @@ serial1: serial@21c0600 { reg = <0x0 0x21c0600 0x0 0x100>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; - interrupts = <0 32 0x4>; /* Level high type */ + interrupts = ; }; serial2: serial@21d0500 { @@ -378,7 +378,7 @@ serial2: serial@21d0500 { reg = <0x0 0x21d0500 0x0 0x100>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; - interrupts = <0 33 0x4>; /* Level high type */ + interrupts = ; }; serial3: serial@21d0600 { @@ -386,7 +386,7 @@ serial3: serial@21d0600 { reg = <0x0 0x21d0600 0x0 0x100>; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; - interrupts = <0 33 0x4>; /* Level high type */ + interrupts = ; }; cluster1_core0_watchdog: wdt@c000000 { @@ -883,48 +883,48 @@ smmu: iommu@5000000 { #iommu-cells = <1>; stream-match-mask = <0x7C00>; dma-coherent; - interrupts = <0 13 4>, /* global secure fault */ - <0 14 4>, /* combined secure interrupt */ - <0 15 4>, /* global non-secure fault */ - <0 16 4>, /* combined non-secure interrupt */ + interrupts = , /* global secure fault */ + , /* combined secure interrupt */ + , /* global non-secure fault */ + , /* combined non-secure interrupt */ /* performance counter interrupts 0-7 */ - <0 211 4>, <0 212 4>, - <0 213 4>, <0 214 4>, - <0 215 4>, <0 216 4>, - <0 217 4>, <0 218 4>, + , , + , , + , , + , , /* per context interrupt, 64 interrupts */ - <0 146 4>, <0 147 4>, - <0 148 4>, <0 149 4>, - <0 150 4>, <0 151 4>, - <0 152 4>, <0 153 4>, - <0 154 4>, <0 155 4>, - <0 156 4>, <0 157 4>, - <0 158 4>, <0 159 4>, - <0 160 4>, <0 161 4>, - <0 162 4>, <0 163 4>, - <0 164 4>, <0 165 4>, - <0 166 4>, <0 167 4>, - <0 168 4>, <0 169 4>, - <0 170 4>, <0 171 4>, - <0 172 4>, <0 173 4>, - <0 174 4>, <0 175 4>, - <0 176 4>, <0 177 4>, - <0 178 4>, <0 179 4>, - <0 180 4>, <0 181 4>, - <0 182 4>, <0 183 4>, - <0 184 4>, <0 185 4>, - <0 186 4>, <0 187 4>, - <0 188 4>, <0 189 4>, - <0 190 4>, <0 191 4>, - <0 192 4>, <0 193 4>, - <0 194 4>, <0 195 4>, - <0 196 4>, <0 197 4>, - <0 198 4>, <0 199 4>, - <0 200 4>, <0 201 4>, - <0 202 4>, <0 203 4>, - <0 204 4>, <0 205 4>, - <0 206 4>, <0 207 4>, - <0 208 4>, <0 209 4>; + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , , + , ; }; dspi: spi@2100000 { @@ -933,7 +933,7 @@ dspi: spi@2100000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2100000 0x0 0x10000>; - interrupts = <0 26 0x4>; /* Level high type */ + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; clock-names = "dspi"; @@ -944,7 +944,7 @@ esdhc: esdhc@2140000 { status = "disabled"; compatible = "fsl,ls2080a-esdhc", "fsl,esdhc"; reg = <0x0 0x2140000 0x0 0x10000>; - interrupts = <0 28 0x4>; /* Level high type */ + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(2)>; voltage-ranges = <1800 1800 3300 3300>; @@ -956,7 +956,7 @@ esdhc: esdhc@2140000 { gpio0: gpio@2300000 { compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2300000 0x0 0x10000>; - interrupts = <0 36 0x4>; /* Level high type */ + interrupts = ; gpio-controller; little-endian; #gpio-cells = <2>; @@ -967,7 +967,7 @@ gpio0: gpio@2300000 { gpio1: gpio@2310000 { compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2310000 0x0 0x10000>; - interrupts = <0 36 0x4>; /* Level high type */ + interrupts = ; gpio-controller; little-endian; #gpio-cells = <2>; @@ -978,7 +978,7 @@ gpio1: gpio@2310000 { gpio2: gpio@2320000 { compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2320000 0x0 0x10000>; - interrupts = <0 37 0x4>; /* Level high type */ + interrupts = ; gpio-controller; little-endian; #gpio-cells = <2>; @@ -989,7 +989,7 @@ gpio2: gpio@2320000 { gpio3: gpio@2330000 { compatible = "fsl,ls2080a-gpio", "fsl,qoriq-gpio"; reg = <0x0 0x2330000 0x0 0x10000>; - interrupts = <0 37 0x4>; /* Level high type */ + interrupts = ; gpio-controller; little-endian; #gpio-cells = <2>; @@ -1003,7 +1003,7 @@ i2c0: i2c@2000000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2000000 0x0 0x10000>; - interrupts = <0 34 0x4>; /* Level high type */ + interrupts = ; clock-names = "i2c"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; @@ -1015,7 +1015,7 @@ i2c1: i2c@2010000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2010000 0x0 0x10000>; - interrupts = <0 34 0x4>; /* Level high type */ + interrupts = ; clock-names = "i2c"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; @@ -1027,7 +1027,7 @@ i2c2: i2c@2020000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2020000 0x0 0x10000>; - interrupts = <0 35 0x4>; /* Level high type */ + interrupts = ; clock-names = "i2c"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; @@ -1039,7 +1039,7 @@ i2c3: i2c@2030000 { #address-cells = <1>; #size-cells = <0>; reg = <0x0 0x2030000 0x0 0x10000>; - interrupts = <0 35 0x4>; /* Level high type */ + interrupts = ; clock-names = "i2c"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; @@ -1048,7 +1048,7 @@ i2c3: i2c@2030000 { ifc: memory-controller@2240000 { compatible = "fsl,ifc"; reg = <0x0 0x2240000 0x0 0x20000>; - interrupts = <0 21 0x4>; /* Level high type */ + interrupts = ; little-endian; #address-cells = <2>; #size-cells = <1>; @@ -1077,7 +1077,7 @@ QORIQ_CLK_PLL_DIV(4)>, pcie1: pcie@3400000 { compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie"; reg-names = "regs", "config"; - interrupts = <0 108 0x4>; /* Level high type */ + interrupts = ; interrupt-names = "intr"; #address-cells = <3>; #size-cells = <2>; @@ -1099,7 +1099,7 @@ pcie1: pcie@3400000 { pcie2: pcie@3500000 { compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie"; reg-names = "regs", "config"; - interrupts = <0 113 0x4>; /* Level high type */ + interrupts = ; interrupt-names = "intr"; #address-cells = <3>; #size-cells = <2>; @@ -1121,7 +1121,7 @@ pcie2: pcie@3500000 { pcie3: pcie@3600000 { compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie"; reg-names = "regs", "config"; - interrupts = <0 118 0x4>; /* Level high type */ + interrupts = ; interrupt-names = "intr"; #address-cells = <3>; #size-cells = <2>; @@ -1143,7 +1143,7 @@ pcie3: pcie@3600000 { pcie4: pcie@3700000 { compatible = "fsl,ls2080a-pcie", "fsl,ls2085a-pcie"; reg-names = "regs", "config"; - interrupts = <0 123 0x4>; /* Level high type */ + interrupts = ; interrupt-names = "intr"; #address-cells = <3>; #size-cells = <2>; @@ -1166,7 +1166,7 @@ sata0: sata@3200000 { status = "disabled"; compatible = "fsl,ls2080a-ahci"; reg = <0x0 0x3200000 0x0 0x10000>; - interrupts = <0 133 0x4>; /* Level high type */ + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; dma-coherent; @@ -1176,7 +1176,7 @@ sata1: sata@3210000 { status = "disabled"; compatible = "fsl,ls2080a-ahci"; reg = <0x0 0x3210000 0x0 0x10000>; - interrupts = <0 136 0x4>; /* Level high type */ + interrupts = ; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(4)>; dma-coherent; @@ -1192,7 +1192,7 @@ bus: bus { usb0: usb@3100000 { compatible = "snps,dwc3"; reg = <0x0 0x3100000 0x0 0x10000>; - interrupts = <0 80 0x4>; /* Level high type */ + interrupts = ; dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; @@ -1203,7 +1203,7 @@ usb0: usb@3100000 { usb1: usb@3110000 { compatible = "snps,dwc3"; reg = <0x0 0x3110000 0x0 0x10000>; - interrupts = <0 81 0x4>; /* Level high type */ + interrupts = ; dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; snps,dis_rxdet_inp3_quirk; @@ -1215,7 +1215,7 @@ usb1: usb@3110000 { ccn@4000000 { compatible = "arm,ccn-504"; reg = <0x0 0x04000000 0x0 0x01000000>; - interrupts = <0 12 4>; + interrupts = ; }; rcpm: power-controller@1e34040 { @@ -1236,14 +1236,14 @@ ftm_alarm0: timer@2800000 { ddr1: memory-controller@1080000 { compatible = "fsl,qoriq-memory-controller"; reg = <0x0 0x1080000 0x0 0x1000>; - interrupts = <0 17 0x4>; + interrupts = ; little-endian; }; ddr2: memory-controller@1090000 { compatible = "fsl,qoriq-memory-controller"; reg = <0x0 0x1090000 0x0 0x1000>; - interrupts = <0 18 0x4>; + interrupts = ; little-endian; }; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index 96055593204a..eaa7d8c70964 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -928,7 +928,7 @@ dspi2: spi@2120000 { esdhc0: esdhc@2140000 { compatible = "fsl,esdhc"; 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([110.93.11.116]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4215814e7cbsm26222295e9.39.2024.06.05.08.30.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jun 2024 08:30:24 -0700 (PDT) From: Krzysztof Kozlowski To: Shawn Guo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev Cc: Krzysztof Kozlowski Subject: [PATCH 2/3] arm64: dts: ls208xa: use defines for timer interrupts Date: Wed, 5 Jun 2024 17:30:19 +0200 Message-ID: <20240605153020.104717-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240605153020.104717-1-krzysztof.kozlowski@linaro.org> References: <20240605153020.104717-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Replace hard-coded interrupt parts (GIC, flags) with standard defines for readability. No changes in resulting DTBs. The comment was saying interrupt was active low, but the actual used value was active high, so assume that the code, not the comment, is correct. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Peng Fan --- arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi index cc305e629bdc..040a48c88fab 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi @@ -241,10 +241,10 @@ map0 { timer: timer { compatible = "arm,armv8-timer"; - interrupts = <1 13 4>, /* Physical Secure PPI, active-low */ - <1 14 4>, /* Physical Non-Secure PPI, active-low */ - <1 11 4>, /* Virtual PPI, active-low */ - <1 10 4>; /* Hypervisor PPI, active-low */ + interrupts = , /* Physical Secure PPI */ + , /* Physical Non-Secure PPI */ + , /* Virtual PPI */ + ; /* Hypervisor PPI */ }; psci { From patchwork Wed Jun 5 15:30:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 13687046 Received: from mail-wr1-f43.google.com (mail-wr1-f43.google.com [209.85.221.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 45FAC45028 for ; Wed, 5 Jun 2024 15:30:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717601429; cv=none; b=NaXChSIL+NCbBcT8ZTA0xKsUtAl/K1rM+lL/u2RaSIP3nUC/WVPA6AvklzeU5CjnIA4ici6qOF7BUCDx4PvgQAW8Odw7uEXnZqsar8EvvqGhx77j1JopN6qsjjb+QD6kq4kQ0ScICF50O6Qgs7B9sWifzboVj7syUxOtVQLUuJ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717601429; c=relaxed/simple; bh=NMv3VKh5odLNj+GDe8Ww1tODWUNO54F1FJCzMaqqk7Y=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uX79YmkaIRd8OqTlMn+VrktZ01XGz7v7r+EAJXndylHmLRQskkmXorvuxeYpnoXokxGh1uykH8oTL4bciZQNZNcVGstbd1Eyb7Gz6zj/URpHrjsh3D2D+rEQ2xA6jMiNbNeXzkdH7OnnMISgyEXUNQ+UPwWqEThoQmf9r7HWmB0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=yW+LixIX; arc=none smtp.client-ip=209.85.221.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="yW+LixIX" Received: by mail-wr1-f43.google.com with SMTP id ffacd0b85a97d-35dcd5377c4so104981f8f.2 for ; Wed, 05 Jun 2024 08:30:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1717601426; x=1718206226; darn=lists.linux.dev; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/K0vfcsphggQE03HaQTq6oV7X6egbMSNGPCTOf5noQs=; b=yW+LixIX+ZtgebmaCE2PPW0s5jou/DoswMAK5kK9T6BkgYtqWBS/weaCE7cJbBESkI Ay3U96ZfF0NcPLdn/WJGxe8ye9btKJ7pjbBRj6NJZRGVbGcjf7nW7os0etJeoyac3cB7 mU9wnPeXepLbIZYahKJCEsf4Cr4a6iy6Sj4M2e949ly8kq/J3uN5XdLncj2SwECeluvJ jNrwwDQN0UxZZtkUKW9XXE7wo9Iw+hEGlrYY6JgWQ+3XanO3ofcKlxZ7RQsZTIE7nV5H X9VrSgUj+yAtaCJDiz1T0Bd2YOHGz/CuyhGRbTE1QxU/MYkDDtTcLZf1dcIO2YWvwqOQ u9OQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1717601426; x=1718206226; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/K0vfcsphggQE03HaQTq6oV7X6egbMSNGPCTOf5noQs=; b=j8LYpbgPhijwftYU0rJ/EOoY12kzcW101P8WtUDsRUM4ylb0PBTWgPLf9DgXGkDAW3 aA2ZZ7DjmzizPWKq7q3FqQdGmmy7W1UpdGEmhILMlXxC2RKbQlihKhTU0kqgHcnlaGcH NCBm4/n5ihik3JIofaFJrPGL+F/svlX2ZEH+hwiRbvkWhFA2Eyc9KmXOYJFHkSQ4aKmM cg7jKOfHEbV3j54zIqgyW6DoAA3g6P2risyRIArFzfbsFejeYhT1Wn2fTMQmAw6ZFpwm rSNdp5p/2xdyBf81aA4g3+UPHLAA3n57r/CUObFT1xJd6iWt5Us4axuJTPotavJC1ikh 08Yw== X-Forwarded-Encrypted: i=1; AJvYcCWroHtFL+N29e94QJSmwBmu5B9/aIePNKq3Yu+4LKgb1xw4Qqps9LUimthSQ4XTSni4xuH0yH8IZEnrZLWdPN6OXiRr X-Gm-Message-State: AOJu0Yy+dNLT4/bL146kRm/bh2TX9KKas1AZEo4/rvIGIprv5dYC8ku7 k2NxjmrV0fwzkFX0HDJ6b2IoxpvCepT/vYOZEEe5DE9V5sYgPZ/71IfJ0RMGwA0= X-Google-Smtp-Source: AGHT+IHE9nDBQ5Sz04khTcIYOGPj0VwRgEjUuiwPv5JSHmid95xhtkpvCP2exEYp6NXmZOXTxCKtiQ== X-Received: by 2002:a5d:59a5:0:b0:359:b737:68c9 with SMTP id ffacd0b85a97d-35e8ef7ea9fmr2637446f8f.45.1717601426591; Wed, 05 Jun 2024 08:30:26 -0700 (PDT) Received: from krzk-bin.. ([110.93.11.116]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4215814e7cbsm26222295e9.39.2024.06.05.08.30.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Jun 2024 08:30:26 -0700 (PDT) From: Krzysztof Kozlowski To: Shawn Guo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev Cc: Krzysztof Kozlowski Subject: [PATCH 3/3] arm64: dts: imx8: use defines for interrupts Date: Wed, 5 Jun 2024 17:30:20 +0200 Message-ID: <20240605153020.104717-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240605153020.104717-1-krzysztof.kozlowski@linaro.org> References: <20240605153020.104717-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Replace hard-coded interrupt flags with standard defines for readability. No changes in resulting DTBs. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi | 2 +- arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi index 90d1901df2b1..930e14fec423 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dtsi @@ -400,7 +400,7 @@ ptn5110: tcpc@50 { pinctrl-0 = <&pinctrl_typec1>; reg = <0x50>; interrupt-parent = <&gpio2>; - interrupts = <11 8>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; status = "okay"; typec1_con: connector { diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts index c024be33fbcc..6d002fc1b2be 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts @@ -193,7 +193,7 @@ light-sensor@44 { compatible = "isil,isl29023"; reg = <0x44>; interrupt-parent = <&lsio_gpio4>; - interrupts = <11 2>; + interrupts = <11 IRQ_TYPE_EDGE_FALLING>; }; pressure-sensor@60 {