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Wed, 5 Jun 2024 16:01:21 +0000 (GMT) From: Gerd Bayer To: Alex Williamson , Jason Gunthorpe , Niklas Schnelle , Ramesh Thomas Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org, Ankit Agrawal , Yishai Hadas , Halil Pasic , Ben Segal , "Tian, Kevin" , Julian Ruess , Gerd Bayer Subject: [PATCH v5 1/3] vfio/pci: Extract duplicated code into macro Date: Wed, 5 Jun 2024 18:01:10 +0200 Message-ID: <20240605160112.925957-2-gbayer@linux.ibm.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240605160112.925957-1-gbayer@linux.ibm.com> References: <20240605160112.925957-1-gbayer@linux.ibm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: Nz5Pp5l_8F8cDjTBDCa9HBQ-2Ek9sDU9 X-Proofpoint-ORIG-GUID: A_0JKbmmqIOVjc65MSz1Af9y-vK8NEkp X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-05_02,2024-06-05_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=0 mlxlogscore=999 priorityscore=1501 malwarescore=0 phishscore=0 bulkscore=0 impostorscore=0 lowpriorityscore=0 mlxscore=0 clxscore=1015 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2406050121 vfio_pci_core_do_io_rw() repeats the same code for multiple access widths. Factor this out into a macro Suggested-by: Alex Williamson Signed-off-by: Gerd Bayer --- drivers/vfio/pci/vfio_pci_rdwr.c | 106 ++++++++++++++----------------- 1 file changed, 46 insertions(+), 60 deletions(-) diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c b/drivers/vfio/pci/vfio_pci_rdwr.c index 03b8f7ada1ac..d07bfb0ab892 100644 --- a/drivers/vfio/pci/vfio_pci_rdwr.c +++ b/drivers/vfio/pci/vfio_pci_rdwr.c @@ -90,6 +90,40 @@ VFIO_IOREAD(8) VFIO_IOREAD(16) VFIO_IOREAD(32) +#define VFIO_IORDWR(size) \ +static int vfio_pci_iordwr##size(struct vfio_pci_core_device *vdev,\ + bool iswrite, bool test_mem, \ + void __iomem *io, char __user *buf, \ + loff_t off, size_t *filled) \ +{ \ + u##size val; \ + int ret; \ + \ + if (iswrite) { \ + if (copy_from_user(&val, buf, sizeof(val))) \ + return -EFAULT; \ + \ + ret = vfio_pci_core_iowrite##size(vdev, test_mem, \ + val, io + off); \ + if (ret) \ + return ret; \ + } else { \ + ret = vfio_pci_core_ioread##size(vdev, test_mem, \ + &val, io + off); \ + if (ret) \ + return ret; \ + \ + if (copy_to_user(buf, &val, sizeof(val))) \ + return -EFAULT; \ + } \ + \ + *filled = sizeof(val); \ + return 0; \ +} \ + +VFIO_IORDWR(8) +VFIO_IORDWR(16) +VFIO_IORDWR(32) /* * Read or write from an __iomem region (MMIO or I/O port) with an excluded * range which is inaccessible. The excluded range drops writes and fills @@ -115,71 +149,23 @@ ssize_t vfio_pci_core_do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem, fillable = 0; if (fillable >= 4 && !(off % 4)) { - u32 val; - - if (iswrite) { - if (copy_from_user(&val, buf, 4)) - return -EFAULT; - - ret = vfio_pci_core_iowrite32(vdev, test_mem, - val, io + off); - if (ret) - return ret; - } else { - ret = vfio_pci_core_ioread32(vdev, test_mem, - &val, io + off); - if (ret) - return ret; - - if (copy_to_user(buf, &val, 4)) - return -EFAULT; - } + ret = vfio_pci_iordwr32(vdev, iswrite, test_mem, + io, buf, off, &filled); + if (ret) + return ret; - filled = 4; } else if (fillable >= 2 && !(off % 2)) { - u16 val; - - if (iswrite) { - if (copy_from_user(&val, buf, 2)) - return -EFAULT; - - ret = vfio_pci_core_iowrite16(vdev, test_mem, - val, io + off); - if (ret) - return ret; - } else { - ret = vfio_pci_core_ioread16(vdev, test_mem, - &val, io + off); - if (ret) - return ret; - - if (copy_to_user(buf, &val, 2)) - return -EFAULT; - } + ret = vfio_pci_iordwr16(vdev, iswrite, test_mem, + io, buf, off, &filled); + if (ret) + return ret; - filled = 2; } else if (fillable) { - u8 val; - - if (iswrite) { - if (copy_from_user(&val, buf, 1)) - return -EFAULT; - - ret = vfio_pci_core_iowrite8(vdev, test_mem, - val, io + off); - if (ret) - return ret; - } else { - ret = vfio_pci_core_ioread8(vdev, test_mem, - &val, io + off); - if (ret) - return ret; - - if (copy_to_user(buf, &val, 1)) - return -EFAULT; - } + ret = vfio_pci_iordwr8(vdev, iswrite, test_mem, + io, buf, off, &filled); + if (ret) + return ret; - filled = 1; } else { /* Fill reads with -1, drop writes */ filled = min(count, (size_t)(x_end - off)); From patchwork Wed Jun 5 16:01:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Bayer X-Patchwork-Id: 13687086 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0C11E15EFA8; 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Wed, 5 Jun 2024 16:01:24 GMT Received: from smtpav07.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D81E92004B; Wed, 5 Jun 2024 16:01:21 +0000 (GMT) Received: from smtpav07.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A9C9920063; Wed, 5 Jun 2024 16:01:21 +0000 (GMT) Received: from dilbert5.boeblingen.de.ibm.com (unknown [9.152.224.39]) by smtpav07.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 5 Jun 2024 16:01:21 +0000 (GMT) From: Gerd Bayer To: Alex Williamson , Jason Gunthorpe , Niklas Schnelle , Ramesh Thomas Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org, Ankit Agrawal , Yishai Hadas , Halil Pasic , Ben Segal , "Tian, Kevin" , Julian Ruess , Gerd Bayer Subject: [PATCH v5 2/3] vfio/pci: Support 8-byte PCI loads and stores Date: Wed, 5 Jun 2024 18:01:11 +0200 Message-ID: <20240605160112.925957-3-gbayer@linux.ibm.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240605160112.925957-1-gbayer@linux.ibm.com> References: <20240605160112.925957-1-gbayer@linux.ibm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 6iumrZRuHE8S9cJKAoMTbDD3iWaAKbHg X-Proofpoint-GUID: 57P5KMD7DFQfbEYvSpwpEaAEksIut6pd X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-05_02,2024-06-05_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 adultscore=0 mlxscore=0 lowpriorityscore=0 clxscore=1015 priorityscore=1501 phishscore=0 spamscore=0 malwarescore=0 impostorscore=0 mlxlogscore=648 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2406050121 From: Ben Segal Many PCI adapters can benefit or even require full 64bit read and write access to their registers. In order to enable work on user-space drivers for these devices add two new variations vfio_pci_core_io{read|write}64 of the existing access methods when the architecture supports 64-bit ioreads and iowrites. Signed-off-by: Ben Segal Co-developed-by: Gerd Bayer Signed-off-by: Gerd Bayer --- drivers/vfio/pci/vfio_pci_rdwr.c | 16 ++++++++++++++++ include/linux/vfio_pci_core.h | 3 +++ 2 files changed, 19 insertions(+) diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c b/drivers/vfio/pci/vfio_pci_rdwr.c index d07bfb0ab892..66b72c289284 100644 --- a/drivers/vfio/pci/vfio_pci_rdwr.c +++ b/drivers/vfio/pci/vfio_pci_rdwr.c @@ -89,6 +89,9 @@ EXPORT_SYMBOL_GPL(vfio_pci_core_ioread##size); VFIO_IOREAD(8) VFIO_IOREAD(16) VFIO_IOREAD(32) +#ifdef ioread64 +VFIO_IOREAD(64) +#endif #define VFIO_IORDWR(size) \ static int vfio_pci_iordwr##size(struct vfio_pci_core_device *vdev,\ @@ -124,6 +127,10 @@ static int vfio_pci_iordwr##size(struct vfio_pci_core_device *vdev,\ VFIO_IORDWR(8) VFIO_IORDWR(16) VFIO_IORDWR(32) +#if defined(ioread64) && defined(iowrite64) +VFIO_IORDWR(64) +#endif + /* * Read or write from an __iomem region (MMIO or I/O port) with an excluded * range which is inaccessible. The excluded range drops writes and fills @@ -148,6 +155,15 @@ ssize_t vfio_pci_core_do_io_rw(struct vfio_pci_core_device *vdev, bool test_mem, else fillable = 0; +#if defined(ioread64) && defined(iowrite64) + if (fillable >= 8 && !(off % 8)) { + ret = vfio_pci_iordwr64(vdev, iswrite, test_mem, + io, buf, off, &filled); + if (ret) + return ret; + + } else +#endif if (fillable >= 4 && !(off % 4)) { ret = vfio_pci_iordwr32(vdev, iswrite, test_mem, io, buf, off, &filled); diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index a2c8b8bba711..f4cf5fd2350c 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -157,5 +157,8 @@ int vfio_pci_core_ioread##size(struct vfio_pci_core_device *vdev, \ VFIO_IOREAD_DECLATION(8) VFIO_IOREAD_DECLATION(16) VFIO_IOREAD_DECLATION(32) +#ifdef ioread64 +VFIO_IOREAD_DECLATION(64) +#endif #endif /* VFIO_PCI_CORE_H */ From patchwork Wed Jun 5 16:01:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Bayer X-Patchwork-Id: 13687084 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 705F33B298; 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Wed, 5 Jun 2024 16:01:24 GMT Received: from smtpav07.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 154FD20040; Wed, 5 Jun 2024 16:01:22 +0000 (GMT) Received: from smtpav07.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DE0B220065; Wed, 5 Jun 2024 16:01:21 +0000 (GMT) Received: from dilbert5.boeblingen.de.ibm.com (unknown [9.152.224.39]) by smtpav07.fra02v.mail.ibm.com (Postfix) with ESMTP; Wed, 5 Jun 2024 16:01:21 +0000 (GMT) From: Gerd Bayer To: Alex Williamson , Jason Gunthorpe , Niklas Schnelle , Ramesh Thomas Cc: kvm@vger.kernel.org, linux-s390@vger.kernel.org, Ankit Agrawal , Yishai Hadas , Halil Pasic , Ben Segal , "Tian, Kevin" , Julian Ruess , Gerd Bayer Subject: [PATCH v5 3/3] vfio/pci: Fix typo in macro to declare accessors Date: Wed, 5 Jun 2024 18:01:12 +0200 Message-ID: <20240605160112.925957-4-gbayer@linux.ibm.com> X-Mailer: git-send-email 2.45.1 In-Reply-To: <20240605160112.925957-1-gbayer@linux.ibm.com> References: <20240605160112.925957-1-gbayer@linux.ibm.com> Precedence: bulk X-Mailing-List: kvm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 6PwqF7hnv-yHgaPd_c80ySLnYdqYu5SR X-Proofpoint-GUID: hdqXTTCfzXmOVUg1AbEK5vN168eCCLZf X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.28.16 definitions=2024-06-05_02,2024-06-05_02,2024-05-17_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxlogscore=900 lowpriorityscore=0 suspectscore=0 malwarescore=0 phishscore=0 clxscore=1015 spamscore=0 bulkscore=0 adultscore=0 mlxscore=0 priorityscore=1501 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2405010000 definitions=main-2406050121 Correct spelling of DECLA[RA]TION Suggested-by: Ramesh Thomas Signed-off-by: Gerd Bayer --- include/linux/vfio_pci_core.h | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/include/linux/vfio_pci_core.h b/include/linux/vfio_pci_core.h index f4cf5fd2350c..fa59d40573f1 100644 --- a/include/linux/vfio_pci_core.h +++ b/include/linux/vfio_pci_core.h @@ -139,26 +139,26 @@ bool vfio_pci_core_range_intersect_range(loff_t buf_start, size_t buf_cnt, loff_t *buf_offset, size_t *intersect_count, size_t *register_offset); -#define VFIO_IOWRITE_DECLATION(size) \ +#define VFIO_IOWRITE_DECLARATION(size) \ int vfio_pci_core_iowrite##size(struct vfio_pci_core_device *vdev, \ - bool test_mem, u##size val, void __iomem *io); + bool test_mem, u##size val, void __iomem *io) -VFIO_IOWRITE_DECLATION(8) -VFIO_IOWRITE_DECLATION(16) -VFIO_IOWRITE_DECLATION(32) +VFIO_IOWRITE_DECLARATION(8); +VFIO_IOWRITE_DECLARATION(16); +VFIO_IOWRITE_DECLARATION(32); #ifdef iowrite64 -VFIO_IOWRITE_DECLATION(64) +VFIO_IOWRITE_DECLARATION(64); #endif -#define VFIO_IOREAD_DECLATION(size) \ +#define VFIO_IOREAD_DECLARATION(size) \ int vfio_pci_core_ioread##size(struct vfio_pci_core_device *vdev, \ - bool test_mem, u##size *val, void __iomem *io); + bool test_mem, u##size *val, void __iomem *io) -VFIO_IOREAD_DECLATION(8) -VFIO_IOREAD_DECLATION(16) -VFIO_IOREAD_DECLATION(32) +VFIO_IOREAD_DECLARATION(8); +VFIO_IOREAD_DECLARATION(16); +VFIO_IOREAD_DECLARATION(32); #ifdef ioread64 -VFIO_IOREAD_DECLATION(64) +VFIO_IOREAD_DECLARATION(64); #endif #endif /* VFIO_PCI_CORE_H */