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Smith" , Stewart Hildebrand , Huang Rui , Jiqian Chen , Huang Rui , Stewart Hildebrand Subject: [XEN PATCH v9 1/5] xen/vpci: Clear all vpci status of device Date: Fri, 7 Jun 2024 16:11:23 +0800 Message-ID: <20240607081127.126593-2-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607081127.126593-1-Jiqian.Chen@amd.com> References: <20240607081127.126593-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044FD:EE_|SA0PR12MB4351:EE_ X-MS-Office365-Filtering-Correlation-Id: 4d6b74c1-20d2-4b0c-7e29-08dc86c97f55 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|36860700004|7416005|376005|1800799015|82310400017; X-Microsoft-Antispam-Message-Info: l+WuoomI7aw8xVoFDmdZPh2LUXFIIKa+njQmG1YQIGmdSAgntO2dbi2rubywiFJNV9jRZQPZs9H5zxpl5cB6Y2sPMZTN8w4sDCRqx9+MOaKaBelPk7SmOY3oa8STSzofc7nJzm5iqeKfbeZC2WpCCTrhRM7BgD7/AqHU3u7G70n0I0MMegm1b4iM2cjaMpte/f8XIzGSmWRWw4m16KI9YH6ApT47xodKOA3iARRNbruP+g6r1ZeODxBv/NJ4Ox39GVyEYzFMjiylKmPIxTqI1I1dJeuf8I+w67dIhBPFOWZHwu1Aq6SHIuhSVdIsimSQ2ZKJikFSQSa+Dava8ZCcKM+8KoQYo2Gg+BUe0sh9erFobe9ij/sgrC+ZhU/eevCEM29JEc0n85XqHdeSSbA8WasFQgIloU/PyptiDlr1aoYo0rmRCFiDFNxhVcCGQQQh1ZA38mn8kT3cHAH07LrE9CImAyB3LpyHHlkyfuXwwxw3FBVr/epcBZkhrifFO4HGy8GCLafLQN5G7Es2ELnpO44VDt8DSon6sr0AOQMxGvOqg/07aB8xhnKtImmZYr/khuhJZyQGIvnEdMXgFJmw4itPUfNt7tMvXCYBV9WpBwKhrlE/hybrJYrUI7scFtStg/Hg2KM4ovM0ggDkereCJ1oqzWOZlev9pUlslbj7y/pwmWfq6pkkqpfcb1tVvMIKKELxUWIlpc9FOD5ydR4drT5UnzHxCYo5ETbsBS3cJcmDDoWre1V4o5vg/5pFASsc7zv1QZzTVHAQ4kJ7xM7dkukmr+BSuFBt4KvuK91oB41+uwl/TSzi3GOM7U+YlSRbXFI9y6RmOKmWrJOLM1c1ik4fM7p6/SsXyGmhO2NwoYQ9qJsdAK0mRXC6o+NG4XDLNH+stDiTUr7bhno4Yuf02aaAcyeXEYaK6awY47ZFdP2pgZQcXLJ8qwLY2sbwpFmYeatMEZbkqAp5UIysxHHCjJJm5+Ld6vyGsAAkKRmmDk42jgkw7AAa7tGyK7LMU8axvHXxrD/1/RRQQMOBNqrX+RJcefr9eMlLnmBIJqgk5CFJktTObIl9/JT46gzsPY9xELa3U8CZGbqfn7nFfy9cmiMG2441cjLB5ZD1e7GF2UWeQ23KRfOooM0L5BF9nEQgJnfMReyOYnzzDNicPFCealucMP9RJsg9TaqGfhD7gxV1EaieTP6NiWmt2Z+1YTRrUJVUEvxOKLW/CS8pcSUgJfYAnfLJBacC6ZeyfdbnLyYdzgQvNxFpz0TyMBOCv1izvMA8bgEh5rpJMqD24PfjcjM1cpMwANmYvDzsqZR0fVOXoNr+pHQwmlQH53TXNSCeuaJvXSM8BfNn4GBr/H92iSTOX/QE8wdIhFfA9mFd7RSOJ2j15cNFZCKNTM6RdxSCptqM11c90B+MzUSnAC2Grw== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(36860700004)(7416005)(376005)(1800799015)(82310400017);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2024 08:11:56.1063 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4d6b74c1-20d2-4b0c-7e29-08dc86c97f55 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044FD.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4351 When a device has been reset on dom0 side, the vpci on Xen side won't get notification, so the cached state in vpci is all out of date compare with the real device state. To solve that problem, add a new hypercall to clear all vpci device state. When the state of device is reset on dom0 side, dom0 can call this hypercall to notify vpci. Signed-off-by: Huang Rui Signed-off-by: Jiqian Chen Reviewed-by: Stewart Hildebrand Reviewed-by: Stefano Stabellini --- xen/arch/x86/hvm/hypercall.c | 1 + xen/drivers/pci/physdev.c | 43 ++++++++++++++++++++++++++++++++++++ xen/drivers/vpci/vpci.c | 9 ++++++++ xen/include/public/physdev.h | 7 ++++++ xen/include/xen/pci.h | 16 ++++++++++++++ xen/include/xen/vpci.h | 6 +++++ 6 files changed, 82 insertions(+) diff --git a/xen/arch/x86/hvm/hypercall.c b/xen/arch/x86/hvm/hypercall.c index 7fb3136f0c7c..0fab670a4871 100644 --- a/xen/arch/x86/hvm/hypercall.c +++ b/xen/arch/x86/hvm/hypercall.c @@ -83,6 +83,7 @@ long hvm_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) case PHYSDEVOP_pci_mmcfg_reserved: case PHYSDEVOP_pci_device_add: case PHYSDEVOP_pci_device_remove: + case PHYSDEVOP_pci_device_state_reset: case PHYSDEVOP_dbgp_op: if ( !is_hardware_domain(currd) ) return -ENOSYS; diff --git a/xen/drivers/pci/physdev.c b/xen/drivers/pci/physdev.c index 42db3e6d133c..1cce508a73b1 100644 --- a/xen/drivers/pci/physdev.c +++ b/xen/drivers/pci/physdev.c @@ -2,11 +2,17 @@ #include #include #include +#include #ifndef COMPAT typedef long ret_t; #endif +static const struct pci_device_state_reset_method + pci_device_state_reset_methods[] = { + [ DEVICE_RESET_FLR ].reset_fn = vpci_reset_device_state, +}; + ret_t pci_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) { ret_t ret; @@ -67,6 +73,43 @@ ret_t pci_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) break; } + case PHYSDEVOP_pci_device_state_reset: { + struct pci_device_state_reset dev_reset; + struct physdev_pci_device *dev; + struct pci_dev *pdev; + pci_sbdf_t sbdf; + + if ( !is_pci_passthrough_enabled() ) + return -EOPNOTSUPP; + + ret = -EFAULT; + if ( copy_from_guest(&dev_reset, arg, 1) != 0 ) + break; + dev = &dev_reset.dev; + sbdf = PCI_SBDF(dev->seg, dev->bus, dev->devfn); + + ret = xsm_resource_setup_pci(XSM_PRIV, sbdf.sbdf); + if ( ret ) + break; + + pcidevs_lock(); + pdev = pci_get_pdev(NULL, sbdf); + if ( !pdev ) + { + pcidevs_unlock(); + ret = -ENODEV; + break; + } + + write_lock(&pdev->domain->pci_lock); + pcidevs_unlock(); + ret = pci_device_state_reset_methods[dev_reset.reset_type].reset_fn(pdev); + write_unlock(&pdev->domain->pci_lock); + if ( ret ) + printk(XENLOG_ERR "%pp: failed to reset vPCI device state\n", &sbdf); + break; + } + default: ret = -ENOSYS; break; diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index 1e6aa5d799b9..ff67c2550ccb 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -172,6 +172,15 @@ int vpci_assign_device(struct pci_dev *pdev) return rc; } + +int vpci_reset_device_state(struct pci_dev *pdev) +{ + ASSERT(rw_is_write_locked(&pdev->domain->pci_lock)); + + vpci_deassign_device(pdev); + return vpci_assign_device(pdev); +} + #endif /* __XEN__ */ static int vpci_register_cmp(const struct vpci_register *r1, diff --git a/xen/include/public/physdev.h b/xen/include/public/physdev.h index f0c0d4727c0b..a71da5892e5f 100644 --- a/xen/include/public/physdev.h +++ b/xen/include/public/physdev.h @@ -296,6 +296,13 @@ DEFINE_XEN_GUEST_HANDLE(physdev_pci_device_add_t); */ #define PHYSDEVOP_prepare_msix 30 #define PHYSDEVOP_release_msix 31 +/* + * Notify the hypervisor that a PCI device has been reset, so that any + * internally cached state is regenerated. Should be called after any + * device reset performed by the hardware domain. + */ +#define PHYSDEVOP_pci_device_state_reset 32 + struct physdev_pci_device { /* IN */ uint16_t seg; diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index 63e49f0117e9..376981f9da98 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -156,6 +156,22 @@ struct pci_dev { struct vpci *vpci; }; +struct pci_device_state_reset_method { + int (*reset_fn)(struct pci_dev *pdev); +}; + +enum pci_device_state_reset_type { + DEVICE_RESET_FLR, + DEVICE_RESET_COLD, + DEVICE_RESET_WARM, + DEVICE_RESET_HOT, +}; + +struct pci_device_state_reset { + struct physdev_pci_device dev; + enum pci_device_state_reset_type reset_type; +}; + #define for_each_pdev(domain, pdev) \ list_for_each_entry(pdev, &(domain)->pdev_list, domain_list) diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h index da8d0f41e6f4..b230fd374de5 100644 --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -38,6 +38,7 @@ int __must_check vpci_assign_device(struct pci_dev *pdev); /* Remove all handlers and free vpci related structures. */ void vpci_deassign_device(struct pci_dev *pdev); +int __must_check vpci_reset_device_state(struct pci_dev *pdev); /* Add/remove a register handler. */ int __must_check vpci_add_register_mask(struct vpci *vpci, @@ -282,6 +283,11 @@ static inline int vpci_assign_device(struct pci_dev *pdev) static inline void vpci_deassign_device(struct pci_dev *pdev) { } +static inline int __must_check vpci_reset_device_state(struct pci_dev *pdev) +{ + return 0; +} + static inline void vpci_dump_msi(void) { } static inline uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, From patchwork Fri Jun 7 08:11:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chen, Jiqian" X-Patchwork-Id: 13689461 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 443D4C27C53 for ; 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Smith" , Stewart Hildebrand , Huang Rui , Jiqian Chen , Huang Rui Subject: [XEN PATCH v9 2/5] x86/pvh: Allow (un)map_pirq when dom0 is PVH Date: Fri, 7 Jun 2024 16:11:24 +0800 Message-ID: <20240607081127.126593-3-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607081127.126593-1-Jiqian.Chen@amd.com> References: <20240607081127.126593-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F9:EE_|IA1PR12MB8408:EE_ X-MS-Office365-Filtering-Correlation-Id: eff896dd-3367-42be-b41a-08dc86c98157 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|1800799015|7416005|82310400017|376005|36860700004; X-Microsoft-Antispam-Message-Info: GR5pCOQhewA/YvAU+LXGD9pp60GGAlGIc3iKd3RnMSdTxvBwO329Qrc0pEpM49sC9l3M8r55AUi7Q/2UCq4hdqJ8kKVIjq8egLc5qiMoQhIfEfQ2Jxnq5d1+3OrR/2HuZd5k5SH55lYrgIxN5c4qh3gsN3zFvlLP886Ra9WgSccxuaqS+Iu/yWE17cBT2gUXUVJtPtT19J7PgaOMPHa6z28bL2+dFVNL0O9gvptxM5ptTmiKrG/F9vaq4RvqgOZQI8c/cPq0Gz1vEf6fDcago7Dii7kAWApMAowlqWsSFjvqAg9W2wo69eNnC7o2dsnFawodR3MtMFFgkc79JB+N7YvwzWlZBXIy1aTT6ygTnaszkFTD9HgQVTpieUhf8MMln6IGqVCNXWZck38s7fALdssdSTsDGu3Ag1lPI5hiMOQEaLzU/hTKUVKixo3ol4Q2m4NFMleO1LJof0skKjP2txxpNkmOTxFWam9qSDYXMIIt7BnM/bWGLAVNlMbXmFtmWn73AleHa3rdTMaDFrNdtGZxugYEkThTclWc6Fadd0PDg2KDZ444O3bc6VjzB303eY43o0ZrDBsbPVqudYA+ixVuybMbHiiScNf9k1OICE9O20AI0GtvygdusHoiKveFfD6cwF3gefxENIw1ZKk3PPQlfbNLSMDutguhgWzOi0It2iH2QIZfzvRIIVmW7VMBV5KxeYFepJ9ieHeMThq9Jlo3dZI9LcFU17fqi3reujziZKLKwlbYDa+DgtBsN/bLKqZfC052Xh1kzMAOwjtO94tJb30Cenuh7KZ9e8C604P8QT02zX11CiPk5bB8vR49AgxYSfmMvSyEiCjulx9WNFmhAquvY8Xk7uwNTOAfvJRQ1+o8zrhvu/T7BJO9Xi9QZtm5jmOmQqASuvxkkOMJkk5OAWVfDV4M5GjqmdkS/Hd5buEFTiE5RKvA1Q+oezUynNuvgs6IQn+8d7IKfCc3PRNp0FrjnDirrjaAM4CARymea4JkWCgde3HrRTXMHMI38yQdEey4Ptg/ux06VPeLPdUv0ZjA+EQu32CnfEQskhiKaSkFzdEy5cP5u/FAS1V7HrUXj1C9M7dFOVbXqpiTQEQ0y9IodlvmqNhTLTe8Jee+1KzAR0Hgc3iw3aEmphHG6Co/VYUMVKYkeS/ZH5RH1cFhfW1wUmvvSD2DTcDgsW6NvDo4GMA07xVxENrBDJkcjVEyA4M9Wet6NWOKFxzCYEQ3ZIc2n/Q0KHMRmaISaAYjZFakq6Ulqe58jxQTqMjxOkXpQDLwJeNUFviZYyh8LOtzh3zDGE+WTqKiXHzmSPEUh+rgZ9+Q4WRxcPLCHH2SEWutq1QbAx7V9LNLyqd0e0ZSdXpLC7zOjCvSFM1Tc9LAngUWX6X5WC8MNwXCRLVurmBsJ0VLySr/X2gh6FpjRw== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(1800799015)(7416005)(82310400017)(376005)(36860700004);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2024 08:11:59.4606 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: eff896dd-3367-42be-b41a-08dc86c98157 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F9.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8408 If run Xen with PVH dom0 and hvm domU, hvm will map a pirq for a passthrough device by using gsi, see qemu code xen_pt_realize->xc_physdev_map_pirq and libxl code pci_add_dm_done->xc_physdev_map_pirq. Then xc_physdev_map_pirq will call into Xen, but in hvm_physdev_op, PHYSDEVOP_map_pirq is not allowed because currd is PVH dom0 and PVH has no X86_EMU_USE_PIRQ flag, it will fail at has_pirq check. So, allow PHYSDEVOP_map_pirq when dom0 is PVH and also allow PHYSDEVOP_unmap_pirq for the failed path to unmap pirq. And add a new check to prevent self map when subject domain has no PIRQ flag. Signed-off-by: Huang Rui Signed-off-by: Jiqian Chen Reviewed-by: Stefano Stabellini --- xen/arch/x86/hvm/hypercall.c | 6 ++++++ xen/arch/x86/physdev.c | 24 ++++++++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/xen/arch/x86/hvm/hypercall.c b/xen/arch/x86/hvm/hypercall.c index 0fab670a4871..fa5d50a0dd22 100644 --- a/xen/arch/x86/hvm/hypercall.c +++ b/xen/arch/x86/hvm/hypercall.c @@ -71,8 +71,14 @@ long hvm_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) switch ( cmd ) { + /* + * Only being permitted for management of other domains. + * Further restrictions are enforced in do_physdev_op. + */ case PHYSDEVOP_map_pirq: case PHYSDEVOP_unmap_pirq: + break; + case PHYSDEVOP_eoi: case PHYSDEVOP_irq_status_query: case PHYSDEVOP_get_free_pirq: diff --git a/xen/arch/x86/physdev.c b/xen/arch/x86/physdev.c index 7efa17cf4c1e..61999882f836 100644 --- a/xen/arch/x86/physdev.c +++ b/xen/arch/x86/physdev.c @@ -305,11 +305,23 @@ ret_t do_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) case PHYSDEVOP_map_pirq: { physdev_map_pirq_t map; struct msi_info msi; + struct domain *d; ret = -EFAULT; if ( copy_from_guest(&map, arg, 1) != 0 ) break; + d = rcu_lock_domain_by_any_id(map.domid); + if ( d == NULL ) + return -ESRCH; + /* Prevent self-map when domain has no X86_EMU_USE_PIRQ flag */ + if ( is_hvm_domain(d) && !has_pirq(d) && d == current->domain ) + { + rcu_unlock_domain(d); + return -EOPNOTSUPP; + } + rcu_unlock_domain(d); + switch ( map.type ) { case MAP_PIRQ_TYPE_MSI_SEG: @@ -343,11 +355,23 @@ ret_t do_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) case PHYSDEVOP_unmap_pirq: { struct physdev_unmap_pirq unmap; + struct domain *d; ret = -EFAULT; if ( copy_from_guest(&unmap, arg, 1) != 0 ) break; + d = rcu_lock_domain_by_any_id(unmap.domid); + if ( d == NULL ) + return -ESRCH; + /* Prevent self-unmap when domain has no X86_EMU_USE_PIRQ flag */ + if ( is_hvm_domain(d) && !has_pirq(d) && d == current->domain ) + { + rcu_unlock_domain(d); + return -EOPNOTSUPP; + } + rcu_unlock_domain(d); + ret = physdev_unmap_pirq(unmap.domid, unmap.pirq); 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Smith" , Stewart Hildebrand , Huang Rui , Jiqian Chen , Huang Rui Subject: [XEN PATCH v9 3/5] x86/pvh: Add PHYSDEVOP_setup_gsi for PVH dom0 Date: Fri, 7 Jun 2024 16:11:25 +0800 Message-ID: <20240607081127.126593-4-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607081127.126593-1-Jiqian.Chen@amd.com> References: <20240607081127.126593-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F8:EE_|PH7PR12MB7210:EE_ X-MS-Office365-Filtering-Correlation-Id: 3a3a5448-453d-400a-2811-08dc86c9865b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|36860700004|376005|82310400017|7416005|1800799015; X-Microsoft-Antispam-Message-Info: 5F7rF2rvSgyBwSLNicxaP1ev/9UrT9aEeafFtVpNnKv7+38TiOOiWa2201ZI7lXz2H2mBGgZzQFBx1x+jK2Zr4kMM1dgh5ie/PiLyCaft9dKN8uFGT7mDtrHTifcCjh5XJYCGdwQSxWsmVhF5boqcK8ouoBF0SOQ1VgUh5o3qJ3bWKG6mQh9GIdhpSs512IiNLaW+xC+xl7k+3LVoYeTGojVJtRvzKG7p3lj94u4gkC3jKtVOdKb5kfafwXLt8wSaTRLsKHVlsQGt3+EKTVpquHCiqSOnURuLoRdMDawfTnb7a9PIsorJHV5JUB14viFGQRBBHdAxKQ/36z3JXKTAv3YBJaqIVbiCd8aln4848L+Y1YMrtRkz6PG4u/WnpkMCvDvVc0bh8nT2IuoYcejwzTP4upVvJX3lc7B2vg3vbNWGkrxO8Z+Ke8NYO+qENIkxL8sl83K1p/yHnknbB73lhDIQ+v4FjtycDoXx1imZEj+AAsDi+dB90DNu21x7vT572VzAYElS5DmapumG4J6AZX91/ocaXRebu8hOxrumsbjwyhmBgOBlWDwlTZQ4FdQCENI10F8xHvOjV+6MJl23tuo+xh7UQnusofq5JIgkAPIwzopsXdyH4ZiL6+hBKSBWhiVolIiLaLC18PjGtkHniTx5Mg/8sKxUH96pYEnxvOBcvAaWrhyNCGuGkAKbYErFayNCALq/qGDbUgqERPl4OB2nX1Cv5b1ibTbsdDjjR2QiiD9zXj2Tau2WrlIPDXwdwKokVBgAERgtDFOGB7fiOkE5Q2/Z6sFqIPtIvRtunBQokynnRp3PydN1xUu1SycMDTIN4l4RZU/aa6PE6QlI1OMXwHgeRcwULiZcjg0WSKDEgZMRnZCgiER3NB5zwF0hzjxs/cVyMovByIDnenNkriQQ8UPOha+lLYGoqwLe+dLTgzrjtWmEUE1ijSJ3thT3Aac2PKtqCmKqfAb2qMXRSO8Gkgs+gy5FnmXSq2Vgu6q7F+5h3IvmMLbUqcXmMB55ACaeaFUQMzVJAJY7YOU7lk7gk5aLXHgY3Tm5RQXTeOvkaTlrNJgeukFLZ0MEoGKWQVbU3h8I3rovaqnH5DiMO5wxDbH7gThRgXRC+EbfvBqMXDPSRD5oGl+A15/FEC0+szmT3EJVRid9eZK6+00b47hJ7iC8xjQUmLySs7MzuL2t44hhd/OBmbHfz8tc9IMHc/4wFa6nUkGZHy9tkIR6EFfsYrgDzTeW8i4I9YLPiRZ96g41ZOjdk90IrBjXj98qUhPZt7OZwwEqwWSkk2drnaeQRxG9O3LXNuTVDpIIKcNg5u5Dg2BTHKSQHFPgFxlSeJ5UfS5wqINTZNsq+BPqMHnDOWJ+oBziZfzjcDIPcs= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(36860700004)(376005)(82310400017)(7416005)(1800799015);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2024 08:12:07.8718 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3a3a5448-453d-400a-2811-08dc86c9865b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F8.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7210 On PVH dom0, the gsis don't get registered, but the gsi of a passthrough device must be configured for it to be able to be mapped into a hvm domU. On Linux kernel side, it calles PHYSDEVOP_setup_gsi for passthrough devices to register gsi when dom0 is PVH. So, add PHYSDEVOP_setup_gsi for above purpose. Signed-off-by: Huang Rui Signed-off-by: Jiqian Chen Reviewed-by: Stefano Stabellini --- The code link that will call this hypercall on linux kernel side is as follows https://lore.kernel.org/lkml/20240607075109.126277-3-Jiqian.Chen@amd.com/T/#u --- xen/arch/x86/hvm/hypercall.c | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/arch/x86/hvm/hypercall.c b/xen/arch/x86/hvm/hypercall.c index fa5d50a0dd22..164f4eefa043 100644 --- a/xen/arch/x86/hvm/hypercall.c +++ b/xen/arch/x86/hvm/hypercall.c @@ -86,6 +86,7 @@ long hvm_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) return -ENOSYS; break; + case PHYSDEVOP_setup_gsi: case PHYSDEVOP_pci_mmcfg_reserved: case PHYSDEVOP_pci_device_add: case PHYSDEVOP_pci_device_remove: From patchwork Fri Jun 7 08:11:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chen, Jiqian" X-Patchwork-Id: 13689465 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 77850C27C5F for ; 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Smith" , Stewart Hildebrand , Huang Rui , Jiqian Chen , Huang Rui Subject: [RFC XEN PATCH v9 4/5] tools: Add new function to get gsi from dev Date: Fri, 7 Jun 2024 16:11:26 +0800 Message-ID: <20240607081127.126593-5-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607081127.126593-1-Jiqian.Chen@amd.com> References: <20240607081127.126593-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F8:EE_|SA1PR12MB6993:EE_ X-MS-Office365-Filtering-Correlation-Id: 782befe2-48d6-4505-8203-08dc86c98717 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|82310400017|1800799015|376005|7416005|36860700004; X-Microsoft-Antispam-Message-Info: Dohy5EqQoVV+7Xm7KnJSp4Wxvs9wgiLPymZD+lEHWKXbuSgzFv7dhalYppzWasHYz0nY8DOqsxmINW9wRHoOl80RIE0YVhCbBR+W0OVCEXLXn2mAdPFM9ooEnPNP+TL4DTR8qjgRT0FYTIj1XlYqWWdSkL9hcIXYk5VCgcWbQrAeoNr25UFk7IvVXHNY70jyatzT2o8CImKmAYZbqnzUy4cG1UjkNm033xc/fdtXzyTG68cdwgXHfCUqtBQDLksRxVal/3nUk3tQPePu58DaZnUVIsYJ+I2jYN0rgQ8ZaQNT2E1mIFaEgm8dIUVyVRX+CW0GztqDNjqVLZT6ybI/ucw+mns9aIq/2rfijZi3vT9SNx/o5Jkj+dwMTFBLY9OWUTcmed8tsb5snPHPLXpxg9KSg7/JvU2ICaBS+Fni4Y6NIQpvXRCKqy3YEfdWitsITsoJOfbOP7Im1+dUArrVEeFrBhkEJVVAKt/3rv8/V20sx6mKNpojNn0mquQXCtUj2iOfFBFQILkGcKzMdlfONrp3F+xxJ0h6/ibwUeabS7TQesBIiXpkRG4SoP3/U2b5N/vpfL3FuThT761ZwgrThS1Wrp6Ano6vi3sWyW8bz5lIoMwC644EstvkIUz/E7aDRLZMu7pg+LSbtthye88zEqp0SYf/TNS6cA2d/HYXGXNlU7TqcusxMeaCgQNEMAqW0aU6X9wtjy/5XQ8SBqPE6/p9kUeTpRepEUbmCDqB6uBCZcyQi5/5fRhMLpJd4cQJeri5CXjglLi26918dG3Aa0uIV+9mwyuNhn16gjv5lTb1R5eTLaEVeuN4Juli/z2/qr2rCszY+Fl3179P3iaG6YjccxcKHHk0KOkVNx/gqwh30mAMUIGFOAq70IesmrppBO6Hb0fBbE73kMEE78p3p3iFCQBm9yqO5fQj+noyUruDNo3d4jigId4GIUfV08A6xK4omLXsPFZg7nqwOv4rv2mbWaA0tLzjKUL+lzKXHxJi4wXrcpXqRXTGfQ/0sxIALOSrw2Ft6IQ2LOr7GLN+BPijz0q2YOzq9MQo1r+fwL/W5NsTGfnS5fA8wF0UqtVBvNcVNMmlTKS32NxwrjBjJD0zMpnDBAnug+Kkg4YYjN/w1yV4hyFXoQQpRyFIYwmq00leRhDeND1qhOPDHxXY7ggZvRAUAhLpKawRxJAPHcG5yt9gUZ5UfSHeTGghuYjzO9SjJxfwppNrATSYc6vW+H2aQvDH7EQy9ARhFNNV3NGHufwloIkg45MKPJQRBFXaJ90g78rfVtM+0d3zBPoLnTp4bBtAtbR8ECDxURw752bPZUghJnC5wwg1gMkQVA4VXcc1FmlKanb1zGxSZVjPJR3T3upwVrvWtTThUPoU5nVvN/e8ABY2+ub8BvsG5yEGuJssUtEuvAmo6BgYy1e62w== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(82310400017)(1800799015)(376005)(7416005)(36860700004);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2024 08:12:09.1062 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 782befe2-48d6-4505-8203-08dc86c98717 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F8.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB6993 In PVH dom0, it uses the linux local interrupt mechanism, when it allocs irq for a gsi, it is dynamic, and follow the principle of applying first, distributing first. And irq number is alloced from small to large, but the applying gsi number is not, may gsi 38 comes before gsi 28, that causes the irq number is not equal with the gsi number. And when passthrough a device, QEMU will use its gsi number to do pirq mapping, see xen_pt_realize->xc_physdev_map_pirq, but the gsi number is got from file /sys/bus/pci/devices//irq, so it will fail when mapping. And in current codes, there is no method to get gsi for userspace. For above purpose, add new function to get gsi. And call this function before xc_physdev_(un)map_pirq Signed-off-by: Huang Rui Signed-off-by: Chen Jiqian --- RFC: it needs review and needs to wait for the corresponding third patch on linux kernel side to be merged. --- tools/include/xen-sys/Linux/privcmd.h | 7 +++++++ tools/include/xencall.h | 2 ++ tools/include/xenctrl.h | 2 ++ tools/libs/call/core.c | 5 +++++ tools/libs/call/libxencall.map | 2 ++ tools/libs/call/linux.c | 15 +++++++++++++++ tools/libs/call/private.h | 9 +++++++++ tools/libs/ctrl/xc_physdev.c | 4 ++++ tools/libs/light/libxl_pci.c | 23 +++++++++++++++++++++++ 9 files changed, 69 insertions(+) diff --git a/tools/include/xen-sys/Linux/privcmd.h b/tools/include/xen-sys/Linux/privcmd.h index bc60e8fd55eb..977f1a058797 100644 --- a/tools/include/xen-sys/Linux/privcmd.h +++ b/tools/include/xen-sys/Linux/privcmd.h @@ -95,6 +95,11 @@ typedef struct privcmd_mmap_resource { __u64 addr; } privcmd_mmap_resource_t; +typedef struct privcmd_gsi_from_dev { + __u32 sbdf; + int gsi; +} privcmd_gsi_from_dev_t; + /* * @cmd: IOCTL_PRIVCMD_HYPERCALL * @arg: &privcmd_hypercall_t @@ -114,6 +119,8 @@ typedef struct privcmd_mmap_resource { _IOC(_IOC_NONE, 'P', 6, sizeof(domid_t)) #define IOCTL_PRIVCMD_MMAP_RESOURCE \ _IOC(_IOC_NONE, 'P', 7, sizeof(privcmd_mmap_resource_t)) +#define IOCTL_PRIVCMD_GSI_FROM_DEV \ + _IOC(_IOC_NONE, 'P', 10, sizeof(privcmd_gsi_from_dev_t)) #define IOCTL_PRIVCMD_UNIMPLEMENTED \ _IOC(_IOC_NONE, 'P', 0xFF, 0) diff --git a/tools/include/xencall.h b/tools/include/xencall.h index fc95ed0fe58e..750aab070323 100644 --- a/tools/include/xencall.h +++ b/tools/include/xencall.h @@ -113,6 +113,8 @@ int xencall5(xencall_handle *xcall, unsigned int op, uint64_t arg1, uint64_t arg2, uint64_t arg3, uint64_t arg4, uint64_t arg5); +int xen_oscall_gsi_from_dev(xencall_handle *xcall, unsigned int sbdf); + /* Variant(s) of the above, as needed, returning "long" instead of "int". */ long xencall2L(xencall_handle *xcall, unsigned int op, uint64_t arg1, uint64_t arg2); diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index 9ceca0cffc2f..a0381f74d24b 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -1641,6 +1641,8 @@ int xc_physdev_unmap_pirq(xc_interface *xch, uint32_t domid, int pirq); +int xc_physdev_gsi_from_dev(xc_interface *xch, uint32_t sbdf); + /* * LOGGING AND ERROR REPORTING */ diff --git a/tools/libs/call/core.c b/tools/libs/call/core.c index 02c4f8e1aefa..6dae50c9a6ba 100644 --- a/tools/libs/call/core.c +++ b/tools/libs/call/core.c @@ -173,6 +173,11 @@ int xencall5(xencall_handle *xcall, unsigned int op, return osdep_hypercall(xcall, &call); } +int xen_oscall_gsi_from_dev(xencall_handle *xcall, unsigned int sbdf) +{ + return osdep_oscall(xcall, sbdf); +} + /* * Local variables: * mode: C diff --git a/tools/libs/call/libxencall.map b/tools/libs/call/libxencall.map index d18a3174e9dc..b92a0b5dc12c 100644 --- a/tools/libs/call/libxencall.map +++ b/tools/libs/call/libxencall.map @@ -10,6 +10,8 @@ VERS_1.0 { xencall4; xencall5; + xen_oscall_gsi_from_dev; + xencall_alloc_buffer; xencall_free_buffer; xencall_alloc_buffer_pages; diff --git a/tools/libs/call/linux.c b/tools/libs/call/linux.c index 6d588e6bea8f..92c740e176f2 100644 --- a/tools/libs/call/linux.c +++ b/tools/libs/call/linux.c @@ -85,6 +85,21 @@ long osdep_hypercall(xencall_handle *xcall, privcmd_hypercall_t *hypercall) return ioctl(xcall->fd, IOCTL_PRIVCMD_HYPERCALL, hypercall); } +int osdep_oscall(xencall_handle *xcall, unsigned int sbdf) +{ + privcmd_gsi_from_dev_t dev_gsi = { + .sbdf = sbdf, + .gsi = -1, + }; + + if (ioctl(xcall->fd, IOCTL_PRIVCMD_GSI_FROM_DEV, &dev_gsi)) { + PERROR("failed to get gsi from dev"); + return -1; + } + + return dev_gsi.gsi; +} + static void *alloc_pages_bufdev(xencall_handle *xcall, size_t npages) { void *p; diff --git a/tools/libs/call/private.h b/tools/libs/call/private.h index 9c3aa432efe2..cd6eb5a3e66f 100644 --- a/tools/libs/call/private.h +++ b/tools/libs/call/private.h @@ -57,6 +57,15 @@ int osdep_xencall_close(xencall_handle *xcall); long osdep_hypercall(xencall_handle *xcall, privcmd_hypercall_t *hypercall); +#if defined(__linux__) +int osdep_oscall(xencall_handle *xcall, unsigned int sbdf); +#else +static inline int osdep_oscall(xencall_handle *xcall, unsigned int sbdf) +{ + return -1; +} +#endif + void *osdep_alloc_pages(xencall_handle *xcall, size_t nr_pages); void osdep_free_pages(xencall_handle *xcall, void *p, size_t nr_pages); diff --git a/tools/libs/ctrl/xc_physdev.c b/tools/libs/ctrl/xc_physdev.c index 460a8e779ce8..c1458f3a38b5 100644 --- a/tools/libs/ctrl/xc_physdev.c +++ b/tools/libs/ctrl/xc_physdev.c @@ -111,3 +111,7 @@ int xc_physdev_unmap_pirq(xc_interface *xch, return rc; } +int xc_physdev_gsi_from_dev(xc_interface *xch, uint32_t sbdf) +{ + return xen_oscall_gsi_from_dev(xch->xcall, sbdf); +} diff --git a/tools/libs/light/libxl_pci.c b/tools/libs/light/libxl_pci.c index 96cb4da0794e..7e44d4c3ae2b 100644 --- a/tools/libs/light/libxl_pci.c +++ b/tools/libs/light/libxl_pci.c @@ -1406,6 +1406,12 @@ static bool pci_supp_legacy_irq(void) #endif } +#define PCI_DEVID(bus, devfn)\ + ((((uint16_t)(bus)) << 8) | ((devfn) & 0xff)) + +#define PCI_SBDF(seg, bus, devfn) \ + ((((uint32_t)(seg)) << 16) | (PCI_DEVID(bus, devfn))) + static void pci_add_dm_done(libxl__egc *egc, pci_add_state *pas, int rc) @@ -1418,6 +1424,7 @@ static void pci_add_dm_done(libxl__egc *egc, unsigned long long start, end, flags, size; int irq, i; int r; + uint32_t sbdf; uint32_t flag = XEN_DOMCTL_DEV_RDM_RELAXED; uint32_t domainid = domid; bool isstubdom = libxl_is_stubdom(ctx, domid, &domainid); @@ -1486,6 +1493,13 @@ static void pci_add_dm_done(libxl__egc *egc, goto out_no_irq; } if ((fscanf(f, "%u", &irq) == 1) && irq) { + sbdf = PCI_SBDF(pci->domain, pci->bus, + (PCI_DEVFN(pci->dev, pci->func))); + r = xc_physdev_gsi_from_dev(ctx->xch, sbdf); + /* if fail, keep using irq; if success, r is gsi, use gsi */ + if (r != -1) { + irq = r; + } r = xc_physdev_map_pirq(ctx->xch, domid, irq, &irq); if (r < 0) { LOGED(ERROR, domainid, "xc_physdev_map_pirq irq=%d (error=%d)", @@ -2172,8 +2186,10 @@ static void pci_remove_detached(libxl__egc *egc, int irq = 0, i, stubdomid = 0; const char *sysfs_path; FILE *f; + uint32_t sbdf; uint32_t domainid = prs->domid; bool isstubdom; + int r; /* Convenience aliases */ libxl_device_pci *const pci = &prs->pci; @@ -2239,6 +2255,13 @@ skip_bar: } if ((fscanf(f, "%u", &irq) == 1) && irq) { + sbdf = PCI_SBDF(pci->domain, pci->bus, + (PCI_DEVFN(pci->dev, pci->func))); + r = xc_physdev_gsi_from_dev(ctx->xch, sbdf); + /* if fail, keep using irq; if success, r is gsi, use gsi */ + if (r != -1) { + irq = r; + } rc = xc_physdev_unmap_pirq(ctx->xch, domid, irq); if (rc < 0) { /* From patchwork Fri Jun 7 08:11:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chen, Jiqian" X-Patchwork-Id: 13689466 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BA382C27C53 for ; Fri, 7 Jun 2024 08:12:30 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.736385.1142488 (Exim 4.92) (envelope-from ) id 1sFUhv-0002sG-GV; Fri, 07 Jun 2024 08:12:19 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 736385.1142488; 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pr=C From: Jiqian Chen To: CC: Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Wei Liu , George Dunlap , Julien Grall , Stefano Stabellini , Anthony PERARD , "Juergen Gross" , "Daniel P . Smith" , Stewart Hildebrand , Huang Rui , Jiqian Chen , Huang Rui Subject: [RFC XEN PATCH v9 5/5] domctl: Add XEN_DOMCTL_gsi_permission to grant gsi Date: Fri, 7 Jun 2024 16:11:27 +0800 Message-ID: <20240607081127.126593-6-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607081127.126593-1-Jiqian.Chen@amd.com> References: <20240607081127.126593-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000044F8:EE_|SJ2PR12MB8689:EE_ X-MS-Office365-Filtering-Correlation-Id: 6dd9d50d-fc0a-43ec-93c4-08dc86c988ef X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230031|1800799015|376005|7416005|36860700004|82310400017; X-Microsoft-Antispam-Message-Info: JXI+JMpP0iQskjsFuRdwycAmUbZk4N1xXpD+ScvTAkww+AwqFCyW4D0fpePsRAdSxM6MS2IQrqQN04VdaUElg3PheuuDMZ94BUa4f17yzh1TWRTcedoDCWbhteqeB00Qi2P7fR12UHOktlpe8vV5/nx7ZOa5hJCuWVHOufwYzZfWcPpOI/W/f9c3s/yIDqgphit46utufsAzwYMGd9MjT7Vf6a07SHFEJKjn/s2nO7B1ryK4s/aRp5dMGJNeM9zD2ekRnWBpS9xx75VB6//RtGIjiacvJQJnjESFU8v9pjx+X/33DJM8oYU+D8u1pCvmwOW/QVIMEJAxooeh0PjORwzLxy1wjqI2eQ1ZPHL0yK+Z3TYBP7APsbBP5VbqL1aDz6THkvd7T+P7HGpULZqhtnwHpBiD0FF6rQEs9PA9dkz7yCaCytI0aZQGMwHWf3t1U1cZQB+LKwOCZC96ibF1llt8A8LMher+KR3JSB82FcPBI5+cYjSZ6HxDcZYqdqBAx+WErteqk4DNMRm9LxEVEXUUHkR/9NZAaoApENyjQI/+eov6uyMMjl4cVkf/0kDz11FhYYGPmUL7V/J6BCKwNMIKtIQgPdkpDs050pF9yFkxc9U9YXxlQ6DuuqmLgXt0xtJQhdivVF5Io6yPlD7I4H1gb6NZBMgyLkB7rhlDk+xam0bKPzlrwSym6s/4OPNX/Kexn7Dbjamkt0e1DJ1q0U9kyktcFQpnq3LPUamVmvXVNc11PUUb6dJuuIKOc0noqq71h65h65L9PM3VNPKpQZA/nxfCkAQi2w46VNb+nIP+Y4N1kSq/K/TaMY6QNHmBFqgra7Zlwcg82mNCGUaRZiCVJ02GVSe85FufteBAGplL7j3ROzdBJB6wsW6vAohyAXOxTLioMMuHiT5Th87cPK1WQNxf/3tJl8qpM/NKK85gniCnBsQI2Yj/BCKO5+N15niP1dsmWsHSI7QYma7RXariJSFwMW6q3wwE0tI6tr4qe4JxLuZ+b2NCiVTs0JCqSCM+yxFAbLA/8rGtX8qpv62Rr0oxx1lGD84++2YB/X3XIkEFBX0cybBEqwU4yIZAfkQK18UJK+5TVVB2+4NLqcvCbgQrYCxDl5HU42Ofc518UqTVxjW9bLb98k7EE1L3kEtVLHnmu9FGb0SId7/K7OctRphqHBYKAlekgtbfc0Hygemnq4pF738sHInGxt5/QUayGWMV3iE+K4TuseqRvmi5FtUQsVOFKIJqTdgONxtnLUq93Wv4r1GBP+6KP9Bx1mgMhtTMeE7CNL8PCCd3xuj4xVLQJcFhezx73DXhobwaztLkylerIQNdUbNJ78roC8e2w3uekC4izuTBCNlTp0KH9IcbXZtBmL2QZbWdEipoGGXd7eFMvbGM2VOn7y63sKousYsKv6OfI49X9J6dRA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(1800799015)(376005)(7416005)(36860700004)(82310400017);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jun 2024 08:12:12.2156 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6dd9d50d-fc0a-43ec-93c4-08dc86c988ef X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000044F8.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8689 Some type of domain don't have PIRQ, like PVH, it do not do PHYSDEVOP_map_pirq for each gsi. When passthrough a device to guest on PVH dom0, callstack pci_add_dm_done->XEN_DOMCTL_irq_permission will failed at domain_pirq_to_irq, because PVH has no mapping of gsi, pirq and irq on Xen side. What's more, current hypercall XEN_DOMCTL_irq_permission require passing in pirq and grant the access of irq, it is not suitable for dom0 that has no PIRQ flag, because passthrough a device needs gsi and grant the corresponding irq to guest. So, add a new hypercall to grant gsi permission when dom0 is not PV or dom0 has not PIRQ flag. Signed-off-by: Huang Rui Signed-off-by: Jiqian Chen Signed-off-by: Jiqian Chen means I am the author. Signed-off-by: Huang Rui means Rui sent them to upstream firstly. Signed-off-by: Jiqian Chen means I take continue to upstream. --- RFC: it needs review and needs to wait for the corresponding third patch on linux kernel side to be merged. --- tools/include/xenctrl.h | 5 +++ tools/libs/ctrl/xc_domain.c | 15 +++++++ tools/libs/light/libxl_pci.c | 72 +++++++++++++++++++++++------- xen/arch/x86/domctl.c | 38 ++++++++++++++++ xen/arch/x86/include/asm/io_apic.h | 2 + xen/arch/x86/io_apic.c | 21 +++++++++ xen/arch/x86/mpparse.c | 3 +- xen/include/public/domctl.h | 10 +++++ xen/xsm/flask/hooks.c | 1 + 9 files changed, 149 insertions(+), 18 deletions(-) diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index a0381f74d24b..f3feb6848e25 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -1382,6 +1382,11 @@ int xc_domain_irq_permission(xc_interface *xch, uint32_t pirq, bool allow_access); +int xc_domain_gsi_permission(xc_interface *xch, + uint32_t domid, + uint32_t gsi, + bool allow_access); + int xc_domain_iomem_permission(xc_interface *xch, uint32_t domid, unsigned long first_mfn, diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c index f2d9d14b4d9f..8540e84fda93 100644 --- a/tools/libs/ctrl/xc_domain.c +++ b/tools/libs/ctrl/xc_domain.c @@ -1394,6 +1394,21 @@ int xc_domain_irq_permission(xc_interface *xch, return do_domctl(xch, &domctl); } +int xc_domain_gsi_permission(xc_interface *xch, + uint32_t domid, + uint32_t gsi, + bool allow_access) +{ + struct xen_domctl domctl = { + .cmd = XEN_DOMCTL_gsi_permission, + .domain = domid, + .u.gsi_permission.gsi = gsi, + .u.gsi_permission.allow_access = allow_access, + }; + + return do_domctl(xch, &domctl); +} + int xc_domain_iomem_permission(xc_interface *xch, uint32_t domid, unsigned long first_mfn, diff --git a/tools/libs/light/libxl_pci.c b/tools/libs/light/libxl_pci.c index 7e44d4c3ae2b..b8ec37d8d7e3 100644 --- a/tools/libs/light/libxl_pci.c +++ b/tools/libs/light/libxl_pci.c @@ -1412,6 +1412,37 @@ static bool pci_supp_legacy_irq(void) #define PCI_SBDF(seg, bus, devfn) \ ((((uint32_t)(seg)) << 16) | (PCI_DEVID(bus, devfn))) +static int pci_device_set_gsi(libxl_ctx *ctx, + libxl_domid domid, + libxl_device_pci *pci, + bool map, + int *gsi_back) +{ + int r, gsi, pirq; + uint32_t sbdf; + + sbdf = PCI_SBDF(pci->domain, pci->bus, (PCI_DEVFN(pci->dev, pci->func))); + r = xc_physdev_gsi_from_dev(ctx->xch, sbdf); + *gsi_back = r; + if (r < 0) + return r; + + gsi = r; + pirq = r; + if (map) + r = xc_physdev_map_pirq(ctx->xch, domid, gsi, &pirq); + else + r = xc_physdev_unmap_pirq(ctx->xch, domid, pirq); + if (r) + return r; + + r = xc_domain_gsi_permission(ctx->xch, domid, gsi, map); + if (r && errno == EOPNOTSUPP) + r = xc_domain_irq_permission(ctx->xch, domid, pirq, map); + + return r; +} + static void pci_add_dm_done(libxl__egc *egc, pci_add_state *pas, int rc) @@ -1424,10 +1455,10 @@ static void pci_add_dm_done(libxl__egc *egc, unsigned long long start, end, flags, size; int irq, i; int r; - uint32_t sbdf; uint32_t flag = XEN_DOMCTL_DEV_RDM_RELAXED; uint32_t domainid = domid; bool isstubdom = libxl_is_stubdom(ctx, domid, &domainid); + int gsi; /* Convenience aliases */ bool starting = pas->starting; @@ -1485,6 +1516,19 @@ static void pci_add_dm_done(libxl__egc *egc, fclose(f); if (!pci_supp_legacy_irq()) goto out_no_irq; + + r = pci_device_set_gsi(ctx, domid, pci, 1, &gsi); + if (gsi >= 0) { + if (r < 0) { + rc = ERROR_FAIL; + LOGED(ERROR, domainid, + "pci_device_set_gsi gsi=%d (error=%d)", gsi, errno); + goto out; + } else { + goto process_permissive; + } + } + /* if gsi < 0, keep using irq */ sysfs_path = GCSPRINTF(SYSFS_PCI_DEV"/"PCI_BDF"/irq", pci->domain, pci->bus, pci->dev, pci->func); f = fopen(sysfs_path, "r"); @@ -1493,13 +1537,6 @@ static void pci_add_dm_done(libxl__egc *egc, goto out_no_irq; } if ((fscanf(f, "%u", &irq) == 1) && irq) { - sbdf = PCI_SBDF(pci->domain, pci->bus, - (PCI_DEVFN(pci->dev, pci->func))); - r = xc_physdev_gsi_from_dev(ctx->xch, sbdf); - /* if fail, keep using irq; if success, r is gsi, use gsi */ - if (r != -1) { - irq = r; - } r = xc_physdev_map_pirq(ctx->xch, domid, irq, &irq); if (r < 0) { LOGED(ERROR, domainid, "xc_physdev_map_pirq irq=%d (error=%d)", @@ -1519,6 +1556,7 @@ static void pci_add_dm_done(libxl__egc *egc, } fclose(f); +process_permissive: /* Don't restrict writes to the PCI config space from this VM */ if (pci->permissive) { if ( sysfs_write_bdf(gc, SYSFS_PCIBACK_DRIVER"/permissive", @@ -2186,10 +2224,10 @@ static void pci_remove_detached(libxl__egc *egc, int irq = 0, i, stubdomid = 0; const char *sysfs_path; FILE *f; - uint32_t sbdf; uint32_t domainid = prs->domid; bool isstubdom; int r; + int gsi; /* Convenience aliases */ libxl_device_pci *const pci = &prs->pci; @@ -2245,6 +2283,15 @@ skip_bar: if (!pci_supp_legacy_irq()) goto skip_legacy_irq; + r = pci_device_set_gsi(ctx, domid, pci, 0, &gsi); + if (gsi >= 0) { + if (r < 0) { + LOGED(ERROR, domainid, + "pci_device_set_gsi gsi=%d (error=%d)", gsi, errno); + } + goto skip_legacy_irq; + } + /* if gsi < 0, keep using irq */ sysfs_path = GCSPRINTF(SYSFS_PCI_DEV"/"PCI_BDF"/irq", pci->domain, pci->bus, pci->dev, pci->func); @@ -2255,13 +2302,6 @@ skip_bar: } if ((fscanf(f, "%u", &irq) == 1) && irq) { - sbdf = PCI_SBDF(pci->domain, pci->bus, - (PCI_DEVFN(pci->dev, pci->func))); - r = xc_physdev_gsi_from_dev(ctx->xch, sbdf); - /* if fail, keep using irq; if success, r is gsi, use gsi */ - if (r != -1) { - irq = r; - } rc = xc_physdev_unmap_pirq(ctx->xch, domid, irq); if (rc < 0) { /* diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 9a72d57333e9..c69b4566ac4f 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -36,6 +36,7 @@ #include #include #include +#include static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) @@ -237,6 +238,43 @@ long arch_do_domctl( break; } + case XEN_DOMCTL_gsi_permission: + { + unsigned int gsi = domctl->u.gsi_permission.gsi; + int irq = gsi_2_irq(gsi); + bool allow = domctl->u.gsi_permission.allow_access; + + /* + * If current domain is PV or it has PIRQ flag, it has a mapping + * of gsi, pirq and irq, so it should use XEN_DOMCTL_irq_permission + * to grant irq permission. + */ + if ( is_pv_domain(current->domain) || has_pirq(current->domain) ) + { + ret = -EOPNOTSUPP; + break; + } + + if ( gsi >= nr_irqs_gsi || irq < 0 ) + { + ret = -EINVAL; + break; + } + + if ( !irq_access_permitted(current->domain, irq) || + xsm_irq_permission(XSM_HOOK, d, irq, allow) ) + { + ret = -EPERM; + break; + } + + if ( allow ) + ret = irq_permit_access(d, irq); + else + ret = irq_deny_access(d, irq); + break; + } + case XEN_DOMCTL_getpageframeinfo3: { unsigned int num = domctl->u.getpageframeinfo3.num; diff --git a/xen/arch/x86/include/asm/io_apic.h b/xen/arch/x86/include/asm/io_apic.h index 78268ea8f666..7e86d8337758 100644 --- a/xen/arch/x86/include/asm/io_apic.h +++ b/xen/arch/x86/include/asm/io_apic.h @@ -213,5 +213,7 @@ unsigned highest_gsi(void); int ioapic_guest_read( unsigned long physbase, unsigned int reg, u32 *pval); int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val); +int mp_find_ioapic(int gsi); +int gsi_2_irq(int gsi); #endif diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index b48a64246548..d03bcdef4d19 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -955,6 +955,27 @@ static int pin_2_irq(int idx, int apic, int pin) return irq; } +int gsi_2_irq(int gsi) +{ + int entry, ioapic, pin; + + ioapic = mp_find_ioapic(gsi); + if ( ioapic < 0 ) + return -1; + + pin = gsi - io_apic_gsi_base(ioapic); + + entry = find_irq_entry(ioapic, pin, mp_INT); + /* + * If there is no override mapping for irq and gsi in mp_irqs, + * then the default identity mapping applies. + */ + if ( entry < 0 ) + return gsi; + + return pin_2_irq(entry, ioapic, pin); +} + static inline int IO_APIC_irq_trigger(int irq) { int apic, idx, pin; diff --git a/xen/arch/x86/mpparse.c b/xen/arch/x86/mpparse.c index d8ccab2449c6..c95da0de5770 100644 --- a/xen/arch/x86/mpparse.c +++ b/xen/arch/x86/mpparse.c @@ -841,8 +841,7 @@ static struct mp_ioapic_routing { } mp_ioapic_routing[MAX_IO_APICS]; -static int mp_find_ioapic ( - int gsi) +int mp_find_ioapic(int gsi) { unsigned int i; diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 2a49fe46ce25..f933af8722f4 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -465,6 +465,14 @@ struct xen_domctl_irq_permission { }; +/* XEN_DOMCTL_gsi_permission */ +struct xen_domctl_gsi_permission { + uint32_t gsi; + uint8_t allow_access; /* flag to specify enable/disable of x86 gsi access */ + uint8_t pad[3]; +}; + + /* XEN_DOMCTL_iomem_permission */ struct xen_domctl_iomem_permission { uint64_aligned_t first_mfn;/* first page (physical page number) in range */ @@ -1306,6 +1314,7 @@ struct xen_domctl { #define XEN_DOMCTL_get_paging_mempool_size 85 #define XEN_DOMCTL_set_paging_mempool_size 86 #define XEN_DOMCTL_dt_overlay 87 +#define XEN_DOMCTL_gsi_permission 88 #define XEN_DOMCTL_gdbsx_guestmemio 1000 #define XEN_DOMCTL_gdbsx_pausevcpu 1001 #define XEN_DOMCTL_gdbsx_unpausevcpu 1002 @@ -1328,6 +1337,7 @@ struct xen_domctl { struct xen_domctl_setdomainhandle setdomainhandle; struct xen_domctl_setdebugging setdebugging; struct xen_domctl_irq_permission irq_permission; + struct xen_domctl_gsi_permission gsi_permission; struct xen_domctl_iomem_permission iomem_permission; struct xen_domctl_ioport_permission ioport_permission; struct xen_domctl_hypercall_init hypercall_init; diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c index 5e88c71b8e22..a5b134c91101 100644 --- a/xen/xsm/flask/hooks.c +++ b/xen/xsm/flask/hooks.c @@ -685,6 +685,7 @@ static int cf_check flask_domctl(struct domain *d, int cmd) case XEN_DOMCTL_shadow_op: case XEN_DOMCTL_ioport_permission: case XEN_DOMCTL_ioport_mapping: + case XEN_DOMCTL_gsi_permission: #endif #ifdef CONFIG_HAS_PASSTHROUGH /*