From patchwork Tue Jun 11 14:30:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wajdeczko X-Patchwork-Id: 13693860 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 43D25C25B76 for ; Tue, 11 Jun 2024 14:30:49 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A6A9D10E15D; Tue, 11 Jun 2024 14:30:48 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="G0ZhOhiE"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0DA7310E04D; Tue, 11 Jun 2024 14:30:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1718116244; x=1749652244; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ddSmGFrKosmGt07/5iez3l6GA3mrHW6gIlEakO6WlUI=; b=G0ZhOhiEAKJpjcMWaGWVhpGg2aTf9L1Fqekim2zuLgO1oDjqE/Zn2Itq EvoIj8IgPNJTtmBPPM6iD2ooEUfdSAey27XMoUhdqpCzTEUZjdiu/k1FY 678V+3IqudbZ7DrbmLZJuWnaWaXIS019BEc9zhsbfpe+tuLyWq329czEP NafBVsNPs0iItiyxqqDUMCVrKi86lOnjB+PpibhwbGEM4aKAovZhSmoX8 IDA1Ge406HCE5DqWh8xwncNMj08LWm3sj2Wh186lqdDsTSd09+tTNhscI x0GdG/jioa1vzYgfPbCHUxgT03jnlOXPUmcHfGuRMtVIOIh5g6vWzL8tR A==; X-CSE-ConnectionGUID: K9uSTGVlRKao2C+hyHZcig== X-CSE-MsgGUID: urlfCrFfTIiP2xlWq2t9ZA== X-IronPort-AV: E=McAfee;i="6600,9927,11099"; a="14957499" X-IronPort-AV: E=Sophos;i="6.08,230,1712646000"; d="scan'208";a="14957499" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jun 2024 07:30:41 -0700 X-CSE-ConnectionGUID: rfWr2sEISQaDdEXze8Vnug== X-CSE-MsgGUID: xhP5t7VfSNacShmLsm/JVQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,230,1712646000"; d="scan'208";a="44357787" Received: from mwajdecz-mobl.ger.corp.intel.com ([10.94.248.185]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jun 2024 07:30:40 -0700 From: Michal Wajdeczko To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Michal Wajdeczko Subject: [RFC 1/7] drm/xe/guc: Promote GuC ABI headers to shared location Date: Tue, 11 Jun 2024 16:30:02 +0200 Message-Id: <20240611143008.1900-2-michal.wajdeczko@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20240611143008.1900-1-michal.wajdeczko@intel.com> References: <20240611143008.1900-1-michal.wajdeczko@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" GuC ABI definitions do not have to be the Xe driver specific. Move them to shared location for later reuse by the i915 driver. While at it, fixup few improper kernel-doc annotations. Signed-off-by: Michal Wajdeczko --- .../{xe => intel/guc}/abi/guc_communication_ctb_abi.h | 0 .../{xe => intel/guc}/abi/guc_communication_mmio_abi.h | 0 drivers/gpu/drm/{xe => intel/guc}/abi/guc_klvs_abi.h | 10 +++++----- .../gpu/drm/{xe => intel/guc}/abi/guc_messages_abi.h | 0 drivers/gpu/drm/xe/Makefile | 5 +++++ 5 files changed, 10 insertions(+), 5 deletions(-) rename drivers/gpu/drm/{xe => intel/guc}/abi/guc_communication_ctb_abi.h (100%) rename drivers/gpu/drm/{xe => intel/guc}/abi/guc_communication_mmio_abi.h (100%) rename drivers/gpu/drm/{xe => intel/guc}/abi/guc_klvs_abi.h (98%) rename drivers/gpu/drm/{xe => intel/guc}/abi/guc_messages_abi.h (100%) diff --git a/drivers/gpu/drm/xe/abi/guc_communication_ctb_abi.h b/drivers/gpu/drm/intel/guc/abi/guc_communication_ctb_abi.h similarity index 100% rename from drivers/gpu/drm/xe/abi/guc_communication_ctb_abi.h rename to drivers/gpu/drm/intel/guc/abi/guc_communication_ctb_abi.h diff --git a/drivers/gpu/drm/xe/abi/guc_communication_mmio_abi.h b/drivers/gpu/drm/intel/guc/abi/guc_communication_mmio_abi.h similarity index 100% rename from drivers/gpu/drm/xe/abi/guc_communication_mmio_abi.h rename to drivers/gpu/drm/intel/guc/abi/guc_communication_mmio_abi.h diff --git a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h b/drivers/gpu/drm/intel/guc/abi/guc_klvs_abi.h similarity index 98% rename from drivers/gpu/drm/xe/abi/guc_klvs_abi.h rename to drivers/gpu/drm/intel/guc/abi/guc_klvs_abi.h index 8f9f60b28306..191995e4cb1d 100644 --- a/drivers/gpu/drm/xe/abi/guc_klvs_abi.h +++ b/drivers/gpu/drm/intel/guc/abi/guc_klvs_abi.h @@ -66,23 +66,23 @@ * Refers to 64 bit Global Gfx address of H2G `CT Buffer`_. * Should be above WOPCM address but below APIC base address for native mode. * - * _`GUC_KLV_SELF_CFG_H2G_CTB_DESCRIPTOR_ADDR : 0x0903 + * _`GUC_KLV_SELF_CFG_H2G_CTB_DESCRIPTOR_ADDR` : 0x0903 * Refers to 64 bit Global Gfx address of H2G `CTB Descriptor`_. * Should be above WOPCM address but below APIC base address for native mode. * - * _`GUC_KLV_SELF_CFG_H2G_CTB_SIZE : 0x0904 + * _`GUC_KLV_SELF_CFG_H2G_CTB_SIZE` : 0x0904 * Refers to size of H2G `CT Buffer`_ in bytes. * Should be a multiple of 4K. * - * _`GUC_KLV_SELF_CFG_G2H_CTB_ADDR : 0x0905 + * _`GUC_KLV_SELF_CFG_G2H_CTB_ADDR` : 0x0905 * Refers to 64 bit Global Gfx address of G2H `CT Buffer`_. * Should be above WOPCM address but below APIC base address for native mode. * - * _GUC_KLV_SELF_CFG_G2H_CTB_DESCRIPTOR_ADDR : 0x0906 + * _`GUC_KLV_SELF_CFG_G2H_CTB_DESCRIPTOR_ADDR` : 0x0906 * Refers to 64 bit Global Gfx address of G2H `CTB Descriptor`_. * Should be above WOPCM address but below APIC base address for native mode. * - * _GUC_KLV_SELF_CFG_G2H_CTB_SIZE : 0x0907 + * _`GUC_KLV_SELF_CFG_G2H_CTB_SIZE` : 0x0907 * Refers to size of G2H `CT Buffer`_ in bytes. * Should be a multiple of 4K. */ diff --git a/drivers/gpu/drm/xe/abi/guc_messages_abi.h b/drivers/gpu/drm/intel/guc/abi/guc_messages_abi.h similarity index 100% rename from drivers/gpu/drm/xe/abi/guc_messages_abi.h rename to drivers/gpu/drm/intel/guc/abi/guc_messages_abi.h diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile index 478acc94a71c..a6325ee08a91 100644 --- a/drivers/gpu/drm/xe/Makefile +++ b/drivers/gpu/drm/xe/Makefile @@ -35,6 +35,11 @@ uses_generated_oob := \ $(uses_generated_oob): $(generated_oob) +# Shared ABI definitions +subdir-ccflags-y += \ + -I$(srctree)/drivers/gpu/drm/intel/guc/ \ + -I$(srctree)/drivers/gpu/drm/intel/guc/abi + # Please keep these build lists sorted! # core driver code From patchwork Tue Jun 11 14:30:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wajdeczko X-Patchwork-Id: 13693865 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2F056C27C75 for ; Tue, 11 Jun 2024 14:31:05 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 86E4A10E146; Tue, 11 Jun 2024 14:31:04 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="W7jEN3e8"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 4E2A310E146; Tue, 11 Jun 2024 14:30:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1718116245; x=1749652245; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=iQR9YStS7FggKdxkqYsdu0V++xnNM67wMQUDjdil6cA=; b=W7jEN3e81JGR+Y98s8lw0yWXPJYaK3Wt/EOYkxU9Qd7+PLbFVF8n+ZLD JSS+cYMMamTwhtaHc3o+wfWjPCewa9PGtCyXdPFatZ3ue7Lh9r8xg8b64 /QwKAxVD7QlAfpD/CPjKOrBbdhcXY79HvL34RgJ4UzUl9lqNJX8yrWinl NpAHzLdS3aLOY3DCvLYXV2pPuTAC4w7GXWrZ9DImSyS1X9wqlU71kRkKp +qic8jbILh0r/5+Ry2ekZ06qaxm6YljzElRU170OjvJ0oB9QyAdkc+PKk SwsXfsK1nNByHgwcl68hr31yTU2MEEjgOQz27z0ih71Z/TFWhYPX33DpS g==; X-CSE-ConnectionGUID: Hr0bw8ExTzSgkS8YGhZY0Q== X-CSE-MsgGUID: Jd5UF1PlR6mO3nVUF/gcvQ== X-IronPort-AV: E=McAfee;i="6600,9927,11099"; a="14957511" X-IronPort-AV: E=Sophos;i="6.08,230,1712646000"; d="scan'208";a="14957511" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jun 2024 07:30:42 -0700 X-CSE-ConnectionGUID: hLns3ZKEQ1K7WGSVyATcuQ== X-CSE-MsgGUID: Jpp9T/dqSayjLNjiXvnM/A== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,230,1712646000"; d="scan'208";a="44357799" Received: from mwajdecz-mobl.ger.corp.intel.com ([10.94.248.185]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jun 2024 07:30:41 -0700 From: Michal Wajdeczko To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Michal Wajdeczko Subject: [RFC 2/7] Documentation/gpu: Separate GuC ABI section Date: Tue, 11 Jun 2024 16:30:03 +0200 Message-Id: <20240611143008.1900-3-michal.wajdeczko@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20240611143008.1900-1-michal.wajdeczko@intel.com> References: <20240611143008.1900-1-michal.wajdeczko@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" GuC ABI definitions are not strictly tied to the i915 driver. Move them to a separate section. Signed-off-by: Michal Wajdeczko --- Documentation/gpu/drivers.rst | 1 + Documentation/gpu/guc.rst | 16 ++++++++++++++++ Documentation/gpu/i915.rst | 9 --------- 3 files changed, 17 insertions(+), 9 deletions(-) create mode 100644 Documentation/gpu/guc.rst diff --git a/Documentation/gpu/drivers.rst b/Documentation/gpu/drivers.rst index b899cbc5c2b4..294e39e34c32 100644 --- a/Documentation/gpu/drivers.rst +++ b/Documentation/gpu/drivers.rst @@ -7,6 +7,7 @@ GPU Driver Documentation amdgpu/index i915 + guc imagination/index mcde meson diff --git a/Documentation/gpu/guc.rst b/Documentation/gpu/guc.rst new file mode 100644 index 000000000000..b0fcb824c15a --- /dev/null +++ b/Documentation/gpu/guc.rst @@ -0,0 +1,16 @@ +.. SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +====================== +drm/intel GuC firmware +====================== + +The graphics microcontroller (GuC) is available starting from Gen9 hardware. + +GuC ABI +======= + +.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_communication_mmio_abi.h +.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h +.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h +.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h +.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h diff --git a/Documentation/gpu/i915.rst b/Documentation/gpu/i915.rst index ad59ae579237..e96fd87ffd94 100644 --- a/Documentation/gpu/i915.rst +++ b/Documentation/gpu/i915.rst @@ -541,15 +541,6 @@ GuC-based command submission .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c :doc: GuC-based command submission -GuC ABI -~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h -.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_communication_mmio_abi.h -.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h -.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h -.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h - HuC --- .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/intel_huc.c From patchwork Tue Jun 11 14:30:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wajdeczko X-Patchwork-Id: 13693861 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4722BC27C5E for ; Tue, 11 Jun 2024 14:30:50 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 36DAE10E1B1; Tue, 11 Jun 2024 14:30:49 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="h3zvft+h"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id AC2AF10E15D; Tue, 11 Jun 2024 14:30:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1718116246; x=1749652246; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=UnZ2Cu/7pLhBjf5Y8QmCSv1D9DH32mXmaxEAnYABXaU=; b=h3zvft+ha4Ol1C3fiQUIpyxw08BXpaAqHScmKXYyqtSqionqqauq2UOn 64xdhoyvGlQ2AvzkpOdSns4QYOI9TLO+ceuqBRWZbWqcPSCOp2CaqvBxN enu+rr2WF9PQbW2hyPU/hJnAfbeZcPMwfjWYfuY70jubZJ13IM4wq5VRT QqKYom/Gcm2CAC8jN8xE8vxSU/OIFJ3S42oNPs5NnqaA1AkjZhQX7ljH+ aksxbB+Ex8LEIZqEjJVv+eq71PW3iKVVkEo++i/i6UUrmEprIQBbVoOe+ rbTgRfoF8gVjw9ku4iQCGcqYgGBhWHSAFLxRj7EaPzeZsFATLesaljTjQ A==; X-CSE-ConnectionGUID: e3b3cI8YQsi6SYVFaxY+mw== X-CSE-MsgGUID: M4lw/5mISw+iAi4qWOk7Ww== X-IronPort-AV: E=McAfee;i="6600,9927,11099"; a="14957520" X-IronPort-AV: E=Sophos;i="6.08,230,1712646000"; d="scan'208";a="14957520" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jun 2024 07:30:44 -0700 X-CSE-ConnectionGUID: SzV6xvzJTtiP1I723HiFAg== X-CSE-MsgGUID: 38OHC8DkRu2B3S/tQS4vFw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,230,1712646000"; d="scan'208";a="44357809" Received: from mwajdecz-mobl.ger.corp.intel.com ([10.94.248.185]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jun 2024 07:30:43 -0700 From: Michal Wajdeczko To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Michal Wajdeczko Subject: [RFC 3/7] Documentation/gpu: Switch to shared GuC ABI definitions Date: Tue, 11 Jun 2024 16:30:04 +0200 Message-Id: <20240611143008.1900-4-michal.wajdeczko@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20240611143008.1900-1-michal.wajdeczko@intel.com> References: <20240611143008.1900-1-michal.wajdeczko@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" For documentation purposes, use shared GuC ABI definitions instead of local i915 definitions. Signed-off-by: Michal Wajdeczko --- Documentation/gpu/guc.rst | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/gpu/guc.rst b/Documentation/gpu/guc.rst index b0fcb824c15a..55ae1476bf9e 100644 --- a/Documentation/gpu/guc.rst +++ b/Documentation/gpu/guc.rst @@ -9,8 +9,8 @@ The graphics microcontroller (GuC) is available starting from Gen9 hardware. GuC ABI ======= -.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_communication_mmio_abi.h -.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h -.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h +.. kernel-doc:: drivers/gpu/drm/intel/guc/abi/guc_communication_mmio_abi.h +.. kernel-doc:: drivers/gpu/drm/intel/guc/abi/guc_communication_ctb_abi.h +.. kernel-doc:: drivers/gpu/drm/intel/guc/abi/guc_messages_abi.h .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h -.. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h +.. kernel-doc:: drivers/gpu/drm/intel/guc/abi/guc_klvs_abi.h From patchwork Tue Jun 11 14:30:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wajdeczko X-Patchwork-Id: 13693862 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8AAAAC25B76 for ; Tue, 11 Jun 2024 14:30:55 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id E055B10E665; Tue, 11 Jun 2024 14:30:54 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="VArxkGX6"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1D79510E15D; Tue, 11 Jun 2024 14:30:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1718116248; x=1749652248; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=BRZ65KgMChPgz3iLzvflJBeEdG7xcZXYraEiNxEaDNI=; b=VArxkGX6yOh2iqDh+f8s9+33W9etSYKZP38BcnBWxx2EG0vQioF2XKYv QtfMaITx/3cs8hEt4GNXbX61DMSyL4m25wqe2f+MV3CNyY8xhv5SO5KZr ld9YVit3uretHMTVtoZEMmcF7mIpzcTTWG9mzZYDanJsveIS3fZZptlsC Jxnu/KiH15ooQ9aXjCtsvHnhqsOOR6yRwYX4TENdMPrOuMXw3vSIoO+Ke lORTWnMik/cDapnapGlwTaI2Qw5iusPaTNF6VHNu80L8EBNXjuS8fPhYs 9F3PgZP7eJDLjNP36FryeonrsIzldgTEk7I2+YU1tI/wLGOhU7Fi8iihc g==; X-CSE-ConnectionGUID: KC9B3/dbR3Gw+h66td1KxA== X-CSE-MsgGUID: YVVujU+bTnCAF2OMYyOrjg== X-IronPort-AV: E=McAfee;i="6600,9927,11099"; a="14957532" X-IronPort-AV: E=Sophos;i="6.08,230,1712646000"; d="scan'208";a="14957532" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jun 2024 07:30:45 -0700 X-CSE-ConnectionGUID: xD6Je8JHRheA5e69nYEJeA== X-CSE-MsgGUID: q5wQ/WY0SkWTmAViegc7GA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,230,1712646000"; d="scan'208";a="44357818" Received: from mwajdecz-mobl.ger.corp.intel.com ([10.94.248.185]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jun 2024 07:30:44 -0700 From: Michal Wajdeczko To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Michal Wajdeczko Subject: [RFC 4/7] drm/intel/guc: Update CTB communication ABI Date: Tue, 11 Jun 2024 16:30:05 +0200 Message-Id: <20240611143008.1900-5-michal.wajdeczko@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20240611143008.1900-1-michal.wajdeczko@intel.com> References: <20240611143008.1900-1-michal.wajdeczko@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Add missing definition of the CTB_STATUS_UNUSED bit. Signed-off-by: Michal Wajdeczko --- drivers/gpu/drm/intel/guc/abi/guc_communication_ctb_abi.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/intel/guc/abi/guc_communication_ctb_abi.h b/drivers/gpu/drm/intel/guc/abi/guc_communication_ctb_abi.h index 8f86a16dc577..57f3c44e0a40 100644 --- a/drivers/gpu/drm/intel/guc/abi/guc_communication_ctb_abi.h +++ b/drivers/gpu/drm/intel/guc/abi/guc_communication_ctb_abi.h @@ -37,6 +37,7 @@ * | | | - _`GUC_CTB_STATUS_OVERFLOW` = 1 (head/tail too large) | * | | | - _`GUC_CTB_STATUS_UNDERFLOW` = 2 (truncated message) | * | | | - _`GUC_CTB_STATUS_MISMATCH` = 4 (head/tail modified) | + * | | | - _`GUC_CTB_STATUS_UNUSED` = 8 (CTB is not in use) | * +---+-------+--------------------------------------------------------------+ * |...| | RESERVED = MBZ | * +---+-------+--------------------------------------------------------------+ @@ -52,6 +53,7 @@ struct guc_ct_buffer_desc { #define GUC_CTB_STATUS_OVERFLOW (1 << 0) #define GUC_CTB_STATUS_UNDERFLOW (1 << 1) #define GUC_CTB_STATUS_MISMATCH (1 << 2) +#define GUC_CTB_STATUS_UNUSED (1 << 3) u32 reserved[13]; } __packed; static_assert(sizeof(struct guc_ct_buffer_desc) == 64); From patchwork Tue Jun 11 14:30:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wajdeczko X-Patchwork-Id: 13693866 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 98DB5C27C5E for ; Tue, 11 Jun 2024 14:31:09 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CC93410E17B; Tue, 11 Jun 2024 14:31:08 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="oH9+fprJ"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7927410E17B; Tue, 11 Jun 2024 14:30:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1718116249; x=1749652249; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=H6rL+QrCgFhaLu5U0XyzVKGo0ekrtV9FzlWiCRFQVCA=; b=oH9+fprJ50/9iVuiFA7GBWDsQ2aw5UOTjDyEVgkTUYv0LjKbUvbWawIf sNaLC33FNaYD+JMw1/8FnQMtSy5t4UG8q4Wrx5/z8NHStQH5hE2KghXJY 4ffr2QsZRbCaGfB39F7dK5bfYQ5UcVm6qMKfSHWjQ/LApPc6TO3V+fCAd 0lYYrXK4ZTKTJ0YttGYOACwfAjT2o3sfR8TMhtA7UJcMpqADpyYtixczh zaXkpPLBHAYeSHhMZXbJv04dp1tEJ9EQEwYBw9fTsGX/ybakOekFRs6DE 7gNnmohb3he5UVWUZIPwA7UNAzMPfwU/2LXnXCQ8BmqMnEJ7xIfdq2ZRG A==; X-CSE-ConnectionGUID: Dst+DycTQXOJZ4GpMlNFZw== X-CSE-MsgGUID: kh03f66PQma2u/uqt9WUEA== X-IronPort-AV: E=McAfee;i="6600,9927,11099"; a="14957547" X-IronPort-AV: E=Sophos;i="6.08,230,1712646000"; d="scan'208";a="14957547" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jun 2024 07:30:47 -0700 X-CSE-ConnectionGUID: 8Xf7omn1TQKWyauIS3jRhw== X-CSE-MsgGUID: wbNSjC59Rz+3jed7AvbRsg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,230,1712646000"; d="scan'208";a="44357827" Received: from mwajdecz-mobl.ger.corp.intel.com ([10.94.248.185]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jun 2024 07:30:46 -0700 From: Michal Wajdeczko To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Michal Wajdeczko Subject: [RFC 5/7] drm/intel/guc: Add new KLV definitions Date: Tue, 11 Jun 2024 16:30:06 +0200 Message-Id: <20240611143008.1900-6-michal.wajdeczko@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20240611143008.1900-1-michal.wajdeczko@intel.com> References: <20240611143008.1900-1-michal.wajdeczko@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Some KLVs were not used by the Xe driver, but are used by the i915. Add scheduling policy update key and another workaround key. Signed-off-by: Michal Wajdeczko --- drivers/gpu/drm/intel/guc/abi/guc_klvs_abi.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/intel/guc/abi/guc_klvs_abi.h b/drivers/gpu/drm/intel/guc/abi/guc_klvs_abi.h index 191995e4cb1d..e6dcd8346ac2 100644 --- a/drivers/gpu/drm/intel/guc/abi/guc_klvs_abi.h +++ b/drivers/gpu/drm/intel/guc/abi/guc_klvs_abi.h @@ -111,6 +111,13 @@ #define GUC_KLV_SELF_CFG_G2H_CTB_SIZE_KEY 0x0907 #define GUC_KLV_SELF_CFG_G2H_CTB_SIZE_LEN 1u +/* + * Global scheduling policy update keys. + */ +enum { + GUC_SCHEDULING_POLICIES_KLV_ID_RENDER_COMPUTE_YIELD = 0x1001, +}; + /* * Per context scheduling policy update keys. */ @@ -347,6 +354,7 @@ enum { * Workaround keys: */ enum xe_guc_klv_ids { + GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE = 0x9001, GUC_WORKAROUND_KLV_BLOCK_INTERRUPTS_WHEN_MGSR_BLOCKED = 0x9002, GUC_WORKAROUND_KLV_ID_GAM_PFQ_SHADOW_TAIL_POLLING = 0x9005, GUC_WORKAROUND_KLV_ID_DISABLE_MTP_DURING_ASYNC_COMPUTE = 0x9007, From patchwork Tue Jun 11 14:30:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Michal Wajdeczko X-Patchwork-Id: 13693863 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AFA78C25B76 for ; Tue, 11 Jun 2024 14:30:58 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id AE66110E682; Tue, 11 Jun 2024 14:30:57 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="NXpDDwjK"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 1E55A10E665; Tue, 11 Jun 2024 14:30:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1718116250; x=1749652250; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ynoKQEKPQsC9r5yW5Uqt15W6HIXUrA7LY0M/Lvmbavs=; b=NXpDDwjKwgLb91UgJH821bbIVMqqy4d0KN23t7oBE/hwHYaqciy1J34n 8xkHGtb2noowbkSMAFhZ1yo2+p5XgCftsbWZTvaG9HEsbp7MW9t81eai7 i5wQVPjhcNuCJtE5jpUyXq7nSqRrIgCovBeJLQ+mOQ8ShivWMnQybk8PL D7s+NvDoDb15Ukhzx7iOdBZiGTQ99QO3S/lLjPZlDxHjo2X9lK9HQoSvC uPhNOTlrAeZvqiryLgnYpJbrj6Fb8yO38LNZY9190XN1LNLVJtCi1524Q OzrMPBtncSu4EIudVd8k55lGbseH+5F46DETgEDCpnPIEGaP4p145Nh5L w==; X-CSE-ConnectionGUID: pE5a6SJiQhi9v+unOmY+qQ== X-CSE-MsgGUID: DVPqKCNNSmWu174jtsrM0A== X-IronPort-AV: E=McAfee;i="6600,9927,11099"; a="14957557" X-IronPort-AV: E=Sophos;i="6.08,230,1712646000"; d="scan'208";a="14957557" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jun 2024 07:30:48 -0700 X-CSE-ConnectionGUID: Erp/27YzSq2hAw/OhIoMlQ== X-CSE-MsgGUID: xlCEhQ6TTBeKGpYYnprLLw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,230,1712646000"; d="scan'208";a="44357849" Received: from mwajdecz-mobl.ger.corp.intel.com ([10.94.248.185]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jun 2024 07:30:47 -0700 From: Michal Wajdeczko To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Michal Wajdeczko Subject: [RFC 6/7] drm/i915: Use shared GuC ABI definitions Date: Tue, 11 Jun 2024 16:30:07 +0200 Message-Id: <20240611143008.1900-7-michal.wajdeczko@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20240611143008.1900-1-michal.wajdeczko@intel.com> References: <20240611143008.1900-1-michal.wajdeczko@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" We no longer need to maintain some of the GuC ABI definitions inside the i915 driver as the shared one are exactly the same. Signed-off-by: Michal Wajdeczko --- drivers/gpu/drm/i915/Makefile | 5 + .../gt/uc/abi/guc_communication_ctb_abi.h | 170 ----------- .../gt/uc/abi/guc_communication_mmio_abi.h | 49 ---- drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h | 112 -------- .../gpu/drm/i915/gt/uc/abi/guc_messages_abi.h | 264 ------------------ 5 files changed, 5 insertions(+), 595 deletions(-) delete mode 100644 drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h delete mode 100644 drivers/gpu/drm/i915/gt/uc/abi/guc_communication_mmio_abi.h delete mode 100644 drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h delete mode 100644 drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index 4022e4499382..7702ad1f59fc 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -15,6 +15,11 @@ subdir-ccflags-y += -DI915 subdir-ccflags-y += -I$(src) +# Shared ABI definitions +subdir-ccflags-y += \ + -I$(srctree)/drivers/gpu/drm/intel/guc/ \ + -I$(srctree)/drivers/gpu/drm/intel/guc/abi + # Please keep these build lists sorted! # core driver code diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h deleted file mode 100644 index f7d70db16d76..000000000000 --- a/drivers/gpu/drm/i915/gt/uc/abi/guc_communication_ctb_abi.h +++ /dev/null @@ -1,170 +0,0 @@ -/* SPDX-License-Identifier: MIT */ -/* - * Copyright © 2014-2021 Intel Corporation - */ - -#ifndef _ABI_GUC_COMMUNICATION_CTB_ABI_H -#define _ABI_GUC_COMMUNICATION_CTB_ABI_H - -#include -#include - -#include "guc_messages_abi.h" - -/** - * DOC: CT Buffer - * - * Circular buffer used to send `CTB Message`_ - */ - -/** - * DOC: CTB Descriptor - * - * +---+-------+--------------------------------------------------------------+ - * | | Bits | Description | - * +===+=======+==============================================================+ - * | 0 | 31:0 | **HEAD** - offset (in dwords) to the last dword that was | - * | | | read from the `CT Buffer`_. | - * | | | It can only be updated by the receiver. | - * +---+-------+--------------------------------------------------------------+ - * | 1 | 31:0 | **TAIL** - offset (in dwords) to the last dword that was | - * | | | written to the `CT Buffer`_. | - * | | | It can only be updated by the sender. | - * +---+-------+--------------------------------------------------------------+ - * | 2 | 31:0 | **STATUS** - status of the CTB | - * | | | | - * | | | - _`GUC_CTB_STATUS_NO_ERROR` = 0 (normal operation) | - * | | | - _`GUC_CTB_STATUS_OVERFLOW` = 1 (head/tail too large) | - * | | | - _`GUC_CTB_STATUS_UNDERFLOW` = 2 (truncated message) | - * | | | - _`GUC_CTB_STATUS_MISMATCH` = 4 (head/tail modified) | - * | | | - _`GUC_CTB_STATUS_UNUSED` = 8 (CTB is not in use) | - * +---+-------+--------------------------------------------------------------+ - * |...| | RESERVED = MBZ | - * +---+-------+--------------------------------------------------------------+ - * | 15| 31:0 | RESERVED = MBZ | - * +---+-------+--------------------------------------------------------------+ - */ - -struct guc_ct_buffer_desc { - u32 head; - u32 tail; - u32 status; -#define GUC_CTB_STATUS_NO_ERROR 0 -#define GUC_CTB_STATUS_OVERFLOW BIT(0) -#define GUC_CTB_STATUS_UNDERFLOW BIT(1) -#define GUC_CTB_STATUS_MISMATCH BIT(2) -#define GUC_CTB_STATUS_UNUSED BIT(3) - u32 reserved[13]; -} __packed; -static_assert(sizeof(struct guc_ct_buffer_desc) == 64); - -/** - * DOC: CTB Message - * - * +---+-------+--------------------------------------------------------------+ - * | | Bits | Description | - * +===+=======+==============================================================+ - * | 0 | 31:16 | **FENCE** - message identifier | - * | +-------+--------------------------------------------------------------+ - * | | 15:12 | **FORMAT** - format of the CTB message | - * | | | - _`GUC_CTB_FORMAT_HXG` = 0 - see `CTB HXG Message`_ | - * | +-------+--------------------------------------------------------------+ - * | | 11:8 | **RESERVED** | - * | +-------+--------------------------------------------------------------+ - * | | 7:0 | **NUM_DWORDS** - length of the CTB message (w/o header) | - * +---+-------+--------------------------------------------------------------+ - * | 1 | 31:0 | optional (depends on FORMAT) | - * +---+-------+ | - * |...| | | - * +---+-------+ | - * | n | 31:0 | | - * +---+-------+--------------------------------------------------------------+ - */ - -#define GUC_CTB_HDR_LEN 1u -#define GUC_CTB_MSG_MIN_LEN GUC_CTB_HDR_LEN -#define GUC_CTB_MSG_MAX_LEN 256u -#define GUC_CTB_MSG_0_FENCE (0xffffU << 16) -#define GUC_CTB_MSG_0_FORMAT (0xf << 12) -#define GUC_CTB_FORMAT_HXG 0u -#define GUC_CTB_MSG_0_RESERVED (0xf << 8) -#define GUC_CTB_MSG_0_NUM_DWORDS (0xff << 0) - -/** - * DOC: CTB HXG Message - * - * +---+-------+--------------------------------------------------------------+ - * | | Bits | Description | - * +===+=======+==============================================================+ - * | 0 | 31:16 | FENCE | - * | +-------+--------------------------------------------------------------+ - * | | 15:12 | FORMAT = GUC_CTB_FORMAT_HXG_ | - * | +-------+--------------------------------------------------------------+ - * | | 11:8 | RESERVED = MBZ | - * | +-------+--------------------------------------------------------------+ - * | | 7:0 | NUM_DWORDS = length (in dwords) of the embedded HXG message | - * +---+-------+--------------------------------------------------------------+ - * | 1 | 31:0 | | - * +---+-------+ | - * |...| | [Embedded `HXG Message`_] | - * +---+-------+ | - * | n | 31:0 | | - * +---+-------+--------------------------------------------------------------+ - */ - -#define GUC_CTB_HXG_MSG_MIN_LEN (GUC_CTB_MSG_MIN_LEN + GUC_HXG_MSG_MIN_LEN) -#define GUC_CTB_HXG_MSG_MAX_LEN GUC_CTB_MSG_MAX_LEN - -/** - * DOC: CTB based communication - * - * The CTB (command transport buffer) communication between Host and GuC - * is based on u32 data stream written to the shared buffer. One buffer can - * be used to transmit data only in one direction (one-directional channel). - * - * Current status of the each buffer is stored in the buffer descriptor. - * Buffer descriptor holds tail and head fields that represents active data - * stream. The tail field is updated by the data producer (sender), and head - * field is updated by the data consumer (receiver):: - * - * +------------+ - * | DESCRIPTOR | +=================+============+========+ - * +============+ | | MESSAGE(s) | | - * | address |--------->+=================+============+========+ - * +------------+ - * | head | ^-----head--------^ - * +------------+ - * | tail | ^---------tail-----------------^ - * +------------+ - * | size | ^---------------size--------------------^ - * +------------+ - * - * Each message in data stream starts with the single u32 treated as a header, - * followed by optional set of u32 data that makes message specific payload:: - * - * +------------+---------+---------+---------+ - * | MESSAGE | - * +------------+---------+---------+---------+ - * | msg[0] | [1] | ... | [n-1] | - * +------------+---------+---------+---------+ - * | MESSAGE | MESSAGE PAYLOAD | - * + HEADER +---------+---------+---------+ - * | | 0 | ... | n | - * +======+=====+=========+=========+=========+ - * | 31:16| code| | | | - * +------+-----+ | | | - * | 15:5|flags| | | | - * +------+-----+ | | | - * | 4:0| len| | | | - * +------+-----+---------+---------+---------+ - * - * ^-------------len-------------^ - * - * The message header consists of: - * - * - **len**, indicates length of the message payload (in u32) - * - **code**, indicates message code - * - **flags**, holds various bits to control message handling - */ - -#endif /* _ABI_GUC_COMMUNICATION_CTB_ABI_H */ diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_communication_mmio_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_communication_mmio_abi.h deleted file mode 100644 index 9baa3cb07d13..000000000000 --- a/drivers/gpu/drm/i915/gt/uc/abi/guc_communication_mmio_abi.h +++ /dev/null @@ -1,49 +0,0 @@ -/* SPDX-License-Identifier: MIT */ -/* - * Copyright © 2014-2021 Intel Corporation - */ - -#ifndef _ABI_GUC_COMMUNICATION_MMIO_ABI_H -#define _ABI_GUC_COMMUNICATION_MMIO_ABI_H - -/** - * DOC: GuC MMIO based communication - * - * The MMIO based communication between Host and GuC relies on special - * hardware registers which format could be defined by the software - * (so called scratch registers). - * - * Each MMIO based message, both Host to GuC (H2G) and GuC to Host (G2H) - * messages, which maximum length depends on number of available scratch - * registers, is directly written into those scratch registers. - * - * For Gen9+, there are 16 software scratch registers 0xC180-0xC1B8, - * but no H2G command takes more than 4 parameters and the GuC firmware - * itself uses an 4-element array to store the H2G message. - * - * For Gen11+, there are additional 4 registers 0x190240-0x19024C, which - * are, regardless on lower count, preferred over legacy ones. - * - * The MMIO based communication is mainly used during driver initialization - * phase to setup the `CTB based communication`_ that will be used afterwards. - */ - -#define GUC_MAX_MMIO_MSG_LEN 4 - -/** - * DOC: MMIO HXG Message - * - * Format of the MMIO messages follows definitions of `HXG Message`_. - * - * +---+-------+--------------------------------------------------------------+ - * | | Bits | Description | - * +===+=======+==============================================================+ - * | 0 | 31:0 | | - * +---+-------+ | - * |...| | [Embedded `HXG Message`_] | - * +---+-------+ | - * | n | 31:0 | | - * +---+-------+--------------------------------------------------------------+ - */ - -#endif /* _ABI_GUC_COMMUNICATION_MMIO_ABI_H */ diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h deleted file mode 100644 index 37ff539a6963..000000000000 --- a/drivers/gpu/drm/i915/gt/uc/abi/guc_klvs_abi.h +++ /dev/null @@ -1,112 +0,0 @@ -/* SPDX-License-Identifier: MIT */ -/* - * Copyright © 2021 Intel Corporation - */ - -#ifndef _ABI_GUC_KLVS_ABI_H -#define _ABI_GUC_KLVS_ABI_H - -#include - -/** - * DOC: GuC KLV - * - * +---+-------+--------------------------------------------------------------+ - * | | Bits | Description | - * +===+=======+==============================================================+ - * | 0 | 31:16 | **KEY** - KLV key identifier | - * | | | - `GuC Self Config KLVs`_ | - * | | | | - * | +-------+--------------------------------------------------------------+ - * | | 15:0 | **LEN** - length of VALUE (in 32bit dwords) | - * +---+-------+--------------------------------------------------------------+ - * | 1 | 31:0 | **VALUE** - actual value of the KLV (format depends on KEY) | - * +---+-------+ | - * |...| | | - * +---+-------+ | - * | n | 31:0 | | - * +---+-------+--------------------------------------------------------------+ - */ - -#define GUC_KLV_LEN_MIN 1u -#define GUC_KLV_0_KEY (0xffffu << 16) -#define GUC_KLV_0_LEN (0xffffu << 0) -#define GUC_KLV_n_VALUE (0xffffffffu << 0) - -/** - * DOC: GuC Self Config KLVs - * - * `GuC KLV`_ keys available for use with HOST2GUC_SELF_CFG_. - * - * _`GUC_KLV_SELF_CFG_H2G_CTB_ADDR` : 0x0902 - * Refers to 64 bit Global Gfx address of H2G `CT Buffer`_. - * Should be above WOPCM address but below APIC base address for native mode. - * - * _`GUC_KLV_SELF_CFG_H2G_CTB_DESCRIPTOR_ADDR` : 0x0903 - * Refers to 64 bit Global Gfx address of H2G `CTB Descriptor`_. - * Should be above WOPCM address but below APIC base address for native mode. - * - * _`GUC_KLV_SELF_CFG_H2G_CTB_SIZE` : 0x0904 - * Refers to size of H2G `CT Buffer`_ in bytes. - * Should be a multiple of 4K. - * - * _`GUC_KLV_SELF_CFG_G2H_CTB_ADDR` : 0x0905 - * Refers to 64 bit Global Gfx address of G2H `CT Buffer`_. - * Should be above WOPCM address but below APIC base address for native mode. - * - * _`GUC_KLV_SELF_CFG_G2H_CTB_DESCRIPTOR_ADDR` : 0x0906 - * Refers to 64 bit Global Gfx address of G2H `CTB Descriptor`_. - * Should be above WOPCM address but below APIC base address for native mode. - * - * _`GUC_KLV_SELF_CFG_G2H_CTB_SIZE` : 0x0907 - * Refers to size of G2H `CT Buffer`_ in bytes. - * Should be a multiple of 4K. - */ - -#define GUC_KLV_SELF_CFG_H2G_CTB_ADDR_KEY 0x0902 -#define GUC_KLV_SELF_CFG_H2G_CTB_ADDR_LEN 2u - -#define GUC_KLV_SELF_CFG_H2G_CTB_DESCRIPTOR_ADDR_KEY 0x0903 -#define GUC_KLV_SELF_CFG_H2G_CTB_DESCRIPTOR_ADDR_LEN 2u - -#define GUC_KLV_SELF_CFG_H2G_CTB_SIZE_KEY 0x0904 -#define GUC_KLV_SELF_CFG_H2G_CTB_SIZE_LEN 1u - -#define GUC_KLV_SELF_CFG_G2H_CTB_ADDR_KEY 0x0905 -#define GUC_KLV_SELF_CFG_G2H_CTB_ADDR_LEN 2u - -#define GUC_KLV_SELF_CFG_G2H_CTB_DESCRIPTOR_ADDR_KEY 0x0906 -#define GUC_KLV_SELF_CFG_G2H_CTB_DESCRIPTOR_ADDR_LEN 2u - -#define GUC_KLV_SELF_CFG_G2H_CTB_SIZE_KEY 0x0907 -#define GUC_KLV_SELF_CFG_G2H_CTB_SIZE_LEN 1u - -/* - * Global scheduling policy update keys. - */ -enum { - GUC_SCHEDULING_POLICIES_KLV_ID_RENDER_COMPUTE_YIELD = 0x1001, -}; - -/* - * Per context scheduling policy update keys. - */ -enum { - GUC_CONTEXT_POLICIES_KLV_ID_EXECUTION_QUANTUM = 0x2001, - GUC_CONTEXT_POLICIES_KLV_ID_PREEMPTION_TIMEOUT = 0x2002, - GUC_CONTEXT_POLICIES_KLV_ID_SCHEDULING_PRIORITY = 0x2003, - GUC_CONTEXT_POLICIES_KLV_ID_PREEMPT_TO_IDLE_ON_QUANTUM_EXPIRY = 0x2004, - GUC_CONTEXT_POLICIES_KLV_ID_SLPM_GT_FREQUENCY = 0x2005, - - GUC_CONTEXT_POLICIES_KLV_NUM_IDS = 5, -}; - -/* - * Workaround keys: - */ -enum { - GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE = 0x9001, - GUC_WORKAROUND_KLV_BLOCK_INTERRUPTS_WHEN_MGSR_BLOCKED = 0x9002, -}; - -#endif /* _ABI_GUC_KLVS_ABI_H */ diff --git a/drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h b/drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h deleted file mode 100644 index 98eb4f46572b..000000000000 --- a/drivers/gpu/drm/i915/gt/uc/abi/guc_messages_abi.h +++ /dev/null @@ -1,264 +0,0 @@ -/* SPDX-License-Identifier: MIT */ -/* - * Copyright © 2014-2021 Intel Corporation - */ - -#ifndef _ABI_GUC_MESSAGES_ABI_H -#define _ABI_GUC_MESSAGES_ABI_H - -/** - * DOC: HXG Message - * - * All messages exchanged with GuC are defined using 32 bit dwords. - * First dword is treated as a message header. Remaining dwords are optional. - * - * +---+-------+--------------------------------------------------------------+ - * | | Bits | Description | - * +===+=======+==============================================================+ - * | | | | - * | 0 | 31 | **ORIGIN** - originator of the message | - * | | | - _`GUC_HXG_ORIGIN_HOST` = 0 | - * | | | - _`GUC_HXG_ORIGIN_GUC` = 1 | - * | | | | - * | +-------+--------------------------------------------------------------+ - * | | 30:28 | **TYPE** - message type | - * | | | - _`GUC_HXG_TYPE_REQUEST` = 0 | - * | | | - _`GUC_HXG_TYPE_EVENT` = 1 | - * | | | - _`GUC_HXG_TYPE_FAST_REQUEST` = 2 | - * | | | - _`GUC_HXG_TYPE_NO_RESPONSE_BUSY` = 3 | - * | | | - _`GUC_HXG_TYPE_NO_RESPONSE_RETRY` = 5 | - * | | | - _`GUC_HXG_TYPE_RESPONSE_FAILURE` = 6 | - * | | | - _`GUC_HXG_TYPE_RESPONSE_SUCCESS` = 7 | - * | +-------+--------------------------------------------------------------+ - * | | 27:0 | **AUX** - auxiliary data (depends on TYPE) | - * +---+-------+--------------------------------------------------------------+ - * | 1 | 31:0 | | - * +---+-------+ | - * |...| | **PAYLOAD** - optional payload (depends on TYPE) | - * +---+-------+ | - * | n | 31:0 | | - * +---+-------+--------------------------------------------------------------+ - */ - -#define GUC_HXG_MSG_MIN_LEN 1u -#define GUC_HXG_MSG_0_ORIGIN (0x1U << 31) -#define GUC_HXG_ORIGIN_HOST 0u -#define GUC_HXG_ORIGIN_GUC 1u -#define GUC_HXG_MSG_0_TYPE (0x7 << 28) -#define GUC_HXG_TYPE_REQUEST 0u -#define GUC_HXG_TYPE_EVENT 1u -#define GUC_HXG_TYPE_FAST_REQUEST 2u -#define GUC_HXG_TYPE_NO_RESPONSE_BUSY 3u -#define GUC_HXG_TYPE_NO_RESPONSE_RETRY 5u -#define GUC_HXG_TYPE_RESPONSE_FAILURE 6u -#define GUC_HXG_TYPE_RESPONSE_SUCCESS 7u -#define GUC_HXG_MSG_0_AUX (0xfffffff << 0) -#define GUC_HXG_MSG_n_PAYLOAD (0xffffffff << 0) - -/** - * DOC: HXG Request - * - * The `HXG Request`_ message should be used to initiate synchronous activity - * for which confirmation or return data is expected. - * - * The recipient of this message shall use `HXG Response`_, `HXG Failure`_ - * or `HXG Retry`_ message as a definite reply, and may use `HXG Busy`_ - * message as a intermediate reply. - * - * Format of @DATA0 and all @DATAn fields depends on the @ACTION code. - * - * +---+-------+--------------------------------------------------------------+ - * | | Bits | Description | - * +===+=======+==============================================================+ - * | 0 | 31 | ORIGIN | - * | +-------+--------------------------------------------------------------+ - * | | 30:28 | TYPE = GUC_HXG_TYPE_REQUEST_ | - * | +-------+--------------------------------------------------------------+ - * | | 27:16 | **DATA0** - request data (depends on ACTION) | - * | +-------+--------------------------------------------------------------+ - * | | 15:0 | **ACTION** - requested action code | - * +---+-------+--------------------------------------------------------------+ - * | 1 | 31:0 | | - * +---+-------+ | - * |...| | **DATAn** - optional data (depends on ACTION) | - * +---+-------+ | - * | n | 31:0 | | - * +---+-------+--------------------------------------------------------------+ - */ - -#define GUC_HXG_REQUEST_MSG_MIN_LEN GUC_HXG_MSG_MIN_LEN -#define GUC_HXG_REQUEST_MSG_0_DATA0 (0xfff << 16) -#define GUC_HXG_REQUEST_MSG_0_ACTION (0xffff << 0) -#define GUC_HXG_REQUEST_MSG_n_DATAn GUC_HXG_MSG_n_PAYLOAD - -/** - * DOC: HXG Fast Request - * - * The `HXG Request`_ message should be used to initiate asynchronous activity - * for which confirmation or return data is not expected. - * - * If confirmation is required then `HXG Request`_ shall be used instead. - * - * The recipient of this message may only use `HXG Failure`_ message if it was - * unable to accept this request (like invalid data). - * - * Format of `HXG Fast Request`_ message is same as `HXG Request`_ except @TYPE. - * - * +---+-------+--------------------------------------------------------------+ - * | | Bits | Description | - * +===+=======+==============================================================+ - * | 0 | 31 | ORIGIN - see `HXG Message`_ | - * | +-------+--------------------------------------------------------------+ - * | | 30:28 | TYPE = `GUC_HXG_TYPE_FAST_REQUEST`_ | - * | +-------+--------------------------------------------------------------+ - * | | 27:16 | DATA0 - see `HXG Request`_ | - * | +-------+--------------------------------------------------------------+ - * | | 15:0 | ACTION - see `HXG Request`_ | - * +---+-------+--------------------------------------------------------------+ - * |...| | DATAn - see `HXG Request`_ | - * +---+-------+--------------------------------------------------------------+ - */ - -/** - * DOC: HXG Event - * - * The `HXG Event`_ message should be used to initiate asynchronous activity - * that does not involves immediate confirmation nor data. - * - * Format of @DATA0 and all @DATAn fields depends on the @ACTION code. - * - * +---+-------+--------------------------------------------------------------+ - * | | Bits | Description | - * +===+=======+==============================================================+ - * | 0 | 31 | ORIGIN | - * | +-------+--------------------------------------------------------------+ - * | | 30:28 | TYPE = GUC_HXG_TYPE_EVENT_ | - * | +-------+--------------------------------------------------------------+ - * | | 27:16 | **DATA0** - event data (depends on ACTION) | - * | +-------+--------------------------------------------------------------+ - * | | 15:0 | **ACTION** - event action code | - * +---+-------+--------------------------------------------------------------+ - * | 1 | 31:0 | | - * +---+-------+ | - * |...| | **DATAn** - optional event data (depends on ACTION) | - * +---+-------+ | - * | n | 31:0 | | - * +---+-------+--------------------------------------------------------------+ - */ - -#define GUC_HXG_EVENT_MSG_MIN_LEN GUC_HXG_MSG_MIN_LEN -#define GUC_HXG_EVENT_MSG_0_DATA0 (0xfff << 16) -#define GUC_HXG_EVENT_MSG_0_ACTION (0xffff << 0) -#define GUC_HXG_EVENT_MSG_n_DATAn GUC_HXG_MSG_n_PAYLOAD - -/** - * DOC: HXG Busy - * - * The `HXG Busy`_ message may be used to acknowledge reception of the `HXG Request`_ - * message if the recipient expects that it processing will be longer than default - * timeout. - * - * The @COUNTER field may be used as a progress indicator. - * - * +---+-------+--------------------------------------------------------------+ - * | | Bits | Description | - * +===+=======+==============================================================+ - * | 0 | 31 | ORIGIN | - * | +-------+--------------------------------------------------------------+ - * | | 30:28 | TYPE = GUC_HXG_TYPE_NO_RESPONSE_BUSY_ | - * | +-------+--------------------------------------------------------------+ - * | | 27:0 | **COUNTER** - progress indicator | - * +---+-------+--------------------------------------------------------------+ - */ - -#define GUC_HXG_BUSY_MSG_LEN GUC_HXG_MSG_MIN_LEN -#define GUC_HXG_BUSY_MSG_0_COUNTER GUC_HXG_MSG_0_AUX - -/** - * DOC: HXG Retry - * - * The `HXG Retry`_ message should be used by recipient to indicate that the - * `HXG Request`_ message was dropped and it should be resent again. - * - * The @REASON field may be used to provide additional information. - * - * +---+-------+--------------------------------------------------------------+ - * | | Bits | Description | - * +===+=======+==============================================================+ - * | 0 | 31 | ORIGIN | - * | +-------+--------------------------------------------------------------+ - * | | 30:28 | TYPE = GUC_HXG_TYPE_NO_RESPONSE_RETRY_ | - * | +-------+--------------------------------------------------------------+ - * | | 27:0 | **REASON** - reason for retry | - * | | | - _`GUC_HXG_RETRY_REASON_UNSPECIFIED` = 0 | - * +---+-------+--------------------------------------------------------------+ - */ - -#define GUC_HXG_RETRY_MSG_LEN GUC_HXG_MSG_MIN_LEN -#define GUC_HXG_RETRY_MSG_0_REASON GUC_HXG_MSG_0_AUX -#define GUC_HXG_RETRY_REASON_UNSPECIFIED 0u - -/** - * DOC: HXG Failure - * - * The `HXG Failure`_ message shall be used as a reply to the `HXG Request`_ - * message that could not be processed due to an error. - * - * +---+-------+--------------------------------------------------------------+ - * | | Bits | Description | - * +===+=======+==============================================================+ - * | 0 | 31 | ORIGIN | - * | +-------+--------------------------------------------------------------+ - * | | 30:28 | TYPE = GUC_HXG_TYPE_RESPONSE_FAILURE_ | - * | +-------+--------------------------------------------------------------+ - * | | 27:16 | **HINT** - additional error hint | - * | +-------+--------------------------------------------------------------+ - * | | 15:0 | **ERROR** - error/result code | - * +---+-------+--------------------------------------------------------------+ - */ - -#define GUC_HXG_FAILURE_MSG_LEN GUC_HXG_MSG_MIN_LEN -#define GUC_HXG_FAILURE_MSG_0_HINT (0xfff << 16) -#define GUC_HXG_FAILURE_MSG_0_ERROR (0xffff << 0) - -/** - * DOC: HXG Response - * - * The `HXG Response`_ message shall be used as a reply to the `HXG Request`_ - * message that was successfully processed without an error. - * - * +---+-------+--------------------------------------------------------------+ - * | | Bits | Description | - * +===+=======+==============================================================+ - * | 0 | 31 | ORIGIN | - * | +-------+--------------------------------------------------------------+ - * | | 30:28 | TYPE = GUC_HXG_TYPE_RESPONSE_SUCCESS_ | - * | +-------+--------------------------------------------------------------+ - * | | 27:0 | **DATA0** - data (depends on ACTION from `HXG Request`_) | - * +---+-------+--------------------------------------------------------------+ - * | 1 | 31:0 | | - * +---+-------+ | - * |...| | **DATAn** - data (depends on ACTION from `HXG Request`_) | - * +---+-------+ | - * | n | 31:0 | | - * +---+-------+--------------------------------------------------------------+ - */ - -#define GUC_HXG_RESPONSE_MSG_MIN_LEN GUC_HXG_MSG_MIN_LEN -#define GUC_HXG_RESPONSE_MSG_0_DATA0 GUC_HXG_MSG_0_AUX -#define GUC_HXG_RESPONSE_MSG_n_DATAn GUC_HXG_MSG_n_PAYLOAD - -/* deprecated */ -#define INTEL_GUC_MSG_TYPE_SHIFT 28 -#define INTEL_GUC_MSG_TYPE_MASK (0xF << INTEL_GUC_MSG_TYPE_SHIFT) -#define INTEL_GUC_MSG_DATA_SHIFT 16 -#define INTEL_GUC_MSG_DATA_MASK (0xFFF << INTEL_GUC_MSG_DATA_SHIFT) -#define INTEL_GUC_MSG_CODE_SHIFT 0 -#define INTEL_GUC_MSG_CODE_MASK (0xFFFF << INTEL_GUC_MSG_CODE_SHIFT) - -enum intel_guc_msg_type { - INTEL_GUC_MSG_TYPE_REQUEST = 0x0, - INTEL_GUC_MSG_TYPE_RESPONSE = 0xF, -}; - -#endif /* _ABI_GUC_MESSAGES_ABI_H */ From patchwork Tue Jun 11 14:30:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Wajdeczko X-Patchwork-Id: 13693864 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ECF8FC27C75 for ; Tue, 11 Jun 2024 14:31:01 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4887B10E0BD; Tue, 11 Jun 2024 14:31:01 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="b6958V0w"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 0836810E665; Tue, 11 Jun 2024 14:30:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1718116251; x=1749652251; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=xsM6mT/kbHhSjlkYC4/8I43M70F0uuiXz7xlAx9zu94=; b=b6958V0wRAvT+DSwGTUFBkS12gopKNR2tG1frsaPeGTgDE5h0Z5xBXxe +nlZHzLfxeAzVP1AaT8aHUatzM7uHsShrdL8IkYO2fDro5hz/pocmStsw YSmH1X3wmL0g5YO9TdnJQIwTq7r33MXlFMble7eWs+n4iT4WTdGKQCYR2 sQxIBfgpbFM6fADE0PluxJhsfTtrkS9ZPg3Vo+pYpB/PqZKwqul1LDJbX 17BlKoh2WoW8AzJNOIifdhhrwaTYZQMrc82vwZ5TkyqZVk3blDmizVZlZ apygAyCzwX7bchemi5A+uxVRVs9xny8YMR2OOaA+pU1PC2iLXeL9EXv2Q g==; X-CSE-ConnectionGUID: 8tuAm0e3Tg6jmJ6oP6kuQg== X-CSE-MsgGUID: cWlj/+tuSnOAQw/wdcKvhg== X-IronPort-AV: E=McAfee;i="6600,9927,11099"; a="14957571" X-IronPort-AV: E=Sophos;i="6.08,230,1712646000"; d="scan'208";a="14957571" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jun 2024 07:30:50 -0700 X-CSE-ConnectionGUID: 8Ovo/IMORPCbBdl/xUS/Mg== X-CSE-MsgGUID: oMqcFSbcQZqVGIfKXs6L0Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,230,1712646000"; d="scan'208";a="44357866" Received: from mwajdecz-mobl.ger.corp.intel.com ([10.94.248.185]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jun 2024 07:30:49 -0700 From: Michal Wajdeczko To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: Michal Wajdeczko Subject: [RFC 7/7] drm/xe: Promote SR-IOV GuC ABI definitions to shared location Date: Tue, 11 Jun 2024 16:30:08 +0200 Message-Id: <20240611143008.1900-8-michal.wajdeczko@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20240611143008.1900-1-michal.wajdeczko@intel.com> References: <20240611143008.1900-1-michal.wajdeczko@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Move SR-IOV GuC ABI definitions to shared location and include them in the generated GuC documentation chapter. Signed-off-by: Michal Wajdeczko --- Documentation/gpu/guc.rst | 7 +++++++ .../gpu/drm/{xe => intel/guc}/abi/guc_actions_sriov_abi.h | 0 .../gpu/drm/{xe => intel/guc}/abi/guc_relay_actions_abi.h | 0 .../{xe => intel/guc}/abi/guc_relay_communication_abi.h | 0 4 files changed, 7 insertions(+) rename drivers/gpu/drm/{xe => intel/guc}/abi/guc_actions_sriov_abi.h (100%) rename drivers/gpu/drm/{xe => intel/guc}/abi/guc_relay_actions_abi.h (100%) rename drivers/gpu/drm/{xe => intel/guc}/abi/guc_relay_communication_abi.h (100%) diff --git a/Documentation/gpu/guc.rst b/Documentation/gpu/guc.rst index 55ae1476bf9e..468ba5a978e1 100644 --- a/Documentation/gpu/guc.rst +++ b/Documentation/gpu/guc.rst @@ -13,4 +13,11 @@ GuC ABI .. kernel-doc:: drivers/gpu/drm/intel/guc/abi/guc_communication_ctb_abi.h .. kernel-doc:: drivers/gpu/drm/intel/guc/abi/guc_messages_abi.h .. kernel-doc:: drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h +.. kernel-doc:: drivers/gpu/drm/intel/guc/abi/guc_actions_sriov_abi.h .. kernel-doc:: drivers/gpu/drm/intel/guc/abi/guc_klvs_abi.h + +GuC Relay ABI +============= + +.. kernel-doc:: drivers/gpu/drm/intel/guc/abi/guc_relay_communication_abi.h +.. kernel-doc:: drivers/gpu/drm/intel/guc/abi/guc_relay_actions_abi.h diff --git a/drivers/gpu/drm/xe/abi/guc_actions_sriov_abi.h b/drivers/gpu/drm/intel/guc/abi/guc_actions_sriov_abi.h similarity index 100% rename from drivers/gpu/drm/xe/abi/guc_actions_sriov_abi.h rename to drivers/gpu/drm/intel/guc/abi/guc_actions_sriov_abi.h diff --git a/drivers/gpu/drm/xe/abi/guc_relay_actions_abi.h b/drivers/gpu/drm/intel/guc/abi/guc_relay_actions_abi.h similarity index 100% rename from drivers/gpu/drm/xe/abi/guc_relay_actions_abi.h rename to drivers/gpu/drm/intel/guc/abi/guc_relay_actions_abi.h diff --git a/drivers/gpu/drm/xe/abi/guc_relay_communication_abi.h b/drivers/gpu/drm/intel/guc/abi/guc_relay_communication_abi.h similarity index 100% rename from drivers/gpu/drm/xe/abi/guc_relay_communication_abi.h rename to drivers/gpu/drm/intel/guc/abi/guc_relay_communication_abi.h