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Smith" , Stewart Hildebrand , Huang Rui , Jiqian Chen , Huang Rui , Stewart Hildebrand Subject: [XEN PATCH v10 1/5] xen/vpci: Clear all vpci status of device Date: Mon, 17 Jun 2024 17:00:31 +0800 Message-ID: <20240617090035.839640-2-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240617090035.839640-1-Jiqian.Chen@amd.com> References: <20240617090035.839640-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FC1:EE_|PH0PR12MB7094:EE_ X-MS-Office365-Filtering-Correlation-Id: ff1566a5-fe34-4277-0ece-08dc8eac0147 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230037|36860700010|376011|7416011|82310400023|1800799021; X-Microsoft-Antispam-Message-Info: 6RPTYonk2L2i5ysRafTrcPq/HKcR17Hqdf30Osu6YVx/iTiMrl+P/PvTnsxphz1dAKZMjIM5KVL05ZfQ9qOW42+Ctk++V/nFKj+g3Sh/UU51sr467VcPSE3nredB53M8i/azOd4bpYSwW+R9z8yaM7Q2D0dXuI8+FQmjtJJ52SV6B7ZnDkvo8IUCZEDoW2SL2+4MoDF3JH03kaDbW70rFzhClGaOGryaW5DYjoALNseXkv2jHbo4yp5/ymn/ZiSAOj2sFbmo2EBSD3JkIaR6dsjB+IxRpiMLl1umufhjso+kL8KUg72MTL5a5hTBo/rsNTHrNXLl7kAY4jvff7Ef/k8Z6Yfo8+S2GHYqFdVF7AtNZYLrPWLK8L0jU2qY2SFhPCNvobYSEtyXyphZMOG2CEmymXbMeeky7wuY0wjbHq6NYTgUNfp2j2qhtUMTiE5Sw5GUueT7HHiK/uPDpPlrAg37eZu6gN8aYmTM6VOcP8B4CerjzehvK4/effPMfR6mSFMBkXQ5TuGVloR08EoZdh26yNPvY1ONvK5gZPn6iqQjd6HEC7CWIeNdUWRijchu28Sb/Hr+3KBSzG+Zwp1PwK0M+X+YtPwnA6fx8/7eGsf4k4QHYmImEFpMU3Dq/ax24i6AFu7kKKx7L+LY6GF9xBeLGNWtG1Pb77/HWNyaZYXy8SjGxTumul6qf24CuoS23vX+P+ZR6OzTCabOuvyzQAwlCecMs0c4VgiCJHJK7P1d0Rp4FSzihxTQwHyxjtgsNb0eyWwSc+K1qrr3FI+xGh4fxe5snwi57fWXNRw7GQ52E/tUnqpqh28zTRT9wnvdGR9rS+HUr1pTnUaNfzFMPSYEE1eqepQB9TpATjdXCmMiFcAWJM55C8+Z0Ui7mBB5wgBJ6DZV7PIbQOZUVhNlgv6i4mvk98Rcz2bDArcVCv3mXA1yQvETPkiIcKpccBdjKQNTejNJlFBQ8DInENo6K8asotXrfNi1/OargzsYSA9v1RZrwv9KjuikBIFujWPJVWvseVD/qo2gj769/CZ9w80dzPJjAegfVQwbP6kS5Dy5lBxiczu43su8/HyC1jicS7PjxOce/9NluqtuZMlKqrrfEthfmPx2+m4tKllC/XxMgt3GiFdbH5NL/31QRYUucxYovScjUHEiMou9j1McSOD2XoyP7BLzMYpysoQrAS3+fxPowWcjsboTrEkdiHg4YFGyn7vxC/SUhNsVdoEOhNEY+VYcXTv3RyEhBK2hAmbTVOOJJjalO5k6hm6rMLjv/lNnfdgMO4VKt1B+Zq4vwNfztsOaMoL9iKIjAY8DKje67HxwbfgDgUteR/Ry2oIBJVGW0m41Yrb6DaRzvhWkZlOT4oJulS/7XT3LPGo0Cmna1MNAnPSVaNfYp1LOn4XotpSjNA41c7s61QsksHMzrA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230037)(36860700010)(376011)(7416011)(82310400023)(1800799021);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jun 2024 09:00:58.6095 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ff1566a5-fe34-4277-0ece-08dc8eac0147 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FC1.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH0PR12MB7094 When a device has been reset on dom0 side, the vpci on Xen side won't get notification, so the cached state in vpci is all out of date compare with the real device state. To solve that problem, add a new hypercall to clear all vpci device state. When the state of device is reset on dom0 side, dom0 can call this hypercall to notify vpci. Signed-off-by: Jiqian Chen Signed-off-by: Huang Rui Signed-off-by: Jiqian Chen Reviewed-by: Stewart Hildebrand Reviewed-by: Stefano Stabellini --- xen/arch/x86/hvm/hypercall.c | 1 + xen/drivers/pci/physdev.c | 43 ++++++++++++++++++++++++++++++++++++ xen/drivers/vpci/vpci.c | 9 ++++++++ xen/include/public/physdev.h | 7 ++++++ xen/include/xen/pci.h | 16 ++++++++++++++ xen/include/xen/vpci.h | 6 +++++ 6 files changed, 82 insertions(+) diff --git a/xen/arch/x86/hvm/hypercall.c b/xen/arch/x86/hvm/hypercall.c index 7fb3136f0c7c..0fab670a4871 100644 --- a/xen/arch/x86/hvm/hypercall.c +++ b/xen/arch/x86/hvm/hypercall.c @@ -83,6 +83,7 @@ long hvm_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) case PHYSDEVOP_pci_mmcfg_reserved: case PHYSDEVOP_pci_device_add: case PHYSDEVOP_pci_device_remove: + case PHYSDEVOP_pci_device_state_reset: case PHYSDEVOP_dbgp_op: if ( !is_hardware_domain(currd) ) return -ENOSYS; diff --git a/xen/drivers/pci/physdev.c b/xen/drivers/pci/physdev.c index 42db3e6d133c..1cce508a73b1 100644 --- a/xen/drivers/pci/physdev.c +++ b/xen/drivers/pci/physdev.c @@ -2,11 +2,17 @@ #include #include #include +#include #ifndef COMPAT typedef long ret_t; #endif +static const struct pci_device_state_reset_method + pci_device_state_reset_methods[] = { + [ DEVICE_RESET_FLR ].reset_fn = vpci_reset_device_state, +}; + ret_t pci_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) { ret_t ret; @@ -67,6 +73,43 @@ ret_t pci_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) break; } + case PHYSDEVOP_pci_device_state_reset: { + struct pci_device_state_reset dev_reset; + struct physdev_pci_device *dev; + struct pci_dev *pdev; + pci_sbdf_t sbdf; + + if ( !is_pci_passthrough_enabled() ) + return -EOPNOTSUPP; + + ret = -EFAULT; + if ( copy_from_guest(&dev_reset, arg, 1) != 0 ) + break; + dev = &dev_reset.dev; + sbdf = PCI_SBDF(dev->seg, dev->bus, dev->devfn); + + ret = xsm_resource_setup_pci(XSM_PRIV, sbdf.sbdf); + if ( ret ) + break; + + pcidevs_lock(); + pdev = pci_get_pdev(NULL, sbdf); + if ( !pdev ) + { + pcidevs_unlock(); + ret = -ENODEV; + break; + } + + write_lock(&pdev->domain->pci_lock); + pcidevs_unlock(); + ret = pci_device_state_reset_methods[dev_reset.reset_type].reset_fn(pdev); + write_unlock(&pdev->domain->pci_lock); + if ( ret ) + printk(XENLOG_ERR "%pp: failed to reset vPCI device state\n", &sbdf); + break; + } + default: ret = -ENOSYS; break; diff --git a/xen/drivers/vpci/vpci.c b/xen/drivers/vpci/vpci.c index 1e6aa5d799b9..ff67c2550ccb 100644 --- a/xen/drivers/vpci/vpci.c +++ b/xen/drivers/vpci/vpci.c @@ -172,6 +172,15 @@ int vpci_assign_device(struct pci_dev *pdev) return rc; } + +int vpci_reset_device_state(struct pci_dev *pdev) +{ + ASSERT(rw_is_write_locked(&pdev->domain->pci_lock)); + + vpci_deassign_device(pdev); + return vpci_assign_device(pdev); +} + #endif /* __XEN__ */ static int vpci_register_cmp(const struct vpci_register *r1, diff --git a/xen/include/public/physdev.h b/xen/include/public/physdev.h index f0c0d4727c0b..a71da5892e5f 100644 --- a/xen/include/public/physdev.h +++ b/xen/include/public/physdev.h @@ -296,6 +296,13 @@ DEFINE_XEN_GUEST_HANDLE(physdev_pci_device_add_t); */ #define PHYSDEVOP_prepare_msix 30 #define PHYSDEVOP_release_msix 31 +/* + * Notify the hypervisor that a PCI device has been reset, so that any + * internally cached state is regenerated. Should be called after any + * device reset performed by the hardware domain. + */ +#define PHYSDEVOP_pci_device_state_reset 32 + struct physdev_pci_device { /* IN */ uint16_t seg; diff --git a/xen/include/xen/pci.h b/xen/include/xen/pci.h index 63e49f0117e9..376981f9da98 100644 --- a/xen/include/xen/pci.h +++ b/xen/include/xen/pci.h @@ -156,6 +156,22 @@ struct pci_dev { struct vpci *vpci; }; +struct pci_device_state_reset_method { + int (*reset_fn)(struct pci_dev *pdev); +}; + +enum pci_device_state_reset_type { + DEVICE_RESET_FLR, + DEVICE_RESET_COLD, + DEVICE_RESET_WARM, + DEVICE_RESET_HOT, +}; + +struct pci_device_state_reset { + struct physdev_pci_device dev; + enum pci_device_state_reset_type reset_type; +}; + #define for_each_pdev(domain, pdev) \ list_for_each_entry(pdev, &(domain)->pdev_list, domain_list) diff --git a/xen/include/xen/vpci.h b/xen/include/xen/vpci.h index da8d0f41e6f4..b230fd374de5 100644 --- a/xen/include/xen/vpci.h +++ b/xen/include/xen/vpci.h @@ -38,6 +38,7 @@ int __must_check vpci_assign_device(struct pci_dev *pdev); /* Remove all handlers and free vpci related structures. */ void vpci_deassign_device(struct pci_dev *pdev); +int __must_check vpci_reset_device_state(struct pci_dev *pdev); /* Add/remove a register handler. */ int __must_check vpci_add_register_mask(struct vpci *vpci, @@ -282,6 +283,11 @@ static inline int vpci_assign_device(struct pci_dev *pdev) static inline void vpci_deassign_device(struct pci_dev *pdev) { } +static inline int __must_check vpci_reset_device_state(struct pci_dev *pdev) +{ + return 0; +} + static inline void vpci_dump_msi(void) { } static inline uint32_t vpci_read(pci_sbdf_t sbdf, unsigned int reg, From patchwork Mon Jun 17 09:00:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chen, Jiqian" X-Patchwork-Id: 13700339 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A1401C27C6E for ; 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Smith" , Stewart Hildebrand , Huang Rui , Jiqian Chen , Huang Rui Subject: [XEN PATCH v10 2/5] x86/pvh: Allow (un)map_pirq when dom0 is PVH Date: Mon, 17 Jun 2024 17:00:32 +0800 Message-ID: <20240617090035.839640-3-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240617090035.839640-1-Jiqian.Chen@amd.com> References: <20240617090035.839640-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBB:EE_|PH8PR12MB6700:EE_ X-MS-Office365-Filtering-Correlation-Id: 71057a8e-bc9d-4bdc-e12d-08dc8eac03f6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230037|36860700010|7416011|376011|1800799021|82310400023; X-Microsoft-Antispam-Message-Info: 5RhCespujpkWCvaWJ2NqD1E6z/focBXAwMAf8d5BTs8cvO/aypjG7ZEagf97Xv3UM3h4U6be0hZwWhxSi8BHtEMkMVR5N7MrVWQiDcvof7SRGJybD9irbKZLnDiGZJ41XXZQWqSHgeiU2m2AwAupOO8H1rsWXJo3rsm6Y7uHCkfuCa8ZF9LDBy1Xz4GtEESsSvOVENAikmv5/xtt2OCeC9QoVZ3rhimgApnQxsh8/N0/Z81EuTn13z64OSf7jHkSYnU9d1mUGsZwtaPbUBPJVxnAEQ9hJzql5fY7c7vR1R1KUbCPg/JcOYZm42NFbmkIX43ixDvMuDkwb178iKs26tnpizXLA7XI89vyVwsp5Y3BQiTrfiMdlLds2PSOQhEbWeTH4PcNn/CFWQ3HBruQSRNEYXvD3fqRPL/jjrrY+t4G3/o/U0c+3P2W8w/A6rB+42uNXTxL4QmTmRxGu4W7H7ZK8YMtSDpmoYa9Cbr4kc3IBOQ6OJcdz6Jcz0XZ8gRK4QYcLXJW5SQiedJCd4FTNijqYo6Q+ARFePPP76R0QhFSRMn9SM3NzMxM5S6G+rJGbeq0m/2/Yoa3gE8B5rfH7lBVQcXRnxtxcFQOD83U0EbkIP0xajxBoNRjEJdOjQZdWaDISRX9W8uMGL6XouvME7JttXcTGLRPVa3kaEqjPWyalm0swRDxByjPF+50bOwkC7DVMdWnoOFfyU3ifQx13hLDy24tDVB+47AXA1nvLqkbi3+l/cOwAWxowXFDg2wiwfbru/2tW2NRsfMyqceJNorwyS0iuEWmKqw9CtKyzhra1Kdj03cV6EzjTqHp0e+XlOiMy4zRH1lHIIYgMa1gwmwB4sMK/Rl9gavZxTfUfGHyipUv11OVLK6ja9pkdqqgLSeAR2X6fHppaF8yVry9WEZRXejlBtruXyV2AyZMqp/e/lvmzK/OUgki9DzRzTiEL5ZR5ftb5NGp/j3nK11Qpx74ctXnJfMju3jQUUzjyHqAFSGDPniYWHZiG1O7sZy+pY/8oHkZBsOLXJunSfxB6c604HKhef6I7qCJQWa+OqrGuPY5gff7QSxglovg4sjBiU+apM6/tDZJ9G0uC9hNexSwx8lWHL2rk4u4LjYLDwsV9a4zsPwYEhS6ImspflTvor1TSGB/YwB8FRXUKZGtWyyFj5F3Ubvn+vbfHgfk+ZrBYopQ00i1w04GIoN0BsTk/kKM0xAdPWz+PgRXPinOOefRC4rt+9/vbdHrG6aTC4DLbhBv7etykrVS+0fbwvCZqptWRLDPG7STVdqSp5+i065HsbPRo/apTMtrTViWCnA2ovufRvmJ4jI01uJ9I39q056hX3r6PuW9rJMXSAT52zQhUNXIpuDH3OFk/JlBkmVbUDD1A+VtjA2lqYBSGhEy87b+B4XklfiPYcOzR/scFg== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230037)(36860700010)(7416011)(376011)(1800799021)(82310400023);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jun 2024 09:01:03.1173 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 71057a8e-bc9d-4bdc-e12d-08dc8eac03f6 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBB.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6700 If run Xen with PVH dom0 and hvm domU, hvm will map a pirq for a passthrough device by using gsi, see qemu code xen_pt_realize->xc_physdev_map_pirq and libxl code pci_add_dm_done->xc_physdev_map_pirq. Then xc_physdev_map_pirq will call into Xen, but in hvm_physdev_op, PHYSDEVOP_map_pirq is not allowed because currd is PVH dom0 and PVH has no X86_EMU_USE_PIRQ flag, it will fail at has_pirq check. So, allow PHYSDEVOP_map_pirq when dom0 is PVH and also allow PHYSDEVOP_unmap_pirq for the failed path to unmap pirq. And add a new check to prevent self map when subject domain has no PIRQ flag. So that domU with PIRQ flag can success to map pirq for passthrough devices even dom0 has no PIRQ flag. Signed-off-by: Jiqian Chen Signed-off-by: Huang Rui Signed-off-by: Jiqian Chen Reviewed-by: Stefano Stabellini --- xen/arch/x86/hvm/hypercall.c | 6 ++++++ xen/arch/x86/physdev.c | 14 ++++++++++++++ 2 files changed, 20 insertions(+) diff --git a/xen/arch/x86/hvm/hypercall.c b/xen/arch/x86/hvm/hypercall.c index 0fab670a4871..03ada3c880bd 100644 --- a/xen/arch/x86/hvm/hypercall.c +++ b/xen/arch/x86/hvm/hypercall.c @@ -71,8 +71,14 @@ long hvm_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) switch ( cmd ) { + /* + * Only being permitted for management of other domains. + * Further restrictions are enforced in do_physdev_op. + */ case PHYSDEVOP_map_pirq: case PHYSDEVOP_unmap_pirq: + break; + case PHYSDEVOP_eoi: case PHYSDEVOP_irq_status_query: case PHYSDEVOP_get_free_pirq: diff --git a/xen/arch/x86/physdev.c b/xen/arch/x86/physdev.c index d6dd622952a9..f38cc22c872e 100644 --- a/xen/arch/x86/physdev.c +++ b/xen/arch/x86/physdev.c @@ -323,6 +323,13 @@ ret_t do_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) if ( !d ) break; + /* Prevent self-map when currd has no X86_EMU_USE_PIRQ flag */ + if ( is_hvm_domain(d) && !has_pirq(d) && d == currd ) + { + rcu_unlock_domain(d); + return -EOPNOTSUPP; + } + ret = physdev_map_pirq(d, map.type, &map.index, &map.pirq, &msi); rcu_unlock_domain(d); @@ -346,6 +353,13 @@ ret_t do_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) if ( !d ) break; + /* Prevent self-unmap when currd has no X86_EMU_USE_PIRQ flag */ + if ( is_hvm_domain(d) && !has_pirq(d) && d == currd ) + { + rcu_unlock_domain(d); + return -EOPNOTSUPP; + } + ret = physdev_unmap_pirq(d, unmap.pirq); rcu_unlock_domain(d); From patchwork Mon Jun 17 09:00:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chen, Jiqian" X-Patchwork-Id: 13700340 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0B16CC27C77 for ; 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Smith" , Stewart Hildebrand , Huang Rui , Jiqian Chen , Huang Rui Subject: [XEN PATCH v10 3/5] x86/pvh: Add PHYSDEVOP_setup_gsi for PVH dom0 Date: Mon, 17 Jun 2024 17:00:33 +0800 Message-ID: <20240617090035.839640-4-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240617090035.839640-1-Jiqian.Chen@amd.com> References: <20240617090035.839640-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FC0:EE_|SA0PR12MB4367:EE_ X-MS-Office365-Filtering-Correlation-Id: 00028aba-4365-41da-ba50-08dc8eac0645 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230037|36860700010|376011|7416011|1800799021|82310400023; X-Microsoft-Antispam-Message-Info: XB/KUpauiID7TSc8Cb+YVhE2fzelwsvdqeM05eRg6810sCCcW40gKuMuIxmdJ+SyxlaFKbiUS9fcaKfqt1Y3ZCKthCidCkzRR+49MPHM0lSA6uRf8mjNDTVLSzw03Rzqpj6fZsvwsDMCqIa+bQllKtBEKNErlKKEvpMezBxKyQRIbEboPd4pwTcLQarXkuqqZEG7nmbZk2rIk44iv0qNYMTIOseT/n+DuEj0iQm2IWnr9NIW0kMbhqM7+K541PkQAWuq57+btHANVrEA+6QJpprOBJDTgt8k35EImN+B3iCnJ6DAKNYfyyfidftHub+HffclVOL4MIWvwZW6tyPQrDxjBz1Htf0UhBcAXJQR+8AFrsrZQXuKCqdiykZXDX92aPJJeXdUE3swWqn1p4rjlJZGKySVWwLXI0eK/jeQQ4gf4ZO98PTP2ygHuwfDJGfXnL8cXkLTV06Vc7gE0b6SmgDNLlSDUg9VQkgBBVOrxTscK/nsYLt7fO6+ZmXlprSZ7kBjeedAo3r3BwxzY114AvBDuuQ96TmTQEioRJLLyTG5J7o93RXUIk9VzCyYunDC3SVevqFz0gq8RfjIvXzOxeX/wmmbgKxMu4mnd25883sVdsvJdWHG26w+S62GA9jiX07EMZ6w62VnxKmEXsbg5sGXUTMEwW8Uk5DHc8wPRNpiDf6bUNLxvkL6EGoxJnHWJmRwPuEKA3VS7f/J9nRniSib8s+nCJfC4LyaHOptiKxlgL4vh0gd4SaxnFLYlxDJi6eTtUu4BjTpiJfYVwh8/jRLNPZC6/RTnJRqlAlIWg9O17HQyBi+fSFLrkMcTUI9Kyg6XYLlNG0GvKH8u9mLHw75HEf8uqA7LclTaRo8lIRJxNGXYUZtEwSBDR+AZPV/1k5NZc+499iUN0PXDacKmwSWJnjYziOF83BSp/yASfA4PilifxWy6jZWSepga2eEGwUKe9czStcDoSjx24di75NTRiW+J8o5D8o7HTaQnAkDSVxJanhJ5OdRmLujLvtY3oulRj7IinBPiW2OPlqcQ2U2sBeVskNmGw10KaggqyTEAkaGEZzMs3mBCuxQ/kLQslYsyZUM2SW4H7p0+NsHuir4oGxpf0PxPmkYVeX3C44VqS/IByIr86uN2eHoFTSj9WBrqFiQGeZ/PujLK/3iY1yUbbsJCcxzVd1+pd/v+Q61B4LJFE1KVpKMHo5Zr4VG7PnO5896SfAH/qxNz8xR05bsE/memBAfZEmOmezUhU6GTxFz/KA3N5hi3TPX0bCMCcHnN6p04J3cNKKtK29iI9Mvq9lRHIrNC+pgnIEfHqS5xYcbA6H/4l3aOIHhBCBlGzfyO0FruBgY/AzNCmT7wea4saOuM3w+PMzk5vTA5vs= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230037)(36860700010)(376011)(7416011)(1800799021)(82310400023);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jun 2024 09:01:06.9738 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 00028aba-4365-41da-ba50-08dc8eac0645 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FC0.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4367 The gsi of a passthrough device must be configured for it to be able to be mapped into a hvm domU. But When dom0 is PVH, the gsis don't get registered, it causes the info of apic, pin and irq not be added into irq_2_pin list, and the handler of irq_desc is not set, then when passthrough a device, setting ioapic affinity and vector will fail. To fix above problem, on Linux kernel side, a new code will need to call PHYSDEVOP_setup_gsi for passthrough devices to register gsi when dom0 is PVH. So, add PHYSDEVOP_setup_gsi into hvm_physdev_op for above purpose. Signed-off-by: Jiqian Chen Signed-off-by: Huang Rui Signed-off-by: Jiqian Chen --- The code link that will call this hypercall on linux kernel side is as follows: https://lore.kernel.org/xen-devel/20240607075109.126277-3-Jiqian.Chen@amd.com/ --- xen/arch/x86/hvm/hypercall.c | 1 + 1 file changed, 1 insertion(+) diff --git a/xen/arch/x86/hvm/hypercall.c b/xen/arch/x86/hvm/hypercall.c index 03ada3c880bd..cfe82d0f96ed 100644 --- a/xen/arch/x86/hvm/hypercall.c +++ b/xen/arch/x86/hvm/hypercall.c @@ -86,6 +86,7 @@ long hvm_physdev_op(int cmd, XEN_GUEST_HANDLE_PARAM(void) arg) return -ENOSYS; break; + case PHYSDEVOP_setup_gsi: case PHYSDEVOP_pci_mmcfg_reserved: case PHYSDEVOP_pci_device_add: case PHYSDEVOP_pci_device_remove: From patchwork Mon Jun 17 09:00:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chen, Jiqian" X-Patchwork-Id: 13700341 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7C860C27C6E for ; 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Smith" , Stewart Hildebrand , Huang Rui , Jiqian Chen , Huang Rui Subject: [XEN PATCH v10 4/5] tools: Add new function to get gsi from dev Date: Mon, 17 Jun 2024 17:00:34 +0800 Message-ID: <20240617090035.839640-5-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240617090035.839640-1-Jiqian.Chen@amd.com> References: <20240617090035.839640-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBB:EE_|PH7PR12MB9151:EE_ X-MS-Office365-Filtering-Correlation-Id: 2ec7969c-ea83-48c8-e2fe-08dc8eac08aa X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230037|7416011|36860700010|376011|1800799021|82310400023; X-Microsoft-Antispam-Message-Info: OmEa7K1oE+a0C8ZBPzcMAzGV2n54AbTgYjjgSV69MV5FScvnebwT44K3bBugqKSGeVx/+ZqxIKfSCTFSv4f5l8a2su+XB9E7tGp2apWlMMTmgsWCBOuHVR3VtXl2phSLJmABf6PCnZQCthWwzoPyllhlxYGshEQ5qN6J6BSOu6ATLvHyi1djAu+DuNXNfJ/5IyXuCjYVn+R/KjbW5v4V1GrfjE4Dmm0ygMz3KQMcwz8NT419w4HLTJTwabsKpSsfQuG83BBJCe7m3AxwwnnacxHqdDQLJKmBP9CgGNxGZYEVRpokbQE/uByXpLMn93am0nqYEq1T9Rea4Wq3pbH4LD8QG328cDTTnq6Yzpp9+nUSAP9ayGxqK8aC/FXSRIaAW5WlPi/rvRauQdbrt3V1+xbRSAuGTN33emt8Hr64xFbqFZ87uAXg05Ve6BUfOk39uexKwZ7pITKHoTynDcqquffA2Ven6jxYrMg/1UwWyldvkw6JcbDmTH0qW6rdTqDUFHHdi7ROYq5ZBOdBRrz8sSlJxuU/7v8akwX30hbxoVMD1Ty4CSmQ1GO+flrmnLQlqhr83dGwLXmZvXd2CNie58aFvppQ54YGFjsNuKqFv4IB6ImOqrFcEN0E6UBYuiQ++E7oyEo3pBk49Cu52KtEciNVz3BMAMJN3DcxdOA0j0MV8WSu3eEp3CjShb4OUw+TAnUVoQmL02YoXfKFRosq9ARWYMk3RB8O/zROlmr1qN4NTiZqZtclHv3/Tn7/aQqQmWRruu0UmmzcrGg+FsHXf7Uq6VyfiBDW1ffN5/RRoVRQ8AzFBxQD1ljUhu3NczKdPcn8kIrxCdT5bx6fhpJ+ecusVTQ+bFthxmgOi0vA9T3OjXTLU2y2LjPp+Cksx2BbAzuAet2vbLvnz9Xb+Eh9kM/jYwttetZJXUeAbMPypK1e7EsYide0o8+SUZsgQ5YSI/RNKoz8cB8IxhcIPtBrtzoh7q8rSD1CXjzTsurg492iPpi8eZf7vhyeT7UUUVqTV0ZEDTmcrzqeezyjs0UPCMkW49jB6ztOid1nmLo4H6OuEbkC/pY+dP4SX1d5xTb/5JYix/brtYwqBBfcyjYSBW9BRWU0Qw5+4Ou5QKIbHez4H4yKTpqHkotURZIH2Wsfqe42I+ch0iJ7l9NQQlC9zwOVmPdKVWq6Pu9RaOF4ntS4zEVZ6bu9KM+gSTb7ReAsxTYx8z+lX48p/lMo3UGYsn5TOlIrLH1STagV5mkDObb2LrILnus2fAAFUdDQ5bCvPr4wLPK4bHpYr0FwR0VIDkSYXIooyMBKMB6YVMahqsDB5BgWNWHdbV3eK6EtZiYPR6V7ApfqPO86AkmUB4CIAdWW2ZAaEmfYnaQ0qvAQMRZtVpVQulSGXOPBhQFozruXlmTh7r6UVs/1Ikijryjm0A== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230037)(7416011)(36860700010)(376011)(1800799021)(82310400023);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jun 2024 09:01:10.9922 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2ec7969c-ea83-48c8-e2fe-08dc8eac08aa X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBB.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB9151 In PVH dom0, it uses the linux local interrupt mechanism, when it allocs irq for a gsi, it is dynamic, and follow the principle of applying first, distributing first. And irq number is alloced from small to large, but the applying gsi number is not, may gsi 38 comes before gsi 28, that causes the irq number is not equal with the gsi number. And when passthrough a device, QEMU will use its gsi number to do pirq mapping, see xen_pt_realize->xc_physdev_map_pirq, but the gsi number is got from file /sys/bus/pci/devices//irq, so it will fail when mapping. And in current codes, there is no method to get gsi for userspace. For above purpose, add new function to get gsi. And call this function before xc_physdev_(un)map_pirq Signed-off-by: Jiqian Chen Signed-off-by: Huang Rui Signed-off-by: Chen Jiqian --- RFC: it needs review and needs to wait for the corresponding third patch on linux kernel side to be merged. --- tools/include/xen-sys/Linux/privcmd.h | 7 +++++ tools/include/xencall.h | 2 ++ tools/include/xenctrl.h | 2 ++ tools/libs/call/core.c | 5 ++++ tools/libs/call/libxencall.map | 2 ++ tools/libs/call/linux.c | 15 +++++++++++ tools/libs/call/private.h | 9 +++++++ tools/libs/ctrl/xc_physdev.c | 4 +++ tools/libs/light/Makefile | 2 +- tools/libs/light/libxl_pci.c | 38 +++++++++++++++++++++++++++ 10 files changed, 85 insertions(+), 1 deletion(-) diff --git a/tools/include/xen-sys/Linux/privcmd.h b/tools/include/xen-sys/Linux/privcmd.h index bc60e8fd55eb..977f1a058797 100644 --- a/tools/include/xen-sys/Linux/privcmd.h +++ b/tools/include/xen-sys/Linux/privcmd.h @@ -95,6 +95,11 @@ typedef struct privcmd_mmap_resource { __u64 addr; } privcmd_mmap_resource_t; +typedef struct privcmd_gsi_from_dev { + __u32 sbdf; + int gsi; +} privcmd_gsi_from_dev_t; + /* * @cmd: IOCTL_PRIVCMD_HYPERCALL * @arg: &privcmd_hypercall_t @@ -114,6 +119,8 @@ typedef struct privcmd_mmap_resource { _IOC(_IOC_NONE, 'P', 6, sizeof(domid_t)) #define IOCTL_PRIVCMD_MMAP_RESOURCE \ _IOC(_IOC_NONE, 'P', 7, sizeof(privcmd_mmap_resource_t)) +#define IOCTL_PRIVCMD_GSI_FROM_DEV \ + _IOC(_IOC_NONE, 'P', 10, sizeof(privcmd_gsi_from_dev_t)) #define IOCTL_PRIVCMD_UNIMPLEMENTED \ _IOC(_IOC_NONE, 'P', 0xFF, 0) diff --git a/tools/include/xencall.h b/tools/include/xencall.h index fc95ed0fe58e..750aab070323 100644 --- a/tools/include/xencall.h +++ b/tools/include/xencall.h @@ -113,6 +113,8 @@ int xencall5(xencall_handle *xcall, unsigned int op, uint64_t arg1, uint64_t arg2, uint64_t arg3, uint64_t arg4, uint64_t arg5); +int xen_oscall_gsi_from_dev(xencall_handle *xcall, unsigned int sbdf); + /* Variant(s) of the above, as needed, returning "long" instead of "int". */ long xencall2L(xencall_handle *xcall, unsigned int op, uint64_t arg1, uint64_t arg2); diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index 9ceca0cffc2f..a0381f74d24b 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -1641,6 +1641,8 @@ int xc_physdev_unmap_pirq(xc_interface *xch, uint32_t domid, int pirq); +int xc_physdev_gsi_from_dev(xc_interface *xch, uint32_t sbdf); + /* * LOGGING AND ERROR REPORTING */ diff --git a/tools/libs/call/core.c b/tools/libs/call/core.c index 02c4f8e1aefa..6dae50c9a6ba 100644 --- a/tools/libs/call/core.c +++ b/tools/libs/call/core.c @@ -173,6 +173,11 @@ int xencall5(xencall_handle *xcall, unsigned int op, return osdep_hypercall(xcall, &call); } +int xen_oscall_gsi_from_dev(xencall_handle *xcall, unsigned int sbdf) +{ + return osdep_oscall(xcall, sbdf); +} + /* * Local variables: * mode: C diff --git a/tools/libs/call/libxencall.map b/tools/libs/call/libxencall.map index d18a3174e9dc..b92a0b5dc12c 100644 --- a/tools/libs/call/libxencall.map +++ b/tools/libs/call/libxencall.map @@ -10,6 +10,8 @@ VERS_1.0 { xencall4; xencall5; + xen_oscall_gsi_from_dev; + xencall_alloc_buffer; xencall_free_buffer; xencall_alloc_buffer_pages; diff --git a/tools/libs/call/linux.c b/tools/libs/call/linux.c index 6d588e6bea8f..92c740e176f2 100644 --- a/tools/libs/call/linux.c +++ b/tools/libs/call/linux.c @@ -85,6 +85,21 @@ long osdep_hypercall(xencall_handle *xcall, privcmd_hypercall_t *hypercall) return ioctl(xcall->fd, IOCTL_PRIVCMD_HYPERCALL, hypercall); } +int osdep_oscall(xencall_handle *xcall, unsigned int sbdf) +{ + privcmd_gsi_from_dev_t dev_gsi = { + .sbdf = sbdf, + .gsi = -1, + }; + + if (ioctl(xcall->fd, IOCTL_PRIVCMD_GSI_FROM_DEV, &dev_gsi)) { + PERROR("failed to get gsi from dev"); + return -1; + } + + return dev_gsi.gsi; +} + static void *alloc_pages_bufdev(xencall_handle *xcall, size_t npages) { void *p; diff --git a/tools/libs/call/private.h b/tools/libs/call/private.h index 9c3aa432efe2..cd6eb5a3e66f 100644 --- a/tools/libs/call/private.h +++ b/tools/libs/call/private.h @@ -57,6 +57,15 @@ int osdep_xencall_close(xencall_handle *xcall); long osdep_hypercall(xencall_handle *xcall, privcmd_hypercall_t *hypercall); +#if defined(__linux__) +int osdep_oscall(xencall_handle *xcall, unsigned int sbdf); +#else +static inline int osdep_oscall(xencall_handle *xcall, unsigned int sbdf) +{ + return -1; +} +#endif + void *osdep_alloc_pages(xencall_handle *xcall, size_t nr_pages); void osdep_free_pages(xencall_handle *xcall, void *p, size_t nr_pages); diff --git a/tools/libs/ctrl/xc_physdev.c b/tools/libs/ctrl/xc_physdev.c index 460a8e779ce8..c1458f3a38b5 100644 --- a/tools/libs/ctrl/xc_physdev.c +++ b/tools/libs/ctrl/xc_physdev.c @@ -111,3 +111,7 @@ int xc_physdev_unmap_pirq(xc_interface *xch, return rc; } +int xc_physdev_gsi_from_dev(xc_interface *xch, uint32_t sbdf) +{ + return xen_oscall_gsi_from_dev(xch->xcall, sbdf); +} diff --git a/tools/libs/light/Makefile b/tools/libs/light/Makefile index 37e4d1670986..6b616d5ee9b6 100644 --- a/tools/libs/light/Makefile +++ b/tools/libs/light/Makefile @@ -40,7 +40,7 @@ OBJS-$(CONFIG_X86) += $(ACPI_OBJS) CFLAGS += -Wno-format-zero-length -Wmissing-declarations -Wformat-nonliteral -CFLAGS-$(CONFIG_X86) += -DCONFIG_PCI_SUPP_LEGACY_IRQ +CFLAGS-$(CONFIG_X86) += -DCONFIG_PCI_SUPP_LEGACY_IRQ -DCONFIG_X86 OBJS-$(CONFIG_X86) += libxl_cpuid.o OBJS-$(CONFIG_X86) += libxl_x86.o diff --git a/tools/libs/light/libxl_pci.c b/tools/libs/light/libxl_pci.c index 96cb4da0794e..376f91759ac6 100644 --- a/tools/libs/light/libxl_pci.c +++ b/tools/libs/light/libxl_pci.c @@ -1406,6 +1406,12 @@ static bool pci_supp_legacy_irq(void) #endif } +#define PCI_DEVID(bus, devfn)\ + ((((uint16_t)(bus)) << 8) | ((devfn) & 0xff)) + +#define PCI_SBDF(seg, bus, devfn) \ + ((((uint32_t)(seg)) << 16) | (PCI_DEVID(bus, devfn))) + static void pci_add_dm_done(libxl__egc *egc, pci_add_state *pas, int rc) @@ -1418,6 +1424,10 @@ static void pci_add_dm_done(libxl__egc *egc, unsigned long long start, end, flags, size; int irq, i; int r; +#ifdef CONFIG_X86 + int gsi; + uint32_t sbdf; +#endif uint32_t flag = XEN_DOMCTL_DEV_RDM_RELAXED; uint32_t domainid = domid; bool isstubdom = libxl_is_stubdom(ctx, domid, &domainid); @@ -1486,6 +1496,18 @@ static void pci_add_dm_done(libxl__egc *egc, goto out_no_irq; } if ((fscanf(f, "%u", &irq) == 1) && irq) { +#ifdef CONFIG_X86 + sbdf = PCI_SBDF(pci->domain, pci->bus, + (PCI_DEVFN(pci->dev, pci->func))); + gsi = xc_physdev_gsi_from_dev(ctx->xch, sbdf); + /* + * Old kernel version may not support this function, + * so if fail, keep using irq; if success, use gsi + */ + if (gsi > 0) { + irq = gsi; + } +#endif r = xc_physdev_map_pirq(ctx->xch, domid, irq, &irq); if (r < 0) { LOGED(ERROR, domainid, "xc_physdev_map_pirq irq=%d (error=%d)", @@ -2172,6 +2194,10 @@ static void pci_remove_detached(libxl__egc *egc, int irq = 0, i, stubdomid = 0; const char *sysfs_path; FILE *f; +#ifdef CONFIG_X86 + int gsi; + uint32_t sbdf; +#endif uint32_t domainid = prs->domid; bool isstubdom; @@ -2239,6 +2265,18 @@ skip_bar: } if ((fscanf(f, "%u", &irq) == 1) && irq) { +#ifdef CONFIG_X86 + sbdf = PCI_SBDF(pci->domain, pci->bus, + (PCI_DEVFN(pci->dev, pci->func))); + gsi = xc_physdev_gsi_from_dev(ctx->xch, sbdf); + /* + * Old kernel version may not support this function, + * so if fail, keep using irq; if success, use gsi + */ + if (gsi > 0) { + irq = gsi; + } +#endif rc = xc_physdev_unmap_pirq(ctx->xch, domid, irq); if (rc < 0) { /* From patchwork Mon Jun 17 09:00:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chen, Jiqian" X-Patchwork-Id: 13700342 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9B7BCC27C7B for ; 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Smith" , Stewart Hildebrand , Huang Rui , Jiqian Chen , Huang Rui Subject: [XEN PATCH v10 5/5] domctl: Add XEN_DOMCTL_gsi_permission to grant gsi Date: Mon, 17 Jun 2024 17:00:35 +0800 Message-ID: <20240617090035.839640-6-Jiqian.Chen@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240617090035.839640-1-Jiqian.Chen@amd.com> References: <20240617090035.839640-1-Jiqian.Chen@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF00004FBA:EE_|CYXPR12MB9340:EE_ X-MS-Office365-Filtering-Correlation-Id: 8e0900f9-64c4-477d-3f97-08dc8eac0ae3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230037|7416011|36860700010|376011|1800799021|82310400023; X-Microsoft-Antispam-Message-Info: zmPodllpddXMtcnY1eQBUvNL4HLh8u/sf8xOvetHb510YsQBSscZqopC7LvZY8dT0On8ZOmnX3Az28z9YmYfAgY4v0cUQC3ekoS+oKVQjAuWwY6GVwBzqoGD/uH51qigA2GuWWe17ZrBvYbXjVH/XTQfQnMWwk0WHAwHFItm6vDzfER1K6qxQ8b434JuD5WGuChOi1CFGJfKqF2fIOQiuVvDw1TvWQaQPjppAPwjlY8q56lEpXFVUKnGwof8tIDUlEzxBLfm1V3J1J4W0sizhmssYh5kZ50TQgrL3gcGE7YBwehSMbiLUWtWtP7dYl+kre610d5q7sRN1kB2Ip4jEbagd0lu4Z03l92jnMHaHa6NVax93DlKVhuYJ96uImm6gLuwzwlHoA0Ct2lUW0eOW5lDEYmLh3adLGDSp5OidkeAvuWjGgjjpnJq6rW1HW5urtXCNlq4dlLX3V/CCBfqri4yVKasuSCPrS8unTelNONJCSqjPX4quR9WoAs6o3Vk9+ppwFhcfFKIacnaPB+WsFBmIzVIQu/utFxUWnyhvrUI04GsTxuXwFZnFzlBOMVqmcg44gcQO2kogVNhGYCCHu8bShlDcGukqpvlSEuVNlj3wf06IDpRxbz6i6e5aVCS3lNZjuyvCU96/9eaVHHItCNxBvptY408WEP7H9klXErH5dSGS71l5pMgWBxSayFAU1SSY5CwZuCNxNKseA6Er8cNbaI4PTl1f1Vnx2jxPme0mE1Ivq38bIUVSMXnGSGfMJSbxI2pQqDSEbuUlHGFU3NORh9JKhY28edkEtDnuqKNn0L9K3RQFo9zwFpxzlM9P+CqF+09AkkxZrPzEzUyK7zOd74sZkKHzz61+yBQw0VKzjapisJUcP7+YYJTtKeQKi8ufIds24s3zvNETdTNkyJy9H1BM4xZ00DWnTZK+JFT33PtmvPK7lZswxbD31OAeVzU03LgVOJe2s+35apFiFv9jQgu+icWUUDpRIXG6Ave0HSlUpatCCUCZTwdF//f50w1KoZgTMsnUZM1+klpg1YPad0LJko0r22GRSVn+NNdzk/v/5kl0rhAN7OKQ5JX4l9kSWJGDVeqF0xkcG226QB8xhaMSLo5rB1PYLkNB1mfWjuA1zeCMR3GtkUdN6KDyXpR5xAJtSuuTzYwsfzf+J3v+BfcRP8G1c5zYYODnCBZmrlfCopIL46w2rXSu+nqkw/D/tJ2zcZ3vBS67nrP7GG+ky2zEZ/XSF8xUzHpKu1F9euCkF8d5QGBgD51BpgortdJKKlU/1LZvEtGpn2XFgxeaUvddvS4gHAD1TTIJo2tLvzdjE5Dbg1eQWfsh9whyNWTR8ds9IT+4XlhaPkZPCjHBiGlO3Q0tn6OvhvaiAXP7Nd5ZfKLdFfQqWWyOt5lxF/DKoJnmG+QUrRz5bJtng== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230037)(7416011)(36860700010)(376011)(1800799021)(82310400023);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Jun 2024 09:01:14.7170 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8e0900f9-64c4-477d-3f97-08dc8eac0ae3 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF00004FBA.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYXPR12MB9340 Some type of domain don't have PIRQs, like PVH, it doesn't do PHYSDEVOP_map_pirq for each gsi. When passthrough a device to guest base on PVH dom0, callstack pci_add_dm_done->XEN_DOMCTL_irq_permission will fail at function domain_pirq_to_irq, because PVH has no mapping of gsi, pirq and irq on Xen side. What's more, current hypercall XEN_DOMCTL_irq_permission requires passing in pirq, it is not suitable for dom0 that doesn't have PIRQs. So, add a new hypercall XEN_DOMCTL_gsi_permission to grant the permission of irq(translate from gsi) to dumU when dom0 has no PIRQs. Signed-off-by: Jiqian Chen Signed-off-by: Huang Rui Signed-off-by: Jiqian Chen --- RFC: it needs review and needs to wait for the corresponding third patch on linux kernel side to be merged. --- tools/include/xenctrl.h | 5 +++ tools/libs/ctrl/xc_domain.c | 15 +++++++ tools/libs/light/libxl_pci.c | 67 +++++++++++++++++++++++++++--- xen/arch/x86/domctl.c | 43 +++++++++++++++++++ xen/arch/x86/include/asm/io_apic.h | 2 + xen/arch/x86/io_apic.c | 17 ++++++++ xen/arch/x86/mpparse.c | 3 +- xen/include/public/domctl.h | 8 ++++ xen/xsm/flask/hooks.c | 1 + 9 files changed, 153 insertions(+), 8 deletions(-) diff --git a/tools/include/xenctrl.h b/tools/include/xenctrl.h index a0381f74d24b..f3feb6848e25 100644 --- a/tools/include/xenctrl.h +++ b/tools/include/xenctrl.h @@ -1382,6 +1382,11 @@ int xc_domain_irq_permission(xc_interface *xch, uint32_t pirq, bool allow_access); +int xc_domain_gsi_permission(xc_interface *xch, + uint32_t domid, + uint32_t gsi, + bool allow_access); + int xc_domain_iomem_permission(xc_interface *xch, uint32_t domid, unsigned long first_mfn, diff --git a/tools/libs/ctrl/xc_domain.c b/tools/libs/ctrl/xc_domain.c index f2d9d14b4d9f..8540e84fda93 100644 --- a/tools/libs/ctrl/xc_domain.c +++ b/tools/libs/ctrl/xc_domain.c @@ -1394,6 +1394,21 @@ int xc_domain_irq_permission(xc_interface *xch, return do_domctl(xch, &domctl); } +int xc_domain_gsi_permission(xc_interface *xch, + uint32_t domid, + uint32_t gsi, + bool allow_access) +{ + struct xen_domctl domctl = { + .cmd = XEN_DOMCTL_gsi_permission, + .domain = domid, + .u.gsi_permission.gsi = gsi, + .u.gsi_permission.allow_access = allow_access, + }; + + return do_domctl(xch, &domctl); +} + int xc_domain_iomem_permission(xc_interface *xch, uint32_t domid, unsigned long first_mfn, diff --git a/tools/libs/light/libxl_pci.c b/tools/libs/light/libxl_pci.c index 376f91759ac6..f027f22c0028 100644 --- a/tools/libs/light/libxl_pci.c +++ b/tools/libs/light/libxl_pci.c @@ -1431,6 +1431,9 @@ static void pci_add_dm_done(libxl__egc *egc, uint32_t flag = XEN_DOMCTL_DEV_RDM_RELAXED; uint32_t domainid = domid; bool isstubdom = libxl_is_stubdom(ctx, domid, &domainid); +#ifdef CONFIG_X86 + xc_domaininfo_t info; +#endif /* Convenience aliases */ bool starting = pas->starting; @@ -1516,14 +1519,39 @@ static void pci_add_dm_done(libxl__egc *egc, rc = ERROR_FAIL; goto out; } - r = xc_domain_irq_permission(ctx->xch, domid, irq, 1); +#ifdef CONFIG_X86 + /* If dom0 doesn't have PIRQs, need to use xc_domain_gsi_permission */ + r = xc_domain_getinfo_single(ctx->xch, 0, &info); if (r < 0) { - LOGED(ERROR, domainid, - "xc_domain_irq_permission irq=%d (error=%d)", irq, r); + LOGED(ERROR, domainid, "getdomaininfo failed (error=%d)", errno); fclose(f); rc = ERROR_FAIL; goto out; } + if (info.flags & XEN_DOMINF_hvm_guest && + !(info.arch_config.emulation_flags & XEN_X86_EMU_USE_PIRQ) && + gsi > 0) { + r = xc_domain_gsi_permission(ctx->xch, domid, gsi, 1); + if (r < 0) { + LOGED(ERROR, domainid, + "xc_domain_gsi_permission gsi=%d (error=%d)", gsi, errno); + fclose(f); + rc = ERROR_FAIL; + goto out; + } + } + else +#endif + { + r = xc_domain_irq_permission(ctx->xch, domid, irq, 1); + if (r < 0) { + LOGED(ERROR, domainid, + "xc_domain_irq_permission irq=%d (error=%d)", irq, errno); + fclose(f); + rc = ERROR_FAIL; + goto out; + } + } } fclose(f); @@ -2200,6 +2228,10 @@ static void pci_remove_detached(libxl__egc *egc, #endif uint32_t domainid = prs->domid; bool isstubdom; +#ifdef CONFIG_X86 + int r; + xc_domaininfo_t info; +#endif /* Convenience aliases */ libxl_device_pci *const pci = &prs->pci; @@ -2287,9 +2319,32 @@ skip_bar: */ LOGED(ERROR, domid, "xc_physdev_unmap_pirq irq=%d", irq); } - rc = xc_domain_irq_permission(ctx->xch, domid, irq, 0); - if (rc < 0) { - LOGED(ERROR, domid, "xc_domain_irq_permission irq=%d", irq); +#ifdef CONFIG_X86 + /* If dom0 doesn't have PIRQs, need to use xc_domain_gsi_permission */ + r = xc_domain_getinfo_single(ctx->xch, 0, &info); + if (r < 0) { + LOGED(ERROR, domid, "getdomaininfo failed (error=%d)", errno); + fclose(f); + rc = ERROR_FAIL; + goto skip_legacy_irq; + } + if (info.flags & XEN_DOMINF_hvm_guest && + !(info.arch_config.emulation_flags & XEN_X86_EMU_USE_PIRQ) && + gsi > 0) { + r = xc_domain_gsi_permission(ctx->xch, domid, gsi, 0); + if (r < 0) { + LOGED(ERROR, domid, + "xc_domain_gsi_permission gsi=%d (error=%d)", gsi, errno); + rc = ERROR_FAIL; + } + } + else +#endif + { + rc = xc_domain_irq_permission(ctx->xch, domid, irq, 0); + if (rc < 0) { + LOGED(ERROR, domid, "xc_domain_irq_permission irq=%d", irq); + } } } diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c index 335aedf46d03..6b465bbc6ec0 100644 --- a/xen/arch/x86/domctl.c +++ b/xen/arch/x86/domctl.c @@ -36,6 +36,7 @@ #include #include #include +#include static int update_domain_cpu_policy(struct domain *d, xen_domctl_cpu_policy_t *xdpc) @@ -237,6 +238,48 @@ long arch_do_domctl( break; } + case XEN_DOMCTL_gsi_permission: + { + unsigned int gsi = domctl->u.gsi_permission.gsi; + int irq; + bool allow = domctl->u.gsi_permission.allow_access; + + /* Check all pads are zero */ + ret = -EINVAL; + for ( i = 0; + i < sizeof(domctl->u.gsi_permission.pad) / + sizeof(domctl->u.gsi_permission.pad[0]); + ++i ) + if ( domctl->u.gsi_permission.pad[i] ) + goto out; + + /* + * If current domain is PV or it has PIRQ flag, it has a mapping + * of gsi, pirq and irq, so it should use XEN_DOMCTL_irq_permission + * to grant irq permission. + */ + ret = -EOPNOTSUPP; + if ( is_pv_domain(currd) || has_pirq(currd) ) + goto out; + + ret = -EINVAL; + if ( gsi >= nr_irqs_gsi || (irq = gsi_2_irq(gsi)) < 0 ) + goto out; + + ret = -EPERM; + if ( !irq_access_permitted(currd, irq) || + xsm_irq_permission(XSM_HOOK, d, irq, allow) ) + goto out; + + if ( allow ) + ret = irq_permit_access(d, irq); + else + ret = irq_deny_access(d, irq); + + out: + break; + } + case XEN_DOMCTL_getpageframeinfo3: { unsigned int num = domctl->u.getpageframeinfo3.num; diff --git a/xen/arch/x86/include/asm/io_apic.h b/xen/arch/x86/include/asm/io_apic.h index 78268ea8f666..7e86d8337758 100644 --- a/xen/arch/x86/include/asm/io_apic.h +++ b/xen/arch/x86/include/asm/io_apic.h @@ -213,5 +213,7 @@ unsigned highest_gsi(void); int ioapic_guest_read( unsigned long physbase, unsigned int reg, u32 *pval); int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val); +int mp_find_ioapic(int gsi); +int gsi_2_irq(int gsi); #endif diff --git a/xen/arch/x86/io_apic.c b/xen/arch/x86/io_apic.c index b48a64246548..23845c8cb11f 100644 --- a/xen/arch/x86/io_apic.c +++ b/xen/arch/x86/io_apic.c @@ -955,6 +955,23 @@ static int pin_2_irq(int idx, int apic, int pin) return irq; } +int gsi_2_irq(int gsi) +{ + int ioapic, pin, irq; + + ioapic = mp_find_ioapic(gsi); + if ( ioapic < 0 ) + return -EINVAL; + + pin = gsi - io_apic_gsi_base(ioapic); + + irq = apic_pin_2_gsi_irq(ioapic, pin); + if ( irq <= 0 ) + return -EINVAL; + + return irq; +} + static inline int IO_APIC_irq_trigger(int irq) { int apic, idx, pin; diff --git a/xen/arch/x86/mpparse.c b/xen/arch/x86/mpparse.c index d8ccab2449c6..c95da0de5770 100644 --- a/xen/arch/x86/mpparse.c +++ b/xen/arch/x86/mpparse.c @@ -841,8 +841,7 @@ static struct mp_ioapic_routing { } mp_ioapic_routing[MAX_IO_APICS]; -static int mp_find_ioapic ( - int gsi) +int mp_find_ioapic(int gsi) { unsigned int i; diff --git a/xen/include/public/domctl.h b/xen/include/public/domctl.h index 2a49fe46ce25..f7ae8b19d27d 100644 --- a/xen/include/public/domctl.h +++ b/xen/include/public/domctl.h @@ -464,6 +464,12 @@ struct xen_domctl_irq_permission { uint8_t pad[3]; }; +/* XEN_DOMCTL_gsi_permission */ +struct xen_domctl_gsi_permission { + uint32_t gsi; + uint8_t allow_access; /* flag to specify enable/disable of x86 gsi access */ + uint8_t pad[3]; +}; /* XEN_DOMCTL_iomem_permission */ struct xen_domctl_iomem_permission { @@ -1306,6 +1312,7 @@ struct xen_domctl { #define XEN_DOMCTL_get_paging_mempool_size 85 #define XEN_DOMCTL_set_paging_mempool_size 86 #define XEN_DOMCTL_dt_overlay 87 +#define XEN_DOMCTL_gsi_permission 88 #define XEN_DOMCTL_gdbsx_guestmemio 1000 #define XEN_DOMCTL_gdbsx_pausevcpu 1001 #define XEN_DOMCTL_gdbsx_unpausevcpu 1002 @@ -1328,6 +1335,7 @@ struct xen_domctl { struct xen_domctl_setdomainhandle setdomainhandle; struct xen_domctl_setdebugging setdebugging; struct xen_domctl_irq_permission irq_permission; + struct xen_domctl_gsi_permission gsi_permission; struct xen_domctl_iomem_permission iomem_permission; struct xen_domctl_ioport_permission ioport_permission; struct xen_domctl_hypercall_init hypercall_init; diff --git a/xen/xsm/flask/hooks.c b/xen/xsm/flask/hooks.c index 5e88c71b8e22..a5b134c91101 100644 --- a/xen/xsm/flask/hooks.c +++ b/xen/xsm/flask/hooks.c @@ -685,6 +685,7 @@ static int cf_check flask_domctl(struct domain *d, int cmd) case XEN_DOMCTL_shadow_op: case XEN_DOMCTL_ioport_permission: case XEN_DOMCTL_ioport_mapping: + case XEN_DOMCTL_gsi_permission: #endif #ifdef CONFIG_HAS_PASSTHROUGH /*