From patchwork Thu Jun 20 11:29:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705222 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 697C4C27C79 for ; Thu, 20 Jun 2024 11:32:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=4u4ck4og4C3G/sLyJhCTBCqGfu2N4ZjKc7rXSqAYYDs=; b=FUp1aWkga4I5Lfu+fWwzJYEOkY 8hf0QdIvT1MZTjvcFzoSaZvXhwIiANyAb58v2DVJj7ze5qv+BNmBuqxU1ih4ZTeGsdXrjBll0WWct yn/eRh7vHSDRQRIYX0uiRHsVVHblEN7K3d5z1LmsZADuC/LleX35uaorcXX9LZYxLEMri8bC2Xq1y xZRHr/BTWbIWbd0y1LZ5qJVhCF6+DVAA2qiEyhCjUyo4s/7dh79M7hwA/ScweL/AUwZb4xkbPeOZm bNMDqXTW51tDviMyD8LdL2J6zBA8vMS6loOP+BE054GBCHINdLjI0WH1w9cOMiWKXKL9i/5gKbJDx 6qaCT2lQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG1d-00000004lJc-3i6K; Thu, 20 Jun 2024 11:32:21 +0000 Received: from fout6-smtp.messagingengine.com ([103.168.172.149]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG1Y-00000004lGQ-0UcO for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:32:17 +0000 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailfout.nyi.internal (Postfix) with ESMTP id C331513804D3; Thu, 20 Jun 2024 07:32:14 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Thu, 20 Jun 2024 07:32:14 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883134; x= 1718969534; bh=4u4ck4og4C3G/sLyJhCTBCqGfu2N4ZjKc7rXSqAYYDs=; b=V c2mTBreVgaS6cDXCagBmFW979Ah73rkfbSvF3DLk4H1CfBdI6/QlJ2UOED9GXff8 D2zBAaEfxiZ2NggQtYdehoBTPXN8XWoWTQlPhY0NdniM8tvAtPOTkYp+RzWPJpDE 2vq8t0P0s1gRpcIfd9aHhYr+d/j9Z9kL/hKvuc6Kzie5LU6rbkPDSVnPNet+bcuz NpaEg+sFH1ZvGZcJpCj0OJsJ382R6jlZ7RBsb8XRCWY1s6UnVLNL+1gRyALcq3Zq Dg7vl1o87o3uoQVsTbVTywu6/sNOexkYVYXazSebWBoHxAU3cbIGeMYz3yR1l0qc +r6reBthc7fU9KWe0TlWg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883134; x= 1718969534; bh=4u4ck4og4C3G/sLyJhCTBCqGfu2N4ZjKc7rXSqAYYDs=; b=L zEhMBnshvQh1j2EqiSB3C1ryrTZyXkEf6bDPH3XC+64pS3XALmuE+5+WbJPXu2on PHjZeQ0qf3qpQWImfEvcx15NOudLAX6btkAoHXkxl67am9UgCcfE5dPRAN1aM9fW AIGjA6zHUDoLOTNOfW22PLoIC0fKyj7UQcKQzWM6TShc/mIc3DCW8SMELFPML7AH 25+jbamjNARU44IDJYxk5KV/kHNKSki8QvDSQK8MKxdrZb3q3H8YqT94fmUfnRRH qPsQKlenGw2XP3OPmnJsd7GUls8amNygClYnJl+xaJReUf4QnxM3W05+cI9XrZk7 /cSpgNLRJQGr0vDCCubQA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:32:09 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 01/23] drm: sun4i: de2/de3: Change CSC argument Date: Thu, 20 Jun 2024 23:29:39 +1200 Message-ID: <20240620113150.83466-2-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043216_268776_7BD18758 X-CRM114-Status: GOOD ( 14.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec Currently, CSC module takes care only for converting YUV to RGB. However, DE3 is more suited to work in YUV color space. Change CSC mode argument to format type to be more neutral. New argument only tells layer format type and doesn't imply output type. This commit doesn't make any functional change. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin Reviewed-by: Andre Przywara --- drivers/gpu/drm/sun4i/sun8i_csc.c | 22 +++++++++++----------- drivers/gpu/drm/sun4i/sun8i_csc.h | 10 +++++----- drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 16 ++++++++-------- 3 files changed, 24 insertions(+), 24 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c index 58480d8e4f704..6ebd1c3aa3ab5 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.c +++ b/drivers/gpu/drm/sun4i/sun8i_csc.c @@ -108,7 +108,7 @@ static const u32 yuv2rgb_de3[2][3][12] = { }; static void sun8i_csc_set_coefficients(struct regmap *map, u32 base, - enum sun8i_csc_mode mode, + enum format_type fmt_type, enum drm_color_encoding encoding, enum drm_color_range range) { @@ -118,12 +118,12 @@ static void sun8i_csc_set_coefficients(struct regmap *map, u32 base, table = yuv2rgb[range][encoding]; - switch (mode) { - case SUN8I_CSC_MODE_YUV2RGB: + switch (fmt_type) { + case FORMAT_TYPE_YUV: base_reg = SUN8I_CSC_COEFF(base, 0); regmap_bulk_write(map, base_reg, table, 12); break; - case SUN8I_CSC_MODE_YVU2RGB: + case FORMAT_TYPE_YVU: for (i = 0; i < 12; i++) { if ((i & 3) == 1) base_reg = SUN8I_CSC_COEFF(base, i + 1); @@ -141,7 +141,7 @@ static void sun8i_csc_set_coefficients(struct regmap *map, u32 base, } static void sun8i_de3_ccsc_set_coefficients(struct regmap *map, int layer, - enum sun8i_csc_mode mode, + enum format_type fmt_type, enum drm_color_encoding encoding, enum drm_color_range range) { @@ -151,12 +151,12 @@ static void sun8i_de3_ccsc_set_coefficients(struct regmap *map, int layer, table = yuv2rgb_de3[range][encoding]; - switch (mode) { - case SUN8I_CSC_MODE_YUV2RGB: + switch (fmt_type) { + case FORMAT_TYPE_YUV: addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, layer, 0); regmap_bulk_write(map, addr, table, 12); break; - case SUN8I_CSC_MODE_YVU2RGB: + case FORMAT_TYPE_YVU: for (i = 0; i < 12; i++) { if ((i & 3) == 1) addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, @@ -206,7 +206,7 @@ static void sun8i_de3_ccsc_enable(struct regmap *map, int layer, bool enable) } void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer, - enum sun8i_csc_mode mode, + enum format_type fmt_type, enum drm_color_encoding encoding, enum drm_color_range range) { @@ -214,14 +214,14 @@ void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer, if (mixer->cfg->is_de3) { sun8i_de3_ccsc_set_coefficients(mixer->engine.regs, layer, - mode, encoding, range); + fmt_type, encoding, range); return; } base = ccsc_base[mixer->cfg->ccsc][layer]; sun8i_csc_set_coefficients(mixer->engine.regs, base, - mode, encoding, range); + fmt_type, encoding, range); } void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.h b/drivers/gpu/drm/sun4i/sun8i_csc.h index 828b86fd0cabb..7322770f39f03 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.h +++ b/drivers/gpu/drm/sun4i/sun8i_csc.h @@ -22,14 +22,14 @@ struct sun8i_mixer; #define SUN8I_CSC_CTRL_EN BIT(0) -enum sun8i_csc_mode { - SUN8I_CSC_MODE_OFF, - SUN8I_CSC_MODE_YUV2RGB, - SUN8I_CSC_MODE_YVU2RGB, +enum format_type { + FORMAT_TYPE_RGB, + FORMAT_TYPE_YUV, + FORMAT_TYPE_YVU, }; void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer, - enum sun8i_csc_mode mode, + enum format_type fmt_type, enum drm_color_encoding encoding, enum drm_color_range range); void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable); diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index f9c0a56d3a148..76e2d3ec0a78c 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -242,19 +242,19 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, return 0; } -static u32 sun8i_vi_layer_get_csc_mode(const struct drm_format_info *format) +static u32 sun8i_vi_layer_get_format_type(const struct drm_format_info *format) { if (!format->is_yuv) - return SUN8I_CSC_MODE_OFF; + return FORMAT_TYPE_RGB; switch (format->format) { case DRM_FORMAT_YVU411: case DRM_FORMAT_YVU420: case DRM_FORMAT_YVU422: case DRM_FORMAT_YVU444: - return SUN8I_CSC_MODE_YVU2RGB; + return FORMAT_TYPE_YVU; default: - return SUN8I_CSC_MODE_YUV2RGB; + return FORMAT_TYPE_YUV; } } @@ -262,7 +262,7 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel, int overlay, struct drm_plane *plane) { struct drm_plane_state *state = plane->state; - u32 val, ch_base, csc_mode, hw_fmt; + u32 val, ch_base, fmt_type, hw_fmt; const struct drm_format_info *fmt; int ret; @@ -280,9 +280,9 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel, SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK, val); - csc_mode = sun8i_vi_layer_get_csc_mode(fmt); - if (csc_mode != SUN8I_CSC_MODE_OFF) { - sun8i_csc_set_ccsc_coefficients(mixer, channel, csc_mode, + fmt_type = sun8i_vi_layer_get_format_type(fmt); + if (fmt_type != FORMAT_TYPE_RGB) { + sun8i_csc_set_ccsc_coefficients(mixer, channel, fmt_type, state->color_encoding, state->color_range); sun8i_csc_enable_ccsc(mixer, channel, true); From patchwork Thu Jun 20 11:29:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705223 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 26447C27C79 for ; Thu, 20 Jun 2024 11:32:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=oCorl3qmSGKsy6vkckXLjG90/aRYhwkyp+JyaJ/Jtak=; b=HzHTuOo+WWPBkEFVYKH3er/8bZ lruv9W7/4psaC2aomfom0g1u66VgAhbt5o8kgnpOX1Ge06z7Zz1J9Npj5f9L5/JkASeqpVTEMd2uQ tmS8tPkOs1oEbQhNGhhqYK2k6/qBZJx1lTeZfKBp0at4F/KQ11p4ih3tOwz97FelXv7f0qxRchToU s0QZO86rIHSB8jOoI0uc5wnTuVPW1Ey238V9j1Z3fRu6diL6QnfmYmydD33LgXM3I80+XV8cHnRl7 EA+XjL29WogzW0YpIRJ3VjpEiyaNHTRoICbKRws+iRfqim5WtoYnxGQLydp5/am2NEazgNDRZuplM clM3Labw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG1n-00000004lOk-1Mea; Thu, 20 Jun 2024 11:32:31 +0000 Received: from fhigh3-smtp.messagingengine.com ([103.168.172.154]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG1d-00000004lJ3-0Nf9 for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:32:22 +0000 Received: from compute6.internal (compute6.nyi.internal [10.202.2.47]) by mailfhigh.nyi.internal (Postfix) with ESMTP id 7BD681140246; Thu, 20 Jun 2024 07:32:20 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute6.internal (MEProxy); Thu, 20 Jun 2024 07:32:20 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883140; x= 1718969540; bh=oCorl3qmSGKsy6vkckXLjG90/aRYhwkyp+JyaJ/Jtak=; b=g mZdmyX27ZghjCcDO5tV4P8ypFcnxudahPaNi1o9q83jMV6BJaO+X+7Qzgme/gePw hiXXYrqSqlUYi0kvB3YE71u5WMMKMrz0CTcB7hnZZfTZsPEvn+Hj1EBoeu3OGJXh 6+Vrw/LOMTHYToJWMMr9tLKs46DcB2ev1Epy+1on4bTUPlMVgU5DSlTT3LDXtkkt HPJVJIbmJt6cUcIKVusZA92zydhEwqICsmi/2/EdusgPgLXLTM+GDRJsyKgVXE8E 7Bk4wdNcwGjYOXN4fKf+D6IaGYlESC2Pky5Yu6lTIsc9HsFPVexMqCjdznhaCpaP bupXNNgQ57Bp0uhDXyaZw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883140; x= 1718969540; bh=oCorl3qmSGKsy6vkckXLjG90/aRYhwkyp+JyaJ/Jtak=; b=V GSlAROfoq9U/1fMif0G8a4o1pKelc3FwHgtI+Z84EMua0wTWVsxGF3lb/Ba8qpJe oeuBaiyG3+9BbW32anqboi4UcZmUNyMJal2mNCcjQ3glC6+5I31EHB8U4iUAXC7l 88ptojd+k6/YtY4E3vzldRwPoezEc19UF4wbomiWgx6s5yUueW5AMhxjRzKwGqYB Khvmspri8StZ04Ixjt478eqUUpiSQk4vr+9+iYLgzr42xxrw1N0fogtzE6joDqqG Cl9sseRGtDiwI2Z9MnLW7aIT5HMctRkLj5L/zH5PZW6i9pBHNHHoBfOPnFAmXoag e5eIG8ZZtgzYvjiaph3CA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:32:15 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 02/23] drm: sun4i: de2/de3: Merge CSC functions into one Date: Thu, 20 Jun 2024 23:29:40 +1200 Message-ID: <20240620113150.83466-3-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043221_238655_63D513CD X-CRM114-Status: GOOD ( 12.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec Merging both function into one lets this one decide on it's own if CSC should be enabled or not. Currently heuristics for that is pretty simple - enable it for YUV formats and disable for RGB. However, DE3 can have whole pipeline in RGB or YUV format. YUV pipeline will be supported in later commits. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_csc.c | 89 ++++++++++---------------- drivers/gpu/drm/sun4i/sun8i_csc.h | 9 ++- drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 11 +--- 3 files changed, 40 insertions(+), 69 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c index 6ebd1c3aa3ab5..0dcbc0866ae82 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.c +++ b/drivers/gpu/drm/sun4i/sun8i_csc.c @@ -107,23 +107,28 @@ static const u32 yuv2rgb_de3[2][3][12] = { }, }; -static void sun8i_csc_set_coefficients(struct regmap *map, u32 base, - enum format_type fmt_type, - enum drm_color_encoding encoding, - enum drm_color_range range) +static void sun8i_csc_setup(struct regmap *map, u32 base, + enum format_type fmt_type, + enum drm_color_encoding encoding, + enum drm_color_range range) { + u32 base_reg, val; const u32 *table; - u32 base_reg; int i; table = yuv2rgb[range][encoding]; switch (fmt_type) { + case FORMAT_TYPE_RGB: + val = 0; + break; case FORMAT_TYPE_YUV: + val = SUN8I_CSC_CTRL_EN; base_reg = SUN8I_CSC_COEFF(base, 0); regmap_bulk_write(map, base_reg, table, 12); break; case FORMAT_TYPE_YVU: + val = SUN8I_CSC_CTRL_EN; for (i = 0; i < 12; i++) { if ((i & 3) == 1) base_reg = SUN8I_CSC_COEFF(base, i + 1); @@ -135,28 +140,37 @@ static void sun8i_csc_set_coefficients(struct regmap *map, u32 base, } break; default: + val = 0; DRM_WARN("Wrong CSC mode specified.\n"); return; } + + regmap_write(map, SUN8I_CSC_CTRL(base), val); } -static void sun8i_de3_ccsc_set_coefficients(struct regmap *map, int layer, - enum format_type fmt_type, - enum drm_color_encoding encoding, - enum drm_color_range range) +static void sun8i_de3_ccsc_setup(struct regmap *map, int layer, + enum format_type fmt_type, + enum drm_color_encoding encoding, + enum drm_color_range range) { + u32 addr, val, mask; const u32 *table; - u32 addr; int i; + mask = SUN50I_MIXER_BLEND_CSC_CTL_EN(layer); table = yuv2rgb_de3[range][encoding]; switch (fmt_type) { + case FORMAT_TYPE_RGB: + val = 0; + break; case FORMAT_TYPE_YUV: + val = mask; addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, layer, 0); regmap_bulk_write(map, addr, table, 12); break; case FORMAT_TYPE_YVU: + val = mask; for (i = 0; i < 12; i++) { if ((i & 3) == 1) addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, @@ -173,67 +187,30 @@ static void sun8i_de3_ccsc_set_coefficients(struct regmap *map, int layer, } break; default: + val = 0; DRM_WARN("Wrong CSC mode specified.\n"); return; } -} - -static void sun8i_csc_enable(struct regmap *map, u32 base, bool enable) -{ - u32 val; - - if (enable) - val = SUN8I_CSC_CTRL_EN; - else - val = 0; - - regmap_update_bits(map, SUN8I_CSC_CTRL(base), SUN8I_CSC_CTRL_EN, val); -} - -static void sun8i_de3_ccsc_enable(struct regmap *map, int layer, bool enable) -{ - u32 val, mask; - - mask = SUN50I_MIXER_BLEND_CSC_CTL_EN(layer); - - if (enable) - val = mask; - else - val = 0; regmap_update_bits(map, SUN50I_MIXER_BLEND_CSC_CTL(DE3_BLD_BASE), mask, val); } -void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer, - enum format_type fmt_type, - enum drm_color_encoding encoding, - enum drm_color_range range) -{ - u32 base; - - if (mixer->cfg->is_de3) { - sun8i_de3_ccsc_set_coefficients(mixer->engine.regs, layer, - fmt_type, encoding, range); - return; - } - - base = ccsc_base[mixer->cfg->ccsc][layer]; - - sun8i_csc_set_coefficients(mixer->engine.regs, base, - fmt_type, encoding, range); -} - -void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable) +void sun8i_csc_set_ccsc(struct sun8i_mixer *mixer, int layer, + enum format_type fmt_type, + enum drm_color_encoding encoding, + enum drm_color_range range) { u32 base; if (mixer->cfg->is_de3) { - sun8i_de3_ccsc_enable(mixer->engine.regs, layer, enable); + sun8i_de3_ccsc_setup(mixer->engine.regs, layer, + fmt_type, encoding, range); return; } base = ccsc_base[mixer->cfg->ccsc][layer]; - sun8i_csc_enable(mixer->engine.regs, base, enable); + sun8i_csc_setup(mixer->engine.regs, base, + fmt_type, encoding, range); } diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.h b/drivers/gpu/drm/sun4i/sun8i_csc.h index 7322770f39f03..b7546e06e315c 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.h +++ b/drivers/gpu/drm/sun4i/sun8i_csc.h @@ -28,10 +28,9 @@ enum format_type { FORMAT_TYPE_YVU, }; -void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer, - enum format_type fmt_type, - enum drm_color_encoding encoding, - enum drm_color_range range); -void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable); +void sun8i_csc_set_ccsc(struct sun8i_mixer *mixer, int layer, + enum format_type fmt_type, + enum drm_color_encoding encoding, + enum drm_color_range range); #endif diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index 76e2d3ec0a78c..6ee3790a2a812 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -281,14 +281,9 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel, SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK, val); fmt_type = sun8i_vi_layer_get_format_type(fmt); - if (fmt_type != FORMAT_TYPE_RGB) { - sun8i_csc_set_ccsc_coefficients(mixer, channel, fmt_type, - state->color_encoding, - state->color_range); - sun8i_csc_enable_ccsc(mixer, channel, true); - } else { - sun8i_csc_enable_ccsc(mixer, channel, false); - } + sun8i_csc_set_ccsc(mixer, channel, fmt_type, + state->color_encoding, + state->color_range); if (!fmt->is_yuv) val = SUN8I_MIXER_CHAN_VI_LAYER_ATTR_RGB_MODE; From patchwork Thu Jun 20 11:29:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705224 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EEE15C2BA1A for ; Thu, 20 Jun 2024 11:32:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=o3qVQfKQ/XHL+ZVO+DX1YbTnMylMpiQelndBdWLa+sI=; b=nl062Titz7RwsZr+k2izkOFoAt EU63wGzPDQegQCZyrmYSaZ/SkNtCKAeY1cc0Ohq3YKJLjC3s8a59FtjWr1jt2r+Piy8JqV2WJlj8K R7pzZ2oQDgYW6R91c/kGVwogHCzKg4vDdXLwSm5J8SdgS/VJciDxS7k67wS2kUPatWyisiB6ytlhE t6pMfqs3+mh1HOS4Q86WlzQDbQUFSSXGRkxyQJql2HDdInTkYLTXhacvYdiM133oxLG1jUGTRt87x LLK7+v11sMklBZD30wagI/Ly2rhdNeUx2U2eltViZDV5WmaGKWhMfHisYEK53C0RSVEhPp+fe+SBI A9c2nXKw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG1o-00000004lPf-1YME; Thu, 20 Jun 2024 11:32:32 +0000 Received: from fout6-smtp.messagingengine.com ([103.168.172.149]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG1i-00000004lM3-36CZ for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:32:28 +0000 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailfout.nyi.internal (Postfix) with ESMTP id 23DA51380490; Thu, 20 Jun 2024 07:32:26 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute4.internal (MEProxy); Thu, 20 Jun 2024 07:32:26 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883146; x= 1718969546; bh=o3qVQfKQ/XHL+ZVO+DX1YbTnMylMpiQelndBdWLa+sI=; b=W SOBidXIthpA+MsH8Gdb2E5d0T0qN4hT0IBc+jJfFLZFzkFseUbEX0waA2m82/ErP c8UyFYRMfrsAJQM8E3in8xEU8EhXiJoso8L2Z84bNGQ3XkCChPXD2RPOumhQVe2k ISP3PTl7xeFG/yVjdEBkUW+hPjY6OjOAbJI1Vz4AMJAEio14kHbmDaBww71V1mIw LM4l9UYRXNPmngFdFceh+o4012RiP/rbyyx80BPwUyOFFUmoexGvsEhbGceEDDtY LE7mtpiGSoHVXrryqrEc+vPaBsArP77E43JICC5gw9vmc5ECoL2fdjScPVQrhteZ 6J/hYioxnswlyaGoMDovg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883146; x= 1718969546; bh=o3qVQfKQ/XHL+ZVO+DX1YbTnMylMpiQelndBdWLa+sI=; b=k nLp1JxGMTKD4PB5yThba4iTkC5a7Z9/BC08O+HdrZf0XAQLw2s9ZOlyiIjsKWXD2 CBjYdwzFX7xoQjUrCPVP8adTIxhHzc5/D+rbG5FDm/ptSEddTB7fGwsCYQIdk7OW /VOWMcxe02bV/hxjC1GOrdEjd87w5kpFbcHCmUBu6Y4E1DBcLztO3ZP36pCt9IaW GsV+i36Uf5TYKBd4ThynSSr+aAuDpdR70/Vv6OirTBJeEWtQeqMNiyjTHCbZN9iY yfWAeFQKg4MM/lAracVFZHyTtc8/ZI5agEqHsTYFI73eCnQKWOxHhNP5bnazFzhY HYyUZSx1b16kTvvLsh25w== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:32:20 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 03/23] drm: sun4i: de2/de3: call csc setup also for UI layer Date: Thu, 20 Jun 2024 23:29:41 +1200 Message-ID: <20240620113150.83466-4-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043226_977526_89DE7913 X-CRM114-Status: GOOD ( 12.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec Currently, only VI layer calls CSC setup function. This comes from DE2 limitation, which doesn't have CSC unit for UI layers. However, DE3 has separate CSC units for each layer. This allows display pipeline to make output signal in different color spaces. To support both use cases, add a call to CSC setup function also in UI layer code. For DE2, this will be a no-op, but it will allow DE3 to output signal in multiple formats. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_csc.c | 8 +++++--- drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 6 ++++++ 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c index 0dcbc0866ae82..68d955c63b05b 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.c +++ b/drivers/gpu/drm/sun4i/sun8i_csc.c @@ -209,8 +209,10 @@ void sun8i_csc_set_ccsc(struct sun8i_mixer *mixer, int layer, return; } - base = ccsc_base[mixer->cfg->ccsc][layer]; + if (layer < mixer->cfg->vi_num) { + base = ccsc_base[mixer->cfg->ccsc][layer]; - sun8i_csc_setup(mixer->engine.regs, base, - fmt_type, encoding, range); + sun8i_csc_setup(mixer->engine.regs, base, + fmt_type, encoding, range); + } } diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c index ca75ca0835a63..884abe3cf773a 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -20,6 +20,7 @@ #include #include +#include "sun8i_csc.h" #include "sun8i_mixer.h" #include "sun8i_ui_layer.h" #include "sun8i_ui_scaler.h" @@ -184,6 +185,11 @@ static int sun8i_ui_layer_update_formats(struct sun8i_mixer *mixer, int channel, SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), SUN8I_MIXER_CHAN_UI_LAYER_ATTR_FBFMT_MASK, val); + /* Note: encoding and range arguments are ignored for RGB */ + sun8i_csc_set_ccsc(mixer, channel, FORMAT_TYPE_RGB, + DRM_COLOR_YCBCR_BT601, + DRM_COLOR_YCBCR_FULL_RANGE); + return 0; } From patchwork Thu Jun 20 11:29:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705225 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 09769C2BA18 for ; Thu, 20 Jun 2024 11:33:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=nWXLocCMt7EGKg67iVS/7BHF4d4/LJP7o3vbPwq3pQs=; b=dsQFoPfyWwrfcCBEQI6aAcApJQ dDUpVjg7Ids3LYEi7JTglw8rwsK7lXOvMm2tLnhDFkOa3yuqeF1rCYv+zEMlz2WijKHeC1blF0QFZ udqsWpqQ+ogVA0VAoxl/LdyWg3RnHEoDxh/LA/3BPB+JPrPPP9uSkWZnPwyypPViQ9C2e5n5X7ZVf VXYhScft2YYAIKJesIk4OyBmndDlXd+PfnVJnn6wl04spf/t8ON+klSdgl5ksaLNgSG7U8faXPoEe 1xsCpI72DO5IXMbnzNh4yMhiFEY4cOas9sXVzAqD0j9qxyrWGufMseccusTQ/edU8m/ATlmK11USK 8tIqEUgg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG27-00000004lbp-306H; Thu, 20 Jun 2024 11:32:51 +0000 Received: from fout6-smtp.messagingengine.com ([103.168.172.149]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG1o-00000004lPQ-1ooG for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:32:34 +0000 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailfout.nyi.internal (Postfix) with ESMTP id C208613804D3; Thu, 20 Jun 2024 07:32:31 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Thu, 20 Jun 2024 07:32:31 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883151; x= 1718969551; bh=nWXLocCMt7EGKg67iVS/7BHF4d4/LJP7o3vbPwq3pQs=; b=N unYtibvf57bb/Ij8GEEGuOIe/ih5a8T4F5ro8IPDktqeg7jN4qW2KDEiBxXkueNK pSUUxGDe9loj+aVOQaeWx+5wxX5PY4mFMYsvxg8TNtT4CD58+H3mq/wWVo24EHX4 TwcZvyV6GaAWBVbSuDrsEiZyihNKfLyUrvGoqEaJv3PN+PY1EltcQx7z9h9PxZsy jocwA0k1KAIZigd3z0eUtgcOZHzVLkIwf7I6w8jmKgMgnrKOY7Hu3UhYPybWRufm VkdBJBoJ9jtBb8XhDh4stqwOzQjjlDUev0X8NqnDIdDtYvaDeKIw+EAzlh8eAo+8 e3yv3buIJ7TPva6yooW+Q== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883151; x= 1718969551; bh=nWXLocCMt7EGKg67iVS/7BHF4d4/LJP7o3vbPwq3pQs=; b=N 2ddD1k9yer0LRPeb2zf+NlqWvWlvgBU7ZkkDgWrcx5RO3tQfv9j/8OoD3EH5LApe 5GOP9tcNdeWBaeeqnm/Oha6R+FF8MbexF7lR1+btN2orOlNAm76p7bHlULyg5T3I vTeptEbBK38dsbi7C/LZojGJLRxKB972HYH10kEw2T5beiDdA6S+ZU+yWV0/MzQ3 UrP0y+v3qGLRxbWt2y5TpozTill3zmcgv/S0gI5yCcfQFHct5mPgr+Gf1sA5ZXy3 qs9NbA3qUwu/EouFUxoAQ4DpTMB/eTbbVwqKDRZTZ+PGaQZ/CoMg1amh87UtycGr xPai+P+ECgGCIhZIaPEGw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpedunecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:32:26 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 04/23] drm: sun4i: de2: Initialize layer fields earlier Date: Thu, 20 Jun 2024 23:29:42 +1200 Message-ID: <20240620113150.83466-5-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043232_670476_CCFD3197 X-CRM114-Status: GOOD ( 10.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec drm_universal_plane_init() can already call some callbacks, like format_mod_supported, during initialization. Because of that, fields should be initialized beforehand. Signed-off-by: Jernej Skrabec Co-developed-by: Ryan Walklin Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 7 ++++--- drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 7 ++++--- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c index 884abe3cf773a..91781b5bbbbce 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -365,6 +365,10 @@ struct sun8i_ui_layer *sun8i_ui_layer_init_one(struct drm_device *drm, if (!layer) return ERR_PTR(-ENOMEM); + layer->mixer = mixer; + layer->channel = channel; + layer->overlay = 0; + if (index == 0) type = DRM_PLANE_TYPE_PRIMARY; @@ -395,9 +399,6 @@ struct sun8i_ui_layer *sun8i_ui_layer_init_one(struct drm_device *drm, } drm_plane_helper_add(&layer->plane, &sun8i_ui_layer_helper_funcs); - layer->mixer = mixer; - layer->channel = channel; - layer->overlay = 0; return layer; } diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index 6ee3790a2a812..329e8bf8cd20d 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -549,6 +549,10 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, if (!layer) return ERR_PTR(-ENOMEM); + layer->mixer = mixer; + layer->channel = index; + layer->overlay = 0; + if (mixer->cfg->is_de3) { formats = sun8i_vi_layer_de3_formats; format_count = ARRAY_SIZE(sun8i_vi_layer_de3_formats); @@ -607,9 +611,6 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, } drm_plane_helper_add(&layer->plane, &sun8i_vi_layer_helper_funcs); - layer->mixer = mixer; - layer->channel = index; - layer->overlay = 0; return layer; } From patchwork Thu Jun 20 11:29:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705227 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62F05C2BA1A for ; Thu, 20 Jun 2024 11:33:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=tfCHMfxWFNiChBgwEq49Ue2QzQSIOUIUNic78/4HQvQ=; b=1g8suq75aJ9RObbdI7uUPabLer jNw6Yop9uq1vttrF3uiGIfA43CTYJnVTew+rpPfQQPlu0UqMSFM/+Q+kgJZV1ypvEaLC5F3uA+8Pa brBjCi4GGmwC0FtWkpJYkZ2Ym6ZImDkcvV9OgiET8Xtn8U+SavaxoExL9sV8c9JYF1ygQsGQp790o rirjcOSjcAEOWir25EHcDRjFdoSLZseWXvAUOLRXYs+D4EErm3IQTt/uev4GUbMSFV0sJlxJe06cH E37BsP+CD2j0AUobrU5Sfs77pMxWAbOvZOhhiwi5stYKR2Jp+l66fAawfmh+ftSnvcLHku02jCgIY zlH7aVQg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG28-00000004lcV-3wOD; Thu, 20 Jun 2024 11:32:52 +0000 Received: from fout6-smtp.messagingengine.com ([103.168.172.149]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG1u-00000004lT0-0Wjw for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:32:40 +0000 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailfout.nyi.internal (Postfix) with ESMTP id 5B7021380490; Thu, 20 Jun 2024 07:32:37 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Thu, 20 Jun 2024 07:32:37 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883157; x= 1718969557; bh=tfCHMfxWFNiChBgwEq49Ue2QzQSIOUIUNic78/4HQvQ=; b=M cSDgzgerjSAlSxxON1obvW9BO0YLQcmNAqjXoxszoUXEIYNBNf/Ogewcjx/H6E/3 hSy1+EPyqOWh3+X2Zf3RZ7LgUUFjNo73vPqD5pjYwz8t76mq0nL87SUIKHzLzwq6 +T6vEsgM8ZfQwcNR0kFEP1twV4uvd76o/1NeT6zvNAdAAhlIV1oeJ92uw3q8JgDy f07txMZ45wOfrb5PGMaauMS7dGCFmX5E24GoknPU/hK7OMK3Xrjnbl1QhV/UCHqT B1yD2kDx1hJsrp+XszjSfTtRlbWVVzfp+WVJiDIAo9ZrfXGabQtwfup9xoWrD5I6 bjtnCl51EU20jfswPCj5w== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883157; x= 1718969557; bh=tfCHMfxWFNiChBgwEq49Ue2QzQSIOUIUNic78/4HQvQ=; b=M qEC56k7LWPyXBEjiWOJU0NWVPOTW+8phaRQpi2eqtjScJ2i4Onkry8ib3bCta0Lj rhOp/iaRcRCR3l+NgbaU5P9TbkZtslcCIOsfd6MDvznJjdhVz0uc6LLS2L/Vkm2s fi8P5LGLh1TlPKxy9Zjf4IQ7YHVqOROAfLhjO93Vk/YeUrGsmr2fQcWWXhKDaciQ OBIArJ3YDYKdmluE753FCS0DWIa2RTyO6lQ4/V4u2VSsoWCVr9w1rsqDiA98/SsB Md1H/jc1EjmV+mnSGrhIzyurUZZFMIfSScrr0eOugCznsC+ppxjZ7+aXFunqbw5I R9b3e2ozF1I/zFDgrqNuQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpedvnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:32:32 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 05/23] drm: sun4i: de3: Add YUV formatter module Date: Thu, 20 Jun 2024 23:29:43 +1200 Message-ID: <20240620113150.83466-6-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043238_403907_EBC954F8 X-CRM114-Status: GOOD ( 15.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec The display engine formatter (FMT) module is present in the DE3 engine and provides YUV444 to YUV422/YUV420 conversion, format re-mapping and color depth conversion. Add support for this module. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/Makefile | 3 +- drivers/gpu/drm/sun4i/sun50i_fmt.c | 82 ++++++++++++++++++++++++++++++ drivers/gpu/drm/sun4i/sun50i_fmt.h | 32 ++++++++++++ 3 files changed, 116 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/sun4i/sun50i_fmt.c create mode 100644 drivers/gpu/drm/sun4i/sun50i_fmt.h diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile index bad7497a0d11e..3f516329f51ee 100644 --- a/drivers/gpu/drm/sun4i/Makefile +++ b/drivers/gpu/drm/sun4i/Makefile @@ -16,7 +16,8 @@ sun8i-drm-hdmi-y += sun8i_hdmi_phy_clk.o sun8i-mixer-y += sun8i_mixer.o sun8i_ui_layer.o \ sun8i_vi_layer.o sun8i_ui_scaler.o \ - sun8i_vi_scaler.o sun8i_csc.o + sun8i_vi_scaler.o sun8i_csc.o \ + sun50i_fmt.o sun4i-tcon-y += sun4i_crtc.o sun4i-tcon-y += sun4i_tcon_dclk.o diff --git a/drivers/gpu/drm/sun4i/sun50i_fmt.c b/drivers/gpu/drm/sun4i/sun50i_fmt.c new file mode 100644 index 0000000000000..050a8716ae862 --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun50i_fmt.c @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) Jernej Skrabec + */ + +#include + +#include "sun50i_fmt.h" + +static bool sun50i_fmt_is_10bit(u32 format) +{ + switch (format) { + case MEDIA_BUS_FMT_RGB101010_1X30: + case MEDIA_BUS_FMT_YUV10_1X30: + case MEDIA_BUS_FMT_UYYVYY10_0_5X30: + case MEDIA_BUS_FMT_UYVY10_1X20: + return true; + default: + return false; + } +} + +static u32 sun50i_fmt_get_colorspace(u32 format) +{ + switch (format) { + case MEDIA_BUS_FMT_UYYVYY8_0_5X24: + case MEDIA_BUS_FMT_UYYVYY10_0_5X30: + return SUN50I_FMT_CS_YUV420; + case MEDIA_BUS_FMT_UYVY8_1X16: + case MEDIA_BUS_FMT_UYVY10_1X20: + return SUN50I_FMT_CS_YUV422; + default: + return SUN50I_FMT_CS_YUV444RGB; + } +} + +static void sun50i_fmt_de3_limits(u32 *limits, u32 colorspace, bool bit10) +{ + if (colorspace != SUN50I_FMT_CS_YUV444RGB) { + limits[0] = SUN50I_FMT_LIMIT(64, 940); + limits[1] = SUN50I_FMT_LIMIT(64, 960); + limits[2] = SUN50I_FMT_LIMIT(64, 960); + } else if (bit10) { + limits[0] = SUN50I_FMT_LIMIT(0, 1023); + limits[1] = SUN50I_FMT_LIMIT(0, 1023); + limits[2] = SUN50I_FMT_LIMIT(0, 1023); + } else { + limits[0] = SUN50I_FMT_LIMIT(0, 1021); + limits[1] = SUN50I_FMT_LIMIT(0, 1021); + limits[2] = SUN50I_FMT_LIMIT(0, 1021); + } +} + +void sun50i_fmt_setup(struct sun8i_mixer *mixer, u16 width, + u16 height, u32 format) +{ + u32 colorspace, limit[3], base; + struct regmap *regs; + bool bit10; + + colorspace = sun50i_fmt_get_colorspace(format); + bit10 = sun50i_fmt_is_10bit(format); + base = SUN50I_FMT_DE3; + regs = sun8i_blender_regmap(mixer); + + sun50i_fmt_de3_limits(limit, colorspace, bit10); + + regmap_write(regs, SUN50I_FMT_CTRL(base), 0); + + regmap_write(regs, SUN50I_FMT_SIZE(base), + SUN8I_MIXER_SIZE(width, height)); + regmap_write(regs, SUN50I_FMT_SWAP(base), 0); + regmap_write(regs, SUN50I_FMT_DEPTH(base), bit10); + regmap_write(regs, SUN50I_FMT_FORMAT(base), colorspace); + regmap_write(regs, SUN50I_FMT_COEF(base), 0); + + regmap_write(regs, SUN50I_FMT_LMT_Y(base), limit[0]); + regmap_write(regs, SUN50I_FMT_LMT_C0(base), limit[1]); + regmap_write(regs, SUN50I_FMT_LMT_C1(base), limit[2]); + + regmap_write(regs, SUN50I_FMT_CTRL(base), 1); +} diff --git a/drivers/gpu/drm/sun4i/sun50i_fmt.h b/drivers/gpu/drm/sun4i/sun50i_fmt.h new file mode 100644 index 0000000000000..4127f7206aade --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun50i_fmt.h @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) Jernej Skrabec + */ + +#ifndef _SUN50I_FMT_H_ +#define _SUN50I_FMT_H_ + +#include "sun8i_mixer.h" + +#define SUN50I_FMT_DE3 0xa8000 + +#define SUN50I_FMT_CTRL(base) ((base) + 0x00) +#define SUN50I_FMT_SIZE(base) ((base) + 0x04) +#define SUN50I_FMT_SWAP(base) ((base) + 0x08) +#define SUN50I_FMT_DEPTH(base) ((base) + 0x0c) +#define SUN50I_FMT_FORMAT(base) ((base) + 0x10) +#define SUN50I_FMT_COEF(base) ((base) + 0x14) +#define SUN50I_FMT_LMT_Y(base) ((base) + 0x20) +#define SUN50I_FMT_LMT_C0(base) ((base) + 0x24) +#define SUN50I_FMT_LMT_C1(base) ((base) + 0x28) + +#define SUN50I_FMT_LIMIT(low, high) (((high) << 16) | (low)) + +#define SUN50I_FMT_CS_YUV444RGB 0 +#define SUN50I_FMT_CS_YUV422 1 +#define SUN50I_FMT_CS_YUV420 2 + +void sun50i_fmt_setup(struct sun8i_mixer *mixer, u16 width, + u16 height, u32 format); + +#endif From patchwork Thu Jun 20 11:29:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705226 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 275A0C41513 for ; Thu, 20 Jun 2024 11:33:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=gA0fk7RhzgXLr4ifn4kXARpTKlfF9h2FMMET8uXXhTY=; b=xhMsSjPMEw5t0BZ06o0ueICen0 k55YwtDoHH/9ewViXI54hFGymMdvJzIphTp/ML8pT9BSNNWGVhFMikLz+ECow+HaBsQpMG2Qudkd4 S6kTkynNg4WI6IaqjIAQtB59qchn6EeO+mSpxftn4OKHBF6hZ/5v5hOggVZvGSw3io1TStNa1H/MM ro5tD1tPhYzty/r6ZNha2zQBMgSDCvZQ1jPCDfmS/9Y1KJEQJxyzkD2ZiOYS9uZVTs/bTw5fAP1z7 RQTymo2f03cqgBvZoi2AoOWxVbuXXTBleNC35ks2EqIsClwdF7r9T5S5IOFI3gWK801FJYfbFJK/M SzPQGHqw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2B-00000004leT-2rX6; Thu, 20 Jun 2024 11:32:55 +0000 Received: from fhigh3-smtp.messagingengine.com ([103.168.172.154]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG1z-00000004lWZ-3ARa for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:32:46 +0000 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailfhigh.nyi.internal (Postfix) with ESMTP id EA0781140246; Thu, 20 Jun 2024 07:32:42 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Thu, 20 Jun 2024 07:32:42 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883162; x= 1718969562; bh=gA0fk7RhzgXLr4ifn4kXARpTKlfF9h2FMMET8uXXhTY=; b=B llAtnk0iFgCo7C/jf2sV+Y27WpDcg1hc++zIAaQnzLR81VWVJrya0u1Q82ZSbF/Z zDwuGTt89Xr40q+AGDOebYj7GJ+qlFZA2TNQUcpGHKaUSjxh972rh1hgTkiSDVWC lnuFUvBJjrdjhUl9W64rwpt/SShuzvm92IvhWhkf69Xl+oHbhLtEuAMJ60GfH1ZO c81KA2BNnYqx0fJp9svsaeesMf5dEDvsD4/4hmuvfJdc/bZV9K3eBCxBHKZ9jCMu uVsIc9yx9leDmYSu1p+Gv4jJeRGSGKIlx4Bq5wTlTRaKZLxTGSa4saQHQjUc8Iyz GpFY+yOpK7QSGo7sS1C5A== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883162; x= 1718969562; bh=gA0fk7RhzgXLr4ifn4kXARpTKlfF9h2FMMET8uXXhTY=; b=a dzNlidsrnu04puZulLChFbEZsyquBaKzIfaWsZ0xWJnYU7eq+NpdM8O9SAJWzW78 doK+SQCF/E7XroZEiEkFn4rzd02JK1Fihx4jmy131Y1dfGd1vYOjur+APm2lHNAB iGwOaT4oIZ4gu92liOmakaTSvA8Xij47hf/d9XxFnIaKKLGVv3qqC89owmfumjbD W45r2CLrBQicndRKzH5cEKwjgoLVusISnDVy3BrjwH86u6MjD4lme3ROsy11yLSG SdRpyvt+SaAAmteBmh2mzdGkUFOGsV3U0ibe7pAtJJL3wVe/yetrbenhR5/ewRVT XiaQf8k4b1i5CE2HN2JSg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpeefnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:32:37 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 06/23] drm: sun4i: de3: add format enumeration function to engine Date: Thu, 20 Jun 2024 23:29:44 +1200 Message-ID: <20240620113150.83466-7-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043244_708208_3F1BA895 X-CRM114-Status: GOOD ( 12.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec The DE3 display engine supports YUV formats in addition to RGB. Add an optional format enumeration function to the engine. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sunxi_engine.h | 29 ++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sunxi_engine.h b/drivers/gpu/drm/sun4i/sunxi_engine.h index ec8cf9b2bda41..98a78990fa870 100644 --- a/drivers/gpu/drm/sun4i/sunxi_engine.h +++ b/drivers/gpu/drm/sun4i/sunxi_engine.h @@ -120,6 +120,17 @@ struct sunxi_engine_ops { */ void (*mode_set)(struct sunxi_engine *engine, const struct drm_display_mode *mode); + + /** + * @get_supported_fmts + * + * This callback is used to enumerate all supported output + * formats by the engine. They are used for bridge format + * negotiation. + * + * This function is optional. + */ + u32 *(*get_supported_fmts)(struct sunxi_engine *engine, u32 *num); }; /** @@ -208,4 +219,22 @@ sunxi_engine_mode_set(struct sunxi_engine *engine, if (engine->ops && engine->ops->mode_set) engine->ops->mode_set(engine, mode); } + +/** + * sunxi_engine_get_supported_formats - Provide array of supported formats + * @engine: pointer to the engine + * @num: pointer to variable, which will hold number of formats + * + * This list can be used for format negotiation by bridge. + */ +static inline u32 * +sunxi_engine_get_supported_formats(struct sunxi_engine *engine, u32 *num) +{ + if (engine->ops && engine->ops->get_supported_fmts) + return engine->ops->get_supported_fmts(engine, num); + + *num = 0; + + return NULL; +} #endif /* _SUNXI_ENGINE_H_ */ From patchwork Thu Jun 20 11:29:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705228 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E4876C2BA18 for ; Thu, 20 Jun 2024 11:33:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=9FVj1M2nckPDwVsNFdoMYwGpqYEtbcwzaVecnri7fPk=; b=bXT4m5TK0aYE+MxLB+tJvpkSkQ 6DPOjqJnnRpuZWhRKzTDvxV8th6LDYm/qdVD/j3Dm3vmB5GN4Qb5I7vBTNoVIW5ZYqas7jLxd6nWy j2j4ZtfbK0Tm2d9/JqJAW/oiXjkJW6K4BpUK9SqVIyRilYGyHhEvk6l08JJxmmapEGFpctF4k6b4x P8XyVdDJArFtEX/V9mgc4sHXu8CffYTQq5A0EHdPddRnOcfr5FCoB6/4Mp9Ax65LURyfgO/jvoLxK lbjA7WGOvrkXA8mOrsIqrroV1yc1KRstfr1V4F1C7qjXyFUpVArMfvj0tsO/+ecuGTELDSRTcZ9Zl i0IEkP2g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2i-00000004lyT-2wuA; Thu, 20 Jun 2024 11:33:28 +0000 Received: from fhigh3-smtp.messagingengine.com ([103.168.172.154]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG25-00000004lZx-1mSg for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:32:50 +0000 Received: from compute6.internal (compute6.nyi.internal [10.202.2.47]) by mailfhigh.nyi.internal (Postfix) with ESMTP id 8CBAC1140247; Thu, 20 Jun 2024 07:32:48 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute6.internal (MEProxy); Thu, 20 Jun 2024 07:32:48 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883168; x= 1718969568; bh=9FVj1M2nckPDwVsNFdoMYwGpqYEtbcwzaVecnri7fPk=; b=l dhWSEP6OuHEWepxOxFEU8siN/FqE0aPyBZEL9mwTv6KtdWaiuK9rgftcAkBeDPlK BT7AmXuWg8Ab9HiVn8Uxj/u+cfS3XYM1XHRXUzLAgTqKO3lPrOfo59iqgfrxp3J7 h43CJwjf738yChUv/TdeYI24U801pX2+NJkysdgDBWNnvDznED4MiOrk/6OjyX3z Z0VW+H8/KMY68eCB6g2u9rTOftrZ9V68ldlESCFtqXYyhkH4gh6FDWPS5w4Rp0EW xCTmpbYfaZictBebdXuUfPFyucyLiBi5bpNwxauiD0ONPITFcJz8Z7dxNTrQYAqx aQ2VC0j233jlDF5rikh1g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883168; x= 1718969568; bh=9FVj1M2nckPDwVsNFdoMYwGpqYEtbcwzaVecnri7fPk=; b=q 5idu/0YwCWDB7mY0jJ1QARqCotzkNAQZwNQWflX8gqASlDehurXWIVE5JmFgT5+D AerUAlvcSS/LwOdCK5NV2CKvx8wUp0ZotbIjlvNfZqvjNOVR6kQfFSs+48tSU6mm LVet7BICaH6P7mCdeN1NDB5enjVLLzveUrkRaNgVsawUlcS5TJfVDipytWV3pr24 nG4uuUPeg0SLi+Mdak5KMjtNDe/qAAgOS2XFMRZT8BkMl7f+wCTqfWzF69ffLrn+ IVFiDta+qzQWKAwR7qr8/h1oHiyLWqfLzKXQ+VYx2er7krsdxIYjqC0p1HOxejk5 /UYLlk4H21cV5mpKayROw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpedunecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:32:43 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 07/23] drm: sun4i: de3: add formatter flag to mixer config Date: Thu, 20 Jun 2024 23:29:45 +1200 Message-ID: <20240620113150.83466-8-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043249_607810_B7C49C04 X-CRM114-Status: GOOD ( 12.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec Only the DE3 (and newer) display engines have a formatter module. This could be inferred from the is_de3 flag alone, however this will not scale with addition of future DE versions in subsequent patches. Add a separate flag to signal this in the mixer configuration. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 1 + drivers/gpu/drm/sun4i/sun8i_mixer.h | 2 ++ 2 files changed, 3 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 01382860aaeea..0738ee6446330 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -653,6 +653,7 @@ static const struct sun8i_mixer_cfg sun50i_a64_mixer1_cfg = { static const struct sun8i_mixer_cfg sun50i_h6_mixer0_cfg = { .ccsc = CCSC_MIXER0_LAYOUT, .is_de3 = true, + .has_formatter = 1, .mod_rate = 600000000, .scaler_mask = 0xf, .scanline_yuv = 4096, diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index 85c94884fb9a4..13401643c7bfc 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -162,6 +162,7 @@ enum { * @mod_rate: module clock rate that needs to be set in order to have * a functional block. * @is_de3: true, if this is next gen display engine 3.0, false otherwise. + * @has_formatter: true, if mixer has formatter core, for 10-bit and YUV handling * @scaline_yuv: size of a scanline for VI scaler for YUV formats. */ struct sun8i_mixer_cfg { @@ -171,6 +172,7 @@ struct sun8i_mixer_cfg { int ccsc; unsigned long mod_rate; unsigned int is_de3 : 1; + unsigned int has_formatter : 1; unsigned int scanline_yuv; }; From patchwork Thu Jun 20 11:29:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705230 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E5178C2BA1A for ; Thu, 20 Jun 2024 11:33:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=cux+34nh+ulo2PN/kYT7VG5ILDPHNeEI/xcJjfx83Is=; b=d4gpFdXcWq5rw68jcxN00KgodZ EvG6sWx4qUwI7q7W+3D9ddu9PlCsnsJ6bqtdsb8bklSG7Q35bxf1UZDgWOJ1nvjsr2OZcQ0OvRtR5 dHvktRuYDXk9tQHhgEm/+NeA+kVNqZx+2wBcOT8hd0baelA2Xe3w2CeOfROkNEThvV9Q86kIblC3V 5qqKcUFhBbnWTdyfXqW2IgcsmPkPsJHJHSn5yx/no1RpCOavLboWrJz4TAmUe3WVAml+P4fyPNoXC y+XsfYf64NUcSQzjfy0Od/SEUuydrLQUL0iOBcYWqhlfqEEFV5DNVsEbv+gWCMHtYGsiP5/HJajDH BjNS1OIg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2j-00000004lz9-2ckf; Thu, 20 Jun 2024 11:33:29 +0000 Received: from fhigh3-smtp.messagingengine.com ([103.168.172.154]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2B-00000004ldc-0F1R for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:32:57 +0000 Received: from compute2.internal (compute2.nyi.internal [10.202.2.46]) by mailfhigh.nyi.internal (Postfix) with ESMTP id 2E482114026F; Thu, 20 Jun 2024 07:32:54 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute2.internal (MEProxy); Thu, 20 Jun 2024 07:32:54 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883174; x= 1718969574; bh=cux+34nh+ulo2PN/kYT7VG5ILDPHNeEI/xcJjfx83Is=; b=b DRuvEBXRZ/wSrxasmhOHX0qtLdzaIYBynBMlPMnZxBlOJWrvLKpKSa5eRhjYhiZ4 kaQ8b43442D2Yz3s8nKfaTLnFXI6nbUJ2uhBeuymRLXZDT2dQHCU7QEcSCHgwGxN gYPij4l780w2QxVekuMZrYMCoCzjZJzNnDhtghNPiAOIuEmD0sMnMwtGauytZenm pY6nQuoXbEb9zdRDIRf1ZB2eAUJ6X+U7To1RaaoXqMUDZM2P5dYiSaJEw2IzaRha CA+eOEiWYeKiPU06JadahyG+0aI82wTmndz7RW19DFWOL4aYr5IQrCeGCe2RNHCK Ik3N4mXtpZTEer9VbcbxA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883174; x= 1718969574; bh=cux+34nh+ulo2PN/kYT7VG5ILDPHNeEI/xcJjfx83Is=; b=H 3fbQeiJon6tzAdGkxSIdLwd+o4deAa2r4SCptYfLaNUMK4Lb/aIJDqaG74/zgpAS w5CbJDJhRwqTaPy/h/saK4SuguhYtFYmPb0m7JrgFBPiiIUwiqgPfQjBH90sJiw1 llGv6nT6V1PM+RRdFrnEJs3SEYk4rgkcEAOYbOhhHzXVPfo3qUz5ESeORbOsBFA/ AdX652FUqtLPFRZ2uoeCgVlpdc9X57lY8r9AIs0H7/JcnhKnBKduJk8kWktAfL6r QtTHQOFu44N1zR4kz68c/WmM+if4dWrotaqo9tmlsZA8hlq4XBOFTDVVcCidvFN/ AFsb+tXnyubkodUL8aESw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:32:48 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 08/23] drm: sun4i: de3: add YUV support to the DE3 mixer Date: Thu, 20 Jun 2024 23:29:46 +1200 Message-ID: <20240620113150.83466-9-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043255_341091_5CC00819 X-CRM114-Status: GOOD ( 17.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec The mixer in the DE3 display engine supports YUV 8 and 10 bit formats in addition to 8-bit RGB. Add the required register configuration and format enumeration callback functions to the mixer, and store the in-use output format (defaulting to RGB) and color encoding in engine variables. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 55 ++++++++++++++++++++++++++-- drivers/gpu/drm/sun4i/sunxi_engine.h | 5 +++ 2 files changed, 56 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 0738ee6446330..ef8067b2cbc8c 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -22,7 +22,10 @@ #include #include +#include + #include "sun4i_drv.h" +#include "sun50i_fmt.h" #include "sun8i_mixer.h" #include "sun8i_ui_layer.h" #include "sun8i_vi_layer.h" @@ -326,12 +329,52 @@ static void sun8i_mixer_mode_set(struct sunxi_engine *engine, DRM_DEBUG_DRIVER("Switching display mixer interlaced mode %s\n", interlaced ? "on" : "off"); + + if (engine->format == MEDIA_BUS_FMT_RGB888_1X24) + val = SUN8I_MIXER_BLEND_COLOR_BLACK; + else + val = 0xff108080; + + regmap_write(mixer->engine.regs, + SUN8I_MIXER_BLEND_BKCOLOR(bld_base), val); + regmap_write(mixer->engine.regs, + SUN8I_MIXER_BLEND_ATTR_FCOLOR(bld_base, 0), val); + + if (mixer->cfg->has_formatter) + sun50i_fmt_setup(mixer, mode->hdisplay, + mode->vdisplay, mixer->engine.format); +} + +static u32 *sun8i_mixer_get_supported_fmts(struct sunxi_engine *engine, u32 *num) +{ + struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); + u32 *formats, count; + + count = 0; + + formats = kcalloc(5, sizeof(*formats), GFP_KERNEL); + if (!formats) + return NULL; + + if (mixer->cfg->has_formatter) { + formats[count++] = MEDIA_BUS_FMT_UYYVYY10_0_5X30; + formats[count++] = MEDIA_BUS_FMT_YUV8_1X24; + formats[count++] = MEDIA_BUS_FMT_UYVY8_1X16; + formats[count++] = MEDIA_BUS_FMT_UYYVYY8_0_5X24; + } + + formats[count++] = MEDIA_BUS_FMT_RGB888_1X24; + + *num = count; + + return formats; } static const struct sunxi_engine_ops sun8i_engine_ops = { - .commit = sun8i_mixer_commit, - .layers_init = sun8i_layers_init, - .mode_set = sun8i_mixer_mode_set, + .commit = sun8i_mixer_commit, + .layers_init = sun8i_layers_init, + .mode_set = sun8i_mixer_mode_set, + .get_supported_fmts = sun8i_mixer_get_supported_fmts, }; static const struct regmap_config sun8i_mixer_regmap_config = { @@ -392,7 +435,11 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, dev_set_drvdata(dev, mixer); mixer->engine.ops = &sun8i_engine_ops; mixer->engine.node = dev->of_node; - + /* default output format, supported by all mixers */ + mixer->engine.format = MEDIA_BUS_FMT_RGB888_1X24; + /* default color encoding, ignored with RGB I/O */ + mixer->engine.encoding = DRM_COLOR_YCBCR_BT601; + if (of_property_present(dev->of_node, "iommus")) { /* * This assume we have the same DMA constraints for diff --git a/drivers/gpu/drm/sun4i/sunxi_engine.h b/drivers/gpu/drm/sun4i/sunxi_engine.h index 98a78990fa870..608a26c3f9911 100644 --- a/drivers/gpu/drm/sun4i/sunxi_engine.h +++ b/drivers/gpu/drm/sun4i/sunxi_engine.h @@ -6,6 +6,8 @@ #ifndef _SUNXI_ENGINE_H_ #define _SUNXI_ENGINE_H_ +#include + struct drm_plane; struct drm_device; struct drm_crtc_state; @@ -148,6 +150,9 @@ struct sunxi_engine { int id; + u32 format; + enum drm_color_encoding encoding; + /* Engine list management */ struct list_head list; }; From patchwork Thu Jun 20 11:29:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705229 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5B944C41513 for ; Thu, 20 Jun 2024 11:33:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=v7/QPBaef27qO3Fuk6Oz00U/sG9TRk9vVhD1a2tNWjU=; b=QCqakUPAU2qTGQTZ523at78KdR w10cU7EfO7Se6H1W+tTN5zbixgXRWwUlhbly6hkI46T8lE1t8xjyyB45p4V6R3fokAi+tx+2sEaIY +dsUh0lFEJEHz39W4A1Lf0BVboibPvkAfk0gatmGdviAmPx5tDp5JaUIkhV8dHdmdEt1BEtsF6c6n R0Bf7q/Dfuw4B21uf4CarnYmtGv1j9IvBEphSfjlCMt+Fg/cwS7PQILzVlD09/K9snM4LsRvP9y66 aULeyzrvZJ+tcYo9Az361i1+NGPUiwtpugRIB9fWqDUJbJ1yh4CRUjmaAajHQebA9oV1TJoe82spo kob+5VbQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2l-00000004m0J-0E1e; Thu, 20 Jun 2024 11:33:31 +0000 Received: from fout6-smtp.messagingengine.com ([103.168.172.149]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2G-00000004lh9-2Qwy for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:33:02 +0000 Received: from compute6.internal (compute6.nyi.internal [10.202.2.47]) by mailfout.nyi.internal (Postfix) with ESMTP id C577713800B7; Thu, 20 Jun 2024 07:32:59 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute6.internal (MEProxy); Thu, 20 Jun 2024 07:32:59 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883179; x= 1718969579; bh=v7/QPBaef27qO3Fuk6Oz00U/sG9TRk9vVhD1a2tNWjU=; b=0 MyMjDbFvbSUSYpoyh483rfGEA7gSBDCVtJgK/XOcP6XMYrg86yf5//zuPkmud7EO pBFHI3ND8PuEeI330GO+WUfyhzvw2SsydKusFC9dPtg0sJe8WwKeyNrCdKtb4Aj8 WWl6FoKLi+8uQfdlX9rk7bqzUEAzU7Xr+Nqd6UM8bGLVEayhEFmZfTtAQtuj1aZP 0ioJHaoZK2jT6otudNamMtaZsXktcieL2CPBRa42b9Xf1slOrd0/JrV6LJn0QPqt bL3T4IsWOJLpe8fgzbO5Yuz+mhIFgdkUrJG+LcyEBFLXzCKZgcsaqia7gwMJxw25 FQ5XElk7/yhnHYahmyjyQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883179; x= 1718969579; bh=v7/QPBaef27qO3Fuk6Oz00U/sG9TRk9vVhD1a2tNWjU=; b=r 23KsAA/WfBUfrdBA6mYRLm9pCmv/HAlj0lYb6zlcLVkveTtMo6Yx+F0e3somsQr0 RP7iFASv3VsLY3CfM/9emJowCtb/gRmCUiSRIyMP60QAezbPqRHPGWaJDGX8zgH5 Pcy5ccxsfkPQmfjEBiMxDSfUMcMWLDpaIibBRsNUJ2A4RTSuIeQa2+8hYvjmj6IS QdklS6AXPbSJBEWEkW7NAqIdqWy5c2zwL1iTT36EWBkUf+lNZO8dgNjvrA8qOaYH egmnE7DrPD5xSHAbB1cO44WzUC+Sfn5hH1cQ5xa3P4nFCSAc3NCtCqJKCCgfljI2 ERD22em0UR0vUof8D6n7A== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpedvnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:32:54 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 09/23] drm: sun4i: de3: pass engine reference to ccsc setup function Date: Thu, 20 Jun 2024 23:29:47 +1200 Message-ID: <20240620113150.83466-10-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043300_861755_26385218 X-CRM114-Status: GOOD ( 11.13 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec Configuration of the DE3 colorspace and dynamic range correction module requires knowledge of the current video format and encoding. Pass the display engine by reference to the csc setup function, rather than the register map alone, to allow access to this information. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_csc.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c index 68d955c63b05b..8a336ccb27d33 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.c +++ b/drivers/gpu/drm/sun4i/sun8i_csc.c @@ -148,17 +148,19 @@ static void sun8i_csc_setup(struct regmap *map, u32 base, regmap_write(map, SUN8I_CSC_CTRL(base), val); } -static void sun8i_de3_ccsc_setup(struct regmap *map, int layer, +static void sun8i_de3_ccsc_setup(struct sunxi_engine *engine, int layer, enum format_type fmt_type, enum drm_color_encoding encoding, enum drm_color_range range) { u32 addr, val, mask; + struct regmap *map; const u32 *table; int i; mask = SUN50I_MIXER_BLEND_CSC_CTL_EN(layer); table = yuv2rgb_de3[range][encoding]; + map = engine->regs; switch (fmt_type) { case FORMAT_TYPE_RGB: @@ -204,7 +206,7 @@ void sun8i_csc_set_ccsc(struct sun8i_mixer *mixer, int layer, u32 base; if (mixer->cfg->is_de3) { - sun8i_de3_ccsc_setup(mixer->engine.regs, layer, + sun8i_de3_ccsc_setup(&mixer->engine, layer, fmt_type, encoding, range); return; } From patchwork Thu Jun 20 11:29:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705232 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6A470C2BA18 for ; Thu, 20 Jun 2024 11:33:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=HmURlZD4rHA7PEqp/DD3Lx9ItqvKVLBI2pdlF2h6TRk=; b=nvix584/Jo7sqVCKJJfbymdMn4 ciON1R83jkO/d2EuXLB3Gg8Wxp/muvpaYkA2t4KGjB6+LunZbfzgkB6mIH7CK07Np/yjT4dXOMXzj UQGerZk36nB9lPbqJ+cBPIeb+OBLEDBKDAQHIoEFwC9SncllH7jOg+EP4YPWP28DhqMgtsISO/hZk J8Jy8rKyWfbMnT0RzpDitlMnApwRxn4nCEw+biF5eLKcI7MlB9qT8Tr8plggl44ZtV3aOF0IKFmfk AMxzYL6N33hnfW60YfKuTSEz7KTY7NxV/FuEIuM/wjw/0rygcKQHLxCs8n/hhSDMhx9vdKCx6vMBB uCRkzkCA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2m-00000004m1q-3U0H; Thu, 20 Jun 2024 11:33:32 +0000 Received: from fout6-smtp.messagingengine.com ([103.168.172.149]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2M-00000004lks-1JEg for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:33:08 +0000 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailfout.nyi.internal (Postfix) with ESMTP id 9491D1380508; Thu, 20 Jun 2024 07:33:05 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Thu, 20 Jun 2024 07:33:05 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883185; x= 1718969585; bh=HmURlZD4rHA7PEqp/DD3Lx9ItqvKVLBI2pdlF2h6TRk=; b=V QXocc7j85DpjIrmI1Tp0O6ZpHgfeTAv38gofts6Oda6Up0Aav4y6Hj5/gkZ3CuR/ rQ4yZ9dxNCQaHnbybndz/AlzV9K5UsZP+Sd4rgj85utv3lPRICYlXDAjb/7B3w75 xk/J0023B7ern3BerWqWrVpSSnY8+0fnRUFphFsmZKy21XWG1qpbFk/BvCE/ia+Z T2gzd9xgqSKcj9hi/zzP8qehuzg5ySVAViWNOY0CAaBsbMH5d7vr13oEFPS6j4KQ 8sCEBYolG4Dq56SMRkZo81N0XC8vSa3dXf3sObMjGjEzOf1lQ+Gajlz9ZODmZIRf l+vA4eepBwMofRFluKOjg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883185; x= 1718969585; bh=HmURlZD4rHA7PEqp/DD3Lx9ItqvKVLBI2pdlF2h6TRk=; b=E GiGKW69rRDkbW1noJVnJjzn/x14b1cuiSY2D1yr0yJdSxJOK1y7T6VSVHqG5tngv IdpwP4mt4WoHVVc4lEGM/6WOLoB1GurCEI3R27ZWWpVmzqaahqIIEoskZvD3ujqY zUfHo8JNbVwe/OssMzs2YyGXycoqNZ76hT5W8wLTYWcnMnIyqQz1mPntk9mrcFCi CxCjU4RBg05UDw/AODCXQpnR9A5+g5gcJeM2o8pHNQ1CYRfNvf3HwAVUcjdVW5oi XcOyaq25oVQNcAufw7Ry8ngk8ab427xRk2oRvIk+y1oCfJmJp69RnnEKcB1h+xDx D6Bjza9/kA8c1/xxTe1tw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpeegnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:33:00 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 10/23] drm: sun4i: de3: add YUV support to the color space correction module Date: Thu, 20 Jun 2024 23:29:48 +1200 Message-ID: <20240620113150.83466-11-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043306_767839_1D5750A1 X-CRM114-Status: GOOD ( 14.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec Add coefficients and support for YUV formats to the display engine colorspace and dynamic range correction submodule. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_csc.c | 164 +++++++++++++++++++++++++++++- 1 file changed, 162 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c index 8a336ccb27d33..e12a81fa91083 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.c +++ b/drivers/gpu/drm/sun4i/sun8i_csc.c @@ -5,6 +5,8 @@ #include +#include + #include "sun8i_csc.h" #include "sun8i_mixer.h" @@ -107,6 +109,135 @@ static const u32 yuv2rgb_de3[2][3][12] = { }, }; +/* always convert to limited mode */ +static const u32 rgb2yuv_de3[3][12] = { + [DRM_COLOR_YCBCR_BT601] = { + 0x0000837A, 0x0001021D, 0x00003221, 0x00000040, + 0xFFFFB41C, 0xFFFF6B03, 0x0000E0E1, 0x00000200, + 0x0000E0E1, 0xFFFF43B1, 0xFFFFDB6E, 0x00000200, + }, + [DRM_COLOR_YCBCR_BT709] = { + 0x00005D7C, 0x00013A7C, 0x00001FBF, 0x00000040, + 0xFFFFCC78, 0xFFFF52A7, 0x0000E0E1, 0x00000200, + 0x0000E0E1, 0xFFFF33BE, 0xFFFFEB61, 0x00000200, + }, + [DRM_COLOR_YCBCR_BT2020] = { + 0x00007384, 0x00012A21, 0x00001A13, 0x00000040, + 0xFFFFC133, 0xFFFF5DEC, 0x0000E0E1, 0x00000200, + 0x0000E0E1, 0xFFFF3135, 0xFFFFEDEA, 0x00000200, + }, +}; + +/* always convert to limited mode */ +static const u32 yuv2yuv_de3[2][3][3][12] = { + [DRM_COLOR_YCBCR_LIMITED_RANGE] = { + [DRM_COLOR_YCBCR_BT601] = { + [DRM_COLOR_YCBCR_BT601] = { + 0x00020000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00020000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00020000, 0x00000000, + }, + [DRM_COLOR_YCBCR_BT709] = { + 0x00020000, 0xFFFFC4D7, 0xFFFF9589, 0xFFC00040, + 0x00000000, 0x0002098B, 0x00003AAF, 0xFE000200, + 0x00000000, 0x0000266D, 0x00020CF8, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT2020] = { + 0x00020000, 0xFFFFBFCE, 0xFFFFC5FF, 0xFFC00040, + 0x00000000, 0x00020521, 0x00001F89, 0xFE000200, + 0x00000000, 0x00002C87, 0x00020F07, 0xFE000200, + }, + }, + [DRM_COLOR_YCBCR_BT709] = { + [DRM_COLOR_YCBCR_BT601] = { + 0x00020000, 0x000032D9, 0x00006226, 0xFFC00040, + 0x00000000, 0x0001FACE, 0xFFFFC759, 0xFE000200, + 0x00000000, 0xFFFFDAE7, 0x0001F780, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT709] = { + 0x00020000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00020000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00020000, 0x00000000, + }, + [DRM_COLOR_YCBCR_BT2020] = { + 0x00020000, 0xFFFFF782, 0x00003036, 0xFFC00040, + 0x00000000, 0x0001FD99, 0xFFFFE5CA, 0xFE000200, + 0x00000000, 0x000005E4, 0x0002015A, 0xFE000200, + }, + }, + [DRM_COLOR_YCBCR_BT2020] = { + [DRM_COLOR_YCBCR_BT601] = { + 0x00020000, 0x00003B03, 0x000034D2, 0xFFC00040, + 0x00000000, 0x0001FD8C, 0xFFFFE183, 0xFE000200, + 0x00000000, 0xFFFFD4F3, 0x0001F3FA, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT709] = { + 0x00020000, 0x00000916, 0xFFFFD061, 0xFFC00040, + 0x00000000, 0x0002021C, 0x00001A40, 0xFE000200, + 0x00000000, 0xFFFFFA19, 0x0001FE5A, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT2020] = { + 0x00020000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00020000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00020000, 0x00000000, + }, + }, + }, + [DRM_COLOR_YCBCR_FULL_RANGE] = { + [DRM_COLOR_YCBCR_BT601] = { + [DRM_COLOR_YCBCR_BT601] = { + 0x0001B7B8, 0x00000000, 0x00000000, 0x00000040, + 0x00000000, 0x0001C1C2, 0x00000000, 0xFE000200, + 0x00000000, 0x00000000, 0x0001C1C2, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT709] = { + 0x0001B7B8, 0xFFFFCC08, 0xFFFFA27B, 0x00000040, + 0x00000000, 0x0001CA24, 0x0000338D, 0xFE000200, + 0x00000000, 0x000021C1, 0x0001CD26, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT2020] = { + 0x0001B7B8, 0xFFFFC79C, 0xFFFFCD0C, 0x00000040, + 0x00000000, 0x0001C643, 0x00001BB4, 0xFE000200, + 0x00000000, 0x0000271D, 0x0001CEF5, 0xFE000200, + }, + }, + [DRM_COLOR_YCBCR_BT709] = { + [DRM_COLOR_YCBCR_BT601] = { + 0x0001B7B8, 0x00002CAB, 0x00005638, 0x00000040, + 0x00000000, 0x0001BD32, 0xFFFFCE3C, 0xFE000200, + 0x00000000, 0xFFFFDF6A, 0x0001BA4A, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT709] = { + 0x0001B7B8, 0x00000000, 0x00000000, 0x00000040, + 0x00000000, 0x0001C1C2, 0x00000000, 0xFE000200, + 0x00000000, 0x00000000, 0x0001C1C2, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT2020] = { + 0x0001B7B8, 0xFFFFF88A, 0x00002A5A, 0x00000040, + 0x00000000, 0x0001BFA5, 0xFFFFE8FA, 0xFE000200, + 0x00000000, 0x0000052D, 0x0001C2F1, 0xFE000200, + }, + }, + [DRM_COLOR_YCBCR_BT2020] = { + [DRM_COLOR_YCBCR_BT601] = { + 0x0001B7B8, 0x000033D6, 0x00002E66, 0x00000040, + 0x00000000, 0x0001BF9A, 0xFFFFE538, 0xFE000200, + 0x00000000, 0xFFFFDA2F, 0x0001B732, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT709] = { + 0x0001B7B8, 0x000007FB, 0xFFFFD62B, 0x00000040, + 0x00000000, 0x0001C39D, 0x0000170F, 0xFE000200, + 0x00000000, 0xFFFFFAD1, 0x0001C04F, 0xFE000200, + }, + [DRM_COLOR_YCBCR_BT2020] = { + 0x0001B7B8, 0x00000000, 0x00000000, 0x00000040, + 0x00000000, 0x0001C1C2, 0x00000000, 0xFE000200, + 0x00000000, 0x00000000, 0x0001C1C2, 0xFE000200, + }, + }, + }, +}; + static void sun8i_csc_setup(struct regmap *map, u32 base, enum format_type fmt_type, enum drm_color_encoding encoding, @@ -148,12 +279,27 @@ static void sun8i_csc_setup(struct regmap *map, u32 base, regmap_write(map, SUN8I_CSC_CTRL(base), val); } +static const u32 *sun8i_csc_get_de3_yuv_table(enum drm_color_encoding in_enc, + enum drm_color_range in_range, + u32 out_format, + enum drm_color_encoding out_enc) +{ + if (out_format == MEDIA_BUS_FMT_RGB888_1X24) + return yuv2rgb_de3[in_range][in_enc]; + + /* check for identity transformation */ + if (in_range == DRM_COLOR_YCBCR_LIMITED_RANGE && out_enc == in_enc) + return NULL; + + return yuv2yuv_de3[in_range][in_enc][out_enc]; +} + static void sun8i_de3_ccsc_setup(struct sunxi_engine *engine, int layer, enum format_type fmt_type, enum drm_color_encoding encoding, enum drm_color_range range) { - u32 addr, val, mask; + u32 addr, val = 0, mask; struct regmap *map; const u32 *table; int i; @@ -164,14 +310,28 @@ static void sun8i_de3_ccsc_setup(struct sunxi_engine *engine, int layer, switch (fmt_type) { case FORMAT_TYPE_RGB: - val = 0; + if (engine->format == MEDIA_BUS_FMT_RGB888_1X24) + break; + val = mask; + addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, layer, 0); + regmap_bulk_write(map, addr, rgb2yuv_de3[engine->encoding], 12); break; case FORMAT_TYPE_YUV: + table = sun8i_csc_get_de3_yuv_table(encoding, range, + engine->format, + engine->encoding); + if (!table) + break; val = mask; addr = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, layer, 0); regmap_bulk_write(map, addr, table, 12); break; case FORMAT_TYPE_YVU: + table = sun8i_csc_get_de3_yuv_table(encoding, range, + engine->format, + engine->encoding); + if (!table) + table = yuv2yuv_de3[range][encoding][encoding]; val = mask; for (i = 0; i < 12; i++) { if ((i & 3) == 1) From patchwork Thu Jun 20 11:29:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705231 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 95BA2C41513 for ; Thu, 20 Jun 2024 11:33:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=DOYg+Z7RL/XC0/oVJ+OSKhXGs6ez2FfGgNXDKawiyks=; b=dSW2yfksEfmNeGC69MjffR5pLH 0cb4TEpC6Jup3wDeKuxbVcyRfW2bXPmVgHjWTDaCDOs3o0dqMaogf6i0Stg84AJ6zImo1YTfwgmif 5cKBbghtY0pjg3Cflf64Fbh/uJU6y+W843nJw3y6XqvwEDvFf0vdwQ2/prermdPPcI89pZ7CCttBF vmqtlI8+SAbFNdN/xQziOdYMAOFn+16ICUtVflAUeZIx6tbebGx6EUcJJtv/dOKf5GO3MTjYDFzOg denAnGk5mEmcyg0E0gciXfEMbLX2MbiZWlpuyBAfmTMythhWcFKtsUmlmBQn1jVlQAx/O2AitoFgD ahf32OcA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2p-00000004m3g-2WSM; Thu, 20 Jun 2024 11:33:35 +0000 Received: from fhigh3-smtp.messagingengine.com ([103.168.172.154]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2R-00000004lok-3MZX for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:33:17 +0000 Received: from compute6.internal (compute6.nyi.internal [10.202.2.47]) by mailfhigh.nyi.internal (Postfix) with ESMTP id 2CE84114026F; Thu, 20 Jun 2024 07:33:11 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute6.internal (MEProxy); Thu, 20 Jun 2024 07:33:11 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883191; x= 1718969591; bh=DOYg+Z7RL/XC0/oVJ+OSKhXGs6ez2FfGgNXDKawiyks=; b=Z NyQr4fhn3vhEQrpnKijIIWJn5umfcRB7FPFIQlQFqUaRACGTTaxKC2XOXP2KHK/a nBd6/+xV2YHSBkgvzVEpM/Gu/Z2yB75dPHvFuZuzxmszawI8nwEj7kTjO8eUIBYs XQlQneLAKde8v2S2Tz1vtxmGPKk64jF5BOAI5kZLElRAk2FkRHSsEfRDXaYyZfhN Rm+6j3Lo2tMzCzGEfaEt+Cl6L3aJtAuvyhWBmNiwqoXgKoZ+Q9IpI1S7i2oFUCh6 8bist7ZsU5McCI1yv+UmC1rTpPAzv7AGw6KDBcu5i16cHUmLj/dUrTY+WuA2KPt2 kzJeeVeKeLKiLf+NndFXQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883191; x= 1718969591; bh=DOYg+Z7RL/XC0/oVJ+OSKhXGs6ez2FfGgNXDKawiyks=; b=N KiJtUDqAr/H3w96CtK9rRPvS0vC+nphOc+bhaTEkU7Fg3xZWGmHBoOvdLCKAghwW KqsXjEkHEFEGS8yRG4ejkI+TKcTKxfjEu0inhFzcDBs5EkwlNwruQASLP8ZPVPps 1Q17IbsbBIn2Pg34z8iHIoLH+KzGiKdz7u2D1K8lp5EMC4GnqfRkF39PhbTr73hj N0eZHutVNn7e9w2LXkaoO43r9+iZacVzBLO9A7ehWRCZaHWyre0gx7f2GqHuqxFr 8gp36qP3cud79DGVnrisTiWsO+CDz2GLx2SEwicmA+ANIr06vNTSXwewTueFTu0z jUsSjvzXuP7xlLT6PU3rQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpeefnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:33:05 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 11/23] drm: sun4i: de3: add YUV support to the TCON Date: Thu, 20 Jun 2024 23:29:49 +1200 Message-ID: <20240620113150.83466-12-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043312_079400_A0B7B20F X-CRM114-Status: GOOD ( 12.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec Account for U/V channel subsampling by reducing the dot clock and resolution with a divider in the DE3 timing controller if a YUV format is selected. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 26 +++++++++++++++++++------- 1 file changed, 19 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index a1a2c845ade0c..e39926e9f0b5d 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -598,14 +598,26 @@ static void sun4i_tcon0_mode_set_rgb(struct sun4i_tcon *tcon, static void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, const struct drm_display_mode *mode) { - unsigned int bp, hsync, vsync, vtotal; + unsigned int bp, hsync, vsync, vtotal, div; + struct sun4i_crtc *scrtc = tcon->crtc; + struct sunxi_engine *engine = scrtc->engine; u8 clk_delay; u32 val; WARN_ON(!tcon->quirks->has_channel_1); + switch (engine->format) { + case MEDIA_BUS_FMT_UYYVYY8_0_5X24: + case MEDIA_BUS_FMT_UYYVYY10_0_5X30: + div = 2; + break; + default: + div = 1; + break; + } + /* Configure the dot clock */ - clk_set_rate(tcon->sclk1, mode->crtc_clock * 1000); + clk_set_rate(tcon->sclk1, mode->crtc_clock * 1000 / div); /* Adjust clock delay */ clk_delay = sun4i_tcon_get_clk_delay(mode, 1); @@ -624,17 +636,17 @@ static void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, /* Set the input resolution */ regmap_write(tcon->regs, SUN4I_TCON1_BASIC0_REG, - SUN4I_TCON1_BASIC0_X(mode->crtc_hdisplay) | + SUN4I_TCON1_BASIC0_X(mode->crtc_hdisplay / div) | SUN4I_TCON1_BASIC0_Y(mode->crtc_vdisplay)); /* Set the upscaling resolution */ regmap_write(tcon->regs, SUN4I_TCON1_BASIC1_REG, - SUN4I_TCON1_BASIC1_X(mode->crtc_hdisplay) | + SUN4I_TCON1_BASIC1_X(mode->crtc_hdisplay / div) | SUN4I_TCON1_BASIC1_Y(mode->crtc_vdisplay)); /* Set the output resolution */ regmap_write(tcon->regs, SUN4I_TCON1_BASIC2_REG, - SUN4I_TCON1_BASIC2_X(mode->crtc_hdisplay) | + SUN4I_TCON1_BASIC2_X(mode->crtc_hdisplay / div) | SUN4I_TCON1_BASIC2_Y(mode->crtc_vdisplay)); /* Set horizontal display timings */ @@ -642,8 +654,8 @@ static void sun4i_tcon1_mode_set(struct sun4i_tcon *tcon, DRM_DEBUG_DRIVER("Setting horizontal total %d, backporch %d\n", mode->htotal, bp); regmap_write(tcon->regs, SUN4I_TCON1_BASIC3_REG, - SUN4I_TCON1_BASIC3_H_TOTAL(mode->crtc_htotal) | - SUN4I_TCON1_BASIC3_H_BACKPORCH(bp)); + SUN4I_TCON1_BASIC3_H_TOTAL(mode->crtc_htotal / div) | + SUN4I_TCON1_BASIC3_H_BACKPORCH(bp / div)); bp = mode->crtc_vtotal - mode->crtc_vsync_start; DRM_DEBUG_DRIVER("Setting vertical total %d, backporch %d\n", From patchwork Thu Jun 20 11:29:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705233 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7D039C27C79 for ; Thu, 20 Jun 2024 11:33:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=pvoMVK3QIwaGBCeZKDobPmSMyeTa4QTRiph2ffKgk4c=; b=RFB6A91qKDonFFKPXTQ+ZGW6GJ g1l+mOonWSWeJd1eQxVubAd12jPSDrmtDxDbf1Kxdl8gokpjFnZfgRpmnIu/UpgxJECRFaj4XBJTz oJBh3/aeP0IXHLx981iBfvDjvv0VxUcWMRJNPF6Uza3zmOCVZXQU3VJsj1f/CX9SO+brUaURh1wM/ Kn4hIi+CujXUMr1w7SlOgBv2HIzIZZS3Ufw4yXq/V97TXJfrCugxm6+Pl20Df3kKM1py3on+eQBnE QsMZY3O7uTOId/vvwliX5f6PvkT3EJ0BUuc3s9J4jVPI18a9aLgihpL2vJpMZ/CWA6wiIryAXMu13 PvOeoGgA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2s-00000004m6e-2fvJ; Thu, 20 Jun 2024 11:33:38 +0000 Received: from fhigh3-smtp.messagingengine.com ([103.168.172.154]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2X-00000004lsK-1x5s for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:33:21 +0000 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailfhigh.nyi.internal (Postfix) with ESMTP id B87681140247; Thu, 20 Jun 2024 07:33:16 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute3.internal (MEProxy); Thu, 20 Jun 2024 07:33:16 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883196; x= 1718969596; bh=pvoMVK3QIwaGBCeZKDobPmSMyeTa4QTRiph2ffKgk4c=; b=u x7p/gsSVaNfznuSDSyfjUD1ec/9ADAw31pk9248HFrMSWQSqAB9ylNTN+U/RdQqq ZfJr4gReboxdS10OSInrzR0jns2JWHoFBuOIgukTEJ8zpIJfloz2xXC+JXeuf/TR WpL4D4R1Qc7P+DXNUOnnTwAeUkSzIUtFKuJ59zUpmh4BkBVaFg+p1p+8r/Zh9Ihk x2NlHeNlAVz3XB+M+BuFbEOgohtXJLbajBtBnJ/n5hPFYbcU6xBfz6iXWGMtspBE 1S4FxjcHmk4jGFts/184kHK1xKgGIldWVzewrO3VHW43e2LEIOXDBTK7q/VCtfAy jHjPu1yOayDyvRiFp0BKg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883196; x= 1718969596; bh=pvoMVK3QIwaGBCeZKDobPmSMyeTa4QTRiph2ffKgk4c=; b=s JmaSlpazIrTtTOPtrvxhbbePxaH6IQfu1bbJKSKEdGX7XHdKItKAHaMJu64YbA0L /YNfWMbo3lAIAFd+W0kzolCZVcsyJlpM4CThTMT/TypECLbKQxafCCCIWFrWqZZR Ud+Fgw8Qe+u+cjse7GWPSkO0Ehg3FPD/LjYz9rIRDkVUaD9AfrLPzerjccFwqXdR BjPB0IgV2Wg4pOPIvX68Q1acqQbVD/yCt+e4ro/v9gZ8IJSbUtLzYUzDal3vzap0 IpffVJanYxwl8bXkCfst0huqjibWQ/92S5jwcMr6sIFb6ZwhHwxMR4UJA6cPCU28 XSYJwcxNZS5sHzoKVivOw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:33:11 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 12/23] drm: sun4i: support YUV formats in VI scaler Date: Thu, 20 Jun 2024 23:29:50 +1200 Message-ID: <20240620113150.83466-13-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043317_908646_339A8715 X-CRM114-Status: GOOD ( 12.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 85 +++++++++++++++++-------- 1 file changed, 58 insertions(+), 27 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c index 7ba75011adf9f..2e49a6e5f1f1c 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c @@ -843,6 +843,11 @@ static u32 sun8i_vi_scaler_base(struct sun8i_mixer *mixer, int channel) DE2_VI_SCALER_UNIT_SIZE * channel; } +static bool sun8i_vi_scaler_is_vi_plane(struct sun8i_mixer *mixer, int channel) +{ + return true; +} + static int sun8i_vi_scaler_coef_index(unsigned int step) { unsigned int scale, int_part, float_part; @@ -867,44 +872,65 @@ static int sun8i_vi_scaler_coef_index(unsigned int step) } } -static void sun8i_vi_scaler_set_coeff(struct regmap *map, u32 base, - u32 hstep, u32 vstep, - const struct drm_format_info *format) +static void sun8i_vi_scaler_set_coeff_vi(struct regmap *map, u32 base, + u32 hstep, u32 vstep, + const struct drm_format_info *format) { const u32 *ch_left, *ch_right, *cy; - int offset, i; + int offset; - if (format->hsub == 1 && format->vsub == 1) { - ch_left = lan3coefftab32_left; - ch_right = lan3coefftab32_right; - cy = lan2coefftab32; - } else { + if (format->is_yuv) { ch_left = bicubic8coefftab32_left; ch_right = bicubic8coefftab32_right; cy = bicubic4coefftab32; + } else { + ch_left = lan3coefftab32_left; + ch_right = lan3coefftab32_right; + cy = lan2coefftab32; } offset = sun8i_vi_scaler_coef_index(hstep) * SUN8I_VI_SCALER_COEFF_COUNT; - for (i = 0; i < SUN8I_VI_SCALER_COEFF_COUNT; i++) { - regmap_write(map, SUN8I_SCALER_VSU_YHCOEFF0(base, i), - lan3coefftab32_left[offset + i]); - regmap_write(map, SUN8I_SCALER_VSU_YHCOEFF1(base, i), - lan3coefftab32_right[offset + i]); - regmap_write(map, SUN8I_SCALER_VSU_CHCOEFF0(base, i), - ch_left[offset + i]); - regmap_write(map, SUN8I_SCALER_VSU_CHCOEFF1(base, i), - ch_right[offset + i]); - } + regmap_bulk_write(map, SUN8I_SCALER_VSU_YHCOEFF0(base, 0), + &lan3coefftab32_left[offset], + SUN8I_VI_SCALER_COEFF_COUNT); + regmap_bulk_write(map, SUN8I_SCALER_VSU_YHCOEFF1(base, 0), + &lan3coefftab32_right[offset], + SUN8I_VI_SCALER_COEFF_COUNT); + regmap_bulk_write(map, SUN8I_SCALER_VSU_CHCOEFF0(base, 0), + &ch_left[offset], SUN8I_VI_SCALER_COEFF_COUNT); + regmap_bulk_write(map, SUN8I_SCALER_VSU_CHCOEFF1(base, 0), + &ch_right[offset], SUN8I_VI_SCALER_COEFF_COUNT); offset = sun8i_vi_scaler_coef_index(hstep) * SUN8I_VI_SCALER_COEFF_COUNT; - for (i = 0; i < SUN8I_VI_SCALER_COEFF_COUNT; i++) { - regmap_write(map, SUN8I_SCALER_VSU_YVCOEFF(base, i), - lan2coefftab32[offset + i]); - regmap_write(map, SUN8I_SCALER_VSU_CVCOEFF(base, i), - cy[offset + i]); - } + regmap_bulk_write(map, SUN8I_SCALER_VSU_YVCOEFF(base, 0), + &lan2coefftab32[offset], SUN8I_VI_SCALER_COEFF_COUNT); + regmap_bulk_write(map, SUN8I_SCALER_VSU_CVCOEFF(base, 0), + &cy[offset], SUN8I_VI_SCALER_COEFF_COUNT); +} + +static void sun8i_vi_scaler_set_coeff_ui(struct regmap *map, u32 base, + u32 hstep, u32 vstep, + const struct drm_format_info *format) +{ + const u32 *table; + int offset; + + offset = sun8i_vi_scaler_coef_index(hstep) * + SUN8I_VI_SCALER_COEFF_COUNT; + regmap_bulk_write(map, SUN8I_SCALER_VSU_YHCOEFF0(base, 0), + &lan2coefftab32[offset], SUN8I_VI_SCALER_COEFF_COUNT); + offset = sun8i_vi_scaler_coef_index(vstep) * + SUN8I_VI_SCALER_COEFF_COUNT; + regmap_bulk_write(map, SUN8I_SCALER_VSU_YVCOEFF(base, 0), + &lan2coefftab32[offset], SUN8I_VI_SCALER_COEFF_COUNT); + + table = format->is_yuv ? bicubic4coefftab32 : lan2coefftab32; + offset = sun8i_vi_scaler_coef_index(hstep) * + SUN8I_VI_SCALER_COEFF_COUNT; + regmap_bulk_write(map, SUN8I_SCALER_VSU_CHCOEFF0(base, 0), + &table[offset], SUN8I_VI_SCALER_COEFF_COUNT); } void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable) @@ -994,6 +1020,11 @@ void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer, SUN8I_SCALER_VSU_CHPHASE(base), chphase); regmap_write(mixer->engine.regs, SUN8I_SCALER_VSU_CVPHASE(base), cvphase); - sun8i_vi_scaler_set_coeff(mixer->engine.regs, base, - hscale, vscale, format); + + if (sun8i_vi_scaler_is_vi_plane(mixer, layer)) + sun8i_vi_scaler_set_coeff_vi(mixer->engine.regs, base, + hscale, vscale, format); + else + sun8i_vi_scaler_set_coeff_ui(mixer->engine.regs, base, + hscale, vscale, format); } From patchwork Thu Jun 20 11:29:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705234 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7B998C2BA1A for ; Thu, 20 Jun 2024 11:33:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=N3qK6UO/D+BPHmeW+aBhSk0LT/NEOwurnuwR5ixV3Zo=; b=GTwGFvpy2+pZnR36ktin0zkndI 1c8/nWkRsBJE+JkCgy6tMoIwxRcKiLrIiUwjrWm1PS8MBI2Ge7wXKyF7V4kCzJ0QYIhl3hiIByDLL d4+USFZ3ct66cW9mEztlTD0uNhjNvmQCm47nqhrVtElKQuwryY2irRMji3PwDKII8miltZARUe0Bt DHEFFfdrLV4b15Yi5cRVbetdePHyCjdaAYG4BhvDkGKjaCUIRQdItKd0POxut6nQpXEmw77k0s2pY ufOXXhbORaAyFXw6GcyIZw/tVdMD5v2m5mqK1UUY3wQnNFY79YBxdcx/rvmtTHcaWsRNV6PqThNe5 u1RCynYw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2x-00000004mA8-1xcV; Thu, 20 Jun 2024 11:33:43 +0000 Received: from fout6-smtp.messagingengine.com ([103.168.172.149]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2c-00000004lvX-3vyy for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:33:25 +0000 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailfout.nyi.internal (Postfix) with ESMTP id 4CD251380510; Thu, 20 Jun 2024 07:33:22 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Thu, 20 Jun 2024 07:33:22 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883202; x= 1718969602; bh=N3qK6UO/D+BPHmeW+aBhSk0LT/NEOwurnuwR5ixV3Zo=; b=D 96m2iUmcVPgHfPFCm1S/s02QPnSHUIVeqLw6T3zQh+Y1j38/zbG8HJklb0Jumosw h/pLbI7bRC6O3jBz7h5NTbHbfXelkf4OwiioTLZyN2eheAAq6oI4e6D4nqQ6zS2a WAE/0Vd4zmpKkIwTIQ4RLbLM87lDGL2ybNownA6GetsFkn+4RWI4t7K3WfmJN24M sXitvy5Hex5ELApuea9mwHSFkwBz5znN2/Nw9N+0G1t2sssky3p4A9PVNiQYoCnO l/5Y0Ilp8/hciyFtU7zn41UNXQpim3LJxBJyOjqGzXsSz0pAQRpTzlvwwdLBWjem CWi73WS9MUKainW4Ov/5g== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883202; x= 1718969602; bh=N3qK6UO/D+BPHmeW+aBhSk0LT/NEOwurnuwR5ixV3Zo=; b=t CIQh6fUqXVvS8DWjJJksrbyvs01c0y/qygDU0Zv1UAVUDELUic1XFQw0VpBYl6Ee RXyTuRlgXrwAtQ6loO+9pdIdbVimQ5U226lwf1jImPNT5nXif7m2vA9ITgkkq4O1 i7BAyk03FSRV8bnFeWxrDxXX2qiW7BzZj3+0PhuRMzS0FjUYvz3pCDYzY/tuOYIB kPFjpI3lFx747FbZGItQwXYW6GgqM4mKG7XKj5BTNJ+CfkZWK2k61epHuxkJP4k4 2X/PKFOZCRN6WVcrcTo54hz2tvg//5cuZTiVhwBgcCrM2wUYaWayhXogE0qyYHTd qJAZj7Ib5cHIHEifyR27A== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpeehnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:33:16 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 13/23] drm: sun4i: de2/de3: add mixer version enum Date: Thu, 20 Jun 2024 23:29:51 +1200 Message-ID: <20240620113150.83466-14-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043323_298282_4606C947 X-CRM114-Status: GOOD ( 19.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec The Allwinner DE2 and DE3 display engine mixers are currently identified by a simple boolean flag. This will not scale to support additional DE variants. Convert the boolean flag to an enum, and refactor the initialiser by moving common code to a separate function. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin Reviewed-by: Andre Przywara --- drivers/gpu/drm/sun4i/sun8i_csc.c | 2 +- drivers/gpu/drm/sun4i/sun8i_mixer.c | 14 ++++++++++++-- drivers/gpu/drm/sun4i/sun8i_mixer.h | 11 ++++++++--- drivers/gpu/drm/sun4i/sun8i_ui_scaler.c | 2 +- drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 8 ++++---- drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 4 ++-- 6 files changed, 28 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c index e12a81fa91083..2d5a2cf7cba24 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.c +++ b/drivers/gpu/drm/sun4i/sun8i_csc.c @@ -365,7 +365,7 @@ void sun8i_csc_set_ccsc(struct sun8i_mixer *mixer, int layer, { u32 base; - if (mixer->cfg->is_de3) { + if (mixer->cfg->de_type == sun8i_mixer_de3) { sun8i_de3_ccsc_setup(&mixer->engine, layer, fmt_type, encoding, range); return; diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index ef8067b2cbc8c..7874b68786eee 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -520,7 +520,7 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, base = sun8i_blender_base(mixer); /* Reset registers and disable unused sub-engines */ - if (mixer->cfg->is_de3) { + if (mixer->cfg->de_type == sun8i_mixer_de3) { for (i = 0; i < DE3_MIXER_UNIT_SIZE; i += 4) regmap_write(mixer->engine.regs, i, 0); @@ -611,6 +611,7 @@ static void sun8i_mixer_remove(struct platform_device *pdev) static const struct sun8i_mixer_cfg sun8i_a83t_mixer0_cfg = { .ccsc = CCSC_MIXER0_LAYOUT, + .de_type = sun8i_mixer_de2, .scaler_mask = 0xf, .scanline_yuv = 2048, .ui_num = 3, @@ -619,6 +620,7 @@ static const struct sun8i_mixer_cfg sun8i_a83t_mixer0_cfg = { static const struct sun8i_mixer_cfg sun8i_a83t_mixer1_cfg = { .ccsc = CCSC_MIXER1_LAYOUT, + .de_type = sun8i_mixer_de2, .scaler_mask = 0x3, .scanline_yuv = 2048, .ui_num = 1, @@ -627,6 +629,7 @@ static const struct sun8i_mixer_cfg sun8i_a83t_mixer1_cfg = { static const struct sun8i_mixer_cfg sun8i_h3_mixer0_cfg = { .ccsc = CCSC_MIXER0_LAYOUT, + .de_type = sun8i_mixer_de2, .mod_rate = 432000000, .scaler_mask = 0xf, .scanline_yuv = 2048, @@ -636,6 +639,7 @@ static const struct sun8i_mixer_cfg sun8i_h3_mixer0_cfg = { static const struct sun8i_mixer_cfg sun8i_r40_mixer0_cfg = { .ccsc = CCSC_MIXER0_LAYOUT, + .de_type = sun8i_mixer_de2, .mod_rate = 297000000, .scaler_mask = 0xf, .scanline_yuv = 2048, @@ -645,6 +649,7 @@ static const struct sun8i_mixer_cfg sun8i_r40_mixer0_cfg = { static const struct sun8i_mixer_cfg sun8i_r40_mixer1_cfg = { .ccsc = CCSC_MIXER1_LAYOUT, + .de_type = sun8i_mixer_de2, .mod_rate = 297000000, .scaler_mask = 0x3, .scanline_yuv = 2048, @@ -653,6 +658,7 @@ static const struct sun8i_mixer_cfg sun8i_r40_mixer1_cfg = { }; static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = { + .de_type = sun8i_mixer_de2, .vi_num = 2, .ui_num = 1, .scaler_mask = 0x3, @@ -663,6 +669,7 @@ static const struct sun8i_mixer_cfg sun8i_v3s_mixer_cfg = { static const struct sun8i_mixer_cfg sun20i_d1_mixer0_cfg = { .ccsc = CCSC_D1_MIXER0_LAYOUT, + .de_type = sun8i_mixer_de2, .mod_rate = 297000000, .scaler_mask = 0x3, .scanline_yuv = 2048, @@ -672,6 +679,7 @@ static const struct sun8i_mixer_cfg sun20i_d1_mixer0_cfg = { static const struct sun8i_mixer_cfg sun20i_d1_mixer1_cfg = { .ccsc = CCSC_MIXER1_LAYOUT, + .de_type = sun8i_mixer_de2, .mod_rate = 297000000, .scaler_mask = 0x1, .scanline_yuv = 1024, @@ -681,6 +689,7 @@ static const struct sun8i_mixer_cfg sun20i_d1_mixer1_cfg = { static const struct sun8i_mixer_cfg sun50i_a64_mixer0_cfg = { .ccsc = CCSC_MIXER0_LAYOUT, + .de_type = sun8i_mixer_de2, .mod_rate = 297000000, .scaler_mask = 0xf, .scanline_yuv = 4096, @@ -690,6 +699,7 @@ static const struct sun8i_mixer_cfg sun50i_a64_mixer0_cfg = { static const struct sun8i_mixer_cfg sun50i_a64_mixer1_cfg = { .ccsc = CCSC_MIXER1_LAYOUT, + .de_type = sun8i_mixer_de2, .mod_rate = 297000000, .scaler_mask = 0x3, .scanline_yuv = 2048, @@ -699,7 +709,7 @@ static const struct sun8i_mixer_cfg sun50i_a64_mixer1_cfg = { static const struct sun8i_mixer_cfg sun50i_h6_mixer0_cfg = { .ccsc = CCSC_MIXER0_LAYOUT, - .is_de3 = true, + .de_type = sun8i_mixer_de3, .has_formatter = 1, .mod_rate = 600000000, .scaler_mask = 0xf, diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index 13401643c7bfc..19052c594f8c2 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -150,6 +150,11 @@ enum { CCSC_D1_MIXER0_LAYOUT, }; +enum sun8i_mixer_type { + sun8i_mixer_de2, + sun8i_mixer_de3, +}; + /** * struct sun8i_mixer_cfg - mixer HW configuration * @vi_num: number of VI channels @@ -171,7 +176,7 @@ struct sun8i_mixer_cfg { int scaler_mask; int ccsc; unsigned long mod_rate; - unsigned int is_de3 : 1; + unsigned int de_type; unsigned int has_formatter : 1; unsigned int scanline_yuv; }; @@ -196,13 +201,13 @@ engine_to_sun8i_mixer(struct sunxi_engine *engine) static inline u32 sun8i_blender_base(struct sun8i_mixer *mixer) { - return mixer->cfg->is_de3 ? DE3_BLD_BASE : DE2_BLD_BASE; + return mixer->cfg->de_type == sun8i_mixer_de3 ? DE3_BLD_BASE : DE2_BLD_BASE; } static inline u32 sun8i_channel_base(struct sun8i_mixer *mixer, int channel) { - if (mixer->cfg->is_de3) + if (mixer->cfg->de_type == sun8i_mixer_de3) return DE3_CH_BASE + channel * DE3_CH_SIZE; else return DE2_CH_BASE + channel * DE2_CH_SIZE; diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_scaler.c b/drivers/gpu/drm/sun4i/sun8i_ui_scaler.c index ae0806bccac7f..504ffa0971a4f 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_scaler.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_scaler.c @@ -93,7 +93,7 @@ static u32 sun8i_ui_scaler_base(struct sun8i_mixer *mixer, int channel) { int vi_num = mixer->cfg->vi_num; - if (mixer->cfg->is_de3) + if (mixer->cfg->de_type == sun8i_mixer_de3) return DE3_VI_SCALER_UNIT_BASE + DE3_VI_SCALER_UNIT_SIZE * vi_num + DE3_UI_SCALER_UNIT_SIZE * (channel - vi_num); diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index 329e8bf8cd20d..866ed04fa0a14 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -74,7 +74,7 @@ static void sun8i_vi_layer_update_alpha(struct sun8i_mixer *mixer, int channel, ch_base = sun8i_channel_base(mixer, channel); - if (mixer->cfg->is_de3) { + if (mixer->cfg->de_type >= sun8i_mixer_de3) { mask = SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MASK | SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA_MODE_MASK; val = SUN50I_MIXER_CHAN_VI_LAYER_ATTR_ALPHA @@ -553,7 +553,7 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, layer->channel = index; layer->overlay = 0; - if (mixer->cfg->is_de3) { + if (mixer->cfg->de_type >= sun8i_mixer_de3) { formats = sun8i_vi_layer_de3_formats; format_count = ARRAY_SIZE(sun8i_vi_layer_de3_formats); } else { @@ -577,7 +577,7 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, plane_cnt = mixer->cfg->ui_num + mixer->cfg->vi_num; - if (mixer->cfg->vi_num == 1 || mixer->cfg->is_de3) { + if (mixer->cfg->vi_num == 1 || mixer->cfg->de_type >= sun8i_mixer_de3) { ret = drm_plane_create_alpha_property(&layer->plane); if (ret) { dev_err(drm->dev, "Couldn't add alpha property\n"); @@ -594,7 +594,7 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, supported_encodings = BIT(DRM_COLOR_YCBCR_BT601) | BIT(DRM_COLOR_YCBCR_BT709); - if (mixer->cfg->is_de3) + if (mixer->cfg->de_type >= sun8i_mixer_de3) supported_encodings |= BIT(DRM_COLOR_YCBCR_BT2020); supported_ranges = BIT(DRM_COLOR_YCBCR_LIMITED_RANGE) | diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c index 2e49a6e5f1f1c..aa346c3beb303 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c @@ -835,7 +835,7 @@ static const u32 bicubic4coefftab32[480] = { static u32 sun8i_vi_scaler_base(struct sun8i_mixer *mixer, int channel) { - if (mixer->cfg->is_de3) + if (mixer->cfg->de_type == sun8i_mixer_de3) return DE3_VI_SCALER_UNIT_BASE + DE3_VI_SCALER_UNIT_SIZE * channel; else @@ -982,7 +982,7 @@ void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer, cvphase = vphase; } - if (mixer->cfg->is_de3) { + if (mixer->cfg->de_type >= sun8i_mixer_de3) { u32 val; if (format->hsub == 1 && format->vsub == 1) From patchwork Thu Jun 20 11:29:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705239 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 73FA2C2BBCA for ; Thu, 20 Jun 2024 11:35:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=gOjIQz1cyjM+IsZS3kiVW2UhNBntMLuxHM0XlaC8nwE=; b=EVypWb/LVddTvHzxFAlzbVJOdB XZnirU9byODRgRJqyc5ZDdnpv6nZ4ylJ3USu24xdYzvpt3RFo5A9avAk8PxWdYIaekIFOITJRZRCG tSsPJjwDqCguBEePjPU/cbQpvqjygI0UV8rEepoXVSOauDzh/d25Z0NdtHnRH2H1KD6O01Y3+W7Vw /QgxUU8sIWQsjUD9XeYct/WpWXqVRSnc8pP9h2PLMzXCQGM2Ww78Dj3kGOu4FlJgjXOPyYomHK4Dl hcFsjqwHLdG0qc87Rva0ntNZ3bqExN3QQI5AfZfw6NVDmgwWQuSEoaiAn2nbkwl0U2slPybPpFrkV YYnNRpOQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG3w-00000004mnE-0XEm; Thu, 20 Jun 2024 11:34:44 +0000 Received: from fout6-smtp.messagingengine.com ([103.168.172.149]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2i-00000004lyE-21Eg for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:33:29 +0000 Received: from compute2.internal (compute2.nyi.internal [10.202.2.46]) by mailfout.nyi.internal (Postfix) with ESMTP id D6A5E1380524; Thu, 20 Jun 2024 07:33:27 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute2.internal (MEProxy); Thu, 20 Jun 2024 07:33:27 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883207; x= 1718969607; bh=gOjIQz1cyjM+IsZS3kiVW2UhNBntMLuxHM0XlaC8nwE=; b=t BZia+2mXb19un3TbX5S2ceUhWn+2QhV+qEISfd/fejn6B6EUyymJfTwunwHM1TRZ wBChSsMaK3XBhLS+ZsWNjUzmEc0W5HIb0juBx4qVEMqGPZEn8K8PKmdn12zHL7Dr AstK8XEhSWqgM/wCDpmaBIUirtwKvtq5tbM3YkdzTieu2aTexRCHI9WT4h9cPhnr s/osR8WwgQ/Jhu9oElPnW3hFJ4r3ALq95sIKqCnW2l0iETlVXh6xJXNUOPP/63LV hiL+tOyDyPvD9k2ilZ/76l9oonMtWwxxhquoztSeo6XVUpYpcC+SZ7j0odI7aWzW T0Jw91A6dWNFCV+cHuSAA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883207; x= 1718969607; bh=gOjIQz1cyjM+IsZS3kiVW2UhNBntMLuxHM0XlaC8nwE=; b=Z GCM2lvknwwC99ly0xZV0O6qNNVybfT5PMxB+fbTFDd2XkropWASovuqJRsDFOoDa jBPV+JhsPontPOWtXFgOe9BQeFI3VaVvlvzyvuyHTVVEAtPxhSirt+WbwU4ktZsp XsOfSDbbL8GjqjRLhD7wWuUmasds9azRRPUbS5egjfaiIR4158zvD3N2s85eCv/Z Vo9H8YHe+UhYMsrgE5QQ5BIe4XK+el5TzpDtuGib1TfT5wzAPAW9QA2FZMt6EYFY hPZVeKVDPCWHVtSGxIgs6daCUy1KTHHQ/M9SkdxVONZc2co4Uv8IeyY1zb3OE8Xr skQQMsXPhCasbyA6xQK+Q== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpedunecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:33:22 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 14/23] drm: sun4i: de2/de3: refactor mixer initialisation Date: Thu, 20 Jun 2024 23:29:52 +1200 Message-ID: <20240620113150.83466-15-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043328_638946_CEEA67CC X-CRM114-Status: GOOD ( 15.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec Now that the DE variant can be selected by enum, take the oppportunity to factor out some common initialisation code to a separate function. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin Reviewed-by: Andre Przywara --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 69 ++++++++++++++++------------- 1 file changed, 38 insertions(+), 31 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 7874b68786eee..533aa93d2a30e 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -404,6 +404,40 @@ static int sun8i_mixer_of_get_id(struct device_node *node) return of_ep.id; } +static void sun8i_mixer_init(struct sun8i_mixer *mixer) +{ + unsigned int base; + int plane_cnt, i; + + base = sun8i_blender_base(mixer); + + /* Enable the mixer */ + regmap_write(mixer->engine.regs, SUN8I_MIXER_GLOBAL_CTL, + SUN8I_MIXER_GLOBAL_CTL_RT_EN); + + /* Set background color to black */ + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR(base), + SUN8I_MIXER_BLEND_COLOR_BLACK); + + /* + * Set fill color of bottom plane to black. Generally not needed + * except when VI plane is at bottom (zpos = 0) and enabled. + */ + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), + SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(0)); + regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, 0), + SUN8I_MIXER_BLEND_COLOR_BLACK); + + plane_cnt = mixer->cfg->vi_num + mixer->cfg->ui_num; + for (i = 0; i < plane_cnt; i++) + regmap_write(mixer->engine.regs, + SUN8I_MIXER_BLEND_MODE(base, i), + SUN8I_MIXER_BLEND_MODE_DEF); + + regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), + SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, 0); +} + static int sun8i_mixer_bind(struct device *dev, struct device *master, void *data) { @@ -412,8 +446,6 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, struct sun4i_drv *drv = drm->dev_private; struct sun8i_mixer *mixer; void __iomem *regs; - unsigned int base; - int plane_cnt; int i, ret; /* @@ -517,8 +549,6 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, list_add_tail(&mixer->engine.list, &drv->engine_list); - base = sun8i_blender_base(mixer); - /* Reset registers and disable unused sub-engines */ if (mixer->cfg->de_type == sun8i_mixer_de3) { for (i = 0; i < DE3_MIXER_UNIT_SIZE; i += 4) @@ -534,7 +564,8 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, regmap_write(mixer->engine.regs, SUN50I_MIXER_FMT_EN, 0); regmap_write(mixer->engine.regs, SUN50I_MIXER_CDC0_EN, 0); regmap_write(mixer->engine.regs, SUN50I_MIXER_CDC1_EN, 0); - } else { + + } else if (mixer->cfg->de_type == sun8i_mixer_de2) { for (i = 0; i < DE2_MIXER_UNIT_SIZE; i += 4) regmap_write(mixer->engine.regs, i, 0); @@ -547,32 +578,8 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, regmap_write(mixer->engine.regs, SUN8I_MIXER_DCSC_EN, 0); } - /* Enable the mixer */ - regmap_write(mixer->engine.regs, SUN8I_MIXER_GLOBAL_CTL, - SUN8I_MIXER_GLOBAL_CTL_RT_EN); - - /* Set background color to black */ - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR(base), - SUN8I_MIXER_BLEND_COLOR_BLACK); - - /* - * Set fill color of bottom plane to black. Generally not needed - * except when VI plane is at bottom (zpos = 0) and enabled. - */ - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), - SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(0)); - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, 0), - SUN8I_MIXER_BLEND_COLOR_BLACK); - - plane_cnt = mixer->cfg->vi_num + mixer->cfg->ui_num; - for (i = 0; i < plane_cnt; i++) - regmap_write(mixer->engine.regs, - SUN8I_MIXER_BLEND_MODE(base, i), - SUN8I_MIXER_BLEND_MODE_DEF); - - regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), - SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, 0); - + sun8i_mixer_init(mixer); + return 0; err_disable_bus_clk: From patchwork Thu Jun 20 11:29:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705237 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2F94DC2BA1A for ; Thu, 20 Jun 2024 11:35:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=F9Mpyw6J6uyl7UWCXabNIDrsg+2F+FimJS3Njbqv/sg=; b=QGYP/Lx5fYEFkvrpDuvDWNhpap fnePhhZHFgd0JE0of/g9bk9uqWHV9+6ht6nJaRGxqCRrbLXKeKkHfeDFm5ZfUGjkrG5R4TpsOEhBf 054Kq1iFj5EX2aLD4VIa08Hxm7VZF8pPeK/n9OzhtFzZ/VQBSPkhLDFmPrUMkHd5we9EUn/fYGgoB tOxHRZfyM/qAf1EVFUacSlxMwCHgJhsOU28yXJBZCx/iZzo7v9K/26cnF4gtlFPXlJ3wtC2bgkG2s zLeS84SV2RLQ0C+9i68JROJUBLVO4WVGEb2OXDy1NuVpGcvPKcLPmrKlqTvaTW0synUSKncLH/sFR blEAPwNw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG42-00000004mrL-2i2S; Thu, 20 Jun 2024 11:34:50 +0000 Received: from fout6-smtp.messagingengine.com ([103.168.172.149]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2o-00000004m2f-0yJZ for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:33:37 +0000 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailfout.nyi.internal (Postfix) with ESMTP id 859461380503; Thu, 20 Jun 2024 07:33:33 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute3.internal (MEProxy); Thu, 20 Jun 2024 07:33:33 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883213; x= 1718969613; bh=F9Mpyw6J6uyl7UWCXabNIDrsg+2F+FimJS3Njbqv/sg=; b=k RJoC8AwZfQAGtNuhQtXtjjVjA4eWmKz38P8NoFSfQg2FjHz7Qvo+f+rNeNtByKCS +9yE/tONG6hSHDd4snhUvxmKO1jNFaIRDvFUcdDMpTJZ0FfA9Hv1B/hZNe0NAOUk i7jGVZNYYoeGGbrreTrU1IFEfiBqPpkiSXvsYbCwcWNNyqko1503PiDL4W1ZRoVU b8KhfLOkTwRBuwnDpx7X3m5722MfrGQjFIU2qAbC1PBp8P1hnjZpSqwZy10Ryxvt I3h6toAWFNNsttsGd1dX1Mk7EMxsBXGrDA9Ghma4sw/jODUBoNZ08Yp+pgXlSuDD sQ6xdZi6pWJCAJoR2PDTg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883213; x= 1718969613; bh=F9Mpyw6J6uyl7UWCXabNIDrsg+2F+FimJS3Njbqv/sg=; b=b dCso+TEyUMudAHGlLIToTBe7UEtxkwhrP1HLiowgNdEf1GC+LCvm17juucT2Xv6v 1dGl78veo6BirNpikRIe5ZiUTZTKh9b7C6ws4TJFbfqpMTnTbaN/eHkL4Ug/SKV3 ZrLDz1zNykNzDrbSUzkqOKfHA8P0j42/cODghlU28EVeJ/AqxiJt8R9ONo6qb/FK HM/Px260gyib9+Q9CQIbrEnsPWv7vkfY5aWjx19LdRTuQboih+8ICJVQTcDgn0IS mZB33aApuXy5/w4OrxZjWoa4HBf2pzyvh8XpuardBuoZpH+GfJr97PhhL9YDPXVa H+uNZoLKpAErw3wGybY1Q== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggeefucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:33:28 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 15/23] drm: sun4i: vi_scaler refactor vi_scaler enablement Date: Thu, 20 Jun 2024 23:29:53 +1200 Message-ID: <20240620113150.83466-16-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043334_972063_77B9E1D7 X-CRM114-Status: GOOD ( 13.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec If the video scaler is required, then it is obligatory to set the relevant register to enable it, so move this to the sun8i_vi_scaler_setup() function. This simplifies the alternate case (scaler not required) so replace the vi_scaler_enable() function with a vi_scaler_disable() function. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 3 +-- drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 21 +++++++++++---------- drivers/gpu/drm/sun4i/sun8i_vi_scaler.h | 2 +- 3 files changed, 13 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index 866ed04fa0a14..3cc387c248619 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -205,10 +205,9 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, dst_w, dst_h, hscale, vscale, hphase, vphase, format); - sun8i_vi_scaler_enable(mixer, channel, true); } else { DRM_DEBUG_DRIVER("HW scaling is not needed\n"); - sun8i_vi_scaler_enable(mixer, channel, false); + sun8i_vi_scaler_disable(mixer, channel); } regmap_write(mixer->engine.regs, diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c index aa346c3beb303..e7242301b312c 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c @@ -933,20 +933,13 @@ static void sun8i_vi_scaler_set_coeff_ui(struct regmap *map, u32 base, &table[offset], SUN8I_VI_SCALER_COEFF_COUNT); } -void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable) +void sun8i_vi_scaler_disable(struct sun8i_mixer *mixer, int layer) { - u32 val, base; + u32 base; base = sun8i_vi_scaler_base(mixer, layer); - if (enable) - val = SUN8I_SCALER_VSU_CTRL_EN | - SUN8I_SCALER_VSU_CTRL_COEFF_RDY; - else - val = 0; - - regmap_write(mixer->engine.regs, - SUN8I_SCALER_VSU_CTRL(base), val); + regmap_write(mixer->engine.regs, SUN8I_SCALER_VSU_CTRL(base), 0); } void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer, @@ -982,6 +975,9 @@ void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer, cvphase = vphase; } + regmap_write(mixer->engine.regs, SUN8I_SCALER_VSU_CTRL(base), + SUN8I_SCALER_VSU_CTRL_EN); + if (mixer->cfg->de_type >= sun8i_mixer_de3) { u32 val; @@ -1027,4 +1023,9 @@ void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer, else sun8i_vi_scaler_set_coeff_ui(mixer->engine.regs, base, hscale, vscale, format); + + if (mixer->cfg->de_type <= sun8i_mixer_de3) + regmap_write(mixer->engine.regs, SUN8I_SCALER_VSU_CTRL(base), + SUN8I_SCALER_VSU_CTRL_EN | + SUN8I_SCALER_VSU_CTRL_COEFF_RDY); } diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h index 68f6593b369ab..e801bc7a4189e 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h +++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.h @@ -69,7 +69,7 @@ #define SUN50I_SCALER_VSU_ANGLE_SHIFT(x) (((x) << 16) & 0xF) #define SUN50I_SCALER_VSU_ANGLE_OFFSET(x) ((x) & 0xFF) -void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable); +void sun8i_vi_scaler_disable(struct sun8i_mixer *mixer, int layer); void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer, u32 src_w, u32 src_h, u32 dst_w, u32 dst_h, u32 hscale, u32 vscale, u32 hphase, u32 vphase, From patchwork Thu Jun 20 11:29:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705240 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8BF6FC2BA18 for ; Thu, 20 Jun 2024 11:35:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=asU8+Nqt7cy+lZl9y77QC5cILOzbIRtNt4Znv4iFO1I=; b=AkWsz8v4DmzzpaTyPJViiyGYm4 kbXHzEaJe06e4+H2jyHrUT6DX0dUh0lpXqtGax89QY0ysQZMKsltD3d6Ju2gpLShuv5Npv8k0/Cm0 No973WMeSeqNwKHUokaWUeF1yv16nA36Yp2r78RAXE3X4IE2H7WMpuIxFIlvHGssTHY2EqRx11fxT MouCxhBA4tVGkrKYpDvHsYhv97KSDvO2TllIwUowvm1HYam4GXA8jVRVQao2/Q1SjQvgZkfH1VQpU NfJnzcMtMuAcl7URx5FkgVRkMgLN9lQUUToi6SW4NQFqtSPRUIB949tjSJMJI8pgf3HpTT6NlcRSt dASf5vsg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG43-00000004msG-3Bgp; Thu, 20 Jun 2024 11:34:51 +0000 Received: from fout6-smtp.messagingengine.com ([103.168.172.149]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2u-00000004m7K-0zUi for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:33:45 +0000 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailfout.nyi.internal (Postfix) with ESMTP id 29ED51380503; Thu, 20 Jun 2024 07:33:39 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Thu, 20 Jun 2024 07:33:39 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883219; x= 1718969619; bh=asU8+Nqt7cy+lZl9y77QC5cILOzbIRtNt4Znv4iFO1I=; b=h wIco65KnWASAJ9bsa2eJHNdc211GmAsVIAZdCQzWarKzPId5cmqjEwfDU11H0Nu4 xI7hdK1DnZ8kthNEltXzxZGSbiKaPih94Rw0MRIgF/2o0OTKjHzB9AmUMgiFDVLK s4Jn+fp9MtrfTSiFPFkqtZ7oV/O528g4sQpng6MEdg8yyRUCijLostpq4fELPhbU OBQX98kqUQOXdAx9lP0Nco2FG2bUpDo94FVyoqcqLi6O9yvwqu6HOSIO4Ey/Yic2 1J17wmlHcwuJZMGdNd8uEj/br1D/pbH8JcJKtmygy+3SiPSRxDPh39R0RA5W0gQS g1Rqkur1RQGmsYMziZaMQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883219; x= 1718969619; bh=asU8+Nqt7cy+lZl9y77QC5cILOzbIRtNt4Znv4iFO1I=; b=T SuKHMvOCAHRghm/D2z8nLO7hUY4L+7P7FSe0MNO3P4tFDuqxtyvPjEnGDAgchfwn ghXWPONNzvHK2MKxEdCr8eKuosHM7gypUlpTdjhvtdTr6mrKmq7pCOKn5pqp/xLz eRnVvHqiwqkumyT7QXXNEUDsAna1QujQHPgcwDBgqrrGFMOdLPGRoye0BLLkuXbr VBUlZYBM/eWRcUmUFZUZj92GnoDs0UVO1sr/t78iYcFT+uq4T77MCgpH3RGy3/Kv TZiCNOJCS9vjMS88aPJZLAWnPvwabBtJsGQpq/Kwtymp+CaSzHvg3g24cjEj882f Ncl54M+aGnuVaqf6BreHQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpeeinecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:33:33 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 16/23] drm: sun4i: de2/de3: make blender register references generic Date: Thu, 20 Jun 2024 23:29:54 +1200 Message-ID: <20240620113150.83466-17-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043341_261185_DE2966F7 X-CRM114-Status: GOOD ( 11.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec The DE2 and DE3 engines have a single register range, whereas the DE33 separates these out into top and display groups. Prepare for this by adding a function to look these up based on the DE type. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_mixer.h | 6 ++++++ drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 17 +++++++++++------ drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 16 ++++++++++------ 3 files changed, 27 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index 19052c594f8c2..ed7370688d52e 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -204,6 +204,12 @@ sun8i_blender_base(struct sun8i_mixer *mixer) return mixer->cfg->de_type == sun8i_mixer_de3 ? DE3_BLD_BASE : DE2_BLD_BASE; } +static inline struct regmap * +sun8i_blender_regmap(struct sun8i_mixer *mixer) +{ + return mixer->engine.regs; +} + static inline u32 sun8i_channel_base(struct sun8i_mixer *mixer, int channel) { diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c index 91781b5bbbbce..7f4d4dcfdc03d 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -24,14 +24,17 @@ #include "sun8i_mixer.h" #include "sun8i_ui_layer.h" #include "sun8i_ui_scaler.h" +#include "sun8i_vi_scaler.h" static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel, int overlay, bool enable, unsigned int zpos, unsigned int old_zpos) { u32 val, bld_base, ch_base; + struct regmap *bld_regs; bld_base = sun8i_blender_base(mixer); + bld_regs = sun8i_blender_regmap(mixer); ch_base = sun8i_channel_base(mixer, channel); DRM_DEBUG_DRIVER("%sabling channel %d overlay %d\n", @@ -47,12 +50,12 @@ static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel, SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN, val); if (!enable || zpos != old_zpos) { - regmap_update_bits(mixer->engine.regs, + regmap_update_bits(bld_regs, SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos), 0); - regmap_update_bits(mixer->engine.regs, + regmap_update_bits(bld_regs, SUN8I_MIXER_BLEND_ROUTE(bld_base), SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos), 0); @@ -61,13 +64,13 @@ static void sun8i_ui_layer_enable(struct sun8i_mixer *mixer, int channel, if (enable) { val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos); - regmap_update_bits(mixer->engine.regs, + regmap_update_bits(bld_regs, SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), val, val); val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos); - regmap_update_bits(mixer->engine.regs, + regmap_update_bits(bld_regs, SUN8I_MIXER_BLEND_ROUTE(bld_base), SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos), val); @@ -101,6 +104,7 @@ static int sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int channel, { struct drm_plane_state *state = plane->state; u32 src_w, src_h, dst_w, dst_h; + struct regmap *bld_regs; u32 bld_base, ch_base; u32 outsize, insize; u32 hphase, vphase; @@ -109,6 +113,7 @@ static int sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int channel, channel, overlay); bld_base = sun8i_blender_base(mixer); + bld_regs = sun8i_blender_regmap(mixer); ch_base = sun8i_channel_base(mixer, channel); src_w = drm_rect_width(&state->src) >> 16; @@ -153,10 +158,10 @@ static int sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int channel, DRM_DEBUG_DRIVER("Layer destination coordinates X: %d Y: %d\n", state->dst.x1, state->dst.y1); DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h); - regmap_write(mixer->engine.regs, + regmap_write(bld_regs, SUN8I_MIXER_BLEND_ATTR_COORD(bld_base, zpos), SUN8I_MIXER_COORD(state->dst.x1, state->dst.y1)); - regmap_write(mixer->engine.regs, + regmap_write(bld_regs, SUN8I_MIXER_BLEND_ATTR_INSIZE(bld_base, zpos), outsize); diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index 3cc387c248619..448a696df5c39 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -23,8 +23,10 @@ static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel, unsigned int old_zpos) { u32 val, bld_base, ch_base; + struct regmap *bld_regs; bld_base = sun8i_blender_base(mixer); + bld_regs = sun8i_blender_regmap(mixer); ch_base = sun8i_channel_base(mixer, channel); DRM_DEBUG_DRIVER("%sabling VI channel %d overlay %d\n", @@ -40,12 +42,12 @@ static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel, SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN, val); if (!enable || zpos != old_zpos) { - regmap_update_bits(mixer->engine.regs, + regmap_update_bits(bld_regs, SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), SUN8I_MIXER_BLEND_PIPE_CTL_EN(old_zpos), 0); - regmap_update_bits(mixer->engine.regs, + regmap_update_bits(bld_regs, SUN8I_MIXER_BLEND_ROUTE(bld_base), SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(old_zpos), 0); @@ -54,13 +56,13 @@ static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel, if (enable) { val = SUN8I_MIXER_BLEND_PIPE_CTL_EN(zpos); - regmap_update_bits(mixer->engine.regs, + regmap_update_bits(bld_regs, SUN8I_MIXER_BLEND_PIPE_CTL(bld_base), val, val); val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos); - regmap_update_bits(mixer->engine.regs, + regmap_update_bits(bld_regs, SUN8I_MIXER_BLEND_ROUTE(bld_base), SUN8I_MIXER_BLEND_ROUTE_PIPE_MSK(zpos), val); @@ -104,6 +106,7 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, struct drm_plane_state *state = plane->state; const struct drm_format_info *format = state->fb->format; u32 src_w, src_h, dst_w, dst_h; + struct regmap *bld_regs; u32 bld_base, ch_base; u32 outsize, insize; u32 hphase, vphase; @@ -115,6 +118,7 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, channel, overlay); bld_base = sun8i_blender_base(mixer); + bld_regs = sun8i_blender_regmap(mixer); ch_base = sun8i_channel_base(mixer, channel); src_w = drm_rect_width(&state->src) >> 16; @@ -231,10 +235,10 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, DRM_DEBUG_DRIVER("Layer destination coordinates X: %d Y: %d\n", state->dst.x1, state->dst.y1); DRM_DEBUG_DRIVER("Layer destination size W: %d H: %d\n", dst_w, dst_h); - regmap_write(mixer->engine.regs, + regmap_write(bld_regs, SUN8I_MIXER_BLEND_ATTR_COORD(bld_base, zpos), SUN8I_MIXER_COORD(state->dst.x1, state->dst.y1)); - regmap_write(mixer->engine.regs, + regmap_write(bld_regs, SUN8I_MIXER_BLEND_ATTR_INSIZE(bld_base, zpos), outsize); From patchwork Thu Jun 20 11:29:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705238 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8CD38C27C79 for ; Thu, 20 Jun 2024 11:35:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=JGHiRTMOOOOrPtvrOuXq42oWMI5g86eIe3ydpj8wvuY=; b=yrQj6awHvcvLHCzd4gk6sJIB+U 8jC9eEN3AUBmTbMuWzGVY4QwlkaEWSg6FE3k2uS+drDaVvBOqQvSfEAbonNYlVA5CRtdprb+JPMTn br65OxQUvfKh6wBeYeoa1UAtsi3jQCksuGG6RnNVPU59wMyaOd6uzTPhzNthJyD7Q/30zZ3j/Tsw7 1lY0RS4iL5LsYBVdfVXs7/nv5e/7nRlJDOa2F8QI0dX1RZjmg2gX1PDT74riqctAa8D+fIu8Dl1Pz dPZyBBojTlz7BeMxQUZPBmKF+IfYjY4Y6a0kfRonxhXBposh4lxBgjeDBGfhZtOfmbWCLKulxoRMZ IV/vDrkA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG3x-00000004mnz-3ddY; Thu, 20 Jun 2024 11:34:45 +0000 Received: from fhigh3-smtp.messagingengine.com ([103.168.172.154]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG2z-00000004mCA-3xgY for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:33:55 +0000 Received: from compute6.internal (compute6.nyi.internal [10.202.2.47]) by mailfhigh.nyi.internal (Postfix) with ESMTP id 2DD321140276; Thu, 20 Jun 2024 07:33:45 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute6.internal (MEProxy); Thu, 20 Jun 2024 07:33:45 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883225; x= 1718969625; bh=JGHiRTMOOOOrPtvrOuXq42oWMI5g86eIe3ydpj8wvuY=; b=n k0QasS5TTGMzW7Sp5BsPM2J5r+FA5vmGW4z9trUIJ/cq3n6D4J5xKurlTZJaD/y1 DT4H8gwm3O7SxUIOUfRCZIxJntRnVxdmex9RLwADuN0Jgy+zoW/BmJaI6GFxkwcB 9nfBg6XsI4fvO7pw6x0+u0sgE3ujbsExiwQBPkrbfBlEIpH4jgEsYGdczcfOc0hl fV5rvFZwP368IlC6bvk/2a6KkmNkscYQX1STJxSSWPcF852OG/j+tw8jBBtnMv9U QsfrhwNDLQlJ9RZa3jAeczqLz3IANcijdMywZBfZInPaPQEiU+AEgFYufn1UnoSe fJ1E/KXEvgcwRdeoOoiyQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883225; x= 1718969625; bh=JGHiRTMOOOOrPtvrOuXq42oWMI5g86eIe3ydpj8wvuY=; b=M rXUpcgC1jZ8cRA9Dx49MePjctXQC56Y9n0F5nts8T1nD8UZZUO97Bb1CFYLvYkuW 6jGxj5r3O81vAfxwUJhOGhBuFkCst16wwMrzFRkI1p1hl1MFSi5QE++nteZNJiGR lK6j5PmfypuwsnxHFkThQKreX53Q+n6BN3u2B30zcxkP43FAvRtSg0Zqu2hXawC0 K2WMHdbnFlHugkndr4KGwGXTX5AP7DHzMLMdkA5kpbFfCPk+PgKFoW9+MNiPkTHU IbbRI3+Wi9qH1lCw9i2rKdANOu8+cb7gq35q/W7VM7OdUuxoSPEBGPHWRKUj9REP gOUjFLZK+Y3+6gbKC+meQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpeegnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:33:39 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 17/23] drm: sun4i: de3: Implement AFBC support Date: Thu, 20 Jun 2024 23:29:55 +1200 Message-ID: <20240620113150.83466-18-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043347_281110_CF854565 X-CRM114-Status: GOOD ( 23.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec Buffers, compressed with AFBC, are supported by the DE3 and above, and are generally more efficient for memory transfers. Add support for them. Currently it's implemented only for VI layers, but vendor code and documentation suggest UI layers can have them too. However, I haven't observed any SoC with such feature. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/Makefile | 2 +- drivers/gpu/drm/sun4i/sun50i_afbc.c | 250 +++++++++++++++++++++++++ drivers/gpu/drm/sun4i/sun50i_afbc.h | 87 +++++++++ drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 84 +++++++-- 4 files changed, 410 insertions(+), 13 deletions(-) create mode 100644 drivers/gpu/drm/sun4i/sun50i_afbc.c create mode 100644 drivers/gpu/drm/sun4i/sun50i_afbc.h diff --git a/drivers/gpu/drm/sun4i/Makefile b/drivers/gpu/drm/sun4i/Makefile index 3f516329f51ee..78290f1660fbd 100644 --- a/drivers/gpu/drm/sun4i/Makefile +++ b/drivers/gpu/drm/sun4i/Makefile @@ -17,7 +17,7 @@ sun8i-drm-hdmi-y += sun8i_hdmi_phy_clk.o sun8i-mixer-y += sun8i_mixer.o sun8i_ui_layer.o \ sun8i_vi_layer.o sun8i_ui_scaler.o \ sun8i_vi_scaler.o sun8i_csc.o \ - sun50i_fmt.o + sun50i_fmt.o sun50i_afbc.o sun4i-tcon-y += sun4i_crtc.o sun4i-tcon-y += sun4i_tcon_dclk.o diff --git a/drivers/gpu/drm/sun4i/sun50i_afbc.c b/drivers/gpu/drm/sun4i/sun50i_afbc.c new file mode 100644 index 0000000000000..b55e1c5533714 --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun50i_afbc.c @@ -0,0 +1,250 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (C) Jernej Skrabec + */ + +#include +#include +#include +#include +#include +#include + +#include "sun50i_afbc.h" +#include "sun8i_mixer.h" + +static u32 sun50i_afbc_get_base(struct sun8i_mixer *mixer, unsigned int channel) +{ + u32 base = sun8i_channel_base(mixer, channel); + + if (mixer->cfg->de_type == sun8i_mixer_de3) + return base + SUN50I_AFBC_CH_OFFSET; + + return base + 0x4000; +} + +bool sun50i_afbc_format_mod_supported(struct sun8i_mixer *mixer, + u32 format, u64 modifier) +{ + u64 mode; + + if (modifier == DRM_FORMAT_MOD_INVALID) + return false; + + if (modifier == DRM_FORMAT_MOD_LINEAR) { + if (format == DRM_FORMAT_YUV420_8BIT || + format == DRM_FORMAT_YUV420_10BIT || + format == DRM_FORMAT_Y210) + return false; + return true; + } + + if (mixer->cfg->de_type == sun8i_mixer_de2) + return false; + + mode = AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | + AFBC_FORMAT_MOD_SPARSE | + AFBC_FORMAT_MOD_SPLIT; + + switch (format) { + case DRM_FORMAT_RGBA8888: + case DRM_FORMAT_RGB888: + case DRM_FORMAT_RGB565: + case DRM_FORMAT_RGBA4444: + case DRM_FORMAT_RGBA5551: + case DRM_FORMAT_RGBA1010102: + mode |= AFBC_FORMAT_MOD_YTR; + break; + case DRM_FORMAT_YUYV: + case DRM_FORMAT_Y210: + case DRM_FORMAT_YUV420_8BIT: + case DRM_FORMAT_YUV420_10BIT: + break; + default: + return false; + } + + return modifier == DRM_FORMAT_MOD_ARM_AFBC(mode); +} + +void sun50i_afbc_atomic_update(struct sun8i_mixer *mixer, unsigned int channel, + struct drm_plane *plane) +{ + struct drm_plane_state *state = plane->state; + struct drm_framebuffer *fb = state->fb; + const struct drm_format_info *format = fb->format; + struct drm_gem_dma_object *gem; + u32 base, val, src_w, src_h; + u32 def_color0, def_color1; + struct regmap *regs; + dma_addr_t dma_addr; + + base = sun50i_afbc_get_base(mixer, channel); + regs = mixer->engine.regs; + + src_w = drm_rect_width(&state->src) >> 16; + src_h = drm_rect_height(&state->src) >> 16; + + val = SUN50I_FBD_SIZE_HEIGHT(src_h); + val |= SUN50I_FBD_SIZE_WIDTH(src_w); + regmap_write(regs, SUN50I_FBD_SIZE(base), val); + + val = SUN50I_FBD_BLK_SIZE_HEIGHT(DIV_ROUND_UP(src_h, 16)); + val = SUN50I_FBD_BLK_SIZE_WIDTH(DIV_ROUND_UP(src_w, 16)); + regmap_write(regs, SUN50I_FBD_BLK_SIZE(base), val); + + val = SUN50I_FBD_SRC_CROP_TOP(0); + val |= SUN50I_FBD_SRC_CROP_LEFT(0); + regmap_write(regs, SUN50I_FBD_SRC_CROP(base), val); + + val = SUN50I_FBD_LAY_CROP_TOP(state->src.y1 >> 16); + val |= SUN50I_FBD_LAY_CROP_LEFT(state->src.x1 >> 16); + regmap_write(regs, SUN50I_FBD_LAY_CROP(base), val); + + /* + * Default color is always set to white, in colorspace and bitness + * that coresponds to used format. If it is actually used or not + * depends on AFBC buffer. At least in Cedrus it can be turned on + * or off. + * NOTE: G and B channels are off by 1 (up). It's unclear if this + * is because HW need such value or it is due to good enough code + * in vendor driver and HW clips the value anyway. + */ + def_color0 = 0; + def_color1 = 0; + + val = 0; + switch (format->format) { + case DRM_FORMAT_YUYV: + case DRM_FORMAT_YUV420_10BIT: + val |= SUN50I_FBD_FMT_SBS1(2); + val |= SUN50I_FBD_FMT_SBS0(1); + break; + case DRM_FORMAT_Y210: + val |= SUN50I_FBD_FMT_SBS1(3); + val |= SUN50I_FBD_FMT_SBS0(2); + break; + default: + val |= SUN50I_FBD_FMT_SBS1(1); + val |= SUN50I_FBD_FMT_SBS0(1); + break; + } + switch (format->format) { + case DRM_FORMAT_RGBA8888: + val |= SUN50I_FBD_FMT_YUV_TRAN; + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_RGBA_8888); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(255) | + SUN50I_FBD_DEFAULT_COLOR0_YR(255); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(256) | + SUN50I_FBD_DEFAULT_COLOR1_VB(256); + break; + case DRM_FORMAT_RGB888: + val |= SUN50I_FBD_FMT_YUV_TRAN; + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_RGB_888); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(0) | + SUN50I_FBD_DEFAULT_COLOR0_YR(255); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(256) | + SUN50I_FBD_DEFAULT_COLOR1_VB(256); + break; + case DRM_FORMAT_RGB565: + val |= SUN50I_FBD_FMT_YUV_TRAN; + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_RGB_565); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(0) | + SUN50I_FBD_DEFAULT_COLOR0_YR(31); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(64) | + SUN50I_FBD_DEFAULT_COLOR1_VB(32); + break; + case DRM_FORMAT_RGBA4444: + val |= SUN50I_FBD_FMT_YUV_TRAN; + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_RGBA_4444); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(15) | + SUN50I_FBD_DEFAULT_COLOR0_YR(15); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(16) | + SUN50I_FBD_DEFAULT_COLOR1_VB(16); + break; + case DRM_FORMAT_RGBA5551: + val |= SUN50I_FBD_FMT_YUV_TRAN; + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_RGBA_5551); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(1) | + SUN50I_FBD_DEFAULT_COLOR0_YR(31); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(32) | + SUN50I_FBD_DEFAULT_COLOR1_VB(32); + break; + case DRM_FORMAT_RGBA1010102: + val |= SUN50I_FBD_FMT_YUV_TRAN; + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_RGBA1010102); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(3) | + SUN50I_FBD_DEFAULT_COLOR0_YR(1023); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(1024) | + SUN50I_FBD_DEFAULT_COLOR1_VB(1024); + break; + case DRM_FORMAT_YUV420_8BIT: + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_YUV420); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(0) | + SUN50I_FBD_DEFAULT_COLOR0_YR(255); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(128) | + SUN50I_FBD_DEFAULT_COLOR1_VB(128); + break; + case DRM_FORMAT_YUYV: + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_YUV422); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(0) | + SUN50I_FBD_DEFAULT_COLOR0_YR(255); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(128) | + SUN50I_FBD_DEFAULT_COLOR1_VB(128); + break; + case DRM_FORMAT_YUV420_10BIT: + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_P010); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(0) | + SUN50I_FBD_DEFAULT_COLOR0_YR(1023); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(512) | + SUN50I_FBD_DEFAULT_COLOR1_VB(512); + break; + case DRM_FORMAT_Y210: + val |= SUN50I_FBD_FMT_IN_FMT(SUN50I_AFBC_P210); + def_color0 = SUN50I_FBD_DEFAULT_COLOR0_ALPHA(0) | + SUN50I_FBD_DEFAULT_COLOR0_YR(1023); + def_color1 = SUN50I_FBD_DEFAULT_COLOR1_UG(512) | + SUN50I_FBD_DEFAULT_COLOR1_VB(512); + break; + } + regmap_write(regs, SUN50I_FBD_FMT(base), val); + + /* Get the physical address of the buffer in memory */ + gem = drm_fb_dma_get_gem_obj(fb, 0); + + DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->dma_addr); + + /* Compute the start of the displayed memory */ + dma_addr = gem->dma_addr + fb->offsets[0]; + + regmap_write(regs, SUN50I_FBD_LADDR(base), lower_32_bits(dma_addr)); + regmap_write(regs, SUN50I_FBD_HADDR(base), upper_32_bits(dma_addr)); + + val = SUN50I_FBD_OVL_SIZE_HEIGHT(src_h); + val |= SUN50I_FBD_OVL_SIZE_WIDTH(src_w); + regmap_write(regs, SUN50I_FBD_OVL_SIZE(base), val); + + val = SUN50I_FBD_OVL_COOR_Y(0); + val |= SUN50I_FBD_OVL_COOR_X(0); + regmap_write(regs, SUN50I_FBD_OVL_COOR(base), val); + + regmap_write(regs, SUN50I_FBD_OVL_BG_COLOR(base), + SUN8I_MIXER_BLEND_COLOR_BLACK); + regmap_write(regs, SUN50I_FBD_DEFAULT_COLOR0(base), def_color0); + regmap_write(regs, SUN50I_FBD_DEFAULT_COLOR1(base), def_color1); + + val = SUN50I_FBD_CTL_GLB_ALPHA(state->alpha >> 16); + val |= SUN50I_FBD_CTL_CLK_GATE; + val |= (state->alpha == DRM_BLEND_ALPHA_OPAQUE) ? + SUN50I_FBD_CTL_ALPHA_MODE_PIXEL : + SUN50I_FBD_CTL_ALPHA_MODE_COMBINED; + val |= SUN50I_FBD_CTL_FBD_EN; + regmap_write(regs, SUN50I_FBD_CTL(base), val); +} + +void sun50i_afbc_disable(struct sun8i_mixer *mixer, unsigned int channel) +{ + u32 base = sun50i_afbc_get_base(mixer, channel); + + regmap_write(mixer->engine.regs, SUN50I_FBD_CTL(base), 0); +} diff --git a/drivers/gpu/drm/sun4i/sun50i_afbc.h b/drivers/gpu/drm/sun4i/sun50i_afbc.h new file mode 100644 index 0000000000000..cea685c868550 --- /dev/null +++ b/drivers/gpu/drm/sun4i/sun50i_afbc.h @@ -0,0 +1,87 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* + * Copyright (C) Jernej Skrabec + */ + +#ifndef _SUN50I_AFBC_H_ +#define _SUN50I_AFBC_H_ + +#include + +#define SUN50I_AFBC_CH_OFFSET 0x300 + +#define SUN50I_AFBC_RGBA_8888 0x02 +#define SUN50I_AFBC_RGB_888 0x08 +#define SUN50I_AFBC_RGB_565 0x0a +#define SUN50I_AFBC_RGBA_4444 0x0e +#define SUN50I_AFBC_RGBA_5551 0x12 +#define SUN50I_AFBC_RGBA1010102 0x16 +#define SUN50I_AFBC_YUV422 0x26 +#define SUN50I_AFBC_YUV420 0x2a +#define SUN50I_AFBC_P010 0x30 +#define SUN50I_AFBC_P210 0x32 + +#define SUN50I_FBD_CTL(base) ((base) + 0x00) +#define SUN50I_FBD_CTL_GLB_ALPHA(v) ((v) << 24) +#define SUN50I_FBD_CTL_CLK_GATE BIT(4) +#define SUN50I_FBD_CTL_ALPHA_MODE_PIXEL ((0) << 2) +#define SUN50I_FBD_CTL_ALPHA_MODE_LAYER ((1) << 2) +#define SUN50I_FBD_CTL_ALPHA_MODE_COMBINED ((2) << 2) +#define SUN50I_FBD_CTL_FBD_FCEN BIT(1) +#define SUN50I_FBD_CTL_FBD_EN BIT(0) + +#define SUN50I_FBD_SIZE(base) ((base) + 0x08) +#define SUN50I_FBD_SIZE_HEIGHT(v) (((v) - 1) << 16) +#define SUN50I_FBD_SIZE_WIDTH(v) (((v) - 1) << 0) + +#define SUN50I_FBD_BLK_SIZE(base) ((base) + 0x0c) +#define SUN50I_FBD_BLK_SIZE_HEIGHT(v) ((v) << 16) +#define SUN50I_FBD_BLK_SIZE_WIDTH(v) ((v) << 0) + +#define SUN50I_FBD_SRC_CROP(base) ((base) + 0x10) +#define SUN50I_FBD_SRC_CROP_TOP(v) ((v) << 16) +#define SUN50I_FBD_SRC_CROP_LEFT(v) ((v) << 0) + +#define SUN50I_FBD_LAY_CROP(base) ((base) + 0x14) +#define SUN50I_FBD_LAY_CROP_TOP(v) ((v) << 16) +#define SUN50I_FBD_LAY_CROP_LEFT(v) ((v) << 0) + +#define SUN50I_FBD_FMT(base) ((base) + 0x18) +#define SUN50I_FBD_FMT_SBS1(v) ((v) << 18) +#define SUN50I_FBD_FMT_SBS0(v) ((v) << 16) +#define SUN50I_FBD_FMT_YUV_TRAN BIT(7) +#define SUN50I_FBD_FMT_IN_FMT(v) ((v) << 0) + +#define SUN50I_FBD_LADDR(base) ((base) + 0x20) +#define SUN50I_FBD_HADDR(base) ((base) + 0x24) + +#define SUN50I_FBD_OVL_SIZE(base) ((base) + 0x30) +#define SUN50I_FBD_OVL_SIZE_HEIGHT(v) (((v) - 1) << 16) +#define SUN50I_FBD_OVL_SIZE_WIDTH(v) (((v) - 1) << 0) + +#define SUN50I_FBD_OVL_COOR(base) ((base) + 0x34) +#define SUN50I_FBD_OVL_COOR_Y(v) ((v) << 16) +#define SUN50I_FBD_OVL_COOR_X(v) ((v) << 0) + +#define SUN50I_FBD_OVL_BG_COLOR(base) ((base) + 0x38) +#define SUN50I_FBD_OVL_FILL_COLOR(base) ((base) + 0x3c) + +#define SUN50I_FBD_DEFAULT_COLOR0(base) ((base) + 0x50) +#define SUN50I_FBD_DEFAULT_COLOR0_ALPHA(v) ((v) << 16) +#define SUN50I_FBD_DEFAULT_COLOR0_YR(v) ((v) << 0) + +#define SUN50I_FBD_DEFAULT_COLOR1(base) ((base) + 0x54) +#define SUN50I_FBD_DEFAULT_COLOR1_VB(v) ((v) << 16) +#define SUN50I_FBD_DEFAULT_COLOR1_UG(v) ((v) << 0) + +struct sun8i_mixer; +struct drm_plane; + +bool sun50i_afbc_format_mod_supported(struct sun8i_mixer *mixer, + u32 format, u64 modifier); + +void sun50i_afbc_atomic_update(struct sun8i_mixer *mixer, unsigned int channel, + struct drm_plane *plane); +void sun50i_afbc_disable(struct sun8i_mixer *mixer, unsigned int channel); + +#endif diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index 448a696df5c39..d8a97245cfe1e 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -11,8 +11,10 @@ #include #include #include +#include #include +#include "sun50i_afbc.h" #include "sun8i_csc.h" #include "sun8i_mixer.h" #include "sun8i_vi_layer.h" @@ -101,7 +103,7 @@ static void sun8i_vi_layer_update_alpha(struct sun8i_mixer *mixer, int channel, static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, int overlay, struct drm_plane *plane, - unsigned int zpos) + unsigned int zpos, bool afbc) { struct drm_plane_state *state = plane->state; const struct drm_format_info *format = state->fb->format; @@ -186,7 +188,7 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, required = src_h * 100 / dst_h; - if (ability < required) { + if (!afbc && ability < required) { DRM_DEBUG_DRIVER("Using vertical coarse scaling\n"); vm = src_h; vn = (u32)ability * dst_h / 100; @@ -196,7 +198,7 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, /* it seems that every RGB scaler has buffer for 2048 pixels */ scanline = subsampled ? mixer->cfg->scanline_yuv : 2048; - if (src_w > scanline) { + if (!afbc && src_w > scanline) { DRM_DEBUG_DRIVER("Using horizontal coarse scaling\n"); hm = src_w; hn = scanline; @@ -359,6 +361,15 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, return 0; } +static void sun8i_vi_layer_prepare_non_linear(struct sun8i_mixer *mixer, + int channel, int overlay) +{ + u32 base = sun8i_channel_base(mixer, channel); + + regmap_write(mixer->engine.regs, + SUN8I_MIXER_CHAN_VI_LAYER_ATTR(base, overlay), 0); +} + static int sun8i_vi_layer_atomic_check(struct drm_plane *plane, struct drm_atomic_state *state) { @@ -402,6 +413,8 @@ static void sun8i_vi_layer_atomic_disable(struct drm_plane *plane, sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0, old_zpos); + if (mixer->cfg->de_type >= sun8i_mixer_de3) + sun50i_afbc_disable(mixer, layer->channel); } static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, @@ -414,26 +427,53 @@ static void sun8i_vi_layer_atomic_update(struct drm_plane *plane, struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); unsigned int zpos = new_state->normalized_zpos; unsigned int old_zpos = old_state->normalized_zpos; + struct drm_framebuffer *fb = plane->state->fb; struct sun8i_mixer *mixer = layer->mixer; + bool afbc = drm_is_afbc(fb->modifier); if (!new_state->visible) { sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0, old_zpos); + if (mixer->cfg->de_type >= sun8i_mixer_de3) + sun50i_afbc_disable(mixer, layer->channel); return; } + if (afbc) { + u32 fmt_type; + + sun8i_vi_layer_prepare_non_linear(mixer, layer->channel, + layer->overlay); + sun50i_afbc_atomic_update(mixer, layer->channel, plane); + + fmt_type = sun8i_vi_layer_get_format_type(fb->format); + sun8i_csc_set_ccsc(mixer, layer->channel, fmt_type, + plane->state->color_encoding, + plane->state->color_range); + } else { + if (mixer->cfg->de_type >= sun8i_mixer_de3) + sun50i_afbc_disable(mixer, layer->channel); + sun8i_vi_layer_update_alpha(mixer, layer->channel, + layer->overlay, plane); + sun8i_vi_layer_update_formats(mixer, layer->channel, + layer->overlay, plane); + sun8i_vi_layer_update_buffer(mixer, layer->channel, + layer->overlay, plane); + } sun8i_vi_layer_update_coord(mixer, layer->channel, - layer->overlay, plane, zpos); - sun8i_vi_layer_update_alpha(mixer, layer->channel, - layer->overlay, plane); - sun8i_vi_layer_update_formats(mixer, layer->channel, - layer->overlay, plane); - sun8i_vi_layer_update_buffer(mixer, layer->channel, - layer->overlay, plane); + layer->overlay, plane, zpos, afbc); sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, true, zpos, old_zpos); } +static bool sun8i_vi_layer_format_mod_supported(struct drm_plane *plane, + u32 format, u64 modifier) +{ + struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); + + return sun50i_afbc_format_mod_supported(layer->mixer, format, modifier); +} + static const struct drm_plane_helper_funcs sun8i_vi_layer_helper_funcs = { .atomic_check = sun8i_vi_layer_atomic_check, .atomic_disable = sun8i_vi_layer_atomic_disable, @@ -447,6 +487,7 @@ static const struct drm_plane_funcs sun8i_vi_layer_funcs = { .disable_plane = drm_atomic_helper_disable_plane, .reset = drm_atomic_helper_plane_reset, .update_plane = drm_atomic_helper_update_plane, + .format_mod_supported = sun8i_vi_layer_format_mod_supported, }; /* @@ -530,6 +571,11 @@ static const u32 sun8i_vi_layer_de3_formats[] = { DRM_FORMAT_YVU411, DRM_FORMAT_YVU420, DRM_FORMAT_YVU422, + + /* AFBC only formats */ + DRM_FORMAT_YUV420_8BIT, + DRM_FORMAT_YUV420_10BIT, + DRM_FORMAT_Y210, }; static const uint64_t sun8i_layer_modifiers[] = { @@ -537,6 +583,18 @@ static const uint64_t sun8i_layer_modifiers[] = { DRM_FORMAT_MOD_INVALID }; +static const uint64_t sun50i_layer_de3_modifiers[] = { + DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | + AFBC_FORMAT_MOD_SPARSE | + AFBC_FORMAT_MOD_SPLIT), + DRM_FORMAT_MOD_ARM_AFBC(AFBC_FORMAT_MOD_BLOCK_SIZE_16x16 | + AFBC_FORMAT_MOD_YTR | + AFBC_FORMAT_MOD_SPARSE | + AFBC_FORMAT_MOD_SPLIT), + DRM_FORMAT_MOD_LINEAR, + DRM_FORMAT_MOD_INVALID +}; + struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, struct sun8i_mixer *mixer, int index) @@ -545,6 +603,7 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, u32 supported_encodings, supported_ranges; unsigned int plane_cnt, format_count; struct sun8i_vi_layer *layer; + const uint64_t *modifiers; const u32 *formats; int ret; @@ -559,9 +618,11 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, if (mixer->cfg->de_type >= sun8i_mixer_de3) { formats = sun8i_vi_layer_de3_formats; format_count = ARRAY_SIZE(sun8i_vi_layer_de3_formats); + modifiers = sun50i_layer_de3_modifiers; } else { formats = sun8i_vi_layer_formats; format_count = ARRAY_SIZE(sun8i_vi_layer_formats); + modifiers = sun8i_layer_modifiers; } if (!mixer->cfg->ui_num && index == 0) @@ -571,8 +632,7 @@ struct sun8i_vi_layer *sun8i_vi_layer_init_one(struct drm_device *drm, ret = drm_universal_plane_init(drm, &layer->plane, 0, &sun8i_vi_layer_funcs, formats, format_count, - sun8i_layer_modifiers, - type, NULL); + modifiers, type, NULL); if (ret) { dev_err(drm->dev, "Couldn't initialize layer\n"); return ERR_PTR(ret); From patchwork Thu Jun 20 11:29:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705235 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 448FCC27C79 for ; Thu, 20 Jun 2024 11:34:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=byay3bVkSZOMxJBz7Y+qMr/UmWtrasWaZ64IM6CEfjg=; b=Z4F2NBVLYqmxLIfgaQx09HNFGO agN3zJiS50no7hkbZ5zTOX/0ul7UDeIuBKKMLu6k/jeoYltz9kZ5NI4Hy6qTG0g+Cc7FSflv3tJZ+ cEXwgwG+DqgEphiWOLb4+wQgCkMJ5HIT8XrNtG1BrBcA4Ysp09nMhJcb9wpv9tdwknXUoVrx8Lkol guPFSQMkEGEvFys/O1AN0IL8K1kT3ehv+ISczPo7cWK/j+0Xk6Lah3ILLFlBTzxx+lTh32bm1CXzl 91OxGircvOT3ziUytalld1acvqdFIU86KRImeFcM8S9x1bpP8cFCohbxWlCH63OBk4mew1JYyrnnP Fl0S7wJg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG3x-00000004mnb-0P6j; Thu, 20 Jun 2024 11:34:45 +0000 Received: from fhigh3-smtp.messagingengine.com ([103.168.172.154]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG35-00000004mGY-3aIk for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:33:54 +0000 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailfhigh.nyi.internal (Postfix) with ESMTP id E52561140278; Thu, 20 Jun 2024 07:33:50 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute4.internal (MEProxy); Thu, 20 Jun 2024 07:33:50 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883230; x= 1718969630; bh=byay3bVkSZOMxJBz7Y+qMr/UmWtrasWaZ64IM6CEfjg=; b=U nrcPFVgGVs+kL228acUu92m50/98x8iK9cWa+fBOPHKyYWjmCgbTxHFIBLMAwWzW fegMR0ip4bGfZsWB2UH1lYpdGzu0ZQt6JzFnZruLkUNvIA2Mbimlc5qbCA8gHf7I L0FareFLD1nqAFo4iY0D24VpMaQ0LhyEVxZQMAN8kzDMItFq1gxlCbUHkN3pTFTr KzNW5kN9zsbxJfR9b1F/uaDFAsgC/74rrot6NwBqaeiE6n8rHqEbNFBjU6XEBp74 4/b4O/j3KUv55fybarKMnF0YO+y0oBfxX3Gt2Nu8B+TYkkvNbpRlY9TfCGNj1S/u mUJv9nHdbyDYyFyzHv7SA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883230; x= 1718969630; bh=byay3bVkSZOMxJBz7Y+qMr/UmWtrasWaZ64IM6CEfjg=; b=o kryVCWi1cjsO+v6TSp4zaJWZEZazdXfeOSYM/1+0d0SRI3rGGeK1iIB5f37dNt49 iBPwqG0t25VMb8f8mmyjAyy2Uq+zQ0gf1+pZwiZHG+mjGVTVJxg/CCaoOVoAArIi 7F8A6PwiV8pl2TopscWdcpfJvVcl48ewThWBQJrbQgVLTuBHEiPwx62MfbG21MdG B6Y25slXloIVa3vqumy3evOYsSMcry7cvmYBR4Q8wwQwvFLfOIvgsIsm2xRWyIbi F24Hz5j6BHPEIleWvym8q56SHLim69G12b0iOKC/fpy53kzuYss4fxTXb3qZRP/Z 53eNrJOjZqd8F3ZQ7EEgA== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggeefucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:33:45 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 18/23] dt-bindings: allwinner: add H616 DE33 bus, clock and display bindings Date: Thu, 20 Jun 2024 23:29:56 +1200 Message-ID: <20240620113150.83466-19-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043352_439283_F9896459 X-CRM114-Status: UNSURE ( 9.35 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Allwinner H616 and variants have a new display engine revision (DE33). Add display engine bus, clock and mixer bindings for the DE33. Signed-off-by: Ryan Walklin --- .../devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml | 7 ++++--- .../bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml | 1 + .../bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml | 1 + 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml b/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml index 9845a187bdf65..631027375e33b 100644 --- a/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml +++ b/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml @@ -23,9 +23,10 @@ properties: compatible: oneOf: - const: allwinner,sun50i-a64-de2 - - items: - - const: allwinner,sun50i-h6-de3 - - const: allwinner,sun50i-a64-de2 + - enum: + - allwinner,sun50i-h6-de3 + - allwinner,sun50i-h616-de33 + - const: allwinner,sun50i-a64-de2 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml index 70369bd633e40..7fcd55d468d49 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun8i-a83t-de2-clk.yaml @@ -25,6 +25,7 @@ properties: - const: allwinner,sun50i-a64-de2-clk - const: allwinner,sun50i-h5-de2-clk - const: allwinner,sun50i-h6-de3-clk + - const: allwinner,sun50i-h616-de33-clk - items: - const: allwinner,sun8i-r40-de2-clk - const: allwinner,sun8i-h3-de2-clk diff --git a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml index b75c1ec686ad2..c37eb8ae1b8ee 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun8i-a83t-de2-mixer.yaml @@ -24,6 +24,7 @@ properties: - allwinner,sun50i-a64-de2-mixer-0 - allwinner,sun50i-a64-de2-mixer-1 - allwinner,sun50i-h6-de3-mixer-0 + - allwinner,sun50i-h616-de33-mixer-0 reg: maxItems: 1 From patchwork Thu Jun 20 11:29:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705236 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B1A2CC27C79 for ; Thu, 20 Jun 2024 11:34:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=zAFJQHsCA6T/KnG6k6AwcsnCn0bPOeW7iUnBKgovQvA=; b=NpKxjRkagnVqICUx7kFtGXFJdh kKrOozXlTSMy9YQvIv/gBLDXRgVqDL0C+mkTGzeF00+BPkrvwwPLETQTR6uBjGVq90zfmm3sIJa2B WctlWYh91VOss/eMdqn00WGiuOxFrydKlQ7uzpJV0wVLfOG3kcRpSmUtUTQ5vpF9ExHD5cDyPV6VU MDOP72fosx6wmtOisFSlcw5LWOlTPTIEDw2DUxOgG/UbnOk8cnth3CT/ymhU4SaSGUUoxVMAeXOhC el5rAggzTjKRc0JPDXRp+kd0N4haZ323KoFZO+KyEOwC71sfm//D8tJGJibP4w3JIVLP1WjR6PfDY r49qRCLA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG3y-00000004moZ-35Jr; Thu, 20 Jun 2024 11:34:46 +0000 Received: from fhigh3-smtp.messagingengine.com ([103.168.172.154]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG3B-00000004mL9-1Za8 for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:34:00 +0000 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailfhigh.nyi.internal (Postfix) with ESMTP id 91C2B1140275; Thu, 20 Jun 2024 07:33:56 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute3.internal (MEProxy); Thu, 20 Jun 2024 07:33:56 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883236; x= 1718969636; bh=zAFJQHsCA6T/KnG6k6AwcsnCn0bPOeW7iUnBKgovQvA=; b=Q LMGPBcKeEXu5hFdSF2cqztKrSIHmFMLpZTgwDuESPrtEnJ6ykrx4WxgJHtXF7FsU MA9OBD9fYPpPCHorHKYT6Hb1YJFmeqmKSjqYdPKbsZOitqydv3jqNh2N2himamcd AuSywgVkDD2dSKjHfUuNxBc7zFGM92CORFaiQqTf6wVZ601Jlb+XDiRtRF3JjQGD jCrTu8G8E3RUD+E/VBR6eCDX5M/NqCVVmuJx1fsxZn1YiuqUwjLpMXNwrwJgfvUX J+grWlJXOoQIu+HD0BEgOlVw+C99CuZXhl4D3rw5orUQ1OsAL1dhRh3RDc3sxRT5 QQSGF0srTro5CuR6vILlg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883236; x= 1718969636; bh=zAFJQHsCA6T/KnG6k6AwcsnCn0bPOeW7iUnBKgovQvA=; b=m DFVYOerzHA1+oK7g14vVRCGtty0/K+VfF+PgJCzEclvcONncDC3WbxEJpeWdb8aG TwB3l8SNI6lJyWPkPszD6R+iUKiOoNrCWdAmToQtl7kcce9zrxSi/VrIg3T+TROd tKvqAzTkM5AnOGT+HmmIgDyCPakm+NnJlso2G03ikJnFsqadYaWiuq4vrTh6gaiz V5+ltPetLrykbJaBPQbE+a5f2KteC/1xqdpmDsd0EXrW8yXWSTFyvP5Erzuwm2nS XGyvs6ZyiaHohi8sYQ8xNHFbn8rTIipgOeDj6ekT65ywm+rPMm8UrwU0Jkg5DME3 efq7qy3jtVjXrdcdbISYQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggeefucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpedunecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:33:51 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 19/23] clk: sunxi-ng: ccu: add Display Engine 3.3 (DE33) support Date: Thu, 20 Jun 2024 23:29:57 +1200 Message-ID: <20240620113150.83466-20-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043357_996593_10F82EF1 X-CRM114-Status: GOOD ( 14.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The DE33 is a newer version of the Allwinner Display Engine IP block, found in the H616, H618, H700 and T507 SoCs. DE2 and DE3 are already supported by the mainline driver. The DE33 in the H616 has mixer0, mixer1 and writeback units. The clocks and resets required are identical to the H3 and H5 respectively, so use those existing structs for the H616 description. There are two additional 32-bit registers (at offsets 0x24 and 0x28) which require clearing and setting respectively to bring up the hardware. The function of these registers is currently unknown, and the values are taken from the out-of-tree driver. Add the required clock description struct and compatible string to the DE2 driver. Signed-off-by: Ryan Walklin --- drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c index b0b8dba239aec..36b9eadb80bb5 100644 --- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c +++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include @@ -239,6 +240,16 @@ static const struct sunxi_ccu_desc sun50i_h5_de2_clk_desc = { .num_resets = ARRAY_SIZE(sun50i_h5_de2_resets), }; +static const struct sunxi_ccu_desc sun50i_h616_de33_clk_desc = { + .ccu_clks = sun8i_de2_ccu_clks, + .num_ccu_clks = ARRAY_SIZE(sun8i_de2_ccu_clks), + + .hw_clks = &sun8i_h3_de2_hw_clks, + + .resets = sun50i_h5_de2_resets, + .num_resets = ARRAY_SIZE(sun50i_h5_de2_resets), +}; + static int sunxi_de2_clk_probe(struct platform_device *pdev) { struct clk *bus_clk, *mod_clk; @@ -290,6 +301,16 @@ static int sunxi_de2_clk_probe(struct platform_device *pdev) "Couldn't deassert reset control: %d\n", ret); goto err_disable_mod_clk; } + + /* + * The DE33 requires these additional (unknown) registers set + * during initialisation. + */ + if (of_device_is_compatible(pdev->dev.of_node, + "allwinner,sun50i-h616-de33-clk")) { + writel(0, reg + 0x24); + writel(0x0000A980, reg + 0x28); + } ret = devm_sunxi_ccu_probe(&pdev->dev, reg, ccu_desc); if (ret) @@ -335,6 +356,10 @@ static const struct of_device_id sunxi_de2_clk_ids[] = { .compatible = "allwinner,sun50i-h6-de3-clk", .data = &sun50i_h5_de2_clk_desc, }, + { + .compatible = "allwinner,sun50i-h616-de33-clk", + .data = &sun50i_h616_de33_clk_desc, + }, { } }; MODULE_DEVICE_TABLE(of, sunxi_de2_clk_ids); From patchwork Thu Jun 20 11:29:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705241 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2F303C2BA1A for ; Thu, 20 Jun 2024 11:35:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Ro/TCO8lYZTsKG1hCDxzBUImlBR6qhvIgKxtEw0KQdA=; b=QZpOnhcfIVfB5bfh9NPrczPzPE xRgf9JtSP1LbBTQgIoy33IZaeAvbXMvj7jSFr6Bev6H/ZJg0SilwTk0hPz6BoNvkDb4ubkjK93uQh 5Ge+65BwoyaTmke7RKYd2mNk3y0BHeuSAKrH6dR5iqmESnQbiYVBXlUBino8BYrEBUiWZcYN+lbO5 kab+983Oa0jd9cdJ4O7rSnm94hRLt2LUZDRQCv1uPXnT67fFl8tc+Y2xemuVd9d02wPKZkkyFvBmI NIz0/7OOjY29WFlMiQYtGVMZuC03GuEx0TZ/SGSzHCpAjO4lbB3eDChXFRzHh2G9pCCHrFp38oTau g6rsJHnA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG45-00000004mtP-1tR9; Thu, 20 Jun 2024 11:34:53 +0000 Received: from fout6-smtp.messagingengine.com ([103.168.172.149]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG3H-00000004mPB-0OsC for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:34:04 +0000 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailfout.nyi.internal (Postfix) with ESMTP id 4269813804CE; Thu, 20 Jun 2024 07:34:02 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Thu, 20 Jun 2024 07:34:02 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883242; x= 1718969642; bh=Ro/TCO8lYZTsKG1hCDxzBUImlBR6qhvIgKxtEw0KQdA=; b=s b4OdhII32wjBESkDUPGIzFCBnhPu7+kW9jliKkd/hlxGomQ4AHq3+eUWeud6vkPK wsfiB0G1vX1mS/sZMHexBjItbSMOPKRtO3zn6xXcKYYSy/RCmwdpdyn9nrPL2AWB Lc3FxPI+/aMGn1uJMRbUXn7YkRXGo8V3FNZqr1yda2RxGBYx/ebCU6Tkgeb7dc3J Yi7+kpSXpSmRAkZbirgEf1U5HlJNBo9d4hDaUo1blN7WzwjZsIoxyJk8UGwC8xK9 TqWacUMEuub+T/6LplCwYzEFc7gk8wYG/g8G7N45398A/ERAGiHmdSgww4Zngry4 jt1P7BYW8Oi8hwZUQ4m8Q== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883242; x= 1718969642; bh=Ro/TCO8lYZTsKG1hCDxzBUImlBR6qhvIgKxtEw0KQdA=; b=O ajAbn3T59SPKkhem88bIRAWObTrSJaMYdBEj9CEGFzYNpk9vBuKe8TsFXBRSsSto k3EC0gQzFA7SruRIoUzgp41Tz+mKmlqrbL3ascfZkJgVrilp0CY2280CXsesgpcW dkG2+tT+2a9IpJnjDK+cMj9zkp6cov+bXudJydHarO5zytiyZZcrRDgaPCQN5Jhp 899ci1+lS1M/ydhtX78I9FU3qpSRnXPIme8jkVt8oYBSIHy1c0iTy9vacsW6w299 F4A9cWo/h/G9wOFsaDpuJsvVap4duRljGCmibjLherzxgbB5F8EvmUC6GjsoIG9o Yqx45an5MyOr2Jg4qe8oQ== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpeejnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:33:56 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 20/23] drm: sun4i: de33: mixer: add Display Engine 3.3 (DE33) support Date: Thu, 20 Jun 2024 23:29:58 +1200 Message-ID: <20240620113150.83466-21-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043403_429463_4C2A5D63 X-CRM114-Status: GOOD ( 23.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec The DE33 is a newer version of the Allwinner Display Engine IP block, found in the H616, H618, H700 and T507 SoCs. DE2 and DE3 are already supported by the mainline driver. Notable features (from the H616 datasheet and implemented): - 4096 x 2048 (4K) output support - AFBC ARM Frame Buffer Compression support - YUV420 input support Extend the mixer to support the DE33. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_mixer.c | 109 ++++++++++++++++++++++++---- drivers/gpu/drm/sun4i/sun8i_mixer.h | 16 +++- 2 files changed, 108 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/sun8i_mixer.c index 533aa93d2a30e..cc0726f9cb4ae 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -254,10 +254,16 @@ int sun8i_mixer_drm_format_to_hw(u32 format, u32 *hw_format) static void sun8i_mixer_commit(struct sunxi_engine *engine) { + struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); + DRM_DEBUG_DRIVER("Committing changes\n"); - regmap_write(engine->regs, SUN8I_MIXER_GLOBAL_DBUFF, - SUN8I_MIXER_GLOBAL_DBUFF_ENABLE); + if (mixer->cfg->de_type == sun8i_mixer_de33) + regmap_write(mixer->top_regs, SUN50I_MIXER_GLOBAL_DBUFF, + SUN8I_MIXER_GLOBAL_DBUFF_ENABLE); + else + regmap_write(engine->regs, SUN8I_MIXER_GLOBAL_DBUFF, + SUN8I_MIXER_GLOBAL_DBUFF_ENABLE); } static struct drm_plane **sun8i_layers_init(struct drm_device *drm, @@ -306,25 +312,33 @@ static void sun8i_mixer_mode_set(struct sunxi_engine *engine, const struct drm_display_mode *mode) { struct sun8i_mixer *mixer = engine_to_sun8i_mixer(engine); + struct regmap *bld_regs, *disp_regs; u32 bld_base, size, val; bool interlaced; bld_base = sun8i_blender_base(mixer); + bld_regs = sun8i_blender_regmap(mixer); interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); size = SUN8I_MIXER_SIZE(mode->hdisplay, mode->vdisplay); DRM_DEBUG_DRIVER("Updating global size W: %u H: %u\n", mode->hdisplay, mode->vdisplay); - regmap_write(engine->regs, SUN8I_MIXER_GLOBAL_SIZE, size); - regmap_write(engine->regs, SUN8I_MIXER_BLEND_OUTSIZE(bld_base), size); + if (mixer->cfg->de_type == sun8i_mixer_de33) { + disp_regs = mixer->disp_regs; + regmap_write(mixer->top_regs, SUN50I_MIXER_GLOBAL_SIZE, size); + } else { + disp_regs = mixer->engine.regs; + regmap_write(mixer->engine.regs, SUN8I_MIXER_GLOBAL_SIZE, size); + } + regmap_write(bld_regs, SUN8I_MIXER_BLEND_OUTSIZE(bld_base), size); if (interlaced) val = SUN8I_MIXER_BLEND_OUTCTL_INTERLACED; else val = 0; - regmap_update_bits(engine->regs, SUN8I_MIXER_BLEND_OUTCTL(bld_base), + regmap_update_bits(bld_regs, SUN8I_MIXER_BLEND_OUTCTL(bld_base), SUN8I_MIXER_BLEND_OUTCTL_INTERLACED, val); DRM_DEBUG_DRIVER("Switching display mixer interlaced mode %s\n", @@ -335,10 +349,8 @@ static void sun8i_mixer_mode_set(struct sunxi_engine *engine, else val = 0xff108080; - regmap_write(mixer->engine.regs, - SUN8I_MIXER_BLEND_BKCOLOR(bld_base), val); - regmap_write(mixer->engine.regs, - SUN8I_MIXER_BLEND_ATTR_FCOLOR(bld_base, 0), val); + regmap_write(disp_regs, SUN8I_MIXER_BLEND_BKCOLOR(bld_base), val); + regmap_write(disp_regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(bld_base, 0), val); if (mixer->cfg->has_formatter) sun50i_fmt_setup(mixer, mode->hdisplay, @@ -378,12 +390,29 @@ static const struct sunxi_engine_ops sun8i_engine_ops = { }; static const struct regmap_config sun8i_mixer_regmap_config = { + .name = "layers", .reg_bits = 32, .val_bits = 32, .reg_stride = 4, .max_register = 0xffffc, /* guessed */ }; +static const struct regmap_config sun8i_top_regmap_config = { + .name = "top", + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = 0x3c, +}; + +static const struct regmap_config sun8i_disp_regmap_config = { + .name = "display", + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, + .max_register = 0x20000, +}; + static int sun8i_mixer_of_get_id(struct device_node *node) { struct device_node *ep, *remote; @@ -406,35 +435,45 @@ static int sun8i_mixer_of_get_id(struct device_node *node) static void sun8i_mixer_init(struct sun8i_mixer *mixer) { + struct regmap *top_regs, *disp_regs; unsigned int base; int plane_cnt, i; base = sun8i_blender_base(mixer); + if (mixer->cfg->de_type == sun8i_mixer_de33) { + top_regs = mixer->top_regs; + disp_regs = mixer->disp_regs; + } else { + top_regs = disp_regs = mixer->engine.regs; + } /* Enable the mixer */ - regmap_write(mixer->engine.regs, SUN8I_MIXER_GLOBAL_CTL, + regmap_write(top_regs, SUN8I_MIXER_GLOBAL_CTL, SUN8I_MIXER_GLOBAL_CTL_RT_EN); + if (mixer->cfg->de_type == sun8i_mixer_de33) + regmap_write(top_regs, SUN50I_MIXER_GLOBAL_CLK, 1); + /* Set background color to black */ - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_BKCOLOR(base), + regmap_write(disp_regs, SUN8I_MIXER_BLEND_BKCOLOR(base), SUN8I_MIXER_BLEND_COLOR_BLACK); /* * Set fill color of bottom plane to black. Generally not needed * except when VI plane is at bottom (zpos = 0) and enabled. */ - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), + regmap_write(disp_regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), SUN8I_MIXER_BLEND_PIPE_CTL_FC_EN(0)); - regmap_write(mixer->engine.regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, 0), + regmap_write(disp_regs, SUN8I_MIXER_BLEND_ATTR_FCOLOR(base, 0), SUN8I_MIXER_BLEND_COLOR_BLACK); plane_cnt = mixer->cfg->vi_num + mixer->cfg->ui_num; for (i = 0; i < plane_cnt; i++) - regmap_write(mixer->engine.regs, + regmap_write(disp_regs, SUN8I_MIXER_BLEND_MODE(base, i), SUN8I_MIXER_BLEND_MODE_DEF); - regmap_update_bits(mixer->engine.regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), + regmap_update_bits(disp_regs, SUN8I_MIXER_BLEND_PIPE_CTL(base), SUN8I_MIXER_BLEND_PIPE_CTL_EN_MSK, 0); } @@ -510,6 +549,30 @@ static int sun8i_mixer_bind(struct device *dev, struct device *master, return PTR_ERR(mixer->engine.regs); } + if (mixer->cfg->de_type == sun8i_mixer_de33) { + regs = devm_platform_ioremap_resource(pdev, 1); + if (IS_ERR(regs)) + return PTR_ERR(regs); + + mixer->top_regs = devm_regmap_init_mmio(dev, regs, + &sun8i_top_regmap_config); + if (IS_ERR(mixer->top_regs)) { + dev_err(dev, "Couldn't create the top regmap\n"); + return PTR_ERR(mixer->top_regs); + } + + regs = devm_platform_ioremap_resource(pdev, 2); + if (IS_ERR(regs)) + return PTR_ERR(regs); + + mixer->disp_regs = devm_regmap_init_mmio(dev, regs, + &sun8i_disp_regmap_config); + if (IS_ERR(mixer->disp_regs)) { + dev_err(dev, "Couldn't create the disp regmap\n"); + return PTR_ERR(mixer->disp_regs); + } + } + mixer->reset = devm_reset_control_get(dev, NULL); if (IS_ERR(mixer->reset)) { dev_err(dev, "Couldn't get our reset line\n"); @@ -725,6 +788,18 @@ static const struct sun8i_mixer_cfg sun50i_h6_mixer0_cfg = { .vi_num = 1, }; +static const struct sun8i_mixer_cfg sun50i_h616_mixer0_cfg = { + .ccsc = CCSC_MIXER0_LAYOUT, + .de_type = sun8i_mixer_de33, + .has_formatter = 1, + .mod_rate = 600000000, + .scaler_mask = 0xf, + .scanline_yuv = 4096, + .ui_num = 3, + .vi_num = 1, + .map = {0, 6, 7, 8}, +}; + static const struct of_device_id sun8i_mixer_of_table[] = { { .compatible = "allwinner,sun8i-a83t-de2-mixer-0", @@ -770,6 +845,10 @@ static const struct of_device_id sun8i_mixer_of_table[] = { .compatible = "allwinner,sun50i-h6-de3-mixer-0", .data = &sun50i_h6_mixer0_cfg, }, + { + .compatible = "allwinner,sun50i-h616-de33-mixer-0", + .data = &sun50i_h616_mixer0_cfg, + }, { } }; MODULE_DEVICE_TABLE(of, sun8i_mixer_of_table); diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.h b/drivers/gpu/drm/sun4i/sun8i_mixer.h index ed7370688d52e..29bc07a6868d5 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.h +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.h @@ -20,6 +20,10 @@ #define SUN8I_MIXER_GLOBAL_DBUFF 0x8 #define SUN8I_MIXER_GLOBAL_SIZE 0xc +#define SUN50I_MIXER_GLOBAL_SIZE 0x8 +#define SUN50I_MIXER_GLOBAL_CLK 0xc +#define SUN50I_MIXER_GLOBAL_DBUFF 0x10 + #define SUN8I_MIXER_GLOBAL_CTL_RT_EN BIT(0) #define SUN8I_MIXER_GLOBAL_DBUFF_ENABLE BIT(0) @@ -153,6 +157,7 @@ enum { enum sun8i_mixer_type { sun8i_mixer_de2, sun8i_mixer_de3, + sun8i_mixer_de33, }; /** @@ -179,6 +184,7 @@ struct sun8i_mixer_cfg { unsigned int de_type; unsigned int has_formatter : 1; unsigned int scanline_yuv; + unsigned int map[6]; }; struct sun8i_mixer { @@ -190,6 +196,9 @@ struct sun8i_mixer { struct clk *bus_clk; struct clk *mod_clk; + + struct regmap *top_regs; + struct regmap *disp_regs; }; static inline struct sun8i_mixer * @@ -207,13 +216,16 @@ sun8i_blender_base(struct sun8i_mixer *mixer) static inline struct regmap * sun8i_blender_regmap(struct sun8i_mixer *mixer) { - return mixer->engine.regs; + return mixer->cfg->de_type == sun8i_mixer_de33 ? + mixer->disp_regs : mixer->engine.regs; } static inline u32 sun8i_channel_base(struct sun8i_mixer *mixer, int channel) { - if (mixer->cfg->de_type == sun8i_mixer_de3) + if (mixer->cfg->de_type == sun8i_mixer_de33) + return mixer->cfg->map[channel] * 0x20000 + DE2_CH_SIZE; + else if (mixer->cfg->de_type == sun8i_mixer_de3) return DE3_CH_BASE + channel * DE3_CH_SIZE; else return DE2_CH_BASE + channel * DE2_CH_SIZE; From patchwork Thu Jun 20 11:29:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705242 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 46D20C27C79 for ; Thu, 20 Jun 2024 11:35:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=W54qNAIgfswH0qufxPq1pk+nBXXlOeRKiKQkbLO+VCU=; b=nTY1Ylg4AIvPur96b0EMcNipjE v3Wcq5qnGAD2V6kAxxHOfL9KF5li4YtCkrTJmyHGL/72xJhQ+8x9ASkrKWkTs9hgjx/0dEj/xxSmx Dn0GZ0FuiIK8fTqAjG+BPHrBy/HhiK8Qa6rnenMt+e/rG/R0MbFFZJDpMl7idWrvynBO1JMQyXC/a MR5YDXuj1Lu8hWWv6YZFGzvy4a/fytxmyDhPFTUVBbfgpu7wZ2A/5tiv2UUveaVARhVChaBXGAL5v rF29bPbbIjxHkHC2EGuzlAjFZI+oG3B2CdmEqLPcIvCdQ3IFIRYUBnowJEcSKCJG7VA7/HwHlpIJ8 5vUGKrQg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG47-00000004mux-3ROf; Thu, 20 Jun 2024 11:34:55 +0000 Received: from fout6-smtp.messagingengine.com ([103.168.172.149]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG3M-00000004mSh-2MYg for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:34:10 +0000 Received: from compute2.internal (compute2.nyi.internal [10.202.2.46]) by mailfout.nyi.internal (Postfix) with ESMTP id DF2F01380503; Thu, 20 Jun 2024 07:34:07 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute2.internal (MEProxy); Thu, 20 Jun 2024 07:34:07 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883247; x= 1718969647; bh=W54qNAIgfswH0qufxPq1pk+nBXXlOeRKiKQkbLO+VCU=; b=F 3WYIjouU0phOqu7Gv0kkUbllmmHf3UR4+MN75E4C5wNYjvURXQq5TmikpGAeLGyd j1UV3y1uv7Y8TUylf9kl8hFOkHh4Ge2pd2kga4rnODtzMIy1gQ1t5crBcQ0Pti8d I06eEorbJlckew8GjuS2Oh2u728KnVSQDdg4NABrqt+IqQVz68gqY58g0iTUMRR0 MLIae7qjztAGqdSbNKc5Xj4wI7A0BO+HlzTtJhdzJ0iR6th4Yh+AUX9/gu1ASXlp YhQBrEaFkV4Z22jBiX2fmXXvmZm1r2I59XEY85i2+D7CgPXOe7lj+jDrriVqKp84 bWbhsPwsEFTaKYocERbgw== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883247; x= 1718969647; bh=W54qNAIgfswH0qufxPq1pk+nBXXlOeRKiKQkbLO+VCU=; b=u x9TMxwpFZJg6zHd41C7yQl39p8Ugy9TPVpqvKYZT+yizmX2RxgSi8rKfYAoEF40r WJkkdlM5ywXhabnQPqmeMe5+6J3YzGtuIp92J60t0yZ4essIQWcAWljnfR/ZAz28 9gTYrQyww6yiBn3xB2tlxcayRqVgwjizYAWjFIJAjK/l4O1LyEU1sSFClL8QF7Us VDs/PTx8L8nQtKaw61OiH0bI5gCNlt/Jt2GNOP7RZ/l5gP56hx0ZVydbTG39dMvH ax1MCqwCqCy3i5teQNBvFglyjI0jTTCm5XpsfaoRUA/JRNZ9DvsbMk7ysssXh6/b R+gfdKAyjisnbEIqbXTXg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggedvucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpedvnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:34:02 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 21/23] drm: sun4i: de33: vi_scaler: add Display Engine 3.3 (DE33) support Date: Thu, 20 Jun 2024 23:29:59 +1200 Message-ID: <20240620113150.83466-22-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043408_790655_7B7A4F79 X-CRM114-Status: GOOD ( 13.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec The vi_scaler appears to be used in preference to the ui_scaler module for hardware video scaling in the DE33. Enable support for this scaler. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 19 +++++++++++++++---- drivers/gpu/drm/sun4i/sun8i_vi_scaler.c | 7 ++++++- 2 files changed, 21 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c index 7f4d4dcfdc03d..1649816fe435e 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -146,12 +146,23 @@ static int sun8i_ui_layer_update_coord(struct sun8i_mixer *mixer, int channel, hscale = state->src_w / state->crtc_w; vscale = state->src_h / state->crtc_h; - sun8i_ui_scaler_setup(mixer, channel, src_w, src_h, dst_w, - dst_h, hscale, vscale, hphase, vphase); - sun8i_ui_scaler_enable(mixer, channel, true); + if (mixer->cfg->de_type == sun8i_mixer_de33) { + sun8i_vi_scaler_setup(mixer, channel, src_w, src_h, + dst_w, dst_h, hscale, vscale, + hphase, vphase, + state->fb->format); + } else { + sun8i_ui_scaler_setup(mixer, channel, src_w, src_h, + dst_w, dst_h, hscale, vscale, + hphase, vphase); + sun8i_ui_scaler_enable(mixer, channel, true); + } } else { DRM_DEBUG_DRIVER("HW scaling is not needed\n"); - sun8i_ui_scaler_enable(mixer, channel, false); + if (mixer->cfg->de_type == sun8i_mixer_de33) + sun8i_vi_scaler_disable(mixer, channel); + else + sun8i_ui_scaler_enable(mixer, channel, false); } /* Set base coordinates */ diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c index e7242301b312c..9c7f6e7d71d50 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_scaler.c @@ -835,7 +835,9 @@ static const u32 bicubic4coefftab32[480] = { static u32 sun8i_vi_scaler_base(struct sun8i_mixer *mixer, int channel) { - if (mixer->cfg->de_type == sun8i_mixer_de3) + if (mixer->cfg->de_type == sun8i_mixer_de33) + return sun8i_channel_base(mixer, channel) + 0x3000; + else if (mixer->cfg->de_type == sun8i_mixer_de3) return DE3_VI_SCALER_UNIT_BASE + DE3_VI_SCALER_UNIT_SIZE * channel; else @@ -845,6 +847,9 @@ static u32 sun8i_vi_scaler_base(struct sun8i_mixer *mixer, int channel) static bool sun8i_vi_scaler_is_vi_plane(struct sun8i_mixer *mixer, int channel) { + if (mixer->cfg->de_type == sun8i_mixer_de33) + return mixer->cfg->map[channel] < mixer->cfg->vi_num; + return true; } From patchwork Thu Jun 20 11:30:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705243 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4D470C27C79 for ; Thu, 20 Jun 2024 11:35:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=V6kXhDOR28GY7K17QHJNbJAm+pQYGaOIMaC93g+Xacc=; b=JUGX0D7Wb/lifqG3CcyZbD0Oce qQNkdOo/MN1Hx2Xq8Pky/+BON93F51ei+349a4I2o9RBRunM5bLL6F7rHa3vbc3L/64m8vJIYr+ZA VDJOxxWKngrZo1/BJurZts8t34hTJu4TDaKh+iNqR3THfGaAKfSPI/wy5KuMUcfll/SZI2Ti51NaA zohyxdK9vF6bHQwJ0G7/09vuHxSPnwxGQsfE42kvCykeS4OrT0rL92l2pzBr1uMd22S5POz1mkb5S oyGDHWTBvgurm8+38EmX2lwlPVMzvPNb0AdOrZwzWDpC9B+v2Kgp4LVITVehIY8HX7iMdZ72eX/DZ LjHuvStg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG4B-00000004myD-0oWT; Thu, 20 Jun 2024 11:34:59 +0000 Received: from fhigh3-smtp.messagingengine.com ([103.168.172.154]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG3S-00000004mWs-0pWQ for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:34:15 +0000 Received: from compute5.internal (compute5.nyi.internal [10.202.2.45]) by mailfhigh.nyi.internal (Postfix) with ESMTP id 8D8F51140247; Thu, 20 Jun 2024 07:34:13 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute5.internal (MEProxy); Thu, 20 Jun 2024 07:34:13 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883253; x= 1718969653; bh=V6kXhDOR28GY7K17QHJNbJAm+pQYGaOIMaC93g+Xacc=; b=5 UJF7jPrqhbOsSgtcIVDRcY1YliRM291ahaQ2R0wPah3KTa3ERV2i/6elLmwY9qJx n0CbkvmuQgWmkYAbRTiYGMT5zSpIUTwVfaKvj7StX0J96Z16gKirE2b9VM4avIMd tESHYosJyTvGDAfTBAwu0oWjIkD3M0noONvZH/vyDz/jyqIqcehtS25G4mNUPQk4 SOU3c0fYkZs7R7jVmuORRThxKOVBLbO0Qr4HXNdGzkP2r41dho5UK9jwuAsOzZb6 qWLD2UlsbkCW7zo/6CI89CjkT9q3jCI1+54TuQfu0jS4ya9+zI5R585NmTeE2TpO ycaOevsqbLVnyOhavfgcg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883253; x= 1718969653; bh=V6kXhDOR28GY7K17QHJNbJAm+pQYGaOIMaC93g+Xacc=; b=L vjgOaeI6hcaT1uiC5g7epGhMjj86Z7s9PLTuGAS5kEgFkURlYBPkkwAjQpsjSfmr qeAnR9PXRWwk0ifYEoXwS73rmHmbsCsWIoJ5b7CwrGo9ojG0ZkYMlSK9rU+g5+q1 t+h1cGJxNQt92OdZXUShMNxAj9pJaTdgDoHfBSXZaKqgb5Txv9pdz0Wtq4kuTqPj ittpHGFt0hGulE/F6vPENtUr5kgll9CiP0Mg8uWP0eKiHO3QmP9aum2+ssWKCDuT oBEZAvwKGybADmlSgASgZwZjV9RNsE2v6s7sSffhR1aXRAKOGpGjP3d0IQIzRtCR rdaJJV0pUI6BE1Q72JKsw== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggeefucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:34:08 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 22/23] drm: sun4i: de33: fmt: add Display Engine 3.3 (DE33) support Date: Thu, 20 Jun 2024 23:30:00 +1200 Message-ID: <20240620113150.83466-23-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043414_359923_1DD5526E X-CRM114-Status: GOOD ( 12.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec Like the DE3, the DE33 has a FMT (formatter) module, which provides YUV444 to YUV422/YUV420 conversion, format re-mapping and color depth conversion, although the DE33 module appears significantly more capable, including up to 4K video support. Add support for the DE33. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun50i_fmt.c | 21 +++++++++++++++++++-- drivers/gpu/drm/sun4i/sun50i_fmt.h | 1 + 2 files changed, 20 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun50i_fmt.c b/drivers/gpu/drm/sun4i/sun50i_fmt.c index 050a8716ae862..39682d4e6d208 100644 --- a/drivers/gpu/drm/sun4i/sun50i_fmt.c +++ b/drivers/gpu/drm/sun4i/sun50i_fmt.c @@ -51,6 +51,19 @@ static void sun50i_fmt_de3_limits(u32 *limits, u32 colorspace, bool bit10) } } +static void sun50i_fmt_de33_limits(u32 *limits, u32 colorspace) +{ + if (colorspace == SUN50I_FMT_CS_YUV444RGB) { + limits[0] = SUN50I_FMT_LIMIT(0, 4095); + limits[1] = SUN50I_FMT_LIMIT(0, 4095); + limits[2] = SUN50I_FMT_LIMIT(0, 4095); + } else { + limits[0] = SUN50I_FMT_LIMIT(256, 3840); + limits[1] = SUN50I_FMT_LIMIT(256, 3840); + limits[2] = SUN50I_FMT_LIMIT(256, 3840); + } +} + void sun50i_fmt_setup(struct sun8i_mixer *mixer, u16 width, u16 height, u32 format) { @@ -60,10 +73,14 @@ void sun50i_fmt_setup(struct sun8i_mixer *mixer, u16 width, colorspace = sun50i_fmt_get_colorspace(format); bit10 = sun50i_fmt_is_10bit(format); - base = SUN50I_FMT_DE3; + base = mixer->cfg->de_type == sun8i_mixer_de3 ? + SUN50I_FMT_DE3 : SUN50I_FMT_DE33; regs = sun8i_blender_regmap(mixer); - sun50i_fmt_de3_limits(limit, colorspace, bit10); + if (mixer->cfg->de_type == sun8i_mixer_de3) + sun50i_fmt_de3_limits(limit, colorspace, bit10); + else + sun50i_fmt_de33_limits(limit, colorspace); regmap_write(regs, SUN50I_FMT_CTRL(base), 0); diff --git a/drivers/gpu/drm/sun4i/sun50i_fmt.h b/drivers/gpu/drm/sun4i/sun50i_fmt.h index 4127f7206aade..3e60d5c788b39 100644 --- a/drivers/gpu/drm/sun4i/sun50i_fmt.h +++ b/drivers/gpu/drm/sun4i/sun50i_fmt.h @@ -9,6 +9,7 @@ #include "sun8i_mixer.h" #define SUN50I_FMT_DE3 0xa8000 +#define SUN50I_FMT_DE33 0x5000 #define SUN50I_FMT_CTRL(base) ((base) + 0x00) #define SUN50I_FMT_SIZE(base) ((base) + 0x04) From patchwork Thu Jun 20 11:30:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Walklin X-Patchwork-Id: 13705244 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3D990C2BA18 for ; Thu, 20 Jun 2024 11:35:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=dh4jgHU7dqTQKxlK6pguYFC4g/IfdITeRgccK+k+z4w=; b=kyIlncVzKvI2wYaIdMQ/UjFOcZ TXmhlW6tcaabmDU7XzG5psq3cIoTxEhrGk633hkfHYDlNlLLzNIBi9UfCpauiWSsjL18dvgvnwXIQ mWT6UOniDt5yfz3fUNrmvJpTNcNfvSdy1pqZwi5kAPTt9cqvjs614+k8uYi6xwGZJHS4bCfHFzax5 Z/SM80eCj0HwiYWXXpxeas4E0Q02pVYhSNCa7TiAkemx3RhvrU83eQFUM7w0ZQ94v4Q2SieAqTyFa 3Z2rE8roVJ9XZeSAAVYAkMUpw0fMXsqcd9fNImerikKzDKK63+rfBTpYL255CjbbTm+kkaCChev3b GeeX+61g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG4G-00000004n1m-11fi; Thu, 20 Jun 2024 11:35:04 +0000 Received: from fhigh3-smtp.messagingengine.com ([103.168.172.154]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sKG3X-00000004ma3-2vdq for linux-arm-kernel@lists.infradead.org; Thu, 20 Jun 2024 11:34:21 +0000 Received: from compute3.internal (compute3.nyi.internal [10.202.2.43]) by mailfhigh.nyi.internal (Postfix) with ESMTP id 1A75D1140275; Thu, 20 Jun 2024 07:34:19 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute3.internal (MEProxy); Thu, 20 Jun 2024 07:34:19 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=testtoast.com; h=cc:cc:content-transfer-encoding:content-type:date:date:from :from:in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to; s=fm2; t=1718883259; x= 1718969659; bh=dh4jgHU7dqTQKxlK6pguYFC4g/IfdITeRgccK+k+z4w=; b=X M0T6gzJAjOZS+ly6RX0EYwLbM+lIGoHLGgwVcod0EUvH9byAgaQdpYZJjTJOY1L1 HjOEQSw8aYCUOL7SXfUhEm8hZBIvtDY0EgnTDCQbZFKv8xiLbX+3ie7+BkCkKiBf ibCBIB7tdgqKqcjFkBuHgnAGRt0CZa9dOMZ1UMIUp1wcbxsAHpdlKZyEGZEu5xy7 X9E7SdVogavgyK7JUWawJxyGj1APFoE/AMUVdXpMlDyBYEIdSKq1iogZfqjmD4Hg aCo2wxIft2edhZQEaXrg8erUXUpgEOvLqLxtFCrhrXOiuC2rhrSsnutlOM8fcl6e LM3ft6x8je8HkiYdEQBAA== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:cc:content-transfer-encoding :content-type:date:date:feedback-id:feedback-id:from:from :in-reply-to:in-reply-to:message-id:mime-version:references :reply-to:subject:subject:to:to:x-me-proxy:x-me-proxy :x-me-sender:x-me-sender:x-sasl-enc; s=fm2; t=1718883259; x= 1718969659; bh=dh4jgHU7dqTQKxlK6pguYFC4g/IfdITeRgccK+k+z4w=; b=Y b4SgqKjXIKxoskE5+U1YNH8iuYyQ5ba7BgDC2YgQ/YZln9ytGYNITeOgFTmytfKf ZNficNeVfKa5QjPcN5t3QyoZfR4ZjJ6AygIBqiCVcSUlDGLTAeDbwL9Zlt1mGvNp ojAbY1XPWMv2Rrw8KtHJSRtEsTjbXQ7emhP6CouH/3aBagogixB0WqshajgsMtqx qkOgA8iPa2IE61J2wMzJ9X6tgIpDubluDvmQhyl0JWo8UNy84NC2QP5IXpam4sV3 9aFUUU0fRpet9omLZtREwUXR8lZH0ZXJMoroyMWRRuzbFxduX2qLNbtA1kVWoQC7 0Wmbxwb0ZtpfL42T5Y0Xg== X-ME-Sender: X-ME-Received: X-ME-Proxy-Cause: gggruggvucftvghtrhhoucdtuddrgedvledrfeefvddggeefucetufdoteggodetrfdotf fvucfrrhhofhhilhgvmecuhfgrshhtofgrihhlpdfqfgfvpdfurfetoffkrfgpnffqhgen uceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmne cujfgurhephffvvefufffkofgjfhgggfestdekredtredttdenucfhrhhomheptfihrghn ucghrghlkhhlihhnuceorhihrghnsehtvghsthhtohgrshhtrdgtohhmqeenucggtffrrg htthgvrhhnpeffheeiffegtdfgffejteevgeefkeelieelkeevueetffetteduffevgeei ieehteenucevlhhushhtvghrufhiiigvpedvnecurfgrrhgrmhepmhgrihhlfhhrohhmpe hrhigrnhesthgvshhtthhorghsthdrtghomh X-ME-Proxy: Feedback-ID: idc0145fc:Fastmail Received: by mail.messagingengine.com (Postfix) with ESMTPA; Thu, 20 Jun 2024 07:34:13 -0400 (EDT) From: Ryan Walklin To: Maxime Ripard , Chen-Yu Tsai , Maarten Lankhorst , Thomas Zimmermann , David Airlie , Daniel Vetter , Jernej Skrabec , Samuel Holland , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Michael Turquette , Stephen Boyd Cc: Andre Przywara , Chris Morgan , John Watts , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, devicetree@vger.kernel.org, linux-clk@vger.kernel.org, Ryan Walklin Subject: [PATCH 23/23] drm: sun4i: de33: csc: add Display Engine 3.3 (DE33) support Date: Thu, 20 Jun 2024 23:30:01 +1200 Message-ID: <20240620113150.83466-24-ryan@testtoast.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240620113150.83466-1-ryan@testtoast.com> References: <20240620113150.83466-1-ryan@testtoast.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240620_043419_862461_3D240D1F X-CRM114-Status: GOOD ( 15.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Jernej Skrabec Like earlier DE versions, the DE33 has a CSC (Color Space Correction) module. which provides color space conversion between BT2020/BT709, and dynamic range conversion between SDR/ST2084/HLG. Add support for the DE33. Signed-off-by: Jernej Skrabec Signed-off-by: Ryan Walklin --- drivers/gpu/drm/sun4i/sun8i_csc.c | 96 +++++++++++++++++++++++++++++++ drivers/gpu/drm/sun4i/sun8i_csc.h | 3 + 2 files changed, 99 insertions(+) diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.c b/drivers/gpu/drm/sun4i/sun8i_csc.c index 2d5a2cf7cba24..45bd1ca06400e 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.c +++ b/drivers/gpu/drm/sun4i/sun8i_csc.c @@ -238,6 +238,14 @@ static const u32 yuv2yuv_de3[2][3][3][12] = { }, }; +static u32 sun8i_csc_base(struct sun8i_mixer *mixer, int layer) +{ + if (mixer->cfg->de_type == sun8i_mixer_de33) + return sun8i_channel_base(mixer, layer) - 0x800; + else + return ccsc_base[mixer->cfg->ccsc][layer]; +} + static void sun8i_csc_setup(struct regmap *map, u32 base, enum format_type fmt_type, enum drm_color_encoding encoding, @@ -358,6 +366,90 @@ static void sun8i_de3_ccsc_setup(struct sunxi_engine *engine, int layer, mask, val); } +/* extract constant from high word and invert sign if necessary */ +static u32 sun8i_de33_ccsc_get_constant(u32 value) +{ + value >>= 16; + + if (value & BIT(15)) + return 0x400 - (value & 0x3ff); + + return value; +} + +static void sun8i_de33_convert_table(const u32 *src, u32 *dst) +{ + dst[0] = sun8i_de33_ccsc_get_constant(src[3]); + dst[1] = sun8i_de33_ccsc_get_constant(src[7]); + dst[2] = sun8i_de33_ccsc_get_constant(src[11]); + memcpy(&dst[3], src, sizeof(u32) * 12); + dst[6] &= 0xffff; + dst[10] &= 0xffff; + dst[14] &= 0xffff; +} + +static void sun8i_de33_ccsc_setup(struct sun8i_mixer *mixer, int layer, + enum format_type fmt_type, + enum drm_color_encoding encoding, + enum drm_color_range range) +{ + u32 addr, val = 0, base, csc[15]; + struct sunxi_engine *engine; + struct regmap *map; + const u32 *table; + int i; + + table = yuv2rgb_de3[range][encoding]; + base = sun8i_csc_base(mixer, layer); + engine = &mixer->engine; + map = engine->regs; + + switch (fmt_type) { + case FORMAT_TYPE_RGB: + if (engine->format == MEDIA_BUS_FMT_RGB888_1X24) + break; + val = SUN8I_CSC_CTRL_EN; + sun8i_de33_convert_table(rgb2yuv_de3[engine->encoding], csc); + regmap_bulk_write(map, SUN50I_CSC_COEFF(base, 0), csc, 15); + break; + case FORMAT_TYPE_YUV: + table = sun8i_csc_get_de3_yuv_table(encoding, range, + engine->format, + engine->encoding); + if (!table) + break; + val = SUN8I_CSC_CTRL_EN; + sun8i_de33_convert_table(table, csc); + regmap_bulk_write(map, SUN50I_CSC_COEFF(base, 0), csc, 15); + break; + case FORMAT_TYPE_YVU: + table = sun8i_csc_get_de3_yuv_table(encoding, range, + engine->format, + engine->encoding); + if (!table) + table = yuv2yuv_de3[range][encoding][encoding]; + val = SUN8I_CSC_CTRL_EN; + sun8i_de33_convert_table(table, csc); + for (i = 0; i < 15; i++) { + addr = SUN50I_CSC_COEFF(base, i); + if (i > 3) { + if (((i - 3) & 3) == 1) + addr = SUN50I_CSC_COEFF(base, i + 1); + else if (((i - 3) & 3) == 2) + addr = SUN50I_CSC_COEFF(base, i - 1); + } + regmap_write(map, addr, csc[i]); + } + break; + default: + val = 0; + DRM_WARN("Wrong CSC mode specified.\n"); + return; + } + + regmap_write(map, SUN8I_CSC_CTRL(base), val); +} + void sun8i_csc_set_ccsc(struct sun8i_mixer *mixer, int layer, enum format_type fmt_type, enum drm_color_encoding encoding, @@ -369,6 +461,10 @@ void sun8i_csc_set_ccsc(struct sun8i_mixer *mixer, int layer, sun8i_de3_ccsc_setup(&mixer->engine, layer, fmt_type, encoding, range); return; + } else if (mixer->cfg->de_type == sun8i_mixer_de33) { + sun8i_de33_ccsc_setup(mixer, layer, fmt_type, + encoding, range); + return; } if (layer < mixer->cfg->vi_num) { diff --git a/drivers/gpu/drm/sun4i/sun8i_csc.h b/drivers/gpu/drm/sun4i/sun8i_csc.h index b7546e06e315c..2b762cb79f02c 100644 --- a/drivers/gpu/drm/sun4i/sun8i_csc.h +++ b/drivers/gpu/drm/sun4i/sun8i_csc.h @@ -20,6 +20,9 @@ struct sun8i_mixer; #define SUN8I_CSC_CTRL(base) ((base) + 0x0) #define SUN8I_CSC_COEFF(base, i) ((base) + 0x10 + 4 * (i)) +#define SUN50I_CSC_COEFF(base, i) ((base) + 0x04 + 4 * (i)) +#define SUN50I_CSC_ALPHA(base) ((base) + 0x40) + #define SUN8I_CSC_CTRL_EN BIT(0) enum format_type {