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X-Microsoft-Antispam-Message-Info: SLK/vmaup7SPCnmqjhYKDScprAu+LQwO9d5szUCY27JzpLGEUknXufh9drVzFcOTyGywgag+IjMkRUfFTxFCKntRaZsuq+Hikyv+xc/PIX8qOulV7iGN3cKE54mmhKLXgCIkIc+wbdPQHhgL6iewyTr9yQYkSpE6Z0T4wHHanvSG7OweESuHvJHFNaTXdDpfAxUXF95dV8FQLb2mr/E0oYiN/yxK0QzI3URuCHleDFzbIonvIqEnFaBIXt6wlba8gDTUXvWsoO+P63+2SfQsn+oO355WQRg28pedplKOccbhMHaXuP/DxgvzS1S+ZzhnrKideJe2rA0ruIBx2QbHml2jntcOJtjXdgR9CR8HrHivmfhBbBKu+y5fG3W2LYjEPXzOZjPYk1WtkiFD7FIdNwMZZCoCgeku1iIkVDgtpDPDHh91UInoKGaheVmgqmky4+s727w/Cw+YTn1yGFgqvAjV46+6ajF3kKy2JvjQwRFHNJJ8scZudwWYULLGTanRO9Ye7vrLqb6I/KUc9hgxPElDTHdqEBTPLzGezdx0ZabW3ImFYtii5Z0eJdVBvOiCtuZerDi2MaQW+HkqlbWsCnU/KqXSYMfpsblr/3T78lbQWJZkW+9HMpbyBTgkg6MrUeatSiAFuqWPb54Xh06zogXwYwptXHMurhstm+2GoslIucLSv/YQyFXqvrW+VYEl1IAZCdA4fS+ZiBiagYBvOt6P1Q6YFMu8bdvp9H5sN3fU2/N7UQBmI/BN5xDNK32zDw8n9tzxD9zpGGITDarW50JHNYW3K/S8Ys5U8oli6V+iWPL14EMJZqYk97ZxMWuN4lujPv2vntoKytvGBA1RwVXjdSbvKlDFEB2UFAFgkUv4Nh+72a/mLDbCM/yuvBxLWA818FfAvE9Dy7Wk9tCDMiJWNSpTOG3dApH5YFESMr/fn2bz3WGKvDTFGu246ZIO73JJYS5v2qridncze+qHZT+fga6pmFfIMkaamQ5pmlYWsk+qM1Vn66OUWz+SWORowO8YV6ux3q7kMQO7VlBLKSk9lBg/ZuDz92OuLw2lMTkv6hDzDvvWn0mypw/IXN1xywK+Q8k2sXq+HGxpiOVp07slRxcEffCah6f46yiX7DlPH2cyz0BWZ0IRCmBFlig0VXSvnM7vx8McykaXaMPh3OVt6tAzJoAc79Ge7qKqVGFVZC70ihaeExMAsCeJYAc2Zy+JFBCST1gX3bSrOMutoPg+wsXVdDADPpAjBxlfKuXMtSbhCDanwsNBK7+bzlOeR+8zYKykCZpt9JRIZiSRe+m3uBgcKfCzKHlTeuTfWDUik0BaeBjJF1pmvz6wR2JRjJYX9aXGbrAiDqgJxlD/bNeKxg3FYgarYmP/Xhoq2INsBt4geUaS2zw5S5l6riPOuzbsSm7iEfRRC6j7jqJ2Aw== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230037)(376011)(36860700010)(1800799021)(82310400023);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Jun 2024 13:45:26.8633 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 6c0eb1f6-1cb2-40e9-0ce0-08dc951d1215 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB51.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH0PR12MB8488 cpudata->nominal_freq being in MHz whereas other frequencies being in KHz breaks the amd-pstate-ut frequency sanity check. This fixes it. Fixes: 14eb1c96e3a3 ("cpufreq: amd-pstate: Add test module for amd-pstate driver") Signed-off-by: Dhananjay Ugwekar Reviewed-by: Mario Limonciello Reviewed-by: Gautham R. Shenoy --- drivers/cpufreq/amd-pstate-ut.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/cpufreq/amd-pstate-ut.c b/drivers/cpufreq/amd-pstate-ut.c index fc275d41d51e..66b73c308ce6 100644 --- a/drivers/cpufreq/amd-pstate-ut.c +++ b/drivers/cpufreq/amd-pstate-ut.c @@ -202,6 +202,7 @@ static void amd_pstate_ut_check_freq(u32 index) int cpu = 0; struct cpufreq_policy *policy = NULL; struct amd_cpudata *cpudata = NULL; + u32 nominal_freq_khz; for_each_possible_cpu(cpu) { policy = cpufreq_cpu_get(cpu); @@ -209,13 +210,14 @@ static void amd_pstate_ut_check_freq(u32 index) break; cpudata = policy->driver_data; - if (!((cpudata->max_freq >= cpudata->nominal_freq) && - (cpudata->nominal_freq > cpudata->lowest_nonlinear_freq) && + nominal_freq_khz = cpudata->nominal_freq*1000; + if (!((cpudata->max_freq >= nominal_freq_khz) && + (nominal_freq_khz > cpudata->lowest_nonlinear_freq) && (cpudata->lowest_nonlinear_freq > cpudata->min_freq) && (cpudata->min_freq > 0))) { amd_pstate_ut_cases[index].result = AMD_PSTATE_UT_RESULT_FAIL; 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Tue, 25 Jun 2024 08:46:39 -0500 From: Dhananjay Ugwekar To: , , , , , , , CC: , , "Dhananjay Ugwekar" Subject: [PATCH 2/2] cpufreq/amd-pstate: Fix the scaling_min/max_freq setting on shared memory CPPC systems Date: Tue, 25 Jun 2024 13:41:29 +0000 Message-ID: <20240625134127.4464-3-Dhananjay.Ugwekar@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240625134127.4464-1-Dhananjay.Ugwekar@amd.com> References: <20240625134127.4464-1-Dhananjay.Ugwekar@amd.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB4D:EE_|PH7PR12MB6812:EE_ X-MS-Office365-Filtering-Correlation-Id: c5461196-f628-432d-68d3-08dc951d3f6e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230037|1800799021|376011|36860700010|82310400023; X-Microsoft-Antispam-Message-Info: O4AgdWcMd4sQqkkLtsXEgUGxL0w+SbvXmMsIR3wc1DxwHXEwSgCGOB++BhqryzHX0HofJbozI/MJRcJ4a6WNRStooJyf8+2Cj6L0ecZR+Ue0Vxi47fhznpHOQDiWW+q26rFALmDVIacr69HsDJ1bRYeo1CgiCHlHSBgqQvzBb7kQSolw5k7jRqNqUUyc01DmVH4r75nVlEvW2vLRVLEqARU7NzNVqQaNgknIp7mphQHc3CidLCG6NPg/Hfz71Fu5Rpp98+6l4Skp+yPRIFnnuh2VV3JuPnkOqTkso5gtzS6g39Y/fNJAL5Tivy84WgbR0FGHyV1pkGyEdWtcOxKnnCkcJ4KMTY/ksmazZTQ2YQXoa6o7iYqq6uEdOQWXrwMBSyut8qrlWZR2azVqayjzPPt4T1oDFVyLV6E2thN/IEsG9UnWb5UH9DApZzucMamWZTDrlOXjlP/j6y8IDhx6DEjkMod1ydJx5IBwn2vv/aaw+AbEA4T6gue7R4fDthPH3UCOvWVog2cra8QUEkzCkg0PnMWtfejuDI9ktrUa5QGu/OBibEVZUPZXTpeXLr18q7qxBRl7WYwIZsekK1DEHNHYaVo4wXtL5pGydD2QVYmFo/Gc0HUrVjifQQg07qyXm8YaHfrULZuDWUxPwZchQ+rLStoR9SEoWsYG5f7pSlqiH2bgaen1M3SnLnovp7pcYm4pZIVmKTFwYsmYBymdOZlRDenGs8BHxz7dTluCigmgql1uVLnpne4JXPSWHw1nwN17+9X2m1SLGyAY7T2y0qbG/XY4vPkD4DOy0fHdVsNONNxaMJAwNOXulGXAPKfIBR1NOUhb2IPmMakJgCyWr+Xuzz3Y7uyMkUH7qL9L/FJP/ABs2jwUiz7/q7bDy3tP+OTxEojkXWsCCyf1QH3bn57nE9xETbFL8cUJf/5m3y0F5pT6PXy+WM5IqeGky1hEXt6RopDmRyRygqlB1Gyr368/Q6DodcoRSLhL8+ECj1lIC5oP2rBNWBg2QKgQRhGYFpFrlJrh8wnhXfxv/SQkv60dVj3uEbNEJJNfetX75bAe6XpDD4n7BlAhqK07IOP47nebPwA86Lyoy3mo9zuik5e3qy+FJOUGXjmM6EzTYCO8d21my7yDrLUu1TjCutsu1qMS6OaM67kJKjucxdrqWgyXaPkeyRbIFKb7OqwyqFRZ3/boI8/lh5fCwibtX0B2kHqOHkGLDWvHwecVIkso7uiCyE43rTDObPwjTWLkj6d8hBni3xDKNZPeYMYf+h5LWxIPWK7FtxXCxa4YVQeBrEcZFxNGKeixU3T8qvuaKhKakSXUIOdAFxbP0GymCWDGE9gwbCBZSlT6EJKZZyYXvx7cz5nBC1pird61KDVW1dK9zPz0S9ewceCB8woaZ+MHS7NxuNfJ9J0/PyhubAnZLA== X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230037)(1800799021)(376011)(36860700010)(82310400023);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Jun 2024 13:46:42.9933 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c5461196-f628-432d-68d3-08dc951d3f6e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB4D.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB6812 On shared memory CPPC systems, with amd_pstate=active mode, the change in scaling_min/max_freq doesn't get written to the shared memory region. Due to this, the writes to the scaling_min/max_freq sysfs file don't take effect. Fix this by propagating the scaling_min/max_freq changes to the shared memory region. Fixes: ffa5096a7c33 ("cpufreq: amd-pstate: implement Pstate EPP support for the AMD processors") Signed-off-by: Dhananjay Ugwekar Reported-by: David Arcari --- drivers/cpufreq/amd-pstate.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 9ad62dbe8bfb..7c1c96abe5bd 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -264,6 +264,15 @@ static int amd_pstate_set_epp(struct amd_cpudata *cpudata, u32 epp) cpudata->epp_cached = epp; } else { perf_ctrls.energy_perf = epp; + perf_ctrls.max_perf = cpudata->max_limit_perf; + perf_ctrls.min_perf = cpudata->min_limit_perf; + perf_ctrls.desired_perf = 0U; + + ret = cppc_set_perf(cpudata->cpu, &perf_ctrls); + if (ret) { + pr_debug("failed to set min max limits (%d)\n", ret); + return ret; + } ret = cppc_set_epp_perf(cpudata->cpu, &perf_ctrls, 1); if (ret) { pr_debug("failed to set energy perf value (%d)\n", ret); @@ -1547,6 +1556,7 @@ static void amd_pstate_epp_update_limit(struct cpufreq_policy *policy) } WRITE_ONCE(cpudata->cppc_req_cached, value); + amd_pstate_set_epp(cpudata, epp); }