From patchwork Wed Jun 26 10:48:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicola Vetrini X-Patchwork-Id: 13712665 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.xenproject.org (lists.xenproject.org [192.237.175.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C41A3C30653 for ; Wed, 26 Jun 2024 10:48:46 +0000 (UTC) Received: from list by lists.xenproject.org with outflank-mailman.748739.1156555 (Exim 4.92) (envelope-from ) id 1sMQCc-0005k7-Pj; Wed, 26 Jun 2024 10:48:38 +0000 X-Outflank-Mailman: Message body and most headers restored to incoming version Received: by outflank-mailman (output) from mailman id 748739.1156555; Wed, 26 Jun 2024 10:48:38 +0000 Received: from localhost ([127.0.0.1] helo=lists.xenproject.org) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1sMQCc-0005k0-N4; Wed, 26 Jun 2024 10:48:38 +0000 Received: by outflank-mailman (input) for mailman id 748739; Wed, 26 Jun 2024 10:48:36 +0000 Received: from se1-gles-sth1-in.inumbo.com ([159.253.27.254] helo=se1-gles-sth1.inumbo.com) by lists.xenproject.org with esmtp (Exim 4.92) (envelope-from ) id 1sMQCa-0005jc-Ow for xen-devel@lists.xenproject.org; Wed, 26 Jun 2024 10:48:36 +0000 Received: from support.bugseng.com (mail.bugseng.com [162.55.131.47]) by se1-gles-sth1.inumbo.com (Halon) with ESMTPS id a3722aee-33a9-11ef-90a3-e314d9c70b13; Wed, 26 Jun 2024 12:48:35 +0200 (CEST) Received: from nico.bugseng.com (unknown [46.228.253.214]) by support.bugseng.com (Postfix) with ESMTPSA id 2E3584EE0738; Wed, 26 Jun 2024 12:48:34 +0200 (CEST) X-BeenThere: xen-devel@lists.xenproject.org List-Id: Xen developer discussion List-Unsubscribe: , List-Post: List-Help: List-Subscribe: , Errors-To: xen-devel-bounces@lists.xenproject.org Precedence: list Sender: "Xen-devel" X-Inumbo-ID: a3722aee-33a9-11ef-90a3-e314d9c70b13 From: Nicola Vetrini To: xen-devel@lists.xenproject.org Cc: sstabellini@kernel.org, michal.orzel@amd.com, xenia.ragiadakou@amd.com, ayan.kumar.halder@amd.com, consulting@bugseng.com, Alessandro Zucchelli , Jan Beulich , Andrew Cooper , =?utf-8?q?Roger_Pau_Monn=C3=A9?= , Nicola Vetrini Subject: [XEN PATCH v2] x86/mctelem: address violations of MISRA C: 2012 Rule 5.3 Date: Wed, 26 Jun 2024 12:48:31 +0200 Message-Id: <94752f77597b05ef9b8a387bf29512b11c0d1e15.1719398571.git.nicola.vetrini@bugseng.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 From: Alessandro Zucchelli This addresses violations of MISRA C:2012 Rule 5.3 which states as following: An identifier declared in an inner scope shall not hide an identifier declared in an outer scope. In this case the gloabl variable being shadowed is the global static struct mctctl in this file, therefore the local variables are renamed to avoid this. No functional change. Signed-off-by: Alessandro Zucchelli Signed-off-by: Nicola Vetrini Reviewed-by: Stefano Stabellini Acked-by: Jan Beulich --- Changes in v2: - s/mctctl_cpu/ctl/ and amended file comment and commit message --- xen/arch/x86/cpu/mcheck/mctelem.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/xen/arch/x86/cpu/mcheck/mctelem.c b/xen/arch/x86/cpu/mcheck/mctelem.c index b8d0368a7d37..123e4102adca 100644 --- a/xen/arch/x86/cpu/mcheck/mctelem.c +++ b/xen/arch/x86/cpu/mcheck/mctelem.c @@ -168,28 +168,28 @@ static void mctelem_xchg_head(struct mctelem_ent **headp, void mctelem_defer(mctelem_cookie_t cookie, bool lmce) { struct mctelem_ent *tep = COOKIE2MCTE(cookie); - struct mc_telem_cpu_ctl *mctctl = &this_cpu(mctctl); + struct mc_telem_cpu_ctl *ctl = &this_cpu(mctctl); - ASSERT(mctctl->pending == NULL || mctctl->lmce_pending == NULL); + ASSERT(ctl->pending == NULL || ctl->lmce_pending == NULL); - if (mctctl->pending) - mctelem_xchg_head(&mctctl->pending, &tep->mcte_next, tep); + if (ctl->pending) + mctelem_xchg_head(&ctl->pending, &tep->mcte_next, tep); else if (lmce) - mctelem_xchg_head(&mctctl->lmce_pending, &tep->mcte_next, tep); + mctelem_xchg_head(&ctl->lmce_pending, &tep->mcte_next, tep); else { /* * LMCE is supported on Skylake-server and later CPUs, on * which mce_broadcast is always true. Therefore, non-empty - * mctctl->lmce_pending in this branch implies a broadcasting + * ctl->lmce_pending in this branch implies a broadcasting * MC# is being handled, every CPU is in the exception - * context, and no one is consuming mctctl->pending at this + * context, and no one is consuming ctl->pending at this * moment. As a result, the following two exchanges together * can be treated as atomic. */ - if (mctctl->lmce_pending) - mctelem_xchg_head(&mctctl->lmce_pending, - &mctctl->pending, NULL); - mctelem_xchg_head(&mctctl->pending, &tep->mcte_next, tep); + if (ctl->lmce_pending) + mctelem_xchg_head(&ctl->lmce_pending, + &ctl->pending, NULL); + mctelem_xchg_head(&ctl->pending, &tep->mcte_next, tep); } } @@ -213,7 +213,7 @@ void mctelem_process_deferred(unsigned int cpu, { struct mctelem_ent *tep; struct mctelem_ent *head, *prev; - struct mc_telem_cpu_ctl *mctctl = &per_cpu(mctctl, cpu); + struct mc_telem_cpu_ctl *ctl = &per_cpu(mctctl, cpu); int ret; /* @@ -232,7 +232,7 @@ void mctelem_process_deferred(unsigned int cpu, * Any MC# occurring after the following atomic exchange will be * handled by another round of MCE softirq. */ - mctelem_xchg_head(lmce ? &mctctl->lmce_pending : &mctctl->pending, + mctelem_xchg_head(lmce ? &ctl->lmce_pending : &ctl->pending, &this_cpu(mctctl.processing), NULL); head = this_cpu(mctctl.processing);