From patchwork Fri Jun 28 08:01:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrei Simion X-Patchwork-Id: 13715683 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DACE9C30659 for ; Fri, 28 Jun 2024 08:02:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=o9f2qbcrhsT87fvnfyZ7MbxJBrYbeM64wX25AOpl3Ro=; b=M8Ga10xYx0NWMUkEuAGHRzwrUR Y9MS8N3E5egWl4MA1MB6L+rkzII7oloSJB8DkPmEACFds2rbl8Shd4ZpM3WYkJxycdF2EyZulCMlk 4rlvoygnPfM2wd+nR4uDZSGu5BjPd7+NzEJcBP9qLc0abezHbp7K42yrrvKoeJPtshspCa0gc3DKU LEYHODJ2r7LfvoFvBN41whpiXLpuB6a361r5zkWCJT1jyBbqbv0aOW4upNjrGjPFz50XHCoACOXNm pW6mA6Q4Mh+7ZVzZlB+mM2PjmLZGz3xHHsbDDNuC8UYD6xwqSCJariFAfDgQsERhKa82Dl6Z1Jaw4 9qA9lQjA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sN6Yr-0000000CzUu-1nZp; Fri, 28 Jun 2024 08:02:25 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sN6Yi-0000000CzSR-09In for linux-arm-kernel@lists.infradead.org; Fri, 28 Jun 2024 08:02:17 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1719561736; x=1751097736; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ccI8MYfzyEnNqGdmvND7NjZ84ouSXCcAOMy0xM3NMC0=; b=c8RbV7gL+qqKP4zd2OmhTdJUvm30tnbaXwHCWxLRZnmZIEXp8shjqlTT 6JiNNvC6kX5Utzz8cVJA+l3Ee+cJkzoMohsbXYMMkaBY8rTiPfMYvijxX J4bIlseqDZktrj/jBMLWTbJv92oT0e4THGuoyahRYPhzUdiv3jxbuMBzV 4V0n9mQOFvwTARzcl4Mqkd2oOIWIOWQi9VtXWuhnishOcTOqxwfH97v1k jNqiEg3xPzMrKGXYH4tc6CI8yVdvuV989NR7+3uCcHMUhaQV25gR8/AIz XtH+XxFpvsjcOszBqXkm2+PezoakySwJChj6ChD9Jaio4CZdsDIBAIdN5 A==; X-CSE-ConnectionGUID: yumzE5LRQZWNGcwzrru4aA== X-CSE-MsgGUID: zs6JdCT+TdeFXl7gPhaAIQ== X-IronPort-AV: E=Sophos;i="6.09,168,1716274800"; d="scan'208";a="28620938" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 28 Jun 2024 01:02:14 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 28 Jun 2024 01:02:05 -0700 Received: from ROB-ULT-M76677.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 28 Jun 2024 01:02:02 -0700 From: Andrei Simion To: , , , , , , , , CC: , , , , Claudiu Beznea , Andrei Simion Subject: [PATCH v3 1/3] eeprom: at24: avoid adjusting offset for 24AA025E{48, 64} Date: Fri, 28 Jun 2024 11:01:44 +0300 Message-ID: <20240628080146.49545-2-andrei.simion@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240628080146.49545-1-andrei.simion@microchip.com> References: <20240628080146.49545-1-andrei.simion@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240628_010216_109183_3CD02FAB X-CRM114-Status: GOOD ( 15.85 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Claudiu Beznea The EEPROMs could be used only for MAC storage. In this case the EEPROM areas where MACs resides could be modeled as NVMEM cells (directly via DT bindings) such that the already available networking infrastructure to read properly the MAC addresses (via of_get_mac_address()). The previously available compatibles needs the offset adjustment probably for compatibility w/ old DT bindings. Add "microchip,24aa025e48", "microchip,24aa025e64" compatible for the usage w/ 24AA025E{48, 64} type of EEPROMs where "24aa025e48" stands for EUI-48 address and "24aa025e64" stands for EUI-64 address. Signed-off-by: Claudiu Beznea [andrei.simion@microchip.com: Add extended macros to initialize the structure with explicit value to adjusting offset. Add extra description for the commit message.] Signed-off-by: Andrei Simion --- v2 -> v3: - add specific compatible names according with https://ww1.microchip.com/downloads/en/DeviceDoc/24AA02E48-24AA025E48-24AA02E64-24AA025E64-Data-Sheet-20002124H.pdf - add extended macros to initialize the structure with explicit value for adjoff - drop co-developed-by to maintain the commit history (chronological order of modifications) v1 -> v2: - no change --- drivers/misc/eeprom/at24.c | 28 +++++++++++++++++++++++----- 1 file changed, 23 insertions(+), 5 deletions(-) diff --git a/drivers/misc/eeprom/at24.c b/drivers/misc/eeprom/at24.c index 4bd4f32bcdab..e2ac08f656cf 100644 --- a/drivers/misc/eeprom/at24.c +++ b/drivers/misc/eeprom/at24.c @@ -121,20 +121,29 @@ struct at24_chip_data { u32 byte_len; u8 flags; u8 bank_addr_shift; + u8 adjoff; void (*read_post)(unsigned int off, char *buf, size_t count); }; -#define AT24_CHIP_DATA(_name, _len, _flags) \ +#define AT24_CHIP_DATA_AO(_name, _len, _flags, _ao) \ static const struct at24_chip_data _name = { \ .byte_len = _len, .flags = _flags, \ + .adjoff = _ao \ } -#define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \ +#define AT24_CHIP_DATA(_name, _len, _flags) \ + AT24_CHIP_DATA_AO(_name, _len, _flags, 0) + +#define AT24_CHIP_DATA_CB_AO(_name, _len, _flags, _ao, _read_post) \ static const struct at24_chip_data _name = { \ .byte_len = _len, .flags = _flags, \ + .adjoff = _ao, \ .read_post = _read_post, \ } +#define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \ + AT24_CHIP_DATA_CB_AO(_name, _len, _flags, 0, _read_post) + #define AT24_CHIP_DATA_BS(_name, _len, _flags, _bank_addr_shift) \ static const struct at24_chip_data _name = { \ .byte_len = _len, .flags = _flags, \ @@ -170,9 +179,13 @@ AT24_CHIP_DATA(at24_data_24cs01, 16, AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0); AT24_CHIP_DATA(at24_data_24cs02, 16, AT24_FLAG_SERIAL | AT24_FLAG_READONLY); -AT24_CHIP_DATA(at24_data_24mac402, 48 / 8, +AT24_CHIP_DATA_AO(at24_data_24mac402, 48 / 8, + AT24_FLAG_MAC | AT24_FLAG_READONLY, 1); +AT24_CHIP_DATA_AO(at24_data_24mac602, 64 / 8, + AT24_FLAG_MAC | AT24_FLAG_READONLY, 1); +AT24_CHIP_DATA(at24_data_24aa025e48, 48 / 8, AT24_FLAG_MAC | AT24_FLAG_READONLY); -AT24_CHIP_DATA(at24_data_24mac602, 64 / 8, +AT24_CHIP_DATA(at24_data_24aa025e64, 64 / 8, AT24_FLAG_MAC | AT24_FLAG_READONLY); /* spd is a 24c02 in memory DIMMs */ AT24_CHIP_DATA(at24_data_spd, 2048 / 8, @@ -218,6 +231,8 @@ static const struct i2c_device_id at24_ids[] = { { "24cs02", (kernel_ulong_t)&at24_data_24cs02 }, { "24mac402", (kernel_ulong_t)&at24_data_24mac402 }, { "24mac602", (kernel_ulong_t)&at24_data_24mac602 }, + { "24aa025e48", (kernel_ulong_t)&at24_data_24aa025e48 }, + { "24aa025e64", (kernel_ulong_t)&at24_data_24aa025e64 }, { "spd", (kernel_ulong_t)&at24_data_spd }, { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio }, { "24c04", (kernel_ulong_t)&at24_data_24c04 }, @@ -270,6 +285,8 @@ static const struct of_device_id __maybe_unused at24_of_match[] = { { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 }, { .compatible = "atmel,24c1025", .data = &at24_data_24c1025 }, { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 }, + { .compatible = "microchip,24aa025e48", .data = &at24_data_24aa025e48 }, + { .compatible = "microchip,24aa025e64", .data = &at24_data_24aa025e64 }, { /* END OF LIST */ }, }; MODULE_DEVICE_TABLE(of, at24_of_match); @@ -690,7 +707,8 @@ static int at24_probe(struct i2c_client *client) at24->read_post = cdata->read_post; at24->bank_addr_shift = cdata->bank_addr_shift; at24->num_addresses = num_addresses; - at24->offset_adj = at24_get_offset_adj(flags, byte_len); + at24->offset_adj = cdata->adjoff ? + at24_get_offset_adj(flags, byte_len) : 0; at24->client_regmaps[0] = regmap; at24->vcc_reg = devm_regulator_get(dev, "vcc"); From patchwork Fri Jun 28 08:01:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrei Simion X-Patchwork-Id: 13715684 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2F77EC2BBCA for ; Fri, 28 Jun 2024 08:02:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=iK/NFslWnC7JcTd1ABz1BLZw+ba1bAiJETXY96qxCpg=; b=ggjc/55NUThRTrO/GuW4r9+byB U9pNGE3iVnEJAckPDdRaAbFbepva/7sXi5Pdr2AxYYzuBuxgIuNowRU8gcSUHjATC/6O24msc+KFC BwLtYr1u7cRWa4IFpaJ9r3962Mj4d6UUUs/EssyQ8W+ruz77u4hkrpxIRyQnFvYlcr+VY8W99E6JP OPMWoliyKcZ9I70tjVAYfFxUCZhLP3X2WfVaZhbJrmrWxeab84SyEhqQf+5lWacGgNL3bHhjsPmX0 WK0feu1TSwV8A8l22B2nVEnnq8U7oQ65CmuxPBql9lBtbUVq7eFZkFBU829bZyVVyzaItMnPoMS53 ZoeHUjsg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sN6Yx-0000000CzYB-3xgW; Fri, 28 Jun 2024 08:02:31 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sN6Yi-0000000CzSi-47qb for linux-arm-kernel@lists.infradead.org; Fri, 28 Jun 2024 08:02:18 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1719561737; x=1751097737; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZC5GcFCvoF9+YP4CsOoHkV5xsw2QFzOG1jhwWHB4+zw=; b=g1U9YU4PYv4DGAMLBd5UIsIUufBOm1xvmtuEDJmt7PMrwhQ65HmacmFa OUDk+UAlVQUucIGq7U/ZXppscHrQ+EnYcnYjeymnTNWpIunrmI7tCJ+5U iPrd9oTb3vVk5UZv8+1LxWHVPNm2GPaw8kAd8kL8YinHqhw/pPixD6piR mhhdBAaAwxiG9IYZIMRKbOhl+QPGSCAAX+czdk5kXmUjOCq3Y9FPt0uet uFgSbgDgJZXidU5sRuMwRU3+gYOfzn6jHCndd8slErrEUFmgk5WUuVdqP 6e9tLCeLX5+HKfB8D7sM454eDH4JDVdGFqzQXajxMdplVG6mxeXcHqlbw A==; X-CSE-ConnectionGUID: yumzE5LRQZWNGcwzrru4aA== X-CSE-MsgGUID: fZ26NDPwRgWx82z9wG7gcA== X-IronPort-AV: E=Sophos;i="6.09,168,1716274800"; d="scan'208";a="28620942" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 28 Jun 2024 01:02:15 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 28 Jun 2024 01:02:09 -0700 Received: from ROB-ULT-M76677.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 28 Jun 2024 01:02:05 -0700 From: Andrei Simion To: , , , , , , , , CC: , , , , Claudiu Beznea , Andrei Simion Subject: [PATCH v3 2/3] ARM: dts: at91: at91-sama7g5ek: add EEPROMs Date: Fri, 28 Jun 2024 11:01:45 +0300 Message-ID: <20240628080146.49545-3-andrei.simion@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240628080146.49545-1-andrei.simion@microchip.com> References: <20240628080146.49545-1-andrei.simion@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240628_010217_054957_7FE738BB X-CRM114-Status: GOOD ( 10.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Claudiu Beznea Add EEPROMs and nvmem-layout to describe eui48 mac address region. Signed-off-by: Claudiu Beznea [andrei.simion@microchip.com: add nvmem-layout to describe eui48 mac region align compatible name with datasheet] Signed-off-by: Andrei Simion --- v2 -> v3: - change from atmel,24mac02e4 to microchip,24aa025e48 to align with the datasheet - drop co-developed-by to maintain the chronological order of the changes v1 -> v2: - remove unnecessary #address-cells #size-cells --- .../arm/boot/dts/microchip/at91-sama7g5ek.dts | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts index 20b2497657ae..40f4480e298b 100644 --- a/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts +++ b/arch/arm/boot/dts/microchip/at91-sama7g5ek.dts @@ -403,6 +403,42 @@ i2c8: i2c@600 { i2c-digital-filter; i2c-digital-filter-width-ns = <35>; status = "okay"; + + eeprom0: eeprom@52 { + compatible = "microchip,24aa025e48"; + reg = <0x52>; + size = <256>; + pagesize = <16>; + vcc-supply = <&vdd_3v3>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom0_eui48: eui48@fa { + reg = <0xfa 0x6>; + }; + }; + }; + + eeprom1: eeprom@53 { + compatible = "microchip,24aa025e48"; + reg = <0x53>; + size = <256>; + pagesize = <16>; + vcc-supply = <&vdd_3v3>; + + nvmem-layout { + compatible = "fixed-layout"; + #address-cells = <1>; + #size-cells = <1>; + + eeprom1_eui48: eui48@fa { + reg = <0xfa 0x6>; + }; + }; + }; }; }; @@ -440,6 +476,8 @@ &pinctrl_gmac0_mdio_default &pinctrl_gmac0_txck_default &pinctrl_gmac0_phy_irq>; phy-mode = "rgmii-id"; + nvmem-cells = <&eeprom0_eui48>; + nvmem-cell-names = "mac-address"; status = "okay"; ethernet-phy@7 { @@ -457,6 +495,8 @@ &gmac1 { &pinctrl_gmac1_mdio_default &pinctrl_gmac1_phy_irq>; phy-mode = "rmii"; + nvmem-cells = <&eeprom1_eui48>; + nvmem-cell-names = "mac-address"; status = "okay"; /* Conflict with pdmc0. */ ethernet-phy@0 { From patchwork Fri Jun 28 08:01:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrei Simion X-Patchwork-Id: 13715685 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AC8FAC2BBCA for ; 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d="scan'208";a="28620945" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa3.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 28 Jun 2024 01:02:16 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Fri, 28 Jun 2024 01:02:13 -0700 Received: from ROB-ULT-M76677.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Fri, 28 Jun 2024 01:02:09 -0700 From: Andrei Simion To: , , , , , , , , CC: , , , , Andrei Simion , Connor Dooley Subject: [PATCH v3 3/3] dt-bindings: eeprom: at24: Add Microchip 24AA025E48/24AA025E64 Date: Fri, 28 Jun 2024 11:01:46 +0300 Message-ID: <20240628080146.49545-4-andrei.simion@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240628080146.49545-1-andrei.simion@microchip.com> References: <20240628080146.49545-1-andrei.simion@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240628_010217_627516_B3E9E163 X-CRM114-Status: UNSURE ( 9.91 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add compatible for Microchip 24AA025E48/24AA025E64 EEPROMs. Reviewed-by: Connor Dooley Signed-off-by: Andrei Simion --- v2 -> v3: - commit subject changed to reference Microchip 24AA025E48/24AA025E64 - drop the pattern: mac02e4$ and mac02e6$ and a-z from regex - add these two devices down at the bottom - added Reviewed-by v1 -> v2: - change pattern into "^atmel,(24(c|cs|mac)[a-z0-9]+|spd)$" to keep simpler --- Documentation/devicetree/bindings/eeprom/at24.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml index 3c36cd0510de..699c2bbc16f5 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.yaml +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml @@ -132,6 +132,10 @@ properties: - renesas,r1ex24128 - samsung,s524ad0xd1 - const: atmel,24c128 + - items: + - const: microchip,24aa025e48 + - items: + - const: microchip,24aa025e64 - pattern: '^atmel,24c(32|64)d-wl$' # Actual vendor is st label: