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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Inochi Amaoto , Paul Walmsley , Palmer Dabbelt , Albert Ou , Jisheng Zhang Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Haylen Chu Subject: [PATCH v3 1/3] dt-bindings: thermal: sophgo,cv1800-thermal: Add Sophgo CV1800 thermal Date: Tue, 2 Jul 2024 09:30:24 +0000 Message-ID: X-Mailer: git-send-email 2.45.2 In-Reply-To: References: X-TMN: [17i62xjFeVM3yHP1oYezK0i5S0kz8QCo] X-ClientProxiedBy: SI2P153CA0006.APCP153.PROD.OUTLOOK.COM (2603:1096:4:140::22) To SEYPR01MB4221.apcprd01.prod.exchangelabs.com (2603:1096:101:56::12) X-Microsoft-Original-Message-ID: <20240702093025.449-2-heylenay@outlook.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SEYPR01MB4221:EE_|SEZPR01MB4613:EE_ X-MS-Office365-Filtering-Correlation-Id: 57056f5a-ae6a-4841-7d52-08dc9a79b0a6 X-Microsoft-Antispam: BCL:0;ARA:14566002|461199028|8060799006|4302099013|3412199025|440099028|1602099012|1710799026; X-Microsoft-Antispam-Message-Info: rBHyE6Q+GmxLwaomWEYcX3NmnZk5Gg7HtR2pDGPc2rAmyCcZPyD1OErFUYyMLMkZHqRvkcXIjrNoEf684G/cZwSTUDZideskKiYR17s/LV2Q0pW/y5jIv9vDnrEk6bsa7ClU++cDP/rziKZyJ44tztQvKhNkwIHFUntJ/eNgi8b8PuPnPxSgVfIn8xz9Cu4SdKT3+wnnn9GGOQ2T/RhrtXIc49Oq+H5UUVmIgq5DP9oIlI2c/O2ydoJFnfEhSUm7cP4jn/9CqdFuFQckz4BpHKxd9Xgt9uhDiksAEnmvvgBS7vv75Ys4Ln9wzepY6xPLFBRcYNCcRcXVqx8SXL3ZRS+q8YgMBuFNeb4aH0kXDK8335E/Q7pTl1q5lqSLnQGpOv1251duL2nBhzElAcwsMp09NIPdO07CtUywAmGMebh9GDBU5g18P2JQkbzjukGxcozDbLuUSRU9zkvYSrUUDzmZLCRNwqB1L/Db34qjjehfqweAlup9zr8/8tuKYaM9DIlmEgdz2mAMjgQNNmMLB6lY3AgCvie4JQriOpe3A21uqUTAzjjaSCb3PWGohffKHUiyRpmbnmhnrtdivAKTuE+/hjSY4wfF/KvbZ+fWuTOnU/XFCtoeqgPw3B2zPDrDWQKjy4Ha/KVORLlCD0y1OBqQvAF029tRHT3UWt1rDJCW6r1auvUJLz4uSXstfwRgWHwnXL4JC5d2OluU6JOnzAQheKIsUyTftW3MTb4PKxRsjHHtpGDk7pqeVaXpXmhGs/Xv97nlw9dh9ePYPxZTFg== X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: M0zMDZw7RkYbA48QmWYz1waLUtvaHwzbXFkczUhn+SMKf+C/JJUlhq+kXyPcQaQNEN5tJKpgnC4SbETt4O9xg6TteOOswN1WGr+CQN2URnT2PYuRN7y33T5CSosMBNMzUxActEicAgnMG0XknXc6rw4dUOtqYJf/4QMKIb3aNl4GT4BAZtoIrISxZKEr8aVF8CpOGgpAB8dL9vXdNlv2fMGHYPjdVvS1ZUI9Q2e7e4K4HppILzFP38v2jVX9ouHe98bgh3PuoP2UO6kkyo5trTLnvys6KnSheCeqrxSUkUy7LkKqaTqJF/7iNH3TOHNqhVx+Ur4p80uEiXNyicQVXUtnn8ULKHxfZqlpNBB0UAsro5kgCYEsSauUNwm8Yz04k+KgiXdkeb2EM7dFwESJBSFIO6lvcwzieqCCzWTg6NdBaR38qOagbz17RG8YHqxqBXa26ZPkXD5IsM7pa1ztbHqXpcFe/oPQw8G+obMMVjXpucJ/JVetVrZvCsoFe94NhRasSDluPh0rXZ0m78vzdOEP5yA/U7EOEPY51BAFrk2OfztJJc5p9eigEqQlVqcJ2oEmydBJVa6q9KF8H2toF5UgGxeoIyjOeesZzwda0LRXIL7LxCWy7myVfdbi2nDAaZlry+y7XtCj/FwxNRmF6rEScg2Ln7kAOtmiaKn/0srpxkG3koatqbQvpVT8/FZ/FIlKnxwk4leUcwonf4M4M37bA2iwpTYmk+lSbyrL13YEBd63XioRzj9YW7HXIpZ09rcNlcuJ3l7Vk6IPLo0rNrMy2MVZFckv/QZWq97Hz59oXdfjpUEDHKATNPhSghBqGlQonOF2hoCnYK8gohDuv9Vwbx4/lX5+mXju9mbAwNsof2Wqdt8kx/XWXZg2e1bk0lP0QEi2p2m9ntQbj+FQO+gzY3J+BER044M8tCyZQWWboteDiKhjj22k1QqcBt1cTsAuLrqsmKaleUdS+HMEZttQ/JZ8JobYxQVdgz3G1d35byF34VQB1uxWRYvVt6c5vOfeku28ZIft89ZlsI5ZtBaF5A+Pm1dUNrWvqnMQ/r0jTanVRHfqowuXzAjNsyE3PJ2Ct4xvqAWXBw6DGldEHKreJM+ndpN7VZuHrPCLcaiP39NkQ/9MIsb1WYqZ/a+a6sXkwKA32OJ+Xh761rDSoW/TgOK3TeuDASQxQ3hIkRCWaG+0ACG/EDRUYNtmXc4r+8TL4IGbDK5Jv6qP533rityql3fNi7QHxLOFqHPfbUQ= X-OriginatorOrg: outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 57056f5a-ae6a-4841-7d52-08dc9a79b0a6 X-MS-Exchange-CrossTenant-AuthSource: SEYPR01MB4221.apcprd01.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jul 2024 09:31:02.8017 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 84df9e7f-e9f6-40af-b435-aaaaaaaaaaaa X-MS-Exchange-CrossTenant-RMS-PersistedConsumerOrg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-Transport-CrossTenantHeadersStamped: SEZPR01MB4613 Add devicetree binding documentation for thermal sensors integrated in Sophgo CV180X SoCs. Signed-off-by: Haylen Chu --- .../thermal/sophgo,cv1800-thermal.yaml | 74 +++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 Documentation/devicetree/bindings/thermal/sophgo,cv1800-thermal.yaml diff --git a/Documentation/devicetree/bindings/thermal/sophgo,cv1800-thermal.yaml b/Documentation/devicetree/bindings/thermal/sophgo,cv1800-thermal.yaml new file mode 100644 index 000000000000..016299822c16 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/sophgo,cv1800-thermal.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/sophgo,cv1800-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sophgo CV1800 on-SoC Thermal Sensor + +maintainers: + - Haylen Chu + +description: Binding for Sophgo CV1800 on-SoC thermal sensor + +properties: + compatible: + enum: + - sophgo,cv1800-thermal + + reg: + maxItems: 1 + + clocks: + description: The thermal sensor clock + + interrupts: + maxItems: 1 + + accumulation-period: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Accumulation period for a sample + enum: + - 512 + - 1024 + - 2048 + - 4096 + default: 2048 + + chop-period: + $ref: /schemas/types.yaml#/definitions/uint32 + description: ADC chop period + enum: + - 128 + - 256 + - 512 + - 1024 + default: 1024 + + sample-cycle-us: + description: Period between samples. Should be greater than 524us. + default: 1000000 + + '#thermal-sensor-cells': + const: 0 + +required: + - compatible + - reg + - clocks + - interrupts + +additionalProperties: false + +examples: + - | + #include + #include + thermal-sensor@30e0000 { + compatible = "sophgo,cv1800-thermal"; + reg = <0x30e0000 0x100>; + clocks = <&clk CLK_TEMPSEN>; + interrupts = <16 IRQ_TYPE_LEVEL_HIGH>; + #thermal-sensor-cells = <0>; + }; +... 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Signed-off-by: Haylen Chu --- arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 30 +++++++++++++++++++++++++ arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 8 +++++++ 2 files changed, 38 insertions(+) diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi index ec9530972ae2..0b5c7bc94b05 100644 --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi @@ -12,6 +12,34 @@ memory@80000000 { device_type = "memory"; reg = <0x80000000 0x4000000>; }; + + thermal-zones { + soc-thermal { + polling-delay-passive = <1000>; + polling-delay = <1000>; + thermal-sensors = <&soc_temp>; + + trips { + soc_passive: soc-passive { + temperature = <75000>; + hysteresis = <5000>; + type = "passive"; + }; + + soc_hot: soc-hot { + temperature = <85000>; + hysteresis = <5000>; + type = "hot"; + }; + + soc_critical: soc-critical { + temperature = <100000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; }; &plic { @@ -25,3 +53,5 @@ &clint { &clk { compatible = "sophgo,cv1800-clk"; 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Wysocki" , Daniel Lezcano , Zhang Rui , Lukasz Luba , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen Wang , Inochi Amaoto , Paul Walmsley , Palmer Dabbelt , Albert Ou , Jisheng Zhang Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, Haylen Chu Subject: [PATCH v3 3/3] thermal: cv180x: Add cv180x thermal driver support Date: Tue, 2 Jul 2024 09:30:26 +0000 Message-ID: X-Mailer: git-send-email 2.45.2 In-Reply-To: References: X-TMN: [HlG6xpx/xUv4htAWsxl7H/bl9bDttrt8] X-ClientProxiedBy: SI2P153CA0006.APCP153.PROD.OUTLOOK.COM (2603:1096:4:140::22) To SEYPR01MB4221.apcprd01.prod.exchangelabs.com (2603:1096:101:56::12) X-Microsoft-Original-Message-ID: <20240702093025.449-4-heylenay@outlook.com> Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SEYPR01MB4221:EE_|SEZPR01MB4613:EE_ X-MS-Office365-Filtering-Correlation-Id: 86cbac35-d5eb-4025-b55d-08dc9a79ba8d X-Microsoft-Antispam: BCL:0;ARA:14566002|461199028|8060799006|3412199025|440099028|1710799026; X-Microsoft-Antispam-Message-Info: 2jR9HyufcRHY23B640ZsaQJsHAfHIX7IlWHl12cGspV37x/zs/EC02zUc6TwV7Hl/9aLCH5n3afYDlothAHoqYm0S+ETvwxLaWC7NtjSsBdYkWzC9FhRn6vTcYgbd4IkfBBGy895fY2BlImhs1x83rkacbZusVh682H/9pCchbKkT6K7BrDUvl8B3JU1mI57FQUOd1b4QaDnPU/KKrJCPpzeU2yLzXeCxByp4QHTsZTmcx776jrT1lw616qW5pqnLLdlhA6kZKDLlPJZKi8iwNIN3CeNzXcFlWu8sjq/Nw4LyOomChWiVliU7dMeeK18L/zG0pyGITXGEo3z47YjSfbgkTkbvkcoM4htgkSESCa0mVmlJMDqPwuhEWFKVdqjCLK/MTKrF6/7lW5Rm5bvwr1oc2m6UxK8d/cWc7HlKZpE9Uu3HIp8g6RJyJD8WzzdDgqmtD715eGjPaVmBZFNLOo00JXpIX0yJgqiaoFpZ98zhk+frojc+xfvbiKgaLQFEle/T63NlVrXvYgO8S4jS+663Ol3anlN6XMiITdRnnZ2pbt4E+D33tb70nzhYMoR2rvZ6Cmo+89sOHRoH77rGvLV9cxCVbVAOVRsJDUHvCgV5QM1zdA6JhiisaSzgqlQKs8jQkzd+psU1c50tvCdbQ== X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 5YAShtwPTcO4lrmJZbdm//G84ujForuRqWgAdss/v6V4Wxp6V210NMVOKD+Z3GvUMnBbHguMgaN/iMwAfi3UaF8sHQvlBCIE3fZpAlq146blfY/aPxWf4WDVO/gDBfiZ/NzrBHqv6Dtmji6O/uwNBNSGcAHtgkIvo9KRan0UCM36i+vYxQQEqOL4RXWIbCEL4jYR6AYttCYLYzJ9Co93mKbU7iDm6R6YWj+IpokNRtZjDdNmswBm3R4atCwOfHXFg5e7JxjQSg/kCPJvnadNc46VX5r4v3Bv1FfQxjYizD8dIeRIriVB32hhw5L67ogRo5MFomOFV5gqFsaTtU9Kvfza4AFfB381K3fwxmqoPo3yJqEvQgRS+BuigHv8AyW/ZNTXcP3cR5PPMyJ69MTJS6OvxHldcy60ucNDFvHlMKL8cUM2vDjCCwp6yc7BJLY3r71j8W20ynWsd61Zb1jQ8AsY8QCJ4FIfwxmVH3g+5mx9g3lO68AC7sPqi6qzIeKZXHW20yh0R5U+klVDP+VCamkbqqUokx6Q5uXmDjP6nLqVkpUv5PlAC83j0IHcW6vF2rzgn97AomLQjTM0OpWgaj3J/aohjycuGk+n9pyAHl0swVLU9H9qKaYiABIiMGNrcXvUThgbzWmx1dm0ni2sK1PDeOq+AGTNKg9pRxHupEP9rQZ80lE+m9YVnlW+DxlH7wcFnVnGhP/aLi8PCFOxRPn0AKA8TmPPanYelRRrwjiOYGAjfM2egArME7dxzqVRurMH5suH4T6PhCLFPpP1wWm3dW3gx5flUI8ZCTPI2grYAktAxrlBBvJyuUvagpm7DtccAYfneVcsYsx6at7eA9tO9m/8th8s7VxqCBJqQIbL3PY0Vjwi73fuzirZCkmZbNyhVWNzwyu//2KGNujCwLvTzU6GClmbEbmj8YcCQsEX27JjMXlCoiOvfs9+EQ3zTkPF8UT9jx2A12eSXxBAab7exLBH2SdhmQZp1Dy7YOCA3EqUd94J1mnh8VNZ3sY7AQwyb/dTSpcJF5W24zHQJMat0eBKIRl4b8kNNcCm0XPiFc3H3BoOClWwBY9CpFMFag29yI9V08FVO4AuciyJ4ichdsceWnteEEQIGfhpNRvR+xfBftIbFwfZB+HAmJmy1H3UXSKgUuHhN70taQa/UfCnNjFmwu822n3oDKq/Ju8zp9ksAJhkQq4Mq7UbS1qulF2FmctLfd/q1hW1ceeHWjusmNDGexIq8HRAbxhPY8k= X-OriginatorOrg: outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: 86cbac35-d5eb-4025-b55d-08dc9a79ba8d X-MS-Exchange-CrossTenant-AuthSource: SEYPR01MB4221.apcprd01.prod.exchangelabs.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Jul 2024 09:31:19.4236 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 84df9e7f-e9f6-40af-b435-aaaaaaaaaaaa X-MS-Exchange-CrossTenant-RMS-PersistedConsumerOrg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-Transport-CrossTenantHeadersStamped: SEZPR01MB4613 Add support for cv180x SoCs integrated thermal sensors. Signed-off-by: Haylen Chu --- drivers/thermal/Kconfig | 6 + drivers/thermal/Makefile | 1 + drivers/thermal/cv180x_thermal.c | 281 +++++++++++++++++++++++++++++++ 3 files changed, 288 insertions(+) create mode 100644 drivers/thermal/cv180x_thermal.c diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index 204ed89a3ec9..f53c973a361d 100644 --- a/drivers/thermal/Kconfig +++ b/drivers/thermal/Kconfig @@ -514,4 +514,10 @@ config LOONGSON2_THERMAL is higher than the high temperature threshold or lower than the low temperature threshold, the interrupt will occur. +config CV180X_THERMAL + tristate "Temperature sensor driver for Sophgo CV180X" + help + If you say yes here you get support for thermal sensor integrated in + Sophgo CV180X SoCs. + endif diff --git a/drivers/thermal/Makefile b/drivers/thermal/Makefile index 5cdf7d68687f..5b59bde8a579 100644 --- a/drivers/thermal/Makefile +++ b/drivers/thermal/Makefile @@ -65,3 +65,4 @@ obj-$(CONFIG_AMLOGIC_THERMAL) += amlogic_thermal.o obj-$(CONFIG_SPRD_THERMAL) += sprd_thermal.o obj-$(CONFIG_KHADAS_MCU_FAN_THERMAL) += khadas_mcu_fan.o obj-$(CONFIG_LOONGSON2_THERMAL) += loongson2_thermal.o +obj-$(CONFIG_CV180X_THERMAL) += cv180x_thermal.o diff --git a/drivers/thermal/cv180x_thermal.c b/drivers/thermal/cv180x_thermal.c new file mode 100644 index 000000000000..ab8f0ba8113d --- /dev/null +++ b/drivers/thermal/cv180x_thermal.c @@ -0,0 +1,281 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2021 Sophgo Inc. + * Copyright (C) 2024 Haylen Chu + */ + +#include +#include +#include +#include +#include +#include +#include + +#define TEMPSEN_VERSION 0x0 +#define TEMPSEN_CTRL 0x4 +#define TEMPSEN_CTRL_EN BIT(0) +#define TEMPSEN_CTRL_SEL_MASK GENMASK(7, 4) +#define TEMPSEN_CTRL_SEL_OFFSET 4 +#define TEMPSEN_STATUS 0x8 +#define TEMPSEN_SET 0xc +#define TEMPSEN_SET_CHOPSEL_MASK GENMASK(5, 4) +#define TEMPSEN_SET_CHOPSEL_OFFSET 4 +#define TEMPSEN_SET_CHOPSEL_128T 0 +#define TEMPSEN_SET_CHOPSEL_256T 1 +#define TEMPSEN_SET_CHOPSEL_512T 2 +#define TEMPSEN_SET_CHOPSEL_1024T 3 +#define TEMPSEN_SET_ACCSEL_MASK GENMASK(7, 6) +#define TEMPSEN_SET_ACCSEL_OFFSET 6 +#define TEMPSEN_SET_ACCSEL_512T 0 +#define TEMPSEN_SET_ACCSEL_1024T 1 +#define TEMPSEN_SET_ACCSEL_2048T 2 +#define TEMPSEN_SET_ACCSEL_4096T 3 +#define TEMPSEN_SET_CYC_CLKDIV_MASK GENMASK(15, 8) +#define TEMPSEN_SET_CYC_CLKDIV_OFFSET 8 +#define TEMPSEN_INTR_EN 0x10 +#define TEMPSEN_INTR_CLR 0x14 +#define TEMPSEN_INTR_STA 0x18 +#define TEMPSEN_INTR_RAW 0x1c +#define TEMPSEN_RESULT(n) (0x20 + (n) * 4) +#define TEMPSEN_RESULT_RESULT_MASK GENMASK(12, 0) +#define TEMPSEN_RESULT_MAX_RESULT_MASK GENMASK(28, 16) +#define TEMPSEN_RESULT_CLR_MAX_RESULT BIT(31) +#define TEMPSEN_AUTO_PERIOD 0x64 +#define TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK GENMASK(23, 0) +#define TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET 0 + +struct cv180x_thermal_zone { + struct device *dev; + void __iomem *base; + struct clk *clk_tempsen; + u32 chop_period; + u32 accum_period; + u32 sample_cycle; +}; + +static void cv180x_thermal_init(struct cv180x_thermal_zone *ctz) +{ + void __iomem *base = ctz->base; + u32 regval; + + writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR); + writel(TEMPSEN_RESULT_CLR_MAX_RESULT, base + TEMPSEN_RESULT(0)); + + regval = readl(base + TEMPSEN_SET); + regval &= ~TEMPSEN_SET_CHOPSEL_MASK; + regval &= ~TEMPSEN_SET_ACCSEL_MASK; + regval &= ~TEMPSEN_SET_CYC_CLKDIV_MASK; + regval |= ctz->chop_period << TEMPSEN_SET_CHOPSEL_OFFSET; + regval |= ctz->accum_period << TEMPSEN_SET_ACCSEL_OFFSET; + regval |= 0x31 << TEMPSEN_SET_CYC_CLKDIV_OFFSET; + writel(regval, base + TEMPSEN_SET); + + regval = readl(base + TEMPSEN_AUTO_PERIOD); + regval &= ~TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_MASK; + regval |= ctz->sample_cycle << TEMPSEN_AUTO_PERIOD_AUTO_CYCLE_OFFSET; + writel(regval, base + TEMPSEN_AUTO_PERIOD); + + regval = readl(base + TEMPSEN_CTRL); + regval &= ~TEMPSEN_CTRL_SEL_MASK; + regval |= 1 << TEMPSEN_CTRL_SEL_OFFSET; + regval |= TEMPSEN_CTRL_EN; + writel(regval, base + TEMPSEN_CTRL); +} + +static void cv180x_thermal_deinit(struct cv180x_thermal_zone *ct) +{ + void __iomem *base = ct->base; + u32 regval; + + regval = readl(base + TEMPSEN_CTRL); + regval &= ~(TEMPSEN_CTRL_SEL_MASK | TEMPSEN_CTRL_EN); + writel(regval, base + TEMPSEN_CTRL); + + writel(readl(base + TEMPSEN_INTR_RAW), base + TEMPSEN_INTR_CLR); +} + +/* + * Raw register value to temperature (mC) formula: + * + * read_val * 1000 * 716 + * Temperature = ----------------------- - 273000 + * divider + * + * where divider should be ticks number of accumulation period, + * e.g. 2048 for TEMPSEN_CTRL_ACCSEL_2048T + */ +static int cv180x_calc_temp(struct cv180x_thermal_zone *ctz, u32 result) +{ + u32 divider = (u32)(512 * int_pow(2, ctz->accum_period)); + + return (result * 1000) * 716 / divider - 273000; +} + +static int cv180x_get_temp(struct thermal_zone_device *tdev, int *temperature) +{ + struct cv180x_thermal_zone *ctz = thermal_zone_device_priv(tdev); + void __iomem *base = ctz->base; + u32 result; + + result = readl(base + TEMPSEN_RESULT(0)) & TEMPSEN_RESULT_RESULT_MASK; + *temperature = cv180x_calc_temp(ctz, result); + + return 0; +} + +static const struct thermal_zone_device_ops cv180x_thermal_ops = { + .get_temp = cv180x_get_temp, +}; + +static const struct of_device_id cv180x_thermal_of_match[] = { + { .compatible = "sophgo,cv1800-thermal" }, + {}, +}; +MODULE_DEVICE_TABLE(of, cv180x_thermal_of_match); + +static int +cv180x_parse_dt(struct cv180x_thermal_zone *ctz) +{ + struct device_node *np = ctz->dev->of_node; + u32 tmp; + + if (of_property_read_u32(np, "accumulation-period", &tmp)) { + ctz->accum_period = TEMPSEN_SET_ACCSEL_2048T; + } else { + switch (tmp) { + case 512: + ctz->accum_period = TEMPSEN_SET_ACCSEL_512T; + break; + case 1024: + ctz->accum_period = TEMPSEN_SET_ACCSEL_1024T; + break; + case 2048: + ctz->accum_period = TEMPSEN_SET_ACCSEL_2048T; + break; + case 4096: + ctz->accum_period = TEMPSEN_SET_ACCSEL_4096T; + break; + default: + dev_err(ctz->dev, "invalid accumulation period %d\n", + tmp); + return -EINVAL; + } + } + + if (of_property_read_u32(np, "chop-period", &tmp)) { + ctz->chop_period = TEMPSEN_SET_CHOPSEL_1024T; + } else { + switch (tmp) { + case 128: + ctz->chop_period = TEMPSEN_SET_CHOPSEL_128T; + break; + case 256: + ctz->chop_period = TEMPSEN_SET_CHOPSEL_256T; + break; + case 512: + ctz->chop_period = TEMPSEN_SET_CHOPSEL_512T; + break; + case 1024: + ctz->chop_period = TEMPSEN_SET_CHOPSEL_1024T; + break; + default: + dev_err(ctz->dev, "invalid chop period %d\n", tmp); + return -EINVAL; + } + } + + if (of_property_read_u32(np, "sample-cycle-us", &ctz->sample_cycle)) + ctz->sample_cycle = 1000000; + + return 0; +} + +static int cv180x_thermal_probe(struct platform_device *pdev) +{ + struct cv180x_thermal_zone *ctz; + struct thermal_zone_device *tz; + struct resource *res; + int ret; + + ctz = devm_kzalloc(&pdev->dev, sizeof(*ctz), GFP_KERNEL); + if (!ctz) + return -ENOMEM; + + ctz->dev = &pdev->dev; + + ret = cv180x_parse_dt(ctz); + if (ret) + return dev_err_probe(&pdev->dev, ret, "failed to parse dt\n"); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + ctz->base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(ctz->base)) + return dev_err_probe(&pdev->dev, PTR_ERR(ctz->base), + "failed to map tempsen registers\n"); + + ctz->clk_tempsen = devm_clk_get_enabled(&pdev->dev, NULL); + if (IS_ERR(ctz->clk_tempsen)) + return dev_err_probe(&pdev->dev, PTR_ERR(ctz->clk_tempsen), + "failed to get clk_tempsen\n"); + + cv180x_thermal_init(ctz); + + tz = devm_thermal_of_zone_register(&pdev->dev, 0, ctz, + &cv180x_thermal_ops); + if (IS_ERR(tz)) + return dev_err_probe(&pdev->dev, PTR_ERR(tz), + "failed to register thermal zone\n"); + + platform_set_drvdata(pdev, ctz); + + return 0; +} + +static int cv180x_thermal_remove(struct platform_device *pdev) +{ + struct cv180x_thermal_zone *ctz = platform_get_drvdata(pdev); + + cv180x_thermal_deinit(ctz); + + return 0; +} + +static int __maybe_unused cv180x_thermal_suspend(struct device *dev) +{ + struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev); + + cv180x_thermal_deinit(ctz); + clk_disable_unprepare(ctz->clk_tempsen); + + return 0; +} + +static int __maybe_unused cv180x_thermal_resume(struct device *dev) +{ + struct cv180x_thermal_zone *ctz = dev_get_drvdata(dev); + + clk_prepare_enable(ctz->clk_tempsen); + cv180x_thermal_init(ctz); + + return 0; +} + +static SIMPLE_DEV_PM_OPS(cv180x_thermal_pm_ops, + cv180x_thermal_suspend, cv180x_thermal_resume); + +static struct platform_driver cv180x_thermal_driver = { + .probe = cv180x_thermal_probe, + .remove = cv180x_thermal_remove, + .driver = { + .name = "cv180x-thermal", + .pm = &cv180x_thermal_pm_ops, + .of_match_table = cv180x_thermal_of_match, + }, +}; + +module_platform_driver(cv180x_thermal_driver); + +MODULE_DESCRIPTION("Sophgo CV180x thermal driver"); +MODULE_AUTHOR("Haylen Chu "); +MODULE_LICENSE("GPL");