From patchwork Tue Jul 2 11:42:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719479 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1FDEEC3064D for ; Tue, 2 Jul 2024 11:43:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Fop8QX+RLJlqmEYBOhQasH3x8o88/5vnVVGE2QYA9MU=; b=LJf2uCyw2r/sOrmb6Qg3jqMvq7 H4eIJ+DYoyny1fLn1e3bEz+yk/izX7LgcylSVxjeg0Lm9y4B5cTsvJ+sT5bN1v/EJp6MCdh19gonz e6PVdzQFB3S/sUFu8JYEtJvbhZoq56TFEVQ2Qb0TxePOs6ijQuZZo8egztHQr5djmGpE3nRz28AiF MmFODbo2n1Jak675N7aQ9hnp1BJpfho2CAcEEs9Qj4gSXsrSt0bKILWBxQyZo3FVh10A+HscJ/F1x puB9WQXqanubM/fQYiPcSWjLuEUiICdtnvZp0zsWx65Z7iDrqFz2ttIQf05YI5vEc1XJR4aJD37Yl gLcgaupQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObv2-00000006W8t-2CZB; Tue, 02 Jul 2024 11:43:32 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObuh-00000006Vy8-36rg for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:43:13 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 2175F61CD2; Tue, 2 Jul 2024 11:43:11 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id C6B6FC4AF0E; Tue, 2 Jul 2024 11:43:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920590; bh=bkSX2UDJeP/p8Ht0nelbJMLebGRqofiFQQ93H/VjYCU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uvgGu+W2+oRkTqThzEBP/KkCyXcJtLuNcFZE47dgh4+HbmcoWdy4pZLbyvdUheVBv FOA1LCpwtum+jc6qGd8odYv2vHkV0D4pd4dlffPIgoQGlOJX3E4z9av5afroGqwepj nydBEFjoJjWTw2UnJc0YvBvsXE9M0WdDSGpT7yGe5iTHRO7cTyEG/Ynool3qD7olp5 N4kYpYr/Yfjw+XK5kOVXOaL6jOBSCsThGAz2cCRgHGDA+JKvjCt5oQUZjNC/7v07D0 UchIdwFDqpfwrTtmIgIKMPfqZnfEh/G6aX33UXuDmSHFpLMGRLjg9oJuboEa4c1dm5 Im14TPCOC3dZA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 01/30] irqchip/armada-370-xp: Drop _OFFS suffix from some register constants Date: Tue, 2 Jul 2024 13:42:33 +0200 Message-ID: <20240702114302.22475-2-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044311_895606_6A2B8529 X-CRM114-Status: GOOD ( 19.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Some register constants have the _OFFS suffix and some do not. Drop it to be more consistent. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 105 +++++++++++++--------------- 1 file changed, 48 insertions(+), 57 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index dce2b80bf439..66d6a2ebc8a5 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -66,15 +66,14 @@ * device * * The "global interrupt mask/unmask" is modified using the - * ARMADA_370_XP_INT_SET_ENABLE_OFFS and - * ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS registers, which are relative - * to "main_int_base". + * ARMADA_370_XP_INT_SET_ENABLE and ARMADA_370_XP_INT_CLEAR_ENABLE + * registers, which are relative to "main_int_base". * * The "per-CPU mask/unmask" is modified using the - * ARMADA_370_XP_INT_SET_MASK_OFFS and - * ARMADA_370_XP_INT_CLEAR_MASK_OFFS registers, which are relative to - * "per_cpu_int_base". This base address points to a special address, - * which automatically accesses the registers of the current CPU. + * ARMADA_370_XP_INT_SET_MASK and ARMADA_370_XP_INT_CLEAR_MASK + * registers, which are relative to "per_cpu_int_base". This base + * address points to a special address, which automatically accesses + * the registers of the current CPU. * * The per-CPU mask/unmask can also be adjusted using the global * per-interrupt ARMADA_370_XP_INT_SOURCE_CTL register, which we use @@ -118,21 +117,21 @@ /* Registers relative to main_int_base */ #define ARMADA_370_XP_INT_CONTROL (0x00) -#define ARMADA_370_XP_SW_TRIG_INT_OFFS (0x04) -#define ARMADA_370_XP_INT_SET_ENABLE_OFFS (0x30) -#define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS (0x34) +#define ARMADA_370_XP_SW_TRIG_INT (0x04) +#define ARMADA_370_XP_INT_SET_ENABLE (0x30) +#define ARMADA_370_XP_INT_CLEAR_ENABLE (0x34) #define ARMADA_370_XP_INT_SOURCE_CTL(irq) (0x100 + irq*4) #define ARMADA_370_XP_INT_SOURCE_CPU_MASK 0xF #define ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid) ((BIT(0) | BIT(8)) << cpuid) /* Registers relative to per_cpu_int_base */ -#define ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS (0x08) -#define ARMADA_370_XP_IN_DRBEL_MSK_OFFS (0x0c) +#define ARMADA_370_XP_IN_DRBEL_CAUSE (0x08) +#define ARMADA_370_XP_IN_DRBEL_MSK (0x0c) #define ARMADA_375_PPI_CAUSE (0x10) -#define ARMADA_370_XP_CPU_INTACK_OFFS (0x44) -#define ARMADA_370_XP_INT_SET_MASK_OFFS (0x48) -#define ARMADA_370_XP_INT_CLEAR_MASK_OFFS (0x4C) -#define ARMADA_370_XP_INT_FABRIC_MASK_OFFS (0x54) +#define ARMADA_370_XP_CPU_INTACK (0x44) +#define ARMADA_370_XP_INT_SET_MASK (0x48) +#define ARMADA_370_XP_INT_CLEAR_MASK (0x4C) +#define ARMADA_370_XP_INT_FABRIC_MASK (0x54) #define ARMADA_370_XP_INT_CAUSE_PERF(cpu) (1 << cpu) #define ARMADA_370_XP_MAX_PER_CPU_IRQS (28) @@ -220,11 +219,9 @@ static void armada_370_xp_irq_mask(struct irq_data *d) irq_hw_number_t hwirq = irqd_to_hwirq(d); if (!is_percpu_irq(hwirq)) - writel(hwirq, main_int_base + - ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS); + writel(hwirq, main_int_base + ARMADA_370_XP_INT_CLEAR_ENABLE); else - writel(hwirq, per_cpu_int_base + - ARMADA_370_XP_INT_SET_MASK_OFFS); + writel(hwirq, per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK); } static void armada_370_xp_irq_unmask(struct irq_data *d) @@ -232,11 +229,9 @@ static void armada_370_xp_irq_unmask(struct irq_data *d) irq_hw_number_t hwirq = irqd_to_hwirq(d); if (!is_percpu_irq(hwirq)) - writel(hwirq, main_int_base + - ARMADA_370_XP_INT_SET_ENABLE_OFFS); + writel(hwirq, main_int_base + ARMADA_370_XP_INT_SET_ENABLE); else - writel(hwirq, per_cpu_int_base + - ARMADA_370_XP_INT_CLEAR_MASK_OFFS); + writel(hwirq, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK); } #ifdef CONFIG_PCI_MSI @@ -329,19 +324,18 @@ static void armada_370_xp_msi_reenable_percpu(void) u32 reg; /* Enable MSI doorbell mask and combined cpu local interrupt */ - reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS); + reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); reg |= msi_doorbell_mask(); - writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS); + writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); /* Unmask local doorbell interrupt */ - writel(1, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS); + writel(1, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK); } static int armada_370_xp_msi_init(struct device_node *node, phys_addr_t main_int_phys_base) { - msi_doorbell_addr = main_int_phys_base + - ARMADA_370_XP_SW_TRIG_INT_OFFS; + msi_doorbell_addr = main_int_phys_base + ARMADA_370_XP_SW_TRIG_INT; armada_370_xp_msi_inner_domain = irq_domain_add_linear(NULL, msi_doorbell_size(), @@ -362,7 +356,7 @@ static int armada_370_xp_msi_init(struct device_node *node, /* Unmask low 16 MSI irqs on non-IPI platforms */ if (!is_ipi_available()) - writel(0, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS); + writel(0, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK); return 0; } @@ -391,7 +385,7 @@ static void armada_xp_mpic_perf_init(void) /* Enable Performance Counter Overflow interrupts */ writel(ARMADA_370_XP_INT_CAUSE_PERF(cpuid), - per_cpu_int_base + ARMADA_370_XP_INT_FABRIC_MASK_OFFS); + per_cpu_int_base + ARMADA_370_XP_INT_FABRIC_MASK); } #ifdef CONFIG_SMP @@ -400,17 +394,17 @@ static struct irq_domain *ipi_domain; static void armada_370_xp_ipi_mask(struct irq_data *d) { u32 reg; - reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS); + reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); reg &= ~BIT(d->hwirq); - writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS); + writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); } static void armada_370_xp_ipi_unmask(struct irq_data *d) { u32 reg; - reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS); + reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); reg |= BIT(d->hwirq); - writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS); + writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); } static void armada_370_xp_ipi_send_mask(struct irq_data *d, @@ -431,12 +425,12 @@ static void armada_370_xp_ipi_send_mask(struct irq_data *d, /* submit softirq */ writel((map << 8) | d->hwirq, main_int_base + - ARMADA_370_XP_SW_TRIG_INT_OFFS); + ARMADA_370_XP_SW_TRIG_INT); } static void armada_370_xp_ipi_ack(struct irq_data *d) { - writel(~BIT(d->hwirq), per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS); + writel(~BIT(d->hwirq), per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE); } static struct irq_chip ipi_irqchip = { @@ -539,19 +533,19 @@ static void armada_xp_mpic_smp_cpu_init(void) nr_irqs = (control >> 2) & 0x3ff; for (i = 0; i < nr_irqs; i++) - writel(i, per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK_OFFS); + writel(i, per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK); if (!is_ipi_available()) return; /* Disable all IPIs */ - writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS); + writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); /* Clear pending IPIs */ - writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS); + writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE); /* Unmask IPI interrupt */ - writel(0, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS); + writel(0, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK); } static void armada_xp_mpic_reenable_percpu(void) @@ -622,9 +616,9 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h, armada_370_xp_irq_mask(irq_get_irq_data(virq)); if (!is_percpu_irq(hw)) writel(hw, per_cpu_int_base + - ARMADA_370_XP_INT_CLEAR_MASK_OFFS); + ARMADA_370_XP_INT_CLEAR_MASK); else - writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE_OFFS); + writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE); irq_set_status_flags(virq, IRQ_LEVEL); if (is_percpu_irq(hw)) { @@ -651,12 +645,10 @@ static void armada_370_xp_handle_msi_irq(struct pt_regs *regs, bool is_chained) { u32 msimask, msinr; - msimask = readl_relaxed(per_cpu_int_base + - ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS); + msimask = readl_relaxed(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE); msimask &= msi_doorbell_mask(); - writel(~msimask, per_cpu_int_base + - ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS); + writel(~msimask, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE); for (msinr = msi_doorbell_start(); msinr < msi_doorbell_end(); msinr++) { @@ -712,7 +704,7 @@ armada_370_xp_handle_irq(struct pt_regs *regs) do { irqstat = readl_relaxed(per_cpu_int_base + - ARMADA_370_XP_CPU_INTACK_OFFS); + ARMADA_370_XP_CPU_INTACK); irqnr = irqstat & 0x3FF; if (irqnr > 1022) @@ -735,7 +727,7 @@ armada_370_xp_handle_irq(struct pt_regs *regs) int ipi; ipimask = readl_relaxed(per_cpu_int_base + - ARMADA_370_XP_IN_DRBEL_CAUSE_OFFS) + ARMADA_370_XP_IN_DRBEL_CAUSE) & IPI_DOORBELL_MASK; for_each_set_bit(ipi, &ipimask, IPI_DOORBELL_END) @@ -748,8 +740,7 @@ armada_370_xp_handle_irq(struct pt_regs *regs) static int armada_370_xp_mpic_suspend(void) { - doorbell_mask_reg = readl(per_cpu_int_base + - ARMADA_370_XP_IN_DRBEL_MSK_OFFS); + doorbell_mask_reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); return 0; } @@ -774,13 +765,13 @@ static void armada_370_xp_mpic_resume(void) if (!is_percpu_irq(irq)) { /* Non per-CPU interrupts */ writel(irq, per_cpu_int_base + - ARMADA_370_XP_INT_CLEAR_MASK_OFFS); + ARMADA_370_XP_INT_CLEAR_MASK); if (!irqd_irq_disabled(data)) armada_370_xp_irq_unmask(data); } else { /* Per-CPU interrupts */ writel(irq, main_int_base + - ARMADA_370_XP_INT_SET_ENABLE_OFFS); + ARMADA_370_XP_INT_SET_ENABLE); /* * Re-enable on the current CPU, @@ -794,7 +785,7 @@ static void armada_370_xp_mpic_resume(void) /* Reconfigure doorbells for IPIs and MSIs */ writel(doorbell_mask_reg, - per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK_OFFS); + per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); if (is_ipi_available()) { src0 = doorbell_mask_reg & IPI_DOORBELL_MASK; @@ -805,9 +796,9 @@ static void armada_370_xp_mpic_resume(void) } if (src0) - writel(0, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS); + writel(0, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK); if (src1) - writel(1, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK_OFFS); + writel(1, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK); if (is_ipi_available()) ipi_resume(); @@ -847,7 +838,7 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, nr_irqs = (control >> 2) & 0x3ff; for (i = 0; i < nr_irqs; i++) - writel(i, main_int_base + ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS); + writel(i, main_int_base + ARMADA_370_XP_INT_CLEAR_ENABLE); armada_370_xp_mpic_domain = irq_domain_add_linear(node, nr_irqs, From patchwork Tue Jul 2 11:42:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719480 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D1E6DC30658 for ; Tue, 2 Jul 2024 11:43:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Tue, 2 Jul 2024 11:43:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920593; bh=cMSx15oK1SYBvYhL4v+UnmeieqOoovhAAQLeVG07Hok=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MSXZY+fMu2EHo74I3273pWV4WW2WPLv/dLUkOTjUbLsN3k1sr0gH+K0ZfqjADSg6o GUmAzbX4vC44oKzHHJFOAj+fqrO22SM1xLMy5ZwbdClBXMYs2ONYjYKQe0c5yBfG/8 1jr+6biG1+hpmoQfauDPvmlhGWb7s197UHN3ssVgS9ZQ3aLwffK/AQccSbTS/ORKWH 2HC1W8UqEgh9IxjXYixCwaPT3sSQFnxz6g8qN9hn5E7aabWLEvI2IbRk5ozcYDC1rG bW572ktoWFaIgdBTwYxeBOU3fLxIHstCS4OWNEMjv6yiaUsFWmu6kMVrXsPCcSFi6i Mmp9v5tibLPeg== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 02/30] irqchip/armada-370-xp: Change register constant suffix from _MSK to _MASK Date: Tue, 2 Jul 2024 13:42:34 +0200 Message-ID: <20240702114302.22475-3-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044316_705072_72B01642 X-CRM114-Status: GOOD ( 13.50 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org There is one occurrence of suffix _MSK in register constants, others have _MASK instead. Change the one to _MASK for consistency. Signed-off-by: Marek Behún Reviewed-by: Andrew Lunn --- drivers/irqchip/irq-armada-370-xp.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 66d6a2ebc8a5..588a9e2e1887 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -126,7 +126,7 @@ /* Registers relative to per_cpu_int_base */ #define ARMADA_370_XP_IN_DRBEL_CAUSE (0x08) -#define ARMADA_370_XP_IN_DRBEL_MSK (0x0c) +#define ARMADA_370_XP_IN_DRBEL_MASK (0x0c) #define ARMADA_375_PPI_CAUSE (0x10) #define ARMADA_370_XP_CPU_INTACK (0x44) #define ARMADA_370_XP_INT_SET_MASK (0x48) @@ -324,9 +324,9 @@ static void armada_370_xp_msi_reenable_percpu(void) u32 reg; /* Enable MSI doorbell mask and combined cpu local interrupt */ - reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); reg |= msi_doorbell_mask(); - writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); /* Unmask local doorbell interrupt */ writel(1, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK); @@ -394,17 +394,17 @@ static struct irq_domain *ipi_domain; static void armada_370_xp_ipi_mask(struct irq_data *d) { u32 reg; - reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); reg &= ~BIT(d->hwirq); - writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); } static void armada_370_xp_ipi_unmask(struct irq_data *d) { u32 reg; - reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); reg |= BIT(d->hwirq); - writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); } static void armada_370_xp_ipi_send_mask(struct irq_data *d, @@ -539,7 +539,7 @@ static void armada_xp_mpic_smp_cpu_init(void) return; /* Disable all IPIs */ - writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); /* Clear pending IPIs */ writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE); @@ -740,7 +740,7 @@ armada_370_xp_handle_irq(struct pt_regs *regs) static int armada_370_xp_mpic_suspend(void) { - doorbell_mask_reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + doorbell_mask_reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); return 0; } @@ -785,7 +785,7 @@ static void armada_370_xp_mpic_resume(void) /* Reconfigure doorbells for IPIs and MSIs */ writel(doorbell_mask_reg, - per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MSK); + per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); if (is_ipi_available()) { src0 = doorbell_mask_reg & IPI_DOORBELL_MASK; From patchwork Tue Jul 2 11:42:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719481 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 391FCC3064D for ; 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Tue, 02 Jul 2024 11:43:51 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObuo-00000006W1Y-1iv1 for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:43:19 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id CB97ACE1D1F; Tue, 2 Jul 2024 11:43:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id F0614C4AF0E; Tue, 2 Jul 2024 11:43:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920596; bh=0Sqxk8ewK1n6COT+KIHr+QBi0oXuHztBDs6Qh7kqtKc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=joesN3xTnVSBipR9dVu0P7Z5wQxdB2CEp4gVkFpFwLucUlAua2s9QVKzCi3V7kwn/ 6M6JnniWNJ7zAYqBYS49apb9eQDOZrMSvggCNGx65NFWcfAlaaNZLfgxDgU/9TKF1x F1MUI/FZGp4o4YQhP7bj45cnb+mGZgWH6ten8KW17DJyS5JJHMrh8st5LOXCcw9qZ6 CWESejN+zrTmbpCvfUFVaYgs+667Np0cUw/5Z3OopY6bzWhlBkhGFL/B0ZLYXmk4QN j/opfzFmY91Eoxl1+jKeJLMpgMq69rwB+IZZ+MAuGg5nXb2FN0l9cPfVP3tkG1oSGR OXJtQxHC7/WMg== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 03/30] irqchip/armada-370-xp: Change spaces to tabs Date: Tue, 2 Jul 2024 13:42:35 +0200 Message-ID: <20240702114302.22475-4-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044318_656163_7FE83387 X-CRM114-Status: UNSURE ( 9.13 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Change spaces to tabs in register constants definitions. Signed-off-by: Marek Behún Reviewed-by: Andrew Lunn --- drivers/irqchip/irq-armada-370-xp.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 588a9e2e1887..427ba5fd6adc 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -137,13 +137,13 @@ #define ARMADA_370_XP_MAX_PER_CPU_IRQS (28) /* IPI and MSI interrupt definitions for IPI platforms */ -#define IPI_DOORBELL_START (0) -#define IPI_DOORBELL_END (8) -#define IPI_DOORBELL_MASK 0xFF -#define PCI_MSI_DOORBELL_START (16) -#define PCI_MSI_DOORBELL_NR (16) -#define PCI_MSI_DOORBELL_END (32) -#define PCI_MSI_DOORBELL_MASK 0xFFFF0000 +#define IPI_DOORBELL_START (0) +#define IPI_DOORBELL_END (8) +#define IPI_DOORBELL_MASK 0xFF +#define PCI_MSI_DOORBELL_START (16) +#define PCI_MSI_DOORBELL_NR (16) +#define PCI_MSI_DOORBELL_END (32) +#define PCI_MSI_DOORBELL_MASK 0xFFFF0000 /* MSI interrupt definitions for non-IPI platforms */ #define PCI_MSI_FULL_DOORBELL_START 0 From patchwork Tue Jul 2 11:42:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719482 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 05198C30658 for ; Tue, 2 Jul 2024 11:44:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=bAytSnSCOp+iDQG5LQPnZfX4LI4TX8F70H4eYyp/ZOc=; b=CEUnGLSMYL4mICRQ5W8fNR83SF GXwHvRRYs+mPYmDg7JWGB487gea2WIZDZ55BtjOH/jL5qcqGetnsJ31BgSI2RxZePekNbFFCrBbBt FrvRcQSRfVWAwQUv3JDMvTioVtYREHgYB5DnCpsW2IqBnSGbJcU0J4Zm1Yc3gXg6qofJhZHd76M5G 5cSZU1vJyihg+CnCvHyA8ZhcYdNC5IfRruLq+CeNcQzGsStrnEX6SCTeZ7sO5Mn5LNZ9vxKBCTbm9 cC+094YRFB37+OdcMFVyb3xevhhUgxSF5BUqfTb01xdDgC4jfjR8F1nKn/uxb6C3k+0Oug0fiRTxO 2LMEAbNg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObvU-00000006WOH-3UEP; Tue, 02 Jul 2024 11:44:00 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObup-00000006W2l-316T for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:43:21 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 100AE61BFD; Tue, 2 Jul 2024 11:43:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8AD59C4AF16; Tue, 2 Jul 2024 11:43:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920598; bh=cWZbLIuojFCoXnB9aGBVY44haKGjY6v2ZOgc9cohXRI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KwrBGcGecjvNSGrv21Jz+HxED5Qggv/kU5yAPK8KqPG9qlrjRFaYfDMAfAqhO8T6p R4mipLglF8cm6BP0lw8PRvBwSXKWyc6vt/GlvnIBR+hkEeg7DlNzOv9iWYREH7pVEO v2iRpvwD9t4F4UiIKdwS81NKDDonM2MyBak9F8STGYgcJpo4Sx/3wBlFIvCC0M/jsP n8tvv2ayNKZN3IxBonBOji9aIrXYJn2/vjfrAY9yUIyxlpIesSG4ppRMGgCkTd4K+K JcfrvFYRXaJeT6b8SOdXngjZsdeuj+gBt5eYpDC5TsJ1pJlKEdV3xFT7g+P0CPQbBl 931+Dkl8hH+aQ== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 04/30] irqchip/armada-370-xp: Use BIT() and GENMASK() macros Date: Tue, 2 Jul 2024 13:42:36 +0200 Message-ID: <20240702114302.22475-5-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044319_861543_D5A7E74A X-CRM114-Status: GOOD ( 12.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Use the BIT() and GENMASK() macros where appropriate. Signed-off-by: Marek Behún Reviewed-by: Andrew Lunn --- drivers/irqchip/irq-armada-370-xp.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 427ba5fd6adc..18aca9b5d3b3 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -121,7 +121,7 @@ #define ARMADA_370_XP_INT_SET_ENABLE (0x30) #define ARMADA_370_XP_INT_CLEAR_ENABLE (0x34) #define ARMADA_370_XP_INT_SOURCE_CTL(irq) (0x100 + irq*4) -#define ARMADA_370_XP_INT_SOURCE_CPU_MASK 0xF +#define ARMADA_370_XP_INT_SOURCE_CPU_MASK GENMASK(3, 0) #define ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid) ((BIT(0) | BIT(8)) << cpuid) /* Registers relative to per_cpu_int_base */ @@ -132,18 +132,18 @@ #define ARMADA_370_XP_INT_SET_MASK (0x48) #define ARMADA_370_XP_INT_CLEAR_MASK (0x4C) #define ARMADA_370_XP_INT_FABRIC_MASK (0x54) -#define ARMADA_370_XP_INT_CAUSE_PERF(cpu) (1 << cpu) +#define ARMADA_370_XP_INT_CAUSE_PERF(cpu) BIT(cpu) #define ARMADA_370_XP_MAX_PER_CPU_IRQS (28) /* IPI and MSI interrupt definitions for IPI platforms */ #define IPI_DOORBELL_START (0) #define IPI_DOORBELL_END (8) -#define IPI_DOORBELL_MASK 0xFF +#define IPI_DOORBELL_MASK GENMASK(7, 0) #define PCI_MSI_DOORBELL_START (16) #define PCI_MSI_DOORBELL_NR (16) #define PCI_MSI_DOORBELL_END (32) -#define PCI_MSI_DOORBELL_MASK 0xFFFF0000 +#define PCI_MSI_DOORBELL_MASK GENMASK(31, 16) /* MSI interrupt definitions for non-IPI platforms */ #define PCI_MSI_FULL_DOORBELL_START 0 @@ -415,7 +415,7 @@ static void armada_370_xp_ipi_send_mask(struct irq_data *d, /* Convert our logical CPU mask into a physical one. */ for_each_cpu(cpu, mask) - map |= 1 << cpu_logical_map(cpu); + map |= BIT(cpu_logical_map(cpu)); /* * Ensure that stores to Normal memory are visible to the From patchwork Tue Jul 2 11:42:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719483 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8909DC3064D for ; Tue, 2 Jul 2024 11:44:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Tue, 2 Jul 2024 11:43:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920601; bh=e62VYwRWuXhLj5ggAoW7lpeqrq+gFy7675e9NYR854I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mq90GkCovJudaeCaFMhS0LSlEDBetJQpZ78obGPg/+XiOki7vbHTlZqN99zXf5iY5 VYeIY1tHOf1rmoV3/yQzKBJxuAgjhes9TKXfOkO1SARW5ctknwZh8s6/tdqN6zSz0K OGqBWabTS73hnEJnD2MuBjEIZCije8rJQrozBvbUSjBCyTNdXVEZk3OODnfbVg36nS k4aK8FmHFZaHrFP5K46PSUWgRnwntY2BkwU1NJ4C9Ob0+hPPoqm85htW4ZZkX/KE2p jWxGA5T4l6Mme5YncshtxGNiMqXcSrlMVsnzqmKq/ydMS9DdSEOArgA31lohAOVpUA nNw3wWAvvFtcQ== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 05/30] irqchip/armada-370-xp: Cosmetic fix parentheses in register constant definitions Date: Tue, 2 Jul 2024 13:42:37 +0200 Message-ID: <20240702114302.22475-6-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044322_540936_8521F9C1 X-CRM114-Status: UNSURE ( 9.83 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Drop parentheses where not needed and add where makes sense in register constant definitions. Signed-off-by: Marek Behún Reviewed-by: Andrew Lunn Reviewed-by: Ilpo Järvinen --- drivers/irqchip/irq-armada-370-xp.c | 38 ++++++++++++++--------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 18aca9b5d3b3..14d213e9b0d2 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -116,33 +116,33 @@ */ /* Registers relative to main_int_base */ -#define ARMADA_370_XP_INT_CONTROL (0x00) -#define ARMADA_370_XP_SW_TRIG_INT (0x04) -#define ARMADA_370_XP_INT_SET_ENABLE (0x30) -#define ARMADA_370_XP_INT_CLEAR_ENABLE (0x34) -#define ARMADA_370_XP_INT_SOURCE_CTL(irq) (0x100 + irq*4) +#define ARMADA_370_XP_INT_CONTROL 0x00 +#define ARMADA_370_XP_SW_TRIG_INT 0x04 +#define ARMADA_370_XP_INT_SET_ENABLE 0x30 +#define ARMADA_370_XP_INT_CLEAR_ENABLE 0x34 +#define ARMADA_370_XP_INT_SOURCE_CTL(irq) (0x100 + (irq) * 4) #define ARMADA_370_XP_INT_SOURCE_CPU_MASK GENMASK(3, 0) -#define ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid) ((BIT(0) | BIT(8)) << cpuid) +#define ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid) ((BIT(0) | BIT(8)) << (cpuid)) /* Registers relative to per_cpu_int_base */ -#define ARMADA_370_XP_IN_DRBEL_CAUSE (0x08) -#define ARMADA_370_XP_IN_DRBEL_MASK (0x0c) -#define ARMADA_375_PPI_CAUSE (0x10) -#define ARMADA_370_XP_CPU_INTACK (0x44) -#define ARMADA_370_XP_INT_SET_MASK (0x48) -#define ARMADA_370_XP_INT_CLEAR_MASK (0x4C) -#define ARMADA_370_XP_INT_FABRIC_MASK (0x54) +#define ARMADA_370_XP_IN_DRBEL_CAUSE 0x08 +#define ARMADA_370_XP_IN_DRBEL_MASK 0x0c +#define ARMADA_375_PPI_CAUSE 0x10 +#define ARMADA_370_XP_CPU_INTACK 0x44 +#define ARMADA_370_XP_INT_SET_MASK 0x48 +#define ARMADA_370_XP_INT_CLEAR_MASK 0x4C +#define ARMADA_370_XP_INT_FABRIC_MASK 0x54 #define ARMADA_370_XP_INT_CAUSE_PERF(cpu) BIT(cpu) -#define ARMADA_370_XP_MAX_PER_CPU_IRQS (28) +#define ARMADA_370_XP_MAX_PER_CPU_IRQS 28 /* IPI and MSI interrupt definitions for IPI platforms */ -#define IPI_DOORBELL_START (0) -#define IPI_DOORBELL_END (8) +#define IPI_DOORBELL_START 0 +#define IPI_DOORBELL_END 8 #define IPI_DOORBELL_MASK GENMASK(7, 0) -#define PCI_MSI_DOORBELL_START (16) -#define PCI_MSI_DOORBELL_NR (16) -#define PCI_MSI_DOORBELL_END (32) +#define PCI_MSI_DOORBELL_START 16 +#define PCI_MSI_DOORBELL_NR 16 +#define PCI_MSI_DOORBELL_END 32 #define PCI_MSI_DOORBELL_MASK GENMASK(31, 16) /* MSI interrupt definitions for non-IPI platforms */ From patchwork Tue Jul 2 11:42:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719484 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 59675C3064D for ; Tue, 2 Jul 2024 11:44:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=4KSyP3lPXPv/A8JugE03cRz8N/GzXMpJ+slEBuHcpuo=; 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Tue, 2 Jul 2024 11:43:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920603; bh=Y2VGecS/LB2E7TBMBdiZMiPwcmuy+0yl3FOFM+PUcrk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=B03hV/khl9PvauitQGVFPb/D5nLuKjM4E2xuu5a2hCa9bPgRuhLMU7ZeTy+RbObiI vOM3ZUcWUyIOredZOj8+BJGX+w8VDQqJvNOteoynIZ6lYeWyxKW3PckTuLoiVH5yjD lic3pHyb4ke7mW36yvprYabzL7+n5oXUnwvvpy4xlMl52du9tFYzRvA/JWpnRmqp/6 OolVEBBkVv74f6AOWIG47A65VlZyyQ/3ctlyLLZta2E1FL99oQ+kEDUmb587uyZ4Iu V4uNWM02cm3RFeDcE/H5B070zi8tV8QB2H1NOG6FhkReWGol41dnJLXrc6XcMkZRhU rth1Ps8LXPsbA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 06/30] irqchip/armada-370-xp: Change register constants prefix to MPIC_ Date: Tue, 2 Jul 2024 13:42:38 +0200 Message-ID: <20240702114302.22475-7-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044325_092404_AA0FFF8A X-CRM114-Status: GOOD ( 25.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Change the long ARMADA_370_XP_ prefix in register constants (ARMADA_375_ in one case) to MPIC_. The rationale is that it is shorter and more generic (this controller is called MPIC and is also used on Armada 38x and 39x). Signed-off-by: Marek Behún Reviewed-by: Andrew Lunn --- drivers/irqchip/irq-armada-370-xp.c | 148 +++++++++++++--------------- 1 file changed, 69 insertions(+), 79 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 14d213e9b0d2..8f52de6d8921 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -66,18 +66,17 @@ * device * * The "global interrupt mask/unmask" is modified using the - * ARMADA_370_XP_INT_SET_ENABLE and ARMADA_370_XP_INT_CLEAR_ENABLE + * MPIC_INT_SET_ENABLE and MPIC_INT_CLEAR_ENABLE * registers, which are relative to "main_int_base". * - * The "per-CPU mask/unmask" is modified using the - * ARMADA_370_XP_INT_SET_MASK and ARMADA_370_XP_INT_CLEAR_MASK - * registers, which are relative to "per_cpu_int_base". This base - * address points to a special address, which automatically accesses - * the registers of the current CPU. + * The "per-CPU mask/unmask" is modified using the MPIC_INT_SET_MASK + * and MPIC_INT_CLEAR_MASK registers, which are relative to + * "per_cpu_int_base". This base address points to a special address, + * which automatically accesses the registers of the current CPU. * * The per-CPU mask/unmask can also be adjusted using the global - * per-interrupt ARMADA_370_XP_INT_SOURCE_CTL register, which we use - * to configure interrupt affinity. + * per-interrupt MPIC_INT_SOURCE_CTL register, which we use to + * configure interrupt affinity. * * Due to this model, all interrupts need to be mask/unmasked at two * different levels: at the global level and at the per-CPU level. @@ -91,9 +90,8 @@ * the current CPU, running the ->map() code. This allows to have * the interrupt unmasked at this level in non-SMP * configurations. In SMP configurations, the ->set_affinity() - * callback is called, which using the - * ARMADA_370_XP_INT_SOURCE_CTL() readjusts the per-CPU mask/unmask - * for the interrupt. + * callback is called, which using the MPIC_INT_SOURCE_CTL() + * readjusts the per-CPU mask/unmask for the interrupt. * * The ->mask() and ->unmask() operations only mask/unmask the * interrupt at the "global" level. @@ -116,25 +114,25 @@ */ /* Registers relative to main_int_base */ -#define ARMADA_370_XP_INT_CONTROL 0x00 -#define ARMADA_370_XP_SW_TRIG_INT 0x04 -#define ARMADA_370_XP_INT_SET_ENABLE 0x30 -#define ARMADA_370_XP_INT_CLEAR_ENABLE 0x34 -#define ARMADA_370_XP_INT_SOURCE_CTL(irq) (0x100 + (irq) * 4) -#define ARMADA_370_XP_INT_SOURCE_CPU_MASK GENMASK(3, 0) -#define ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid) ((BIT(0) | BIT(8)) << (cpuid)) +#define MPIC_INT_CONTROL 0x00 +#define MPIC_SW_TRIG_INT 0x04 +#define MPIC_INT_SET_ENABLE 0x30 +#define MPIC_INT_CLEAR_ENABLE 0x34 +#define MPIC_INT_SOURCE_CTL(irq) (0x100 + (irq) * 4) +#define MPIC_INT_SOURCE_CPU_MASK GENMASK(3, 0) +#define MPIC_INT_IRQ_FIQ_MASK(cpuid) ((BIT(0) | BIT(8)) << (cpuid)) /* Registers relative to per_cpu_int_base */ -#define ARMADA_370_XP_IN_DRBEL_CAUSE 0x08 -#define ARMADA_370_XP_IN_DRBEL_MASK 0x0c -#define ARMADA_375_PPI_CAUSE 0x10 -#define ARMADA_370_XP_CPU_INTACK 0x44 -#define ARMADA_370_XP_INT_SET_MASK 0x48 -#define ARMADA_370_XP_INT_CLEAR_MASK 0x4C -#define ARMADA_370_XP_INT_FABRIC_MASK 0x54 -#define ARMADA_370_XP_INT_CAUSE_PERF(cpu) BIT(cpu) +#define MPIC_IN_DRBEL_CAUSE 0x08 +#define MPIC_IN_DRBEL_MASK 0x0c +#define MPIC_PPI_CAUSE 0x10 +#define MPIC_CPU_INTACK 0x44 +#define MPIC_INT_SET_MASK 0x48 +#define MPIC_INT_CLEAR_MASK 0x4C +#define MPIC_INT_FABRIC_MASK 0x54 +#define MPIC_INT_CAUSE_PERF(cpu) BIT(cpu) -#define ARMADA_370_XP_MAX_PER_CPU_IRQS 28 +#define MPIC_MAX_PER_CPU_IRQS 28 /* IPI and MSI interrupt definitions for IPI platforms */ #define IPI_DOORBELL_START 0 @@ -203,7 +201,7 @@ static inline unsigned int msi_doorbell_end(void) static inline bool is_percpu_irq(irq_hw_number_t irq) { - if (irq <= ARMADA_370_XP_MAX_PER_CPU_IRQS) + if (irq <= MPIC_MAX_PER_CPU_IRQS) return true; return false; @@ -219,9 +217,9 @@ static void armada_370_xp_irq_mask(struct irq_data *d) irq_hw_number_t hwirq = irqd_to_hwirq(d); if (!is_percpu_irq(hwirq)) - writel(hwirq, main_int_base + ARMADA_370_XP_INT_CLEAR_ENABLE); + writel(hwirq, main_int_base + MPIC_INT_CLEAR_ENABLE); else - writel(hwirq, per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK); + writel(hwirq, per_cpu_int_base + MPIC_INT_SET_MASK); } static void armada_370_xp_irq_unmask(struct irq_data *d) @@ -229,9 +227,9 @@ static void armada_370_xp_irq_unmask(struct irq_data *d) irq_hw_number_t hwirq = irqd_to_hwirq(d); if (!is_percpu_irq(hwirq)) - writel(hwirq, main_int_base + ARMADA_370_XP_INT_SET_ENABLE); + writel(hwirq, main_int_base + MPIC_INT_SET_ENABLE); else - writel(hwirq, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK); + writel(hwirq, per_cpu_int_base + MPIC_INT_CLEAR_MASK); } #ifdef CONFIG_PCI_MSI @@ -324,18 +322,18 @@ static void armada_370_xp_msi_reenable_percpu(void) u32 reg; /* Enable MSI doorbell mask and combined cpu local interrupt */ - reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); + reg = readl(per_cpu_int_base + MPIC_IN_DRBEL_MASK); reg |= msi_doorbell_mask(); - writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); + writel(reg, per_cpu_int_base + MPIC_IN_DRBEL_MASK); /* Unmask local doorbell interrupt */ - writel(1, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK); + writel(1, per_cpu_int_base + MPIC_INT_CLEAR_MASK); } static int armada_370_xp_msi_init(struct device_node *node, phys_addr_t main_int_phys_base) { - msi_doorbell_addr = main_int_phys_base + ARMADA_370_XP_SW_TRIG_INT; + msi_doorbell_addr = main_int_phys_base + MPIC_SW_TRIG_INT; armada_370_xp_msi_inner_domain = irq_domain_add_linear(NULL, msi_doorbell_size(), @@ -356,7 +354,7 @@ static int armada_370_xp_msi_init(struct device_node *node, /* Unmask low 16 MSI irqs on non-IPI platforms */ if (!is_ipi_available()) - writel(0, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK); + writel(0, per_cpu_int_base + MPIC_INT_CLEAR_MASK); return 0; } @@ -384,8 +382,8 @@ static void armada_xp_mpic_perf_init(void) cpuid = cpu_logical_map(smp_processor_id()); /* Enable Performance Counter Overflow interrupts */ - writel(ARMADA_370_XP_INT_CAUSE_PERF(cpuid), - per_cpu_int_base + ARMADA_370_XP_INT_FABRIC_MASK); + writel(MPIC_INT_CAUSE_PERF(cpuid), + per_cpu_int_base + MPIC_INT_FABRIC_MASK); } #ifdef CONFIG_SMP @@ -394,17 +392,17 @@ static struct irq_domain *ipi_domain; static void armada_370_xp_ipi_mask(struct irq_data *d) { u32 reg; - reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); + reg = readl(per_cpu_int_base + MPIC_IN_DRBEL_MASK); reg &= ~BIT(d->hwirq); - writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); + writel(reg, per_cpu_int_base + MPIC_IN_DRBEL_MASK); } static void armada_370_xp_ipi_unmask(struct irq_data *d) { u32 reg; - reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); + reg = readl(per_cpu_int_base + MPIC_IN_DRBEL_MASK); reg |= BIT(d->hwirq); - writel(reg, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); + writel(reg, per_cpu_int_base + MPIC_IN_DRBEL_MASK); } static void armada_370_xp_ipi_send_mask(struct irq_data *d, @@ -424,13 +422,12 @@ static void armada_370_xp_ipi_send_mask(struct irq_data *d, dsb(); /* submit softirq */ - writel((map << 8) | d->hwirq, main_int_base + - ARMADA_370_XP_SW_TRIG_INT); + writel((map << 8) | d->hwirq, main_int_base + MPIC_SW_TRIG_INT); } static void armada_370_xp_ipi_ack(struct irq_data *d) { - writel(~BIT(d->hwirq), per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE); + writel(~BIT(d->hwirq), per_cpu_int_base + MPIC_IN_DRBEL_CAUSE); } static struct irq_chip ipi_irqchip = { @@ -515,9 +512,8 @@ static int armada_xp_set_affinity(struct irq_data *d, /* Select a single core from the affinity mask which is online */ cpu = cpumask_any_and(mask_val, cpu_online_mask); - atomic_io_modify(main_int_base + ARMADA_370_XP_INT_SOURCE_CTL(hwirq), - ARMADA_370_XP_INT_SOURCE_CPU_MASK, - BIT(cpu_logical_map(cpu))); + atomic_io_modify(main_int_base + MPIC_INT_SOURCE_CTL(hwirq), + MPIC_INT_SOURCE_CPU_MASK, BIT(cpu_logical_map(cpu))); irq_data_update_effective_affinity(d, cpumask_of(cpu)); @@ -529,23 +525,23 @@ static void armada_xp_mpic_smp_cpu_init(void) u32 control; int nr_irqs, i; - control = readl(main_int_base + ARMADA_370_XP_INT_CONTROL); + control = readl(main_int_base + MPIC_INT_CONTROL); nr_irqs = (control >> 2) & 0x3ff; for (i = 0; i < nr_irqs; i++) - writel(i, per_cpu_int_base + ARMADA_370_XP_INT_SET_MASK); + writel(i, per_cpu_int_base + MPIC_INT_SET_MASK); if (!is_ipi_available()) return; /* Disable all IPIs */ - writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); + writel(0, per_cpu_int_base + MPIC_IN_DRBEL_MASK); /* Clear pending IPIs */ - writel(0, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE); + writel(0, per_cpu_int_base + MPIC_IN_DRBEL_CAUSE); /* Unmask IPI interrupt */ - writel(0, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK); + writel(0, per_cpu_int_base + MPIC_INT_CLEAR_MASK); } static void armada_xp_mpic_reenable_percpu(void) @@ -553,7 +549,7 @@ static void armada_xp_mpic_reenable_percpu(void) unsigned int irq; /* Re-enable per-CPU interrupts that were enabled before suspend */ - for (irq = 0; irq < ARMADA_370_XP_MAX_PER_CPU_IRQS; irq++) { + for (irq = 0; irq < MPIC_MAX_PER_CPU_IRQS; irq++) { struct irq_data *data; int virq; @@ -615,10 +611,9 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h, armada_370_xp_irq_mask(irq_get_irq_data(virq)); if (!is_percpu_irq(hw)) - writel(hw, per_cpu_int_base + - ARMADA_370_XP_INT_CLEAR_MASK); + writel(hw, per_cpu_int_base + MPIC_INT_CLEAR_MASK); else - writel(hw, main_int_base + ARMADA_370_XP_INT_SET_ENABLE); + writel(hw, main_int_base + MPIC_INT_SET_ENABLE); irq_set_status_flags(virq, IRQ_LEVEL); if (is_percpu_irq(hw)) { @@ -645,10 +640,10 @@ static void armada_370_xp_handle_msi_irq(struct pt_regs *regs, bool is_chained) { u32 msimask, msinr; - msimask = readl_relaxed(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE); + msimask = readl_relaxed(per_cpu_int_base + MPIC_IN_DRBEL_CAUSE); msimask &= msi_doorbell_mask(); - writel(~msimask, per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_CAUSE); + writel(~msimask, per_cpu_int_base + MPIC_IN_DRBEL_CAUSE); for (msinr = msi_doorbell_start(); msinr < msi_doorbell_end(); msinr++) { @@ -673,17 +668,16 @@ static void armada_370_xp_mpic_handle_cascade_irq(struct irq_desc *desc) chained_irq_enter(chip, desc); - irqmap = readl_relaxed(per_cpu_int_base + ARMADA_375_PPI_CAUSE); + irqmap = readl_relaxed(per_cpu_int_base + MPIC_PPI_CAUSE); cpuid = cpu_logical_map(smp_processor_id()); for_each_set_bit(irqn, &irqmap, BITS_PER_LONG) { - irqsrc = readl_relaxed(main_int_base + - ARMADA_370_XP_INT_SOURCE_CTL(irqn)); + irqsrc = readl_relaxed(main_int_base + MPIC_INT_SOURCE_CTL(irqn)); /* Check if the interrupt is not masked on current CPU. * Test IRQ (0-1) and FIQ (8-9) mask bits. */ - if (!(irqsrc & ARMADA_370_XP_INT_IRQ_FIQ_MASK(cpuid))) + if (!(irqsrc & MPIC_INT_IRQ_FIQ_MASK(cpuid))) continue; if (irqn == 0 || irqn == 1) { @@ -703,8 +697,7 @@ armada_370_xp_handle_irq(struct pt_regs *regs) u32 irqstat, irqnr; do { - irqstat = readl_relaxed(per_cpu_int_base + - ARMADA_370_XP_CPU_INTACK); + irqstat = readl_relaxed(per_cpu_int_base + MPIC_CPU_INTACK); irqnr = irqstat & 0x3FF; if (irqnr > 1022) @@ -727,7 +720,7 @@ armada_370_xp_handle_irq(struct pt_regs *regs) int ipi; ipimask = readl_relaxed(per_cpu_int_base + - ARMADA_370_XP_IN_DRBEL_CAUSE) + MPIC_IN_DRBEL_CAUSE) & IPI_DOORBELL_MASK; for_each_set_bit(ipi, &ipimask, IPI_DOORBELL_END) @@ -740,7 +733,7 @@ armada_370_xp_handle_irq(struct pt_regs *regs) static int armada_370_xp_mpic_suspend(void) { - doorbell_mask_reg = readl(per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); + doorbell_mask_reg = readl(per_cpu_int_base + MPIC_IN_DRBEL_MASK); return 0; } @@ -751,7 +744,7 @@ static void armada_370_xp_mpic_resume(void) irq_hw_number_t irq; /* Re-enable interrupts */ - nirqs = (readl(main_int_base + ARMADA_370_XP_INT_CONTROL) >> 2) & 0x3ff; + nirqs = (readl(main_int_base + MPIC_INT_CONTROL) >> 2) & 0x3ff; for (irq = 0; irq < nirqs; irq++) { struct irq_data *data; int virq; @@ -764,14 +757,12 @@ static void armada_370_xp_mpic_resume(void) if (!is_percpu_irq(irq)) { /* Non per-CPU interrupts */ - writel(irq, per_cpu_int_base + - ARMADA_370_XP_INT_CLEAR_MASK); + writel(irq, per_cpu_int_base + MPIC_INT_CLEAR_MASK); if (!irqd_irq_disabled(data)) armada_370_xp_irq_unmask(data); } else { /* Per-CPU interrupts */ - writel(irq, main_int_base + - ARMADA_370_XP_INT_SET_ENABLE); + writel(irq, main_int_base + MPIC_INT_SET_ENABLE); /* * Re-enable on the current CPU, @@ -784,8 +775,7 @@ static void armada_370_xp_mpic_resume(void) } /* Reconfigure doorbells for IPIs and MSIs */ - writel(doorbell_mask_reg, - per_cpu_int_base + ARMADA_370_XP_IN_DRBEL_MASK); + writel(doorbell_mask_reg, per_cpu_int_base + MPIC_IN_DRBEL_MASK); if (is_ipi_available()) { src0 = doorbell_mask_reg & IPI_DOORBELL_MASK; @@ -796,9 +786,9 @@ static void armada_370_xp_mpic_resume(void) } if (src0) - writel(0, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK); + writel(0, per_cpu_int_base + MPIC_INT_CLEAR_MASK); if (src1) - writel(1, per_cpu_int_base + ARMADA_370_XP_INT_CLEAR_MASK); + writel(1, per_cpu_int_base + MPIC_INT_CLEAR_MASK); if (is_ipi_available()) ipi_resume(); @@ -834,11 +824,11 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, resource_size(&per_cpu_int_res)); BUG_ON(!per_cpu_int_base); - control = readl(main_int_base + ARMADA_370_XP_INT_CONTROL); + control = readl(main_int_base + MPIC_INT_CONTROL); nr_irqs = (control >> 2) & 0x3ff; for (i = 0; i < nr_irqs; i++) - writel(i, main_int_base + ARMADA_370_XP_INT_CLEAR_ENABLE); + writel(i, main_int_base + MPIC_INT_CLEAR_ENABLE); armada_370_xp_mpic_domain = irq_domain_add_linear(node, nr_irqs, From patchwork Tue Jul 2 11:42:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719485 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AB1C5C3064D for ; Tue, 2 Jul 2024 11:44:44 +0000 (UTC) DKIM-Signature: v=1; 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Signed-off-by: Marek Behún Reviewed-by: Andrew Lunn --- drivers/irqchip/irq-armada-370-xp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 8f52de6d8921..b9631cc25c0b 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -409,7 +409,7 @@ static void armada_370_xp_ipi_send_mask(struct irq_data *d, const struct cpumask *mask) { unsigned long map = 0; - int cpu; + unsigned int cpu; /* Convert our logical CPU mask into a physical one. */ for_each_cpu(cpu, mask) @@ -507,7 +507,7 @@ static int armada_xp_set_affinity(struct irq_data *d, const struct cpumask *mask_val, bool force) { irq_hw_number_t hwirq = irqd_to_hwirq(d); - int cpu; + unsigned int cpu; /* Select a single core from the affinity mask which is online */ cpu = cpumask_any_and(mask_val, cpu_online_mask); From patchwork Tue Jul 2 11:42:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719486 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 27829C3064D for ; Tue, 2 Jul 2024 11:44:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=xp4QDctYbXDBsbyLqnutrmXsE/LmUKtecDpSut8zwfk=; b=okoIHvfaQCxb/gnNmKUgx4MVSn zvCJJgAclBN7NyhisEdp25Q4XJYlPGjTAHHaarrcaOgEWOMezkTHa0PqvHbkwOnB83K6NaHMS0+zD 0ZJsHQ2QLBTaCdpV/zU/2I61aM6tmtnvUGEtY+ht5QoxBFVy3aKRT5EAtl8jodtKRljzBYdQytsDi jLmDDAOD/am8d/Yx/FiUnagLtnP/lQmg1yWkghJkJLXPJQ1FcvjstFMBsKXRgbwP0v2qMITLGuOwS XYSet8/Vs+32Vj4/ZsRIryOucb1tfhYDbOLI7McbRYxtNavduvOel9xbsTW0BRQOby22BqLQSPyyK L/f/G6dw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObwA-00000006WqN-44ia; Tue, 02 Jul 2024 11:44:42 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObv1-00000006W7h-1PYV for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:43:32 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id BAA2ECE1D56; Tue, 2 Jul 2024 11:43:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id DFBF9C2BD10; Tue, 2 Jul 2024 11:43:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920609; bh=DLCEkL8UyWedUpt6/VZAPlMX55GRHEMyQrbp7gGRMN0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FoKzXr8RLSSmI6o1B0l25Ph8aDARYef99enKPXQA4Tf0774XT/G1JhRzQTU/VENdl 8rzVsXYxpQEAoLYTylM3RGkkMZRxEMZ+7XG2IppIhaPUtwli288KLgHZnLM2/zUkfM OVZ2H+vC0tP6ESdVScFuFeuvw4K3+mFCuNDTaPDjr4PikdHDt5VgnaP1l6I4xCyTrQ DR6RiLGgCpLSLorhJPpKBSf/50WZc1qebhSsQIBdyIShv7hZVRy6EHRqoSMXG9Vt/B BtIEFWaJ/jevwh1EjjA9PH69p6mDsD+JMATLYTlmsKm/H3w3z75oX6f7s2H718xBEB YBUZqoySL5tmw== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 08/30] irqchip/armada-370-xp: Simplify is_percpu_irq() code Date: Tue, 2 Jul 2024 13:42:40 +0200 Message-ID: <20240702114302.22475-9-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044331_582731_C88A82BC X-CRM114-Status: GOOD ( 10.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Simplify the code in the is_percpu_irq() function. Instead of if (condition) return true; return false; simply return condition. Signed-off-by: Marek Behún Reviewed-by: Andrew Lunn Reviewed-by: Ilpo Järvinen --- drivers/irqchip/irq-armada-370-xp.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index b9631cc25c0b..cfd6dc803150 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -201,10 +201,7 @@ static inline unsigned int msi_doorbell_end(void) static inline bool is_percpu_irq(irq_hw_number_t irq) { - if (irq <= MPIC_MAX_PER_CPU_IRQS) - return true; - - return false; + return irq <= MPIC_MAX_PER_CPU_IRQS; } /* From patchwork Tue Jul 2 11:42:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719487 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4EC41C30658 for ; Tue, 2 Jul 2024 11:45:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=kQjaJeL/hbiAKSUkqGvAxqm2mWhqPp2463cx6/KSkLY=; b=Q32qYxFs5dPh3Z+gCWw3IQwRUU 46hf2YJJE5pVpHjc9H3HWFnbuWD1DxV4TOuIBaHO8kY4oxN+1WplLtmXB2NhE6jtCkY6NNGNSXY2+ MneqUThRpi+00hjz28Zg8Q5w6DT29v8SmSPBOYJpCLn7kdCYrnlaSY8/7nS6kdfzexQDmJGt4kIG3 Pxoc4zoptDW94zmFzbqOJGKUJxpY15uecfhyn7xAFwf483gnmDFT5HXLVu9cKMrZFQlWoSTg07mcS nrm7k2EicI2FVQCBq/5rY38LtEdy5/4s/xKq47b+W4gJV1EwYpiV4eu1ZZLcff1NwCUykBusteHY6 EBfyeAJA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObwK-00000006WvF-1dPX; Tue, 02 Jul 2024 11:44:52 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObv2-00000006W8o-2PuZ for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:43:34 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id E899861CD1; Tue, 2 Jul 2024 11:43:31 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7A532C32781; Tue, 2 Jul 2024 11:43:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920611; bh=YPLzgSFy/4U/xQk4GJftd02tmJOrgxRChf/WZeR3MXs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TIbkfemNUkQkijEbd/b01XZZth2bMvOX6gpLecEvAJVPvASfealTwX2PEj+GLTOlo rRDJLsFDlOD3c7onIx+yeEx6tDB5hzhTD0+mMun2sS63rWrVZ2GmoyOnaj/dYd9XwF 2ZIEizRFom/xwI5jHBvgiUN99M/Zn/fOeFKB9m5OJ34C3enXT7pGZtUiPr3TpHMx/w j3iZZJyMW4cQZTyJ4/oWQF/2UNmhPx5VVN/RXhUNriqrK5LkDV8FKGgHv3YbM9yR/S 6ZWSq8UndmNtq8jsb4+1OzPLGkObATDhVQ+q8kW3/hCgvCj3LwdlbPzDhitOJBXXTy baoK68XgwUDaw== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 09/30] irqchip/armada-370-xp: Change to SPDX license identifier Date: Tue, 2 Jul 2024 13:42:41 +0200 Message-ID: <20240702114302.22475-10-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044332_849846_114E2C59 X-CRM114-Status: GOOD ( 11.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Change the license identifier to SPDX style. Signed-off-by: Marek Behún Reviewed-by: Andrew Lunn --- drivers/irqchip/irq-armada-370-xp.c | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index cfd6dc803150..3d15d0bb7605 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -1,3 +1,4 @@ +// SPDX-License-Identifier: GPL-2.0-only /* * Marvell Armada 370 and Armada XP SoC IRQ handling * @@ -7,10 +8,6 @@ * Gregory CLEMENT * Thomas Petazzoni * Ben Dooks - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. */ #include From patchwork Tue Jul 2 11:42:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719488 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C0FDEC3064D for ; Tue, 2 Jul 2024 11:45:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=tWkAerlqszKy55gBCoQ3ns8aV/FZAL0RZkvdOxe/Gs8=; b=xMkavpPTnbccH8ud4+ajx7c3e3 eYz+kto1tZmYai0AIqFEiQ2BLWq3C5qXOSj38fHrDQEaexjfm4KeE0px4QMgk8HLpGOHaPlGwNFTQ OZqf9bKzy+OBVVkxnXyZY62KjCz7sr6nAqXqaBNzVdQgi/Uwv6CX8p1SD1l+J7Dp6M2+CKn6zoxr5 HtPYcbvO4xraSG99mXIOUkPFHM8ZuVQn2ZsafHB3dLxAV4FxDPR9Ftq8j6ONyU/yqotA5osQOxDOh /aDUs46GgoRteNAoGzGpreVonhDczQz0OiRteNWj7ZhxTAkGLQ0tEiRD3bblFcimKBm9NXHIg3NJ+ Zs7bAZeg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObwU-00000006X1Z-1uXq; Tue, 02 Jul 2024 11:45:02 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObv6-00000006WAv-2oAd for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:43:38 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id E31E6CE16FE; Tue, 2 Jul 2024 11:43:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1511EC116B1; Tue, 2 Jul 2024 11:43:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920614; bh=/gzKgkP/3jEZtpJsdJI/vQDIPWZMz2auClPpdELfiMQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=B7D9/4UCgfJMnDz6/DsvPjP6UeVBHCEQN72PvA/S3VsaqNI1BMHELbG5IhQWgSImp CwqyU4cyIbyCdvT4KiJ5k3hzY1BNOhiTcYL/9dJqetD3ni5buAodsF6vDNlD0SL8BX 8pyn6/h203BzY+7lPTFB9Wa1qhOkV/L6x84TE16fMsARCVK8zsi9SZa4Ri6nK+6xnM APn6D/iFNCAcyiSjWBSST8vZ8XlTtpap/z6ujlKYXNXSuSdR1Y7SqRphjnBb4X2pPm EfUzS2UYLSH9i1PseXiXqfwSntP5NjoiAPYigYEFkm/BjIbH40zgtqTnV430+T95Ju dme1XfYZlmdIQ== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 10/30] irqchip/armada-370-xp: Declare iterators in for loop Date: Tue, 2 Jul 2024 13:42:42 +0200 Message-ID: <20240702114302.22475-11-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044337_127568_FB0C5D23 X-CRM114-Status: GOOD ( 16.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Where possible, declare iterators in for cycle. This is possible since kernel uses -std=gnu11. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 27 ++++++++++----------------- 1 file changed, 10 insertions(+), 17 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 3d15d0bb7605..22e1a493abae 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -276,7 +276,7 @@ static struct irq_chip armada_370_xp_msi_bottom_irq_chip = { static int armada_370_xp_msi_alloc(struct irq_domain *domain, unsigned int virq, unsigned int nr_irqs, void *args) { - int hwirq, i; + int hwirq; mutex_lock(&msi_used_lock); hwirq = bitmap_find_free_region(msi_used, msi_doorbell_size(), @@ -286,7 +286,7 @@ static int armada_370_xp_msi_alloc(struct irq_domain *domain, unsigned int virq, if (hwirq < 0) return -ENOSPC; - for (i = 0; i < nr_irqs; i++) { + for (int i = 0; i < nr_irqs; i++) { irq_domain_set_info(domain, virq + i, hwirq + i, &armada_370_xp_msi_bottom_irq_chip, domain->host_data, handle_simple_irq, @@ -436,9 +436,7 @@ static int armada_370_xp_ipi_alloc(struct irq_domain *d, unsigned int virq, unsigned int nr_irqs, void *args) { - int i; - - for (i = 0; i < nr_irqs; i++) { + for (int i = 0; i < nr_irqs; i++) { irq_set_percpu_devid(virq + i); irq_domain_set_info(d, virq + i, i, &ipi_irqchip, d->host_data, @@ -463,9 +461,7 @@ static const struct irq_domain_ops ipi_domain_ops = { static void ipi_resume(void) { - int i; - - for (i = 0; i < IPI_DOORBELL_END; i++) { + for (int i = 0; i < IPI_DOORBELL_END; i++) { int irq; irq = irq_find_mapping(ipi_domain, i); @@ -517,12 +513,12 @@ static int armada_xp_set_affinity(struct irq_data *d, static void armada_xp_mpic_smp_cpu_init(void) { u32 control; - int nr_irqs, i; + int nr_irqs; control = readl(main_int_base + MPIC_INT_CONTROL); nr_irqs = (control >> 2) & 0x3ff; - for (i = 0; i < nr_irqs; i++) + for (int i = 0; i < nr_irqs; i++) writel(i, per_cpu_int_base + MPIC_INT_SET_MASK); if (!is_ipi_available()) @@ -540,10 +536,8 @@ static void armada_xp_mpic_smp_cpu_init(void) static void armada_xp_mpic_reenable_percpu(void) { - unsigned int irq; - /* Re-enable per-CPU interrupts that were enabled before suspend */ - for (irq = 0; irq < MPIC_MAX_PER_CPU_IRQS; irq++) { + for (unsigned int irq = 0; irq < MPIC_MAX_PER_CPU_IRQS; irq++) { struct irq_data *data; int virq; @@ -735,11 +729,10 @@ static void armada_370_xp_mpic_resume(void) { bool src0, src1; int nirqs; - irq_hw_number_t irq; /* Re-enable interrupts */ nirqs = (readl(main_int_base + MPIC_INT_CONTROL) >> 2) & 0x3ff; - for (irq = 0; irq < nirqs; irq++) { + for (irq_hw_number_t irq = 0; irq < nirqs; irq++) { struct irq_data *data; int virq; @@ -797,7 +790,7 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, struct device_node *parent) { struct resource main_int_res, per_cpu_int_res; - int nr_irqs, i; + int nr_irqs; u32 control; BUG_ON(of_address_to_resource(node, 0, &main_int_res)); @@ -821,7 +814,7 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, control = readl(main_int_base + MPIC_INT_CONTROL); nr_irqs = (control >> 2) & 0x3ff; - for (i = 0; i < nr_irqs; i++) + for (int i = 0; i < nr_irqs; i++) writel(i, main_int_base + MPIC_INT_CLEAR_ENABLE); armada_370_xp_mpic_domain = From patchwork Tue Jul 2 11:42:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719489 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AE54AC3064D for ; Tue, 2 Jul 2024 11:45:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 22e1a493abae..7016b206bddd 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -462,14 +462,14 @@ static const struct irq_domain_ops ipi_domain_ops = { static void ipi_resume(void) { for (int i = 0; i < IPI_DOORBELL_END; i++) { - int irq; + int virq; - irq = irq_find_mapping(ipi_domain, i); - if (irq <= 0) + virq = irq_find_mapping(ipi_domain, i); + if (virq <= 0) continue; - if (irq_percpu_is_enabled(irq)) { + if (irq_percpu_is_enabled(virq)) { struct irq_data *d; - d = irq_domain_get_irq_data(ipi_domain, irq); + d = irq_domain_get_irq_data(ipi_domain, virq); armada_370_xp_ipi_unmask(d); } } From patchwork Tue Jul 2 11:42:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719490 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0F5C9C3064D for ; Tue, 2 Jul 2024 11:45:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=EnO8Gjz8H8uyLvT1tlR+tW3ZQd5GGb1dL+gGDQfc384=; b=bnIcNmUyLCqebNNQlqF1Hz4xe3 Ia/KfKBK3gBCKcqTX0FXXTb6qvxIv6f2cKW4VqWcL/ba5ntAM/ozhWYaiw0OMuiQMEBNMTgkgFsRi up6baC2ji31OS6OxjdZB1TD4JmNpkcxeDnxxf63+1JqKfmyvA8ZxI9an2/69PoPnG/1PRlUI26vt0 XPeV1vG4z5RlD16F/X8mPQ5MfdOmahQQsj3MhTpsn1//W1gTdzzGwV/Zn9frmxarQhB7f4n5s5Yrg w1g6bWcszeKmGXYAbf6bKpMqmrW0sbblV7gB++2luG/25IONYNIPGCZxVfsy+HoJgqFwHWhR78vQM WpQceeJw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObwp-00000006XDe-3Isr; Tue, 02 Jul 2024 11:45:23 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObvA-00000006WCv-1sqJ for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:43:41 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id ABA4F61B23; Tue, 2 Jul 2024 11:43:39 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 3EF09C4AF0C; Tue, 2 Jul 2024 11:43:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920619; bh=uHryF7P3s53hzSPX65b5enT1Suf8kLtu3Um7tBo2aqw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=vEYbC5k9IaXAfrqWqM6xmWGbkGriHsmxBEtvrtes898VEh8MnYPGIgxsDTuehxoyX 0XhtJpgXbQbOTFUAKl+/Vxu6MyCzCFOiPmE/jBZUqgcskAJpI31OdhL1Tj2Sjfo2Nx Fbko6+4wk4YZsjX4Q3dSkffIPNgOsfhLcdHrvmtBbz4XgjOR8yH9wIwB3s2+UGb0rY X3POloUzXKPxthr2sZBsZTQKKgVCmDFyQvGJ5gxmPNHxE2yFoRI5zB5bFWTlhwTZdA b1S6AAuCjnpOScII/RgBnmksEJQkXQ0mqzHSX11N3GtJ2W+MDViwIrQo+P2wtszrHi qWdt9fBaHxPHQ== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 12/30] irqchip/armada-370-xp: Use unsigned int type for virqs Date: Tue, 2 Jul 2024 13:42:44 +0200 Message-ID: <20240702114302.22475-13-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044340_594538_3C156078 X-CRM114-Status: GOOD ( 13.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The return type of irq_find_mapping() and irq_linear_revmap() is unsigned int. Use the unsigned int type for the variables storing the return value. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 7016b206bddd..b29f3bbfb1c3 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -462,10 +462,10 @@ static const struct irq_domain_ops ipi_domain_ops = { static void ipi_resume(void) { for (int i = 0; i < IPI_DOORBELL_END; i++) { - int virq; + unsigned int virq; virq = irq_find_mapping(ipi_domain, i); - if (virq <= 0) + if (!virq) continue; if (irq_percpu_is_enabled(virq)) { struct irq_data *d; @@ -539,7 +539,7 @@ static void armada_xp_mpic_reenable_percpu(void) /* Re-enable per-CPU interrupts that were enabled before suspend */ for (unsigned int irq = 0; irq < MPIC_MAX_PER_CPU_IRQS; irq++) { struct irq_data *data; - int virq; + unsigned int virq; virq = irq_linear_revmap(armada_370_xp_mpic_domain, irq); if (virq == 0) @@ -734,7 +734,7 @@ static void armada_370_xp_mpic_resume(void) nirqs = (readl(main_int_base + MPIC_INT_CONTROL) >> 2) & 0x3ff; for (irq_hw_number_t irq = 0; irq < nirqs; irq++) { struct irq_data *data; - int virq; + unsigned int virq; virq = irq_linear_revmap(armada_370_xp_mpic_domain, irq); if (virq == 0) From patchwork Tue Jul 2 11:42:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719491 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 461D6C30658 for ; Tue, 2 Jul 2024 11:45:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Tue, 2 Jul 2024 11:43:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920622; bh=porvZP9S0xQ1EeXf8i+fFoTz4bgEaGc79PKfzvj9DU0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=L8xKvT5SFlul5aNxx7qlx9q2DSOv3dpJURS9iNzSGsf+8vu9R7ItAy5L+bL9H53qD UDRI9pKUhLq10AmgNHzk1h2+4wyJ7NPa/STecxhQQ6u3uReS1uHPW8hDDKaJfYj43B D79/mZnB1AqqptZRERfG3n4L4ltYrDLNsqMCgZYnbYoACpc9SFgicWBLDg/iVTU28V Okmqa7pqJ4XLIv/Gm40vqD/Gt7wwdYCQtYtuSCdTWb0gyQfG/uj1Fvwy+tyH8heP3q qJB0Kk6VrCRmLr1z2Sr67OkR/7lH6xSH7xO1bDca+YCzhgRIFhI7tscUXkXCSkCbLQ Gz+MuQfQtE5Gw== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 13/30] irqchip/armada-370-xp: Use !virq instead of virq == 0 in condition Date: Tue, 2 Jul 2024 13:42:45 +0200 Message-ID: <20240702114302.22475-14-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044343_064401_2450851C X-CRM114-Status: GOOD ( 12.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Use !virq instead of virq == 0 when checking for availability of the virq. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index b29f3bbfb1c3..c007610413fe 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -542,7 +542,7 @@ static void armada_xp_mpic_reenable_percpu(void) unsigned int virq; virq = irq_linear_revmap(armada_370_xp_mpic_domain, irq); - if (virq == 0) + if (!virq) continue; data = irq_get_irq_data(virq); @@ -737,7 +737,7 @@ static void armada_370_xp_mpic_resume(void) unsigned int virq; virq = irq_linear_revmap(armada_370_xp_mpic_domain, irq); - if (virq == 0) + if (!virq) continue; data = irq_get_irq_data(virq); From patchwork Tue Jul 2 11:42:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719492 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 41CF5C3064D for ; Tue, 2 Jul 2024 11:45:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=g5GizAVgyxmL8de/Ai1ppF7kgqOMshmJUC8PNXOrpgk=; b=WUz88QIQ6qj1L0tSaxxdSW7Igc DIfst9km32tRy6lCLycSKiXcYFUvXLgJl2/MBuUg9iC/zlI8SblHWska6w3BlrMwCQi/YI5ssj102 J4g57Te0IztgQex5ZWPcOXwjeIgG/yUigykjaZM27EwNv349kbpjud2lKzphywPejaBJDMvUnv+uC CqGmncIjJu/L+kwn4QWtpSeITezmzfAMNQv22aXuHpKOmcDRcxuYVmM1xeV53XUqd6lntF4KF3Zu5 CqWcP+TQZHfBrKLlW/qPsbWTTTx3QBsiFyje+YLrc8cjIAgkinyU+yo3aB6cG2kB6H0sEu8shrjTr K6BqkuWw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObx7-00000006XLy-3ve7; Tue, 02 Jul 2024 11:45:41 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObvG-00000006WFU-2pOb for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:43:48 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id E286ACE1DCD; Tue, 2 Jul 2024 11:43:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 67DB9C116B1; Tue, 2 Jul 2024 11:43:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920624; bh=xfdwBm73zrsE8jJbz66cyUfza8+3mTMfHMR1ZtugqdA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UbV6+XVW1/C6mscSmcfkb9HU+yrEU/sVRAZeEd8bjDHT8ekegj489M7oA+VyyoSji LRRHrtvyN4yvG3ZFs+AtjSYZrp4bmClo5J/KILh8Yt2OOSxFPtG0XA8qd435S9GWNJ CedbDKTQoJhcVdEic31KRViOmG6VynsKFOdJD5XwcIpERvXT1SjbO1P8VvMd/2AGyY eVW0qzrsS99YeNhbcCiKN6QBMQvMMIAMmtB9CIbUQ0LCPVs956esVHndBB6fGPTxZ2 cCTcZMROHdg/QJWfGC+7WAkKevwXLZhYLL3cZR3OwWzw9ih8df7QpzqlW0cVbhfH3v Bk8s7mqY5YULA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 14/30] irqchip/armada-370-xp: Simplify ipi_resume() code Date: Tue, 2 Jul 2024 13:42:46 +0200 Message-ID: <20240702114302.22475-15-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044346_927456_4E68B565 X-CRM114-Status: GOOD ( 12.44 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Refactor the ipi_resume() function to drop one indentation level. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index c007610413fe..316c27c97951 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -462,16 +462,14 @@ static const struct irq_domain_ops ipi_domain_ops = { static void ipi_resume(void) { for (int i = 0; i < IPI_DOORBELL_END; i++) { - unsigned int virq; + unsigned int virq = irq_find_mapping(ipi_domain, i); + struct irq_data *d; - virq = irq_find_mapping(ipi_domain, i); - if (!virq) + if (!virq || !irq_percpu_is_enabled(virq)) continue; - if (irq_percpu_is_enabled(virq)) { - struct irq_data *d; - d = irq_domain_get_irq_data(ipi_domain, virq); - armada_370_xp_ipi_unmask(d); - } + + d = irq_domain_get_irq_data(ipi_domain, virq); + armada_370_xp_ipi_unmask(d); } } From patchwork Tue Jul 2 11:42:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719493 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1930CC3064D for ; Tue, 2 Jul 2024 11:46:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Siiv6/6cna35X4pLvHjVIPYDt+9aToT1QsE1u/cyeJU=; b=k+xInGszKSIrLV4mIOEnthMenY tUjaKWux4zHX1jL3vWpQwvI9Sv4vCEK0l9TPdTB1ffwKfbu3/e5V63Om0Wy/OWjhTmG2zQYorOcHP Xwm7KNPg/GtQ4UpaogYfxDvl+7WgnSyiCVAri3omLRYss048v2nAhv2TigmnPJe+x/Te4cJGtPyJv kgpvJPzpRvdlxNsW6ETK/XVhfo41wHadd4s79fZZ5vV9xEVKal79OJjKtI3fiseWHeAiejgVdPGHn zjYHWbcqWL6C0W0/PN36qsImuPPugdSAJvqpmuOnrCoxzSwBkEEBWShZvG93/+ZTXvQGEVD1UZH46 ruSumb0g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObxI-00000006XRf-0lvM; Tue, 02 Jul 2024 11:45:52 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObvH-00000006WGg-45hy for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:43:49 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 6E45D61C16; Tue, 2 Jul 2024 11:43:47 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 026FCC2BD10; Tue, 2 Jul 2024 11:43:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920627; bh=ejutxvKIphil0xGtk2UAeffFE+QTgruIsHFHFzbSSLE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QYitkRJxy72LlpiSg2tzd+wBLxsETgf/CPyt8gSPC25IalmYBQaXtaLWLn8OqTN+J ks0F/3xdFUzFdBAms8QfVtK5KZpVVb3VJQSziROogYx7SCc4IkztbcJ97csTTkfKXe JGZGSdMaIUfxGTjfujjbcI9VnnTQ4I4ZK2mMCzOajlf3nzYkhN2UDmutWeqDMBu8Mm kznEJNlBN2P3HmoFKLYoLnjM7u81iXb+ffWeBoKo7IV4bRu/m7Y8Bbkb43X3CmiJ/a wUGlvL2s8/DwV7SSuC1N7Y8Z9m0wodhofCLPa9MkYr8cPPyATV+Nd5yZ1enGMB7/ny 7o3WuE3UMzTtw== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 15/30] irqchip/armada-370-xp: Improve indentation Date: Tue, 2 Jul 2024 13:42:47 +0200 Message-ID: <20240702114302.22475-16-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044348_249671_ACD36F50 X-CRM114-Status: GOOD ( 16.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add some blank lines and other indentation improvements. Checkpatch now stops complaining. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 55 +++++++++++++++-------------- 1 file changed, 28 insertions(+), 27 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 316c27c97951..b849a57633c1 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -229,9 +229,9 @@ static void armada_370_xp_irq_unmask(struct irq_data *d) #ifdef CONFIG_PCI_MSI static struct irq_chip armada_370_xp_msi_irq_chip = { - .name = "MPIC MSI", - .irq_mask = pci_msi_mask_irq, - .irq_unmask = pci_msi_unmask_irq, + .name = "MPIC MSI", + .irq_mask = pci_msi_mask_irq, + .irq_unmask = pci_msi_unmask_irq, }; static struct msi_domain_info armada_370_xp_msi_domain_info = { @@ -386,6 +386,7 @@ static struct irq_domain *ipi_domain; static void armada_370_xp_ipi_mask(struct irq_data *d) { u32 reg; + reg = readl(per_cpu_int_base + MPIC_IN_DRBEL_MASK); reg &= ~BIT(d->hwirq); writel(reg, per_cpu_int_base + MPIC_IN_DRBEL_MASK); @@ -394,6 +395,7 @@ static void armada_370_xp_ipi_mask(struct irq_data *d) static void armada_370_xp_ipi_unmask(struct irq_data *d) { u32 reg; + reg = readl(per_cpu_int_base + MPIC_IN_DRBEL_MASK); reg |= BIT(d->hwirq); writel(reg, per_cpu_int_base + MPIC_IN_DRBEL_MASK); @@ -432,24 +434,20 @@ static struct irq_chip ipi_irqchip = { .ipi_send_mask = armada_370_xp_ipi_send_mask, }; -static int armada_370_xp_ipi_alloc(struct irq_domain *d, - unsigned int virq, - unsigned int nr_irqs, void *args) +static int armada_370_xp_ipi_alloc(struct irq_domain *d, unsigned int virq, + unsigned int nr_irqs, void *args) { for (int i = 0; i < nr_irqs; i++) { irq_set_percpu_devid(virq + i); - irq_domain_set_info(d, virq + i, i, &ipi_irqchip, - d->host_data, - handle_percpu_devid_irq, - NULL, NULL); + irq_domain_set_info(d, virq + i, i, &ipi_irqchip, d->host_data, + handle_percpu_devid_irq, NULL, NULL); } return 0; } -static void armada_370_xp_ipi_free(struct irq_domain *d, - unsigned int virq, - unsigned int nr_irqs) +static void armada_370_xp_ipi_free(struct irq_domain *d, unsigned int virq, + unsigned int nr_irqs) { /* Not freeing IPIs */ } @@ -484,7 +482,8 @@ static __init void armada_xp_ipi_init(struct device_node *node) return; irq_domain_update_bus_token(ipi_domain, DOMAIN_BUS_IPI); - base_ipi = irq_domain_alloc_irqs(ipi_domain, IPI_DOORBELL_END, NUMA_NO_NODE, NULL); + base_ipi = irq_domain_alloc_irqs(ipi_domain, IPI_DOORBELL_END, + NUMA_NO_NODE, NULL); if (WARN_ON(!base_ipi)) return; @@ -562,6 +561,7 @@ static int armada_xp_mpic_starting_cpu(unsigned int cpu) armada_xp_mpic_perf_init(); armada_xp_mpic_smp_cpu_init(); armada_xp_mpic_reenable_percpu(); + return 0; } @@ -570,6 +570,7 @@ static int mpic_cascaded_starting_cpu(unsigned int cpu) armada_xp_mpic_perf_init(); armada_xp_mpic_reenable_percpu(); enable_percpu_irq(parent_irq, IRQ_TYPE_NONE); + return 0; } #else @@ -579,9 +580,9 @@ static void ipi_resume(void) {} static struct irq_chip armada_370_xp_irq_chip = { .name = "MPIC", - .irq_mask = armada_370_xp_irq_mask, - .irq_mask_ack = armada_370_xp_irq_mask, - .irq_unmask = armada_370_xp_irq_unmask, + .irq_mask = armada_370_xp_irq_mask, + .irq_mask_ack = armada_370_xp_irq_mask, + .irq_unmask = armada_370_xp_irq_unmask, #ifdef CONFIG_SMP .irq_set_affinity = armada_xp_set_affinity, #endif @@ -605,10 +606,10 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h, if (is_percpu_irq(hw)) { irq_set_percpu_devid(virq); irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip, - handle_percpu_devid_irq); + handle_percpu_devid_irq); } else { irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip, - handle_level_irq); + handle_level_irq); irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq))); } irq_set_probe(virq); @@ -617,8 +618,8 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h, } static const struct irq_domain_ops armada_370_xp_mpic_irq_ops = { - .map = armada_370_xp_mpic_irq_map, - .xlate = irq_domain_xlate_onecell, + .map = armada_370_xp_mpic_irq_map, + .xlate = irq_domain_xlate_onecell, }; #ifdef CONFIG_PCI_MSI @@ -706,20 +707,20 @@ armada_370_xp_handle_irq(struct pt_regs *regs) int ipi; ipimask = readl_relaxed(per_cpu_int_base + - MPIC_IN_DRBEL_CAUSE) - & IPI_DOORBELL_MASK; + MPIC_IN_DRBEL_CAUSE) & + IPI_DOORBELL_MASK; for_each_set_bit(ipi, &ipimask, IPI_DOORBELL_END) generic_handle_domain_irq(ipi_domain, ipi); } #endif - } while (1); } static int armada_370_xp_mpic_suspend(void) { doorbell_mask_reg = readl(per_cpu_int_base + MPIC_IN_DRBEL_MASK); + return 0; } @@ -815,9 +816,9 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, for (int i = 0; i < nr_irqs; i++) writel(i, main_int_base + MPIC_INT_CLEAR_ENABLE); - armada_370_xp_mpic_domain = - irq_domain_add_linear(node, nr_irqs, - &armada_370_xp_mpic_irq_ops, NULL); + armada_370_xp_mpic_domain = irq_domain_add_linear(node, nr_irqs, + &armada_370_xp_mpic_irq_ops, + NULL); BUG_ON(!armada_370_xp_mpic_domain); irq_domain_update_bus_token(armada_370_xp_mpic_domain, DOMAIN_BUS_WIRED); From patchwork Tue Jul 2 11:42:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719494 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E0557C3064D for ; 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Tue, 02 Jul 2024 11:46:03 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObvM-00000006WJ4-2AIL for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:43:55 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 9626CCE1D5E; Tue, 2 Jul 2024 11:43:50 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 90859C32781; Tue, 2 Jul 2024 11:43:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920629; bh=yEncTRGjUeQP7yiUkY8Vrojojphz/ArrlfFzcX/6lS4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=l3Dtnh86dR5P29m3x4sME1DWO7F3/YJGbdmHtYCKq0f1mWDVOmz9LHO1h7yigXJbY 4dA2DHOoo6NAXHgKUuhhImly9xAfhiHibnHuV01+dg2kofoL9lCLNCGZu4OKbnQcfJ gIoJfr+1Q5jNJGniKeadiqd0IWQlxXdAQMsZMmfNtT0aGodhCVBx8E+v+9koY8+qnf Q+VN5rirdu8/VAtSxME9gyEcd3GYSUnJ1vWYBL6T6ZjoYzHq5x39VNrzutg/MovCSY cCuG9kDU1JcDKUf5SAfPH3OGEwAGE09fdQ5xI9SF5zmjQ6siuCFU4tTmxDcU0pnzbq J0cYPvhXyi7UQ== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 16/30] irqchip/armada-370-xp: Change symbol prefixes to mpic Date: Tue, 2 Jul 2024 13:42:48 +0200 Message-ID: <20240702114302.22475-17-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044352_966170_398C1542 X-CRM114-Status: GOOD ( 20.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Change symbol prefixes from armada_370_xp_ or others to mpic_. The rationale is that it is shorter and more generic (this controller is called MPIC and is also used on Armada 38x and 39x). Signed-off-by: Marek Behún Reviewed-by: Andrew Lunn --- drivers/irqchip/irq-armada-370-xp.c | 316 ++++++++++++++-------------- 1 file changed, 154 insertions(+), 162 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index b849a57633c1..ab18dae174a8 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -150,18 +150,18 @@ static void __iomem *per_cpu_int_base; static void __iomem *main_int_base; -static struct irq_domain *armada_370_xp_mpic_domain; +static struct irq_domain *mpic_domain; static u32 doorbell_mask_reg; static int parent_irq; #ifdef CONFIG_PCI_MSI -static struct irq_domain *armada_370_xp_msi_domain; -static struct irq_domain *armada_370_xp_msi_inner_domain; +static struct irq_domain *mpic_msi_domain; +static struct irq_domain *mpic_msi_inner_domain; static DECLARE_BITMAP(msi_used, PCI_MSI_FULL_DOORBELL_NR); static DEFINE_MUTEX(msi_used_lock); static phys_addr_t msi_doorbell_addr; #endif -static inline bool is_ipi_available(void) +static inline bool mpic_is_ipi_available(void) { /* * We distinguish IPI availability in the IC by the IC not having a @@ -174,29 +174,29 @@ static inline bool is_ipi_available(void) static inline u32 msi_doorbell_mask(void) { - return is_ipi_available() ? PCI_MSI_DOORBELL_MASK : - PCI_MSI_FULL_DOORBELL_MASK; + return mpic_is_ipi_available() ? PCI_MSI_DOORBELL_MASK : + PCI_MSI_FULL_DOORBELL_MASK; } static inline unsigned int msi_doorbell_start(void) { - return is_ipi_available() ? PCI_MSI_DOORBELL_START : - PCI_MSI_FULL_DOORBELL_START; + return mpic_is_ipi_available() ? PCI_MSI_DOORBELL_START : + PCI_MSI_FULL_DOORBELL_START; } static inline unsigned int msi_doorbell_size(void) { - return is_ipi_available() ? PCI_MSI_DOORBELL_NR : - PCI_MSI_FULL_DOORBELL_NR; + return mpic_is_ipi_available() ? PCI_MSI_DOORBELL_NR : + PCI_MSI_FULL_DOORBELL_NR; } static inline unsigned int msi_doorbell_end(void) { - return is_ipi_available() ? PCI_MSI_DOORBELL_END : - PCI_MSI_FULL_DOORBELL_END; + return mpic_is_ipi_available() ? PCI_MSI_DOORBELL_END : + PCI_MSI_FULL_DOORBELL_END; } -static inline bool is_percpu_irq(irq_hw_number_t irq) +static inline bool mpic_is_percpu_irq(irq_hw_number_t irq) { return irq <= MPIC_MAX_PER_CPU_IRQS; } @@ -206,21 +206,21 @@ static inline bool is_percpu_irq(irq_hw_number_t irq) * For shared global interrupts, mask/unmask global enable bit * For CPU interrupts, mask/unmask the calling CPU's bit */ -static void armada_370_xp_irq_mask(struct irq_data *d) +static void mpic_irq_mask(struct irq_data *d) { irq_hw_number_t hwirq = irqd_to_hwirq(d); - if (!is_percpu_irq(hwirq)) + if (!mpic_is_percpu_irq(hwirq)) writel(hwirq, main_int_base + MPIC_INT_CLEAR_ENABLE); else writel(hwirq, per_cpu_int_base + MPIC_INT_SET_MASK); } -static void armada_370_xp_irq_unmask(struct irq_data *d) +static void mpic_irq_unmask(struct irq_data *d) { irq_hw_number_t hwirq = irqd_to_hwirq(d); - if (!is_percpu_irq(hwirq)) + if (!mpic_is_percpu_irq(hwirq)) writel(hwirq, main_int_base + MPIC_INT_SET_ENABLE); else writel(hwirq, per_cpu_int_base + MPIC_INT_CLEAR_MASK); @@ -228,19 +228,19 @@ static void armada_370_xp_irq_unmask(struct irq_data *d) #ifdef CONFIG_PCI_MSI -static struct irq_chip armada_370_xp_msi_irq_chip = { +static struct irq_chip mpic_msi_irq_chip = { .name = "MPIC MSI", .irq_mask = pci_msi_mask_irq, .irq_unmask = pci_msi_unmask_irq, }; -static struct msi_domain_info armada_370_xp_msi_domain_info = { +static struct msi_domain_info mpic_msi_domain_info = { .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX), - .chip = &armada_370_xp_msi_irq_chip, + .chip = &mpic_msi_irq_chip, }; -static void armada_370_xp_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) +static void mpic_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) { unsigned int cpu = cpumask_first(irq_data_get_effective_affinity_mask(data)); @@ -249,8 +249,8 @@ static void armada_370_xp_compose_msi_msg(struct irq_data *data, struct msi_msg msg->data = BIT(cpu + 8) | (data->hwirq + msi_doorbell_start()); } -static int armada_370_xp_msi_set_affinity(struct irq_data *irq_data, - const struct cpumask *mask, bool force) +static int mpic_msi_set_affinity(struct irq_data *irq_data, + const struct cpumask *mask, bool force) { unsigned int cpu; @@ -267,14 +267,14 @@ static int armada_370_xp_msi_set_affinity(struct irq_data *irq_data, return IRQ_SET_MASK_OK; } -static struct irq_chip armada_370_xp_msi_bottom_irq_chip = { +static struct irq_chip mpic_msi_bottom_irq_chip = { .name = "MPIC MSI", - .irq_compose_msi_msg = armada_370_xp_compose_msi_msg, - .irq_set_affinity = armada_370_xp_msi_set_affinity, + .irq_compose_msi_msg = mpic_compose_msi_msg, + .irq_set_affinity = mpic_msi_set_affinity, }; -static int armada_370_xp_msi_alloc(struct irq_domain *domain, unsigned int virq, - unsigned int nr_irqs, void *args) +static int mpic_msi_alloc(struct irq_domain *domain, unsigned int virq, + unsigned int nr_irqs, void *args) { int hwirq; @@ -288,7 +288,7 @@ static int armada_370_xp_msi_alloc(struct irq_domain *domain, unsigned int virq, for (int i = 0; i < nr_irqs; i++) { irq_domain_set_info(domain, virq + i, hwirq + i, - &armada_370_xp_msi_bottom_irq_chip, + &mpic_msi_bottom_irq_chip, domain->host_data, handle_simple_irq, NULL, NULL); } @@ -296,8 +296,8 @@ static int armada_370_xp_msi_alloc(struct irq_domain *domain, unsigned int virq, return 0; } -static void armada_370_xp_msi_free(struct irq_domain *domain, - unsigned int virq, unsigned int nr_irqs) +static void mpic_msi_free(struct irq_domain *domain, unsigned int virq, + unsigned int nr_irqs) { struct irq_data *d = irq_domain_get_irq_data(domain, virq); @@ -306,12 +306,12 @@ static void armada_370_xp_msi_free(struct irq_domain *domain, mutex_unlock(&msi_used_lock); } -static const struct irq_domain_ops armada_370_xp_msi_domain_ops = { - .alloc = armada_370_xp_msi_alloc, - .free = armada_370_xp_msi_free, +static const struct irq_domain_ops mpic_msi_domain_ops = { + .alloc = mpic_msi_alloc, + .free = mpic_msi_free, }; -static void armada_370_xp_msi_reenable_percpu(void) +static void mpic_msi_reenable_percpu(void) { u32 reg; @@ -324,45 +324,44 @@ static void armada_370_xp_msi_reenable_percpu(void) writel(1, per_cpu_int_base + MPIC_INT_CLEAR_MASK); } -static int armada_370_xp_msi_init(struct device_node *node, - phys_addr_t main_int_phys_base) +static int mpic_msi_init(struct device_node *node, + phys_addr_t main_int_phys_base) { msi_doorbell_addr = main_int_phys_base + MPIC_SW_TRIG_INT; - armada_370_xp_msi_inner_domain = - irq_domain_add_linear(NULL, msi_doorbell_size(), - &armada_370_xp_msi_domain_ops, NULL); - if (!armada_370_xp_msi_inner_domain) + mpic_msi_inner_domain = irq_domain_add_linear(NULL, msi_doorbell_size(), + &mpic_msi_domain_ops, + NULL); + if (!mpic_msi_inner_domain) return -ENOMEM; - armada_370_xp_msi_domain = - pci_msi_create_irq_domain(of_node_to_fwnode(node), - &armada_370_xp_msi_domain_info, - armada_370_xp_msi_inner_domain); - if (!armada_370_xp_msi_domain) { - irq_domain_remove(armada_370_xp_msi_inner_domain); + mpic_msi_domain = pci_msi_create_irq_domain(of_node_to_fwnode(node), + &mpic_msi_domain_info, + mpic_msi_inner_domain); + if (!mpic_msi_domain) { + irq_domain_remove(mpic_msi_inner_domain); return -ENOMEM; } - armada_370_xp_msi_reenable_percpu(); + mpic_msi_reenable_percpu(); /* Unmask low 16 MSI irqs on non-IPI platforms */ - if (!is_ipi_available()) + if (!mpic_is_ipi_available()) writel(0, per_cpu_int_base + MPIC_INT_CLEAR_MASK); return 0; } #else -static __maybe_unused void armada_370_xp_msi_reenable_percpu(void) {} +static __maybe_unused void mpic_msi_reenable_percpu(void) {} -static inline int armada_370_xp_msi_init(struct device_node *node, - phys_addr_t main_int_phys_base) +static inline int mpic_msi_init(struct device_node *node, + phys_addr_t main_int_phys_base) { return 0; } #endif -static void armada_xp_mpic_perf_init(void) +static void mpic_perf_init(void) { unsigned long cpuid; @@ -381,9 +380,9 @@ static void armada_xp_mpic_perf_init(void) } #ifdef CONFIG_SMP -static struct irq_domain *ipi_domain; +static struct irq_domain *mpic_ipi_domain; -static void armada_370_xp_ipi_mask(struct irq_data *d) +static void mpic_ipi_mask(struct irq_data *d) { u32 reg; @@ -392,7 +391,7 @@ static void armada_370_xp_ipi_mask(struct irq_data *d) writel(reg, per_cpu_int_base + MPIC_IN_DRBEL_MASK); } -static void armada_370_xp_ipi_unmask(struct irq_data *d) +static void mpic_ipi_unmask(struct irq_data *d) { u32 reg; @@ -401,8 +400,7 @@ static void armada_370_xp_ipi_unmask(struct irq_data *d) writel(reg, per_cpu_int_base + MPIC_IN_DRBEL_MASK); } -static void armada_370_xp_ipi_send_mask(struct irq_data *d, - const struct cpumask *mask) +static void mpic_ipi_send_mask(struct irq_data *d, const struct cpumask *mask) { unsigned long map = 0; unsigned int cpu; @@ -421,68 +419,69 @@ static void armada_370_xp_ipi_send_mask(struct irq_data *d, writel((map << 8) | d->hwirq, main_int_base + MPIC_SW_TRIG_INT); } -static void armada_370_xp_ipi_ack(struct irq_data *d) +static void mpic_ipi_ack(struct irq_data *d) { writel(~BIT(d->hwirq), per_cpu_int_base + MPIC_IN_DRBEL_CAUSE); } -static struct irq_chip ipi_irqchip = { +static struct irq_chip mpic_ipi_irqchip = { .name = "IPI", - .irq_ack = armada_370_xp_ipi_ack, - .irq_mask = armada_370_xp_ipi_mask, - .irq_unmask = armada_370_xp_ipi_unmask, - .ipi_send_mask = armada_370_xp_ipi_send_mask, + .irq_ack = mpic_ipi_ack, + .irq_mask = mpic_ipi_mask, + .irq_unmask = mpic_ipi_unmask, + .ipi_send_mask = mpic_ipi_send_mask, }; -static int armada_370_xp_ipi_alloc(struct irq_domain *d, unsigned int virq, - unsigned int nr_irqs, void *args) +static int mpic_ipi_alloc(struct irq_domain *d, unsigned int virq, + unsigned int nr_irqs, void *args) { for (int i = 0; i < nr_irqs; i++) { irq_set_percpu_devid(virq + i); - irq_domain_set_info(d, virq + i, i, &ipi_irqchip, d->host_data, - handle_percpu_devid_irq, NULL, NULL); + irq_domain_set_info(d, virq + i, i, &mpic_ipi_irqchip, + d->host_data, handle_percpu_devid_irq, + NULL, NULL); } return 0; } -static void armada_370_xp_ipi_free(struct irq_domain *d, unsigned int virq, - unsigned int nr_irqs) +static void mpic_ipi_free(struct irq_domain *d, unsigned int virq, + unsigned int nr_irqs) { /* Not freeing IPIs */ } -static const struct irq_domain_ops ipi_domain_ops = { - .alloc = armada_370_xp_ipi_alloc, - .free = armada_370_xp_ipi_free, +static const struct irq_domain_ops mpic_ipi_domain_ops = { + .alloc = mpic_ipi_alloc, + .free = mpic_ipi_free, }; -static void ipi_resume(void) +static void mpic_ipi_resume(void) { for (int i = 0; i < IPI_DOORBELL_END; i++) { - unsigned int virq = irq_find_mapping(ipi_domain, i); + unsigned int virq = irq_find_mapping(mpic_ipi_domain, i); struct irq_data *d; if (!virq || !irq_percpu_is_enabled(virq)) continue; - d = irq_domain_get_irq_data(ipi_domain, virq); - armada_370_xp_ipi_unmask(d); + d = irq_domain_get_irq_data(mpic_ipi_domain, virq); + mpic_ipi_unmask(d); } } -static __init void armada_xp_ipi_init(struct device_node *node) +static __init void mpic_ipi_init(struct device_node *node) { int base_ipi; - ipi_domain = irq_domain_create_linear(of_node_to_fwnode(node), - IPI_DOORBELL_END, - &ipi_domain_ops, NULL); - if (WARN_ON(!ipi_domain)) + mpic_ipi_domain = irq_domain_create_linear(of_node_to_fwnode(node), + IPI_DOORBELL_END, + &mpic_ipi_domain_ops, NULL); + if (WARN_ON(!mpic_ipi_domain)) return; - irq_domain_update_bus_token(ipi_domain, DOMAIN_BUS_IPI); - base_ipi = irq_domain_alloc_irqs(ipi_domain, IPI_DOORBELL_END, + irq_domain_update_bus_token(mpic_ipi_domain, DOMAIN_BUS_IPI); + base_ipi = irq_domain_alloc_irqs(mpic_ipi_domain, IPI_DOORBELL_END, NUMA_NO_NODE, NULL); if (WARN_ON(!base_ipi)) return; @@ -490,8 +489,8 @@ static __init void armada_xp_ipi_init(struct device_node *node) set_smp_ipi_range(base_ipi, IPI_DOORBELL_END); } -static int armada_xp_set_affinity(struct irq_data *d, - const struct cpumask *mask_val, bool force) +static int mpic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, + bool force) { irq_hw_number_t hwirq = irqd_to_hwirq(d); unsigned int cpu; @@ -507,7 +506,7 @@ static int armada_xp_set_affinity(struct irq_data *d, return IRQ_SET_MASK_OK; } -static void armada_xp_mpic_smp_cpu_init(void) +static void mpic_smp_cpu_init(void) { u32 control; int nr_irqs; @@ -518,7 +517,7 @@ static void armada_xp_mpic_smp_cpu_init(void) for (int i = 0; i < nr_irqs; i++) writel(i, per_cpu_int_base + MPIC_INT_SET_MASK); - if (!is_ipi_available()) + if (!mpic_is_ipi_available()) return; /* Disable all IPIs */ @@ -531,14 +530,14 @@ static void armada_xp_mpic_smp_cpu_init(void) writel(0, per_cpu_int_base + MPIC_INT_CLEAR_MASK); } -static void armada_xp_mpic_reenable_percpu(void) +static void mpic_reenable_percpu(void) { /* Re-enable per-CPU interrupts that were enabled before suspend */ for (unsigned int irq = 0; irq < MPIC_MAX_PER_CPU_IRQS; irq++) { struct irq_data *data; unsigned int virq; - virq = irq_linear_revmap(armada_370_xp_mpic_domain, irq); + virq = irq_linear_revmap(mpic_domain, irq); if (!virq) continue; @@ -547,69 +546,68 @@ static void armada_xp_mpic_reenable_percpu(void) if (!irq_percpu_is_enabled(virq)) continue; - armada_370_xp_irq_unmask(data); + mpic_irq_unmask(data); } - if (is_ipi_available()) - ipi_resume(); + if (mpic_is_ipi_available()) + mpic_ipi_resume(); - armada_370_xp_msi_reenable_percpu(); + mpic_msi_reenable_percpu(); } -static int armada_xp_mpic_starting_cpu(unsigned int cpu) +static int mpic_starting_cpu(unsigned int cpu) { - armada_xp_mpic_perf_init(); - armada_xp_mpic_smp_cpu_init(); - armada_xp_mpic_reenable_percpu(); + mpic_perf_init(); + mpic_smp_cpu_init(); + mpic_reenable_percpu(); return 0; } static int mpic_cascaded_starting_cpu(unsigned int cpu) { - armada_xp_mpic_perf_init(); - armada_xp_mpic_reenable_percpu(); + mpic_perf_init(); + mpic_reenable_percpu(); enable_percpu_irq(parent_irq, IRQ_TYPE_NONE); return 0; } #else -static void armada_xp_mpic_smp_cpu_init(void) {} -static void ipi_resume(void) {} +static void mpic_smp_cpu_init(void) {} +static void mpic_ipi_resume(void) {} #endif -static struct irq_chip armada_370_xp_irq_chip = { +static struct irq_chip mpic_irq_chip = { .name = "MPIC", - .irq_mask = armada_370_xp_irq_mask, - .irq_mask_ack = armada_370_xp_irq_mask, - .irq_unmask = armada_370_xp_irq_unmask, + .irq_mask = mpic_irq_mask, + .irq_mask_ack = mpic_irq_mask, + .irq_unmask = mpic_irq_unmask, #ifdef CONFIG_SMP - .irq_set_affinity = armada_xp_set_affinity, + .irq_set_affinity = mpic_set_affinity, #endif .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND, }; -static int armada_370_xp_mpic_irq_map(struct irq_domain *h, - unsigned int virq, irq_hw_number_t hw) +static int mpic_irq_map(struct irq_domain *h, unsigned int virq, + irq_hw_number_t hw) { /* IRQs 0 and 1 cannot be mapped, they are handled internally */ if (hw <= 1) return -EINVAL; - armada_370_xp_irq_mask(irq_get_irq_data(virq)); - if (!is_percpu_irq(hw)) + mpic_irq_mask(irq_get_irq_data(virq)); + if (!mpic_is_percpu_irq(hw)) writel(hw, per_cpu_int_base + MPIC_INT_CLEAR_MASK); else writel(hw, main_int_base + MPIC_INT_SET_ENABLE); irq_set_status_flags(virq, IRQ_LEVEL); - if (is_percpu_irq(hw)) { + if (mpic_is_percpu_irq(hw)) { irq_set_percpu_devid(virq); - irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip, + irq_set_chip_and_handler(virq, &mpic_irq_chip, handle_percpu_devid_irq); } else { - irq_set_chip_and_handler(virq, &armada_370_xp_irq_chip, - handle_level_irq); + irq_set_chip_and_handler(virq, &mpic_irq_chip, handle_level_irq); irqd_set_single_target(irq_desc_get_irq_data(irq_to_desc(virq))); } irq_set_probe(virq); @@ -617,13 +615,13 @@ static int armada_370_xp_mpic_irq_map(struct irq_domain *h, return 0; } -static const struct irq_domain_ops armada_370_xp_mpic_irq_ops = { - .map = armada_370_xp_mpic_irq_map, +static const struct irq_domain_ops mpic_irq_ops = { + .map = mpic_irq_map, .xlate = irq_domain_xlate_onecell, }; #ifdef CONFIG_PCI_MSI -static void armada_370_xp_handle_msi_irq(struct pt_regs *regs, bool is_chained) +static void mpic_handle_msi_irq(struct pt_regs *regs, bool is_chained) { u32 msimask, msinr; @@ -641,14 +639,14 @@ static void armada_370_xp_handle_msi_irq(struct pt_regs *regs, bool is_chained) irq = msinr - msi_doorbell_start(); - generic_handle_domain_irq(armada_370_xp_msi_inner_domain, irq); + generic_handle_domain_irq(mpic_msi_inner_domain, irq); } } #else -static void armada_370_xp_handle_msi_irq(struct pt_regs *r, bool b) {} +static void mpic_handle_msi_irq(struct pt_regs *r, bool b) {} #endif -static void armada_370_xp_mpic_handle_cascade_irq(struct irq_desc *desc) +static void mpic_handle_cascade_irq(struct irq_desc *desc) { struct irq_chip *chip = irq_desc_get_chip(desc); unsigned long irqmap, irqn, irqsrc, cpuid; @@ -668,18 +666,17 @@ static void armada_370_xp_mpic_handle_cascade_irq(struct irq_desc *desc) continue; if (irqn == 0 || irqn == 1) { - armada_370_xp_handle_msi_irq(NULL, true); + mpic_handle_msi_irq(NULL, true); continue; } - generic_handle_domain_irq(armada_370_xp_mpic_domain, irqn); + generic_handle_domain_irq(mpic_domain, irqn); } chained_irq_exit(chip, desc); } -static void __exception_irq_entry -armada_370_xp_handle_irq(struct pt_regs *regs) +static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) { u32 irqstat, irqnr; @@ -691,14 +688,13 @@ armada_370_xp_handle_irq(struct pt_regs *regs) break; if (irqnr > 1) { - generic_handle_domain_irq(armada_370_xp_mpic_domain, - irqnr); + generic_handle_domain_irq(mpic_domain, irqnr); continue; } /* MSI handling */ if (irqnr == 1) - armada_370_xp_handle_msi_irq(regs, false); + mpic_handle_msi_irq(regs, false); #ifdef CONFIG_SMP /* IPI Handling */ @@ -711,20 +707,20 @@ armada_370_xp_handle_irq(struct pt_regs *regs) IPI_DOORBELL_MASK; for_each_set_bit(ipi, &ipimask, IPI_DOORBELL_END) - generic_handle_domain_irq(ipi_domain, ipi); + generic_handle_domain_irq(mpic_ipi_domain, ipi); } #endif } while (1); } -static int armada_370_xp_mpic_suspend(void) +static int mpic_suspend(void) { doorbell_mask_reg = readl(per_cpu_int_base + MPIC_IN_DRBEL_MASK); return 0; } -static void armada_370_xp_mpic_resume(void) +static void mpic_resume(void) { bool src0, src1; int nirqs; @@ -735,35 +731,34 @@ static void armada_370_xp_mpic_resume(void) struct irq_data *data; unsigned int virq; - virq = irq_linear_revmap(armada_370_xp_mpic_domain, irq); + virq = irq_linear_revmap(mpic_domain, irq); if (!virq) continue; data = irq_get_irq_data(virq); - if (!is_percpu_irq(irq)) { + if (!mpic_is_percpu_irq(irq)) { /* Non per-CPU interrupts */ writel(irq, per_cpu_int_base + MPIC_INT_CLEAR_MASK); if (!irqd_irq_disabled(data)) - armada_370_xp_irq_unmask(data); + mpic_irq_unmask(data); } else { /* Per-CPU interrupts */ writel(irq, main_int_base + MPIC_INT_SET_ENABLE); /* - * Re-enable on the current CPU, - * armada_xp_mpic_reenable_percpu() will take - * care of secondary CPUs when they come up. + * Re-enable on the current CPU, mpic_reenable_percpu() + * will take care of secondary CPUs when they come up. */ if (irq_percpu_is_enabled(virq)) - armada_370_xp_irq_unmask(data); + mpic_irq_unmask(data); } } /* Reconfigure doorbells for IPIs and MSIs */ writel(doorbell_mask_reg, per_cpu_int_base + MPIC_IN_DRBEL_MASK); - if (is_ipi_available()) { + if (mpic_is_ipi_available()) { src0 = doorbell_mask_reg & IPI_DOORBELL_MASK; src1 = doorbell_mask_reg & PCI_MSI_DOORBELL_MASK; } else { @@ -776,17 +771,17 @@ static void armada_370_xp_mpic_resume(void) if (src1) writel(1, per_cpu_int_base + MPIC_INT_CLEAR_MASK); - if (is_ipi_available()) - ipi_resume(); + if (mpic_is_ipi_available()) + mpic_ipi_resume(); } -static struct syscore_ops armada_370_xp_mpic_syscore_ops = { - .suspend = armada_370_xp_mpic_suspend, - .resume = armada_370_xp_mpic_resume, +static struct syscore_ops mpic_syscore_ops = { + .suspend = mpic_suspend, + .resume = mpic_resume, }; -static int __init armada_370_xp_mpic_of_init(struct device_node *node, - struct device_node *parent) +static int __init mpic_of_init(struct device_node *node, + struct device_node *parent) { struct resource main_int_res, per_cpu_int_res; int nr_irqs; @@ -816,11 +811,9 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, for (int i = 0; i < nr_irqs; i++) writel(i, main_int_base + MPIC_INT_CLEAR_ENABLE); - armada_370_xp_mpic_domain = irq_domain_add_linear(node, nr_irqs, - &armada_370_xp_mpic_irq_ops, - NULL); - BUG_ON(!armada_370_xp_mpic_domain); - irq_domain_update_bus_token(armada_370_xp_mpic_domain, DOMAIN_BUS_WIRED); + mpic_domain = irq_domain_add_linear(node, nr_irqs, &mpic_irq_ops, NULL); + BUG_ON(!mpic_domain); + irq_domain_update_bus_token(mpic_domain, DOMAIN_BUS_WIRED); /* * Initialize parent_irq before calling any other functions, since it is @@ -829,19 +822,19 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, parent_irq = irq_of_parse_and_map(node, 0); /* Setup for the boot CPU */ - armada_xp_mpic_perf_init(); - armada_xp_mpic_smp_cpu_init(); + mpic_perf_init(); + mpic_smp_cpu_init(); - armada_370_xp_msi_init(node, main_int_res.start); + mpic_msi_init(node, main_int_res.start); if (parent_irq <= 0) { - irq_set_default_host(armada_370_xp_mpic_domain); - set_handle_irq(armada_370_xp_handle_irq); + irq_set_default_host(mpic_domain); + set_handle_irq(mpic_handle_irq); #ifdef CONFIG_SMP - armada_xp_ipi_init(node); + mpic_ipi_init(node); cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_ARMADA_XP_STARTING, "irqchip/armada/ipi:starting", - armada_xp_mpic_starting_cpu, NULL); + mpic_starting_cpu, NULL); #endif } else { #ifdef CONFIG_SMP @@ -849,13 +842,12 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node, "irqchip/armada/cascade:starting", mpic_cascaded_starting_cpu, NULL); #endif - irq_set_chained_handler(parent_irq, - armada_370_xp_mpic_handle_cascade_irq); + irq_set_chained_handler(parent_irq, mpic_handle_cascade_irq); } - register_syscore_ops(&armada_370_xp_mpic_syscore_ops); + register_syscore_ops(&mpic_syscore_ops); return 0; } -IRQCHIP_DECLARE(armada_370_xp_mpic, "marvell,mpic", armada_370_xp_mpic_of_init); +IRQCHIP_DECLARE(marvell_mpic, "marvell,mpic", mpic_of_init); From patchwork Tue Jul 2 11:42:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719495 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 93339C30658 for ; Tue, 2 Jul 2024 11:46:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Signed-off-by: Marek Behún Reviewed-by: Andrew Lunn --- drivers/irqchip/irq-armada-370-xp.c | 12 ++---------- 1 file changed, 2 insertions(+), 10 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index ab18dae174a8..151f0fd0389a 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -508,13 +508,7 @@ static int mpic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, static void mpic_smp_cpu_init(void) { - u32 control; - int nr_irqs; - - control = readl(main_int_base + MPIC_INT_CONTROL); - nr_irqs = (control >> 2) & 0x3ff; - - for (int i = 0; i < nr_irqs; i++) + for (int i = 0; i < mpic_domain->hwirq_max; i++) writel(i, per_cpu_int_base + MPIC_INT_SET_MASK); if (!mpic_is_ipi_available()) @@ -723,11 +717,9 @@ static int mpic_suspend(void) static void mpic_resume(void) { bool src0, src1; - int nirqs; /* Re-enable interrupts */ - nirqs = (readl(main_int_base + MPIC_INT_CONTROL) >> 2) & 0x3ff; - for (irq_hw_number_t irq = 0; irq < nirqs; irq++) { + for (irq_hw_number_t irq = 0; irq < mpic_domain->hwirq_max; irq++) { struct irq_data *data; unsigned int virq; From patchwork Tue Jul 2 11:42:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719496 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3D0A7C3064D for ; Tue, 2 Jul 2024 11:46:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 151f0fd0389a..6f71bf08831f 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -10,6 +10,7 @@ * Ben Dooks */ +#include #include #include #include @@ -112,6 +113,7 @@ /* Registers relative to main_int_base */ #define MPIC_INT_CONTROL 0x00 +#define MPIC_INT_CONTROL_NUMINT_MASK GENMASK(12, 2) #define MPIC_SW_TRIG_INT 0x04 #define MPIC_INT_SET_ENABLE 0x30 #define MPIC_INT_CLEAR_ENABLE 0x34 @@ -124,6 +126,7 @@ #define MPIC_IN_DRBEL_MASK 0x0c #define MPIC_PPI_CAUSE 0x10 #define MPIC_CPU_INTACK 0x44 +#define MPIC_CPU_INTACK_IID_MASK GENMASK(9, 0) #define MPIC_INT_SET_MASK 0x48 #define MPIC_INT_CLEAR_MASK 0x4C #define MPIC_INT_FABRIC_MASK 0x54 @@ -676,7 +679,7 @@ static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) do { irqstat = readl_relaxed(per_cpu_int_base + MPIC_CPU_INTACK); - irqnr = irqstat & 0x3FF; + irqnr = FIELD_GET(MPIC_CPU_INTACK_IID_MASK, irqstat); if (irqnr > 1022) break; @@ -776,8 +779,7 @@ static int __init mpic_of_init(struct device_node *node, struct device_node *parent) { struct resource main_int_res, per_cpu_int_res; - int nr_irqs; - u32 control; + unsigned int nr_irqs; BUG_ON(of_address_to_resource(node, 0, &main_int_res)); BUG_ON(of_address_to_resource(node, 1, &per_cpu_int_res)); @@ -797,8 +799,8 @@ static int __init mpic_of_init(struct device_node *node, resource_size(&per_cpu_int_res)); BUG_ON(!per_cpu_int_base); - control = readl(main_int_base + MPIC_INT_CONTROL); - nr_irqs = (control >> 2) & 0x3ff; + nr_irqs = FIELD_GET(MPIC_INT_CONTROL_NUMINT_MASK, + readl(main_int_base + MPIC_INT_CONTROL)); for (int i = 0; i < nr_irqs; i++) writel(i, main_int_base + MPIC_INT_CLEAR_ENABLE); From patchwork Tue Jul 2 11:42:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719497 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C4915C3064D for ; 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Tue, 02 Jul 2024 11:46:33 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObvS-00000006WNM-3Q7P for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:44:00 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id F2DCD61C16; Tue, 2 Jul 2024 11:43:57 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 839ADC116B1; Tue, 2 Jul 2024 11:43:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920637; bh=/F5QKnDgCb64XIg4m2azJjp86vnwV5WtQF/OIgizkd4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EH4nMacZF5PLRqovkoNRefvMEqesI9BmQEcBV33bM9zdPbKfbxNWLD+m/nGfO/fpc +wDr4vy0uai7bxZnPbzfaOaVEgHwpWOgou09hdL42ai8cRQURv8qZcB9tii9Jp5AwU jhDc5ol+jR0BNbaio4EUuMgqajtXFYmXF+sVgD5bBb4lPMOxXf+eoTV5vtKNyA/wHV z8c1I+IApnsKbfryEP7KJ78Nqvzj8rhDn/QRSJMDhEO9jDxuc6C3uQbw36ECD1KwHZ NN0VWeVUibxxOQ+YzGSSj8kSJO4I5fhxHUMkFRG0F52LI25nqtjScJzPD+LUGMJtuV D3g0unHSRoZLw== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 19/30] irqchip/armada-370-xp: Refactor mpic_handle_msi_irq() code Date: Tue, 2 Jul 2024 13:42:51 +0200 Message-ID: <20240702114302.22475-20-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044359_012277_B5230200 X-CRM114-Status: GOOD ( 12.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Refactor the mpic_handle_msi_irq() function to make it simpler: - drop the function arguments, they are not needed - rename the variable holding the doorbell cause register to "cause" - rename the iterating variable to "i" - use for_each_set_bit() (requires retyping "cause" to unsigned long) Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 32 +++++++++++------------------ 1 file changed, 12 insertions(+), 20 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 6f71bf08831f..b31bf6c43a8b 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -618,29 +618,21 @@ static const struct irq_domain_ops mpic_irq_ops = { }; #ifdef CONFIG_PCI_MSI -static void mpic_handle_msi_irq(struct pt_regs *regs, bool is_chained) +static void mpic_handle_msi_irq(void) { - u32 msimask, msinr; + unsigned long cause; + unsigned int i; - msimask = readl_relaxed(per_cpu_int_base + MPIC_IN_DRBEL_CAUSE); - msimask &= msi_doorbell_mask(); + cause = readl_relaxed(per_cpu_int_base + MPIC_IN_DRBEL_CAUSE); + cause &= msi_doorbell_mask(); + writel(~cause, per_cpu_int_base + MPIC_IN_DRBEL_CAUSE); - writel(~msimask, per_cpu_int_base + MPIC_IN_DRBEL_CAUSE); - - for (msinr = msi_doorbell_start(); - msinr < msi_doorbell_end(); msinr++) { - unsigned int irq; - - if (!(msimask & BIT(msinr))) - continue; - - irq = msinr - msi_doorbell_start(); - - generic_handle_domain_irq(mpic_msi_inner_domain, irq); - } + for_each_set_bit(i, &cause, BITS_PER_LONG) + generic_handle_domain_irq(mpic_msi_inner_domain, + i - msi_doorbell_start()); } #else -static void mpic_handle_msi_irq(struct pt_regs *r, bool b) {} +static void mpic_handle_msi_irq(void) {} #endif static void mpic_handle_cascade_irq(struct irq_desc *desc) @@ -663,7 +655,7 @@ static void mpic_handle_cascade_irq(struct irq_desc *desc) continue; if (irqn == 0 || irqn == 1) { - mpic_handle_msi_irq(NULL, true); + mpic_handle_msi_irq(); continue; } @@ -691,7 +683,7 @@ static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) /* MSI handling */ if (irqnr == 1) - mpic_handle_msi_irq(regs, false); + mpic_handle_msi_irq(); #ifdef CONFIG_SMP /* IPI Handling */ From patchwork Tue Jul 2 11:42:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719498 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D4626C30658 for ; Tue, 2 Jul 2024 11:46:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; 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Tue, 02 Jul 2024 11:44:04 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id EFF75CE172D; Tue, 2 Jul 2024 11:44:00 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1ED0AC32781; Tue, 2 Jul 2024 11:43:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920640; bh=Fye1I0+A5pEpUA8VDEPjyqgwS8+8Aw/ZrzB8azTH2UQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=aYuEejk85dShCe6bhmaazodo4JiwzfMT8WDIC+4aX2ZOm6kfTcJ2fFZHL5Huq2TgY ccLJVpUseh2iQ0T2uDw17pjxurH1G/+Sv6Uq00Idqj2l1+CHxW3U8wnsCBCB1R+XQG xg6e2Zr9wrF6W78+42udOZ/koI1l74Ws1OtK7AgYzJQaM0AeJxpVP/jPLHD5Sj69t1 jaMAPDB2ZbsBFGEGymIKI5mWoPEYmWVC4ORdXhBMPl8/iDtcKJuAl1QMFO4mVpSKZl 92IqH6FznbHQQ+hldXQi4Vuhg6bSgEC9R8ibg1+25G11VH1bgvw4+8id20STURK9wv oINZZUVe1HNSg== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 20/30] irqchip/armada-370-xp: Refactor handling IPI interrupts Date: Tue, 2 Jul 2024 13:42:52 +0200 Message-ID: <20240702114302.22475-21-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044402_985980_098831D2 X-CRM114-Status: GOOD ( 12.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Refactor the handling of IPI interrupts - put into own function mpic_handle_ipi_irq(), similar to mpic_handle_msi_irq() - rename the variable holding the doorbell cause register to "cause" - retype and rename the variable holding the IPI HW IRQ number to "irq_hw_number_t i" Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 31 +++++++++++++++++------------ 1 file changed, 18 insertions(+), 13 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index b31bf6c43a8b..be1c3721f980 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -635,6 +635,22 @@ static void mpic_handle_msi_irq(void) static void mpic_handle_msi_irq(void) {} #endif +#ifdef CONFIG_SMP +static void mpic_handle_ipi_irq(void) +{ + unsigned long cause; + irq_hw_number_t i; + + cause = readl_relaxed(per_cpu_int_base + MPIC_IN_DRBEL_CAUSE); + cause &= IPI_DOORBELL_MASK; + + for_each_set_bit(i, &cause, IPI_DOORBELL_END) + generic_handle_domain_irq(mpic_ipi_domain, i); +} +#else +static inline void mpic_handle_ipi_irq(void) {} +#endif + static void mpic_handle_cascade_irq(struct irq_desc *desc) { struct irq_chip *chip = irq_desc_get_chip(desc); @@ -685,20 +701,9 @@ static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) if (irqnr == 1) mpic_handle_msi_irq(); -#ifdef CONFIG_SMP /* IPI Handling */ - if (irqnr == 0) { - unsigned long ipimask; - int ipi; - - ipimask = readl_relaxed(per_cpu_int_base + - MPIC_IN_DRBEL_CAUSE) & - IPI_DOORBELL_MASK; - - for_each_set_bit(ipi, &ipimask, IPI_DOORBELL_END) - generic_handle_domain_irq(mpic_ipi_domain, ipi); - } -#endif + if (irqnr == 0) + mpic_handle_ipi_irq(); } while (1); } From patchwork Tue Jul 2 11:42:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719499 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BEDA0C3064D for ; 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Tue, 02 Jul 2024 11:46:51 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObvZ-00000006WR8-0xJ4 for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:44:06 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 88DA7CE16FE; Tue, 2 Jul 2024 11:44:03 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id ADEECC4AF0C; Tue, 2 Jul 2024 11:44:00 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920642; bh=Yhqn8PgtMd6k88iUg8Ydt6hqL7KAalQ4pH8RtPIMvok=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BNBDy1RSN7iXus6VCtBUzw8xG1dEsrRSozce5yRmNMPJZkrGGduE7pq0sJZkFSG4v yE9+l6TaghRkRHsFbterKCTXNKpzo59yaIXdW7vHmo8Iozs0/z6fEdv5uOVWA4r9X/ jo5AQ0kr+wfV5arquiZS8sCu9NOn2lzEkqg9R5Nw4UeYFLsvQr0fDUhvW8W9+KWdSY 9TMXFBckqa2PgDXyuoeUzekzqdYoRa8W2qbt7YDFElQIrFI7MHFfWB5G98PUzV6HOc jJinkJTyV5x3ALCXg4wwSm5laJErLdr0+u3xjPExq8/IRMw9t6WpDdHQvrUQubkj8K 1zi1llwzdaYBg== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 21/30] irqchip/armada-370-xp: Use consistent variable names for hwirqs Date: Tue, 2 Jul 2024 13:42:53 +0200 Message-ID: <20240702114302.22475-22-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044405_674273_B9E55224 X-CRM114-Status: GOOD ( 20.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Use consistent variable names for hwirqs: when iterating, use "i", otherwise use "hwirq". Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 56 ++++++++++++++--------------- 1 file changed, 28 insertions(+), 28 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index be1c3721f980..a710a325f81a 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -117,7 +117,7 @@ #define MPIC_SW_TRIG_INT 0x04 #define MPIC_INT_SET_ENABLE 0x30 #define MPIC_INT_CLEAR_ENABLE 0x34 -#define MPIC_INT_SOURCE_CTL(irq) (0x100 + (irq) * 4) +#define MPIC_INT_SOURCE_CTL(hwirq) (0x100 + (hwirq) * 4) #define MPIC_INT_SOURCE_CPU_MASK GENMASK(3, 0) #define MPIC_INT_IRQ_FIQ_MASK(cpuid) ((BIT(0) | BIT(8)) << (cpuid)) @@ -199,9 +199,9 @@ static inline unsigned int msi_doorbell_end(void) PCI_MSI_FULL_DOORBELL_END; } -static inline bool mpic_is_percpu_irq(irq_hw_number_t irq) +static inline bool mpic_is_percpu_irq(irq_hw_number_t hwirq) { - return irq <= MPIC_MAX_PER_CPU_IRQS; + return hwirq <= MPIC_MAX_PER_CPU_IRQS; } /* @@ -530,11 +530,11 @@ static void mpic_smp_cpu_init(void) static void mpic_reenable_percpu(void) { /* Re-enable per-CPU interrupts that were enabled before suspend */ - for (unsigned int irq = 0; irq < MPIC_MAX_PER_CPU_IRQS; irq++) { + for (unsigned int i = 0; i < MPIC_MAX_PER_CPU_IRQS; i++) { struct irq_data *data; unsigned int virq; - virq = irq_linear_revmap(mpic_domain, irq); + virq = irq_linear_revmap(mpic_domain, i); if (!virq) continue; @@ -586,20 +586,20 @@ static struct irq_chip mpic_irq_chip = { }; static int mpic_irq_map(struct irq_domain *h, unsigned int virq, - irq_hw_number_t hw) + irq_hw_number_t hwirq) { /* IRQs 0 and 1 cannot be mapped, they are handled internally */ - if (hw <= 1) + if (hwirq <= 1) return -EINVAL; mpic_irq_mask(irq_get_irq_data(virq)); - if (!mpic_is_percpu_irq(hw)) - writel(hw, per_cpu_int_base + MPIC_INT_CLEAR_MASK); + if (!mpic_is_percpu_irq(hwirq)) + writel(hwirq, per_cpu_int_base + MPIC_INT_CLEAR_MASK); else - writel(hw, main_int_base + MPIC_INT_SET_ENABLE); + writel(hwirq, main_int_base + MPIC_INT_SET_ENABLE); irq_set_status_flags(virq, IRQ_LEVEL); - if (mpic_is_percpu_irq(hw)) { + if (mpic_is_percpu_irq(hwirq)) { irq_set_percpu_devid(virq); irq_set_chip_and_handler(virq, &mpic_irq_chip, handle_percpu_devid_irq); @@ -654,15 +654,15 @@ static inline void mpic_handle_ipi_irq(void) {} static void mpic_handle_cascade_irq(struct irq_desc *desc) { struct irq_chip *chip = irq_desc_get_chip(desc); - unsigned long irqmap, irqn, irqsrc, cpuid; + unsigned long irqmap, i, irqsrc, cpuid; chained_irq_enter(chip, desc); irqmap = readl_relaxed(per_cpu_int_base + MPIC_PPI_CAUSE); cpuid = cpu_logical_map(smp_processor_id()); - for_each_set_bit(irqn, &irqmap, BITS_PER_LONG) { - irqsrc = readl_relaxed(main_int_base + MPIC_INT_SOURCE_CTL(irqn)); + for_each_set_bit(i, &irqmap, BITS_PER_LONG) { + irqsrc = readl_relaxed(main_int_base + MPIC_INT_SOURCE_CTL(i)); /* Check if the interrupt is not masked on current CPU. * Test IRQ (0-1) and FIQ (8-9) mask bits. @@ -670,12 +670,12 @@ static void mpic_handle_cascade_irq(struct irq_desc *desc) if (!(irqsrc & MPIC_INT_IRQ_FIQ_MASK(cpuid))) continue; - if (irqn == 0 || irqn == 1) { + if (i == 0 || i == 1) { mpic_handle_msi_irq(); continue; } - generic_handle_domain_irq(mpic_domain, irqn); + generic_handle_domain_irq(mpic_domain, i); } chained_irq_exit(chip, desc); @@ -683,26 +683,26 @@ static void mpic_handle_cascade_irq(struct irq_desc *desc) static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) { - u32 irqstat, irqnr; + u32 irqstat, i; do { irqstat = readl_relaxed(per_cpu_int_base + MPIC_CPU_INTACK); - irqnr = FIELD_GET(MPIC_CPU_INTACK_IID_MASK, irqstat); + i = FIELD_GET(MPIC_CPU_INTACK_IID_MASK, irqstat); - if (irqnr > 1022) + if (i > 1022) break; - if (irqnr > 1) { - generic_handle_domain_irq(mpic_domain, irqnr); + if (i > 1) { + generic_handle_domain_irq(mpic_domain, i); continue; } /* MSI handling */ - if (irqnr == 1) + if (i == 1) mpic_handle_msi_irq(); /* IPI Handling */ - if (irqnr == 0) + if (i == 0) mpic_handle_ipi_irq(); } while (1); } @@ -719,24 +719,24 @@ static void mpic_resume(void) bool src0, src1; /* Re-enable interrupts */ - for (irq_hw_number_t irq = 0; irq < mpic_domain->hwirq_max; irq++) { + for (irq_hw_number_t i = 0; i < mpic_domain->hwirq_max; i++) { struct irq_data *data; unsigned int virq; - virq = irq_linear_revmap(mpic_domain, irq); + virq = irq_linear_revmap(mpic_domain, i); if (!virq) continue; data = irq_get_irq_data(virq); - if (!mpic_is_percpu_irq(irq)) { + if (!mpic_is_percpu_irq(i)) { /* Non per-CPU interrupts */ - writel(irq, per_cpu_int_base + MPIC_INT_CLEAR_MASK); + writel(i, per_cpu_int_base + MPIC_INT_CLEAR_MASK); if (!irqd_irq_disabled(data)) mpic_irq_unmask(data); } else { /* Per-CPU interrupts */ - writel(irq, main_int_base + MPIC_INT_SET_ENABLE); + writel(i, main_int_base + MPIC_INT_SET_ENABLE); /* * Re-enable on the current CPU, mpic_reenable_percpu() From patchwork Tue Jul 2 11:42:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719500 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 48925C3064D for ; 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Tue, 02 Jul 2024 11:47:00 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObvb-00000006WSo-3BU1 for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:44:09 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 246ABCE1D48; Tue, 2 Jul 2024 11:44:06 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 48D5AC32781; Tue, 2 Jul 2024 11:44:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920645; bh=mCVsWvkbdGlVMLDOAfZdIuzjEaoIYCco5psOvSAUSEE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=T8uZsqy69WOmBu5rMnRtR1Mms7462y88v5kYMkF56z/s2okJ7f1RkpWNm/mGkiX6n E6OO5ERYElxHuu5MjNiTv1KQohiVfMEuM9oRBfxrE5CDQkeTjrrF+Nc0f+16zn9Awg 0yRoZfzqXmt2jSdiw+fd14HxmoSQRZ3fOt2+iAYAqYbq2L8gpiXRTu9Sps3WkLzFku n7rNjSzAgzCBYXEi/XsSSdmJAkRhkKdn/EI8hW6ulCVUoI/hrKhGpN6oVUBFAq+YU5 evQwH53wI9eoxs5/qrY+sNyRZ77ksIYaxGV/Zr4a3pdePGSbu8cTHLwHsq+BDo/WU+ tVHW+3Ne8JjsQ== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 22/30] irqchip/armada-370-xp: Use consistent types when iterating interrupts Date: Tue, 2 Jul 2024 13:42:54 +0200 Message-ID: <20240702114302.22475-23-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044408_190225_E5508F9A X-CRM114-Status: GOOD ( 16.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org When iterating, use either the irq_hw_number_t type or the unsigned int type for the iterator variable, depending on whether the variable represents HW IRQ number or whether it is added to a IRQ number. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index a710a325f81a..27bceb911912 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -289,7 +289,7 @@ static int mpic_msi_alloc(struct irq_domain *domain, unsigned int virq, if (hwirq < 0) return -ENOSPC; - for (int i = 0; i < nr_irqs; i++) { + for (unsigned int i = 0; i < nr_irqs; i++) { irq_domain_set_info(domain, virq + i, hwirq + i, &mpic_msi_bottom_irq_chip, domain->host_data, handle_simple_irq, @@ -438,7 +438,7 @@ static struct irq_chip mpic_ipi_irqchip = { static int mpic_ipi_alloc(struct irq_domain *d, unsigned int virq, unsigned int nr_irqs, void *args) { - for (int i = 0; i < nr_irqs; i++) { + for (unsigned int i = 0; i < nr_irqs; i++) { irq_set_percpu_devid(virq + i); irq_domain_set_info(d, virq + i, i, &mpic_ipi_irqchip, d->host_data, handle_percpu_devid_irq, @@ -461,7 +461,7 @@ static const struct irq_domain_ops mpic_ipi_domain_ops = { static void mpic_ipi_resume(void) { - for (int i = 0; i < IPI_DOORBELL_END; i++) { + for (irq_hw_number_t i = 0; i < IPI_DOORBELL_END; i++) { unsigned int virq = irq_find_mapping(mpic_ipi_domain, i); struct irq_data *d; @@ -511,7 +511,7 @@ static int mpic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, static void mpic_smp_cpu_init(void) { - for (int i = 0; i < mpic_domain->hwirq_max; i++) + for (irq_hw_number_t i = 0; i < mpic_domain->hwirq_max; i++) writel(i, per_cpu_int_base + MPIC_INT_SET_MASK); if (!mpic_is_ipi_available()) @@ -530,7 +530,7 @@ static void mpic_smp_cpu_init(void) static void mpic_reenable_percpu(void) { /* Re-enable per-CPU interrupts that were enabled before suspend */ - for (unsigned int i = 0; i < MPIC_MAX_PER_CPU_IRQS; i++) { + for (irq_hw_number_t i = 0; i < MPIC_MAX_PER_CPU_IRQS; i++) { struct irq_data *data; unsigned int virq; @@ -654,7 +654,8 @@ static inline void mpic_handle_ipi_irq(void) {} static void mpic_handle_cascade_irq(struct irq_desc *desc) { struct irq_chip *chip = irq_desc_get_chip(desc); - unsigned long irqmap, i, irqsrc, cpuid; + unsigned long irqmap, irqsrc, cpuid; + irq_hw_number_t i; chained_irq_enter(chip, desc); @@ -683,7 +684,8 @@ static void mpic_handle_cascade_irq(struct irq_desc *desc) static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) { - u32 irqstat, i; + irq_hw_number_t i; + u32 irqstat; do { irqstat = readl_relaxed(per_cpu_int_base + MPIC_CPU_INTACK); @@ -799,7 +801,7 @@ static int __init mpic_of_init(struct device_node *node, nr_irqs = FIELD_GET(MPIC_INT_CONTROL_NUMINT_MASK, readl(main_int_base + MPIC_INT_CONTROL)); - for (int i = 0; i < nr_irqs; i++) + for (irq_hw_number_t i = 0; i < nr_irqs; i++) writel(i, main_int_base + MPIC_INT_CLEAR_ENABLE); mpic_domain = irq_domain_add_linear(node, nr_irqs, &mpic_irq_ops, NULL); From patchwork Tue Jul 2 11:42:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719501 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4CF3AC30658 for ; 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Tue, 02 Jul 2024 11:47:09 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObve-00000006WUM-1uaG for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:44:12 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id B6487CE16FE; Tue, 2 Jul 2024 11:44:08 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D8938C4AF0D; Tue, 2 Jul 2024 11:44:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920648; bh=iNnk8+XxOxkgDvKPldSQOmW8lN0yd3LDKWHE1mK8h+o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fRhI77PTJqbuZbufJpdql24xJe/T+Dg6MwJq5nG7QfhC0B3ciKnVevtt9gxb+HDm2 sTnVuLt37YewNKzVAkgIUnMLD3v7jP9LJEAp9rSnfOwFH80eGFswreIQA3BzdkfDgX Aelhevp3E+2ws3BIZHV+F/GUgWhH1E0F95hZsv9UjitJA1dsRrn0wglvPYNmyVCF+H fUvM0EBWYRZokDRzEFlX8bbYDbhPOUpBjtMVS9OF/69NEQypbM12OrVyl5X4fBo1QJ 5hh2t97NUadqLumGRX9MFa05dJt+FF4vGF6vAB3asmXKHN6NIto7I45avc4wIs1c4v gRwhxnrK1HEMg== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 23/30] irqchip/armada-370-xp: Use consistent name for struct irq_data variables Date: Tue, 2 Jul 2024 13:42:55 +0200 Message-ID: <20240702114302.22475-24-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044410_894437_47226972 X-CRM114-Status: GOOD ( 15.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Always use variable name "d" for struct irq_data *, for consistency. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 27bceb911912..9e4fc91fe422 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -243,17 +243,17 @@ static struct msi_domain_info mpic_msi_domain_info = { .chip = &mpic_msi_irq_chip, }; -static void mpic_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) +static void mpic_compose_msi_msg(struct irq_data *d, struct msi_msg *msg) { - unsigned int cpu = cpumask_first(irq_data_get_effective_affinity_mask(data)); + unsigned int cpu = cpumask_first(irq_data_get_effective_affinity_mask(d)); msg->address_lo = lower_32_bits(msi_doorbell_addr); msg->address_hi = upper_32_bits(msi_doorbell_addr); - msg->data = BIT(cpu + 8) | (data->hwirq + msi_doorbell_start()); + msg->data = BIT(cpu + 8) | (d->hwirq + msi_doorbell_start()); } -static int mpic_msi_set_affinity(struct irq_data *irq_data, - const struct cpumask *mask, bool force) +static int mpic_msi_set_affinity(struct irq_data *d, const struct cpumask *mask, + bool force) { unsigned int cpu; @@ -265,7 +265,7 @@ static int mpic_msi_set_affinity(struct irq_data *irq_data, if (cpu >= nr_cpu_ids) return -EINVAL; - irq_data_update_effective_affinity(irq_data, cpumask_of(cpu)); + irq_data_update_effective_affinity(d, cpumask_of(cpu)); return IRQ_SET_MASK_OK; } @@ -531,19 +531,19 @@ static void mpic_reenable_percpu(void) { /* Re-enable per-CPU interrupts that were enabled before suspend */ for (irq_hw_number_t i = 0; i < MPIC_MAX_PER_CPU_IRQS; i++) { - struct irq_data *data; + struct irq_data *d; unsigned int virq; virq = irq_linear_revmap(mpic_domain, i); if (!virq) continue; - data = irq_get_irq_data(virq); + d = irq_get_irq_data(virq); if (!irq_percpu_is_enabled(virq)) continue; - mpic_irq_unmask(data); + mpic_irq_unmask(d); } if (mpic_is_ipi_available()) @@ -722,20 +722,20 @@ static void mpic_resume(void) /* Re-enable interrupts */ for (irq_hw_number_t i = 0; i < mpic_domain->hwirq_max; i++) { - struct irq_data *data; + struct irq_data *d; unsigned int virq; virq = irq_linear_revmap(mpic_domain, i); if (!virq) continue; - data = irq_get_irq_data(virq); + d = irq_get_irq_data(virq); if (!mpic_is_percpu_irq(i)) { /* Non per-CPU interrupts */ writel(i, per_cpu_int_base + MPIC_INT_CLEAR_MASK); - if (!irqd_irq_disabled(data)) - mpic_irq_unmask(data); + if (!irqd_irq_disabled(d)) + mpic_irq_unmask(d); } else { /* Per-CPU interrupts */ writel(i, main_int_base + MPIC_INT_SET_ENABLE); @@ -745,7 +745,7 @@ static void mpic_resume(void) * will take care of secondary CPUs when they come up. */ if (irq_percpu_is_enabled(virq)) - mpic_irq_unmask(data); + mpic_irq_unmask(d); } } From patchwork Tue Jul 2 11:42:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719502 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 86E36C3064D for ; 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Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 9e4fc91fe422..3fc669cfd494 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -531,18 +531,13 @@ static void mpic_reenable_percpu(void) { /* Re-enable per-CPU interrupts that were enabled before suspend */ for (irq_hw_number_t i = 0; i < MPIC_MAX_PER_CPU_IRQS; i++) { + unsigned int virq = irq_linear_revmap(mpic_domain, i); struct irq_data *d; - unsigned int virq; - virq = irq_linear_revmap(mpic_domain, i); - if (!virq) + if (!virq || !irq_percpu_is_enabled(virq)) continue; d = irq_get_irq_data(virq); - - if (!irq_percpu_is_enabled(virq)) - continue; - mpic_irq_unmask(d); } @@ -722,10 +717,9 @@ static void mpic_resume(void) /* Re-enable interrupts */ for (irq_hw_number_t i = 0; i < mpic_domain->hwirq_max; i++) { + unsigned int virq = irq_linear_revmap(mpic_domain, i); struct irq_data *d; - unsigned int virq; - virq = irq_linear_revmap(mpic_domain, i); if (!virq) continue; From patchwork Tue Jul 2 11:42:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719503 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C6F49C30658 for ; Tue, 2 Jul 2024 11:47:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=we8Xy2P02dia0143QbV+/M1Ta6pEF2gHua8A9eOrFFg=; b=AwTt3nfDdFbAjOlXy1yOPlYyJa kKyiu3tZ8OwZCgUHyrB1MPWjsQEdyV1hnbZpj86cvVnEF/R1ZT2hetM28uErDow/3W8LHt7driZrc Qyzd4hakoYyvqgOMq7qsV91l/MptNbyeLOpSysJSfwo2K9f1uZBf1QKV9asm9/x0mE6WMBHHug2dE wz3bTkdKkzSK63qQq3A35hx+7p0Ka72Oa09d4pH0Rc/AOTnicRgQ3LF4DpQ4tKcHvISNtg+joYO75 IT2LERGXZlGDi9jKVV3T5kNAiqmoD8CIGbknFb9Y3c9OW1qffgtLW/ISYDQYGZWu+ur8I0j1ztk4l 1ALs+YDQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObyp-00000006YC6-3e6N; Tue, 02 Jul 2024 11:47:27 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObvi-00000006WWd-04zx for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:44:15 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 7B9F761CD1; Tue, 2 Jul 2024 11:44:13 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0F70FC116B1; Tue, 2 Jul 2024 11:44:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920653; bh=K5oYkbQbLa9UcV/R6htueBx8aGubNNzhgbszoB7BIcs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=sevyWjGHHi8u8MyT38gazuYoLZw1ixUHyBS+sDuyW7TYj/t1mH+Sk0iuG20rOdjOH iiY0TCPk8Pcf1H8aP6WcbPPjaDCVs98RnpPdrwbM4Pt6eLzif1PM7efKYV75vA8KgW E+xJSPcb63wBTmzouWX1NsF5gt0VZ8s5tDdyBVa57s30058ft+9bDB9su4ooTVw3Cz rcqDhpekHrBdbxZjF4JpAeym2sb2T+TXk6JlcvmWfiGWwqfeXqUsb8wi9HneDajUaw rVftfVD4gxi8OQVaBWzCEV9rfZyvwIDLJG8WedYI0dsDSXCx3KF47yl8xZbL5Y4Nm7 9Qf+6AFurp1tA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 25/30] irqchip/armada-370-xp: Drop unneeded curly brackets Date: Tue, 2 Jul 2024 13:42:57 +0200 Message-ID: <20240702114302.22475-26-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044414_131707_BCE93F05 X-CRM114-Status: GOOD ( 11.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Drop unneeded curly brackets in mpic_msi_alloc(). Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 3fc669cfd494..3d4f32f340f6 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -289,12 +289,11 @@ static int mpic_msi_alloc(struct irq_domain *domain, unsigned int virq, if (hwirq < 0) return -ENOSPC; - for (unsigned int i = 0; i < nr_irqs; i++) { + for (unsigned int i = 0; i < nr_irqs; i++) irq_domain_set_info(domain, virq + i, hwirq + i, &mpic_msi_bottom_irq_chip, domain->host_data, handle_simple_irq, NULL, NULL); - } return 0; } From patchwork Tue Jul 2 11:42:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719504 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C772DC3064D for ; Tue, 2 Jul 2024 11:47:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=TVSUjsfQXyKcRvF/d1HpkjjG4gBwykUrZcFgVAus7eY=; b=mCMwkDXMfMtHpLhXriHn/ZsfyH Fz1yzIORIN+VD/oPzaf77S/S7cU4yPl1sB4gkqmZ4lOzH+YezZeY7jIStBzd1dOrvSTLt2Tv4RM9Q oFg6tVci7XmkdhEcZRfIZjAK/bsYvUmRIh70lMjaQ2CGMH0kha7/g+EmLMIneTkpRGFn7MJkUAA8n Nn+ije9IRQV2VANRwfoYw5ul96TTB1d6jC1LesGWKLZN3cWqQDA4eMivktUHKvoIlXESG/d0po/6X qtQRpS+svFXA/Bt+rOJ85UkrfikgS47LLl2uShkIeDyxt+ALKdlnK+LsVMFVZQOQzP2sDB2bF5luc 0Azj2Kzw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObyy-00000006YFf-3G6E; Tue, 02 Jul 2024 11:47:36 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObvm-00000006WYR-0e9P for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:44:19 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 83024CE1B4D; Tue, 2 Jul 2024 11:44:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9E27DC116B1; Tue, 2 Jul 2024 11:44:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920655; bh=lSODCFznkq3J4DlldpZPTg2NXwbeoeA3V3C+o4D4YrI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PDjTN0nCS+uWigXbSgisvDyWqDrcRiweHDv1RXsqh8wKlQK65LIRwG0v91vuYtzqh 8qncTCB81pOmMESmQ3eCNZaM7+bKgbejQalOQLr7M3gFg9rZ5vOF4BHYoiXma+L9IC zoM4SITUN4+ucpYeNgiE/GdfwIcmu3YAMa28x+6GOJLevX+mrQF6nX+O1x+hdkhCEF OzjwioItB5RoUlIsAZke/ROf4WBqXkLSO9LPDkPPmY7qElgE7hYNfBuqnXZVwHJ31m S/b0rwiZtAuCBLbmtOcu0OHpAHtDB2IZwLHidpR5ya7I3lI19IWVFziAhAMGIs+yGi 35NYCeCBAKQ9g== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 26/30] irqchip/armada-370-xp: Drop redundant continue Date: Tue, 2 Jul 2024 13:42:58 +0200 Message-ID: <20240702114302.22475-27-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044418_421610_D0E7C319 X-CRM114-Status: GOOD ( 10.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Drop redundant continue from mpic_handle_irq(). Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 3d4f32f340f6..5f8bb693a0b1 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -688,10 +688,8 @@ static void __exception_irq_entry mpic_handle_irq(struct pt_regs *regs) if (i > 1022) break; - if (i > 1) { + if (i > 1) generic_handle_domain_irq(mpic_domain, i); - continue; - } /* MSI handling */ if (i == 1) From patchwork Tue Jul 2 11:42:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719505 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C2CC7C3064D for ; Tue, 2 Jul 2024 11:47:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=R7ZdqQoJr0PgZJd9SFpM+X0ieNozmYbXLeWtzwBJ5CU=; b=Hrd0iJiSNPpJFI3fzxM1Hzp3/T ReV67bvr6oDsQGhYRMIbcPpT/aYXL10WEH68wSvAagZDcNPF6vqeJQRhjyvW+5BAwlLkZtuNyHJZ9 MnutZ8FqWCWmRPCoYeLWvLT1swcjaLXLS7rIazMw2WxzXBYIBNejQAPagpv/Z8HM30TD73r2hMGsj D2sCVt7HrSxaFWhgp+edgbg8TeInWX1F2j3nBsQ7zw8IfS1YRNWd+zMBU4PsfO+0AtvKh+hx2aDvJ W/YFoUscdNoo+BkSe+XZlK9oE7GAps5T40F/GjHiA0HPCr+6WO6TER50hUSmgzjGi29c1iRg1rhrS wdTJWnMg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObz7-00000006YKy-3UFG; Tue, 02 Jul 2024 11:47:45 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObvo-00000006WbC-2x2L for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:44:22 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 1E8E2CE1D56; Tue, 2 Jul 2024 11:44:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 43FE2C2BD10; Tue, 2 Jul 2024 11:44:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920658; bh=9MaSxiNKPdizcKtPvRYXGasE9tBtH3aF1US3N2+iDB4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PZp9qhU1MpAJPn+cxvvFggPh8OlkCedPNo7f10fABxbTXiFyteGxdOQjUeqyuFjp5 ZWEXw9IGChViqjUlM98kQNKLg6YopKJJXuRVumf9fUJKuGJGCt8371eLertMYKSHJk ZE9TpHOvH1o0mQaZ8hiaKLwiTWrUbOROVo0wi/2w47G+5mMebMSh2uWOJg9TslEb93 p1CtDPUWKN85r3wXh79A/VTH+ToaUXeGY3KS/GvbWZSjSGtdKmTO16W413E0MBxFKK Vdl4x0Q3W/Ljk16yRgR5z8LEX6LaUJt/URrdPZZKDEu+XL8wfSQ2R2nTy9qqWcE7VG RHiGP9HN/K8gw== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 27/30] irqchip/armada-370-xp: Rename variable for consistency Date: Tue, 2 Jul 2024 13:42:59 +0200 Message-ID: <20240702114302.22475-28-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044420_946746_E40A59F5 X-CRM114-Status: GOOD ( 12.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Rename the variable holding cause register to "cause" in mpic_handle_cascade_irq(). Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 5f8bb693a0b1..2021b7e47a93 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -648,15 +648,15 @@ static inline void mpic_handle_ipi_irq(void) {} static void mpic_handle_cascade_irq(struct irq_desc *desc) { struct irq_chip *chip = irq_desc_get_chip(desc); - unsigned long irqmap, irqsrc, cpuid; + unsigned long cause, irqsrc, cpuid; irq_hw_number_t i; chained_irq_enter(chip, desc); - irqmap = readl_relaxed(per_cpu_int_base + MPIC_PPI_CAUSE); + cause = readl_relaxed(per_cpu_int_base + MPIC_PPI_CAUSE); cpuid = cpu_logical_map(smp_processor_id()); - for_each_set_bit(i, &irqmap, BITS_PER_LONG) { + for_each_set_bit(i, &cause, BITS_PER_LONG) { irqsrc = readl_relaxed(main_int_base + MPIC_INT_SOURCE_CTL(i)); /* Check if the interrupt is not masked on current CPU. From patchwork Tue Jul 2 11:43:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719506 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7D4F7C3064D for ; Tue, 2 Jul 2024 11:48:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=dwunz+2YYHpIwhTpOY8Cb9QXleywbmzBBJ9cSgyW0CI=; b=qOOeLx6LlhfUcb3c8mVsB5rH0K pVDMUWnbNPG1es8YZWRV6FJv8ju81Qx5GA6gsFLQAh15343ML+oN4kGuybemr4jRlKHyvioV6l5IY WybugXnrdU5qulUgboiOBqYUCBA7UqUHKQ57TAADyR5HQlMFPw/VxLNQDgx1Hrm86C9rrGYXUoCbL I8dk9brSAoFMqzBnfXQHMNz5nFW+DiNubw0mGm9AVFV1gCYvlIh7cQMMowe3lNG0o47dD7YlB1dUU YOFEtPIUncA/f1iNEdNMnYXz7wv4NQ5ILYDVm4SVDCA+gyUHgyhvrhI27h971WrSkqHsp+qpfat8L aNz5xu3A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObzI-00000006YQE-05Eb; Tue, 02 Jul 2024 11:47:56 +0000 Received: from sin.source.kernel.org ([145.40.73.55]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObvr-00000006Wcy-1Ial for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:44:24 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id AD26FCE16FE; Tue, 2 Jul 2024 11:44:21 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D2733C32781; Tue, 2 Jul 2024 11:44:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920661; bh=acyKlHBZhYxlowH8omCW+TK7I7gwGCSaajYh38zuPlk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=m8hiZbUmWWGSMhPFuy5ELmgVgq4+WS8yK9y5Eka9d1kiXNti/amDZfERzZMaLMBkH RsN6XqnkrciJi+YmXxSLRbEzdSzaiRmeJKjdXwssEUPAhWp1agz2bNmpu/Gs5oRvJ3 6vpGlPt6IM+c9PpgjzmNU9sdOAsBwHIOQ6zxaqaJV0Gn45ahUNNvisVrUz0GuYRHci RHUUA/NCIqlPma3Ol8iKNckoi/dexnRKR7DOXLwsf4O85XOR1DIHOpzwX8VifvyUI2 ie8st53jyKhmJEwxMdw5BT4ZJLfloiRnGYF6/Iu1wQfMLAgaJAn9G8FfQRXXAvywId wBxzyA+32ljCQ== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 28/30] irqchip/armada-370-xp: Use u32 type instead of unsigned long where possieble Date: Tue, 2 Jul 2024 13:43:00 +0200 Message-ID: <20240702114302.22475-29-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044423_553373_45E8ADA5 X-CRM114-Status: GOOD ( 12.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org For consistency across the driver, use the u32 type instead of unsigned long for holding register values and return value of cpu_logical_map(). One exception is when the variable is referenced for passing into for_each_set_bit(), in which case it has to be unsigned long. Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 2021b7e47a93..2c8272fe7150 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -365,7 +365,7 @@ static inline int mpic_msi_init(struct device_node *node, static void mpic_perf_init(void) { - unsigned long cpuid; + u32 cpuid; /* * This Performance Counter Overflow interrupt is specific for @@ -404,8 +404,8 @@ static void mpic_ipi_unmask(struct irq_data *d) static void mpic_ipi_send_mask(struct irq_data *d, const struct cpumask *mask) { - unsigned long map = 0; unsigned int cpu; + u32 map = 0; /* Convert our logical CPU mask into a physical one. */ for_each_cpu(cpu, mask) @@ -648,7 +648,8 @@ static inline void mpic_handle_ipi_irq(void) {} static void mpic_handle_cascade_irq(struct irq_desc *desc) { struct irq_chip *chip = irq_desc_get_chip(desc); - unsigned long cause, irqsrc, cpuid; + unsigned long cause; + u32 irqsrc, cpuid; irq_hw_number_t i; chained_irq_enter(chip, desc); From patchwork Tue Jul 2 11:43:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719507 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EFEE1C30658 for ; Tue, 2 Jul 2024 11:48:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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Tue, 2 Jul 2024 11:44:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920663; bh=g5owrnGltphsZPgN/WHaz4iqhikoGfDg0TC6c4BJBuw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BCBoTs8E51L+XejrlYo7tPDMnqyikSXHApA1iKJ8eOnxDOXPX66bVDTXazwqkR8vT +WP/5rY5snQ8taK5/1UOzol00zR6C6Zd7fmS5et+shQmI3SRIXXyAp8I1J+5Ym6+TT idTJUFc8pr5XrZTqb8OjoCxJQZwic0ZDbhubPZ/h2Jps7X3qaD8Xf2nU2B+a+fIKig Fl0dShap8P7hOJ4GE3n8LYBArEIXFgjghfnLcLfgmZzbONEs83ouMFbgRNbDWiXWU8 XqhSLaxbps9+3Xbp8KAYa9YwafW8wzqUT6nCr1naR7DCVVMmD6I81nH5JpmOFP6+vN VV56crGXkDt7Q== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 29/30] irqchip/armada-370-xp: Refactor initial memory regions mapping Date: Tue, 2 Jul 2024 13:43:01 +0200 Message-ID: <20240702114302.22475-30-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044426_320125_F3EC4EAF X-CRM114-Status: GOOD ( 17.00 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Refactor the initial memory regions mapping: - put into its own function - return error numbers on failure - use WARN_ON() instead of BUG_ON() Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 62 ++++++++++++++++++++--------- 1 file changed, 44 insertions(+), 18 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index 2c8272fe7150..d9154f75d7f3 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -12,6 +12,7 @@ #include #include +#include #include #include #include @@ -766,29 +767,54 @@ static struct syscore_ops mpic_syscore_ops = { .resume = mpic_resume, }; +static int mpic_map_region(struct device_node *np, int index, + void __iomem **base, phys_addr_t *phys_base) +{ + struct resource res; + int err; + + err = of_address_to_resource(np, index, &res); + if (WARN_ON(err)) + goto fail; + + if (WARN_ON(!request_mem_region(res.start, resource_size(&res), + np->full_name))) { + err = -EBUSY; + goto fail; + } + + *base = ioremap(res.start, resource_size(&res)); + if (WARN_ON(!*base)) { + err = -ENOMEM; + goto fail; + } + + if (phys_base) + *phys_base = res.start; + + return 0; + +fail: + pr_err("%pOF: Unable to map resource %d: %pE\n", np, index, + ERR_PTR(err)); + + return err; +} + static int __init mpic_of_init(struct device_node *node, struct device_node *parent) { - struct resource main_int_res, per_cpu_int_res; + phys_addr_t phys_base; unsigned int nr_irqs; + int err; - BUG_ON(of_address_to_resource(node, 0, &main_int_res)); - BUG_ON(of_address_to_resource(node, 1, &per_cpu_int_res)); - - BUG_ON(!request_mem_region(main_int_res.start, - resource_size(&main_int_res), - node->full_name)); - BUG_ON(!request_mem_region(per_cpu_int_res.start, - resource_size(&per_cpu_int_res), - node->full_name)); - - main_int_base = ioremap(main_int_res.start, - resource_size(&main_int_res)); - BUG_ON(!main_int_base); + err = mpic_map_region(node, 0, &main_int_base, &phys_base); + if (err) + return err; - per_cpu_int_base = ioremap(per_cpu_int_res.start, - resource_size(&per_cpu_int_res)); - BUG_ON(!per_cpu_int_base); + err = mpic_map_region(node, 1, &per_cpu_int_base, NULL); + if (err) + return err; nr_irqs = FIELD_GET(MPIC_INT_CONTROL_NUMINT_MASK, readl(main_int_base + MPIC_INT_CONTROL)); @@ -810,7 +836,7 @@ static int __init mpic_of_init(struct device_node *node, mpic_perf_init(); mpic_smp_cpu_init(); - mpic_msi_init(node, main_int_res.start); + mpic_msi_init(node, phys_base); if (parent_irq <= 0) { irq_set_default_host(mpic_domain); From patchwork Tue Jul 2 11:43:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13719508 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 89E9EC3064D for ; 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Tue, 02 Jul 2024 11:48:14 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sObvv-00000006Wg8-0kfb for linux-arm-kernel@lists.infradead.org; Tue, 02 Jul 2024 11:44:29 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 73E9361CD1; Tue, 2 Jul 2024 11:44:26 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 078CFC116B1; Tue, 2 Jul 2024 11:44:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1719920666; bh=l0wr8++C93tj8Qreovn1fQgGodkz3NVrI6Z18u58Jpw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UoplqCapqKgkc5Y3kCvC3/A8JHy7PwS5iy0XU/T9eQQ0e1tTZgyktUYAuQEUZPjyi 1QtK1zUN4H+K0h18mwfM1gSqCk+WzkqqNW5uCA/RSiTGKN39bXVrFOig8R8QvhxllF bYUTj68XdQLvWu9F5P1C21JxOlo7Qw99lNW9gEPbe1yiNZd5WnGFP2AigTB3UmpUrC g9tP3vbKuanIiTWUfN+T6uDiC0oEvmjzL590C58aQdvcOZGSeCFD4Ort/FrgK3CdwV gqhnTQy9D6lGkIGW0iqnmCDKUgpAMZPWsLCtzkZ3aC+ooKQMyMvKOJijoNGL86QliV UDTXkW799At7g== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, arm@kernel.org, Andy Shevchenko , Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 30/30] irqchip/armada-370-xp: Print error and return error code on initialization failure Date: Tue, 2 Jul 2024 13:43:02 +0200 Message-ID: <20240702114302.22475-31-kabel@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240702114302.22475-1-kabel@kernel.org> References: <20240702114302.22475-1-kabel@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240702_044427_378610_62661191 X-CRM114-Status: GOOD ( 12.83 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Print error and return error code on main / IPI / MSI domain initialization failure. Use WARN_ON() instead of BUG_ON(). Signed-off-by: Marek Behún --- drivers/irqchip/irq-armada-370-xp.c | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c index d9154f75d7f3..5890843b491e 100644 --- a/drivers/irqchip/irq-armada-370-xp.c +++ b/drivers/irqchip/irq-armada-370-xp.c @@ -473,7 +473,7 @@ static void mpic_ipi_resume(void) } } -static __init void mpic_ipi_init(struct device_node *node) +static __init int mpic_ipi_init(struct device_node *node) { int base_ipi; @@ -481,15 +481,17 @@ static __init void mpic_ipi_init(struct device_node *node) IPI_DOORBELL_END, &mpic_ipi_domain_ops, NULL); if (WARN_ON(!mpic_ipi_domain)) - return; + return -ENOMEM; irq_domain_update_bus_token(mpic_ipi_domain, DOMAIN_BUS_IPI); base_ipi = irq_domain_alloc_irqs(mpic_ipi_domain, IPI_DOORBELL_END, NUMA_NO_NODE, NULL); if (WARN_ON(!base_ipi)) - return; + return -ENOMEM; set_smp_ipi_range(base_ipi, IPI_DOORBELL_END); + + return 0; } static int mpic_set_affinity(struct irq_data *d, const struct cpumask *mask_val, @@ -823,7 +825,11 @@ static int __init mpic_of_init(struct device_node *node, writel(i, main_int_base + MPIC_INT_CLEAR_ENABLE); mpic_domain = irq_domain_add_linear(node, nr_irqs, &mpic_irq_ops, NULL); - BUG_ON(!mpic_domain); + if (!mpic_domain) { + pr_err("%pOF: Unable to add IRQ domain\n", node); + return -ENOMEM; + } + irq_domain_update_bus_token(mpic_domain, DOMAIN_BUS_WIRED); /* @@ -836,13 +842,22 @@ static int __init mpic_of_init(struct device_node *node, mpic_perf_init(); mpic_smp_cpu_init(); - mpic_msi_init(node, phys_base); + err = mpic_msi_init(node, phys_base); + if (err) { + pr_err("%pOF: Unable to initialize MSI domain\n", node); + return err; + } if (parent_irq <= 0) { irq_set_default_host(mpic_domain); set_handle_irq(mpic_handle_irq); #ifdef CONFIG_SMP - mpic_ipi_init(node); + err = mpic_ipi_init(node); + if (err) { + pr_err("%pOF: Unable to initialize IPI domain\n", node); + return err; + } + cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_ARMADA_XP_STARTING, "irqchip/armada/ipi:starting", mpic_starting_cpu, NULL);