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Tue, 9 Jul 2024 00:39:35 +0000 Received: from PN1P287MB2818.INDP287.PROD.OUTLOOK.COM ([fe80::5a8a:9e40:a4e8:3e2d]) by PN1P287MB2818.INDP287.PROD.OUTLOOK.COM ([fe80::5a8a:9e40:a4e8:3e2d%4]) with mapi id 15.20.7741.033; Tue, 9 Jul 2024 00:39:35 +0000 Message-ID: Date: Tue, 9 Jul 2024 08:39:29 +0800 User-Agent: Mozilla Thunderbird To: soc@kernel.org Cc: conor@kernel.org, arnd@arndb.de, linux-riscv@lists.infradead.org, inochiama@outlook.com, xiaoguang.xing@sophgo.com, haijiao.liu@sophgo.com, chao.wei@sophgo.com, unicorn_wang@outlook.com From: Chen Wang Subject: [GIT PULL] RISC-V Sophgo Devicetrees for v6.11 X-TMN: [VP5tBzbNW9uApk1/Eznifzi3/u2BMPvE] X-ClientProxiedBy: SI2PR02CA0020.apcprd02.prod.outlook.com (2603:1096:4:195::7) To PN1P287MB2818.INDP287.PROD.OUTLOOK.COM (2603:1096:c01:214::7) X-Microsoft-Original-Message-ID: <93944853-9fd2-4d31-a04e-6d2c6ad8ffd0@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: PN1P287MB2818:EE_|PN2P287MB0191:EE_ X-MS-Office365-Filtering-Correlation-Id: 8ee43d21-d8f6-4665-1952-08dc9faf9aa4 X-Microsoft-Antispam: BCL:0;ARA:14566002|19110799003|8060799006|461199028|440099028|4302099013|3412199025|1602099012|1710799026; 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X-BeenThere: linux-riscv@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-riscv" Errors-To: linux-riscv-bounces+linux-riscv=archiver.kernel.org@lists.infradead.org Hey Arnd, Please pull dt changes for RISC-V/Sophgo. I hope this PR is not too late, because I just got the message today from Stephen that this clock driver part has been merged into clk-next. Just FYI: https://lore.kernel.org/linux-riscv/b8dbdde2412d974baa24611b16cda5f7.sboyd@kernel.org/ Thanks, Chen. The following changes since commit 1613e604df0cd359cf2a7fbd9be7a0bcfacfabd0:   Linux 6.10-rc1 (2024-05-26 15:20:12 -0700) are available in the Git repository at:   https://github.com/sophgo/linux.git tags/riscv-sophgo-dt-for-v6.11 for you to fetch changes up to b1240a39511b9206293b82ac372c5114d6e15821:   riscv: dts: add clock generator for Sophgo SG2042 SoC (2024-07-09 08:19:52 +0800) ---------------------------------------------------------------- RISC-V Devicetrees for v6.11 Sopgho: Add clock support for SG2042. Signed-off-by: Chen Wang ---------------------------------------------------------------- Chen Wang (1):       riscv: dts: add clock generator for Sophgo SG2042 SoC  arch/riscv/boot/dts/sophgo/sg2042-milkv-pioneer.dts | 12 ++++++++++++  arch/riscv/boot/dts/sophgo/sg2042.dtsi              | 55 ++++++++++++++++++++++++++++++++++++++++++++++++++++++-  2 files changed, 66 insertions(+), 1 deletion(-)