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Wed, 10 Jul 2024 11:16:22 GMT Received: from hu-krichai-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 10 Jul 2024 04:16:16 -0700 From: Krishna chaitanya chundru Date: Wed, 10 Jul 2024 16:46:08 +0530 Subject: [PATCH v6 1/5] PCI: endpoint: Add wakeup host API to EPC core Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240710-wakeup_host-v6-1-ef00f31ea38d@quicinc.com> References: <20240710-wakeup_host-v6-0-ef00f31ea38d@quicinc.com> In-Reply-To: <20240710-wakeup_host-v6-0-ef00f31ea38d@quicinc.com> To: Manivannan Sadhasivam , =?utf-8?q?Krzy?= =?utf-8?q?sztof_Wilczy=C5=84ski?= , Kishon Vijay Abraham I , Bjorn Helgaas , Jonathan Corbet , Jingoo Han , Lorenzo Pieralisi , Rob Herring CC: , , , , , , , , , , "Krishna chaitanya chundru" X-Mailer: b4 0.13-dev-83828 X-Developer-Signature: v=1; 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Endpoint needs to wake up the host to bring the D-state to D0. Endpoint can toggle wake signal when the D-state is in D3cold and vaux is not supplied or can send inband PME. To support this add wakeup_host() callback to the EPC core. Signed-off-by: Krishna chaitanya chundru --- Documentation/PCI/endpoint/pci-endpoint.rst | 6 ++++++ drivers/pci/endpoint/pci-epc-core.c | 30 +++++++++++++++++++++++++++++ include/linux/pci-epc.h | 5 +++++ 3 files changed, 41 insertions(+) diff --git a/Documentation/PCI/endpoint/pci-endpoint.rst b/Documentation/PCI/endpoint/pci-endpoint.rst index 3eb5648ca7ec..3744bc692b4b 100644 --- a/Documentation/PCI/endpoint/pci-endpoint.rst +++ b/Documentation/PCI/endpoint/pci-endpoint.rst @@ -53,6 +53,7 @@ by the PCI controller driver. * raise_irq: ops to raise a legacy, MSI or MSI-X interrupt * start: ops to start the PCI link * stop: ops to stop the PCI link + * wakeup_host: ops to wakeup host The PCI controller driver can then create a new EPC device by invoking devm_pci_epc_create()/pci_epc_create(). @@ -120,6 +121,11 @@ by the PCI endpoint function driver. The PCI endpoint function driver should use pci_epc_mem_free_addr() to free the memory space allocated using pci_epc_mem_alloc_addr(). +* pci_epc_wakeup_host() + + The PCI endpoint function driver should use pci_epc_wakeup_host() to wakeup + host. + Other EPC APIs ~~~~~~~~~~~~~~ diff --git a/drivers/pci/endpoint/pci-epc-core.c b/drivers/pci/endpoint/pci-epc-core.c index e2b9c458f2c4..7edc75de2ff3 100644 --- a/drivers/pci/endpoint/pci-epc-core.c +++ b/drivers/pci/endpoint/pci-epc-core.c @@ -162,6 +162,36 @@ const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc, } EXPORT_SYMBOL_GPL(pci_epc_get_features); +/** + * pci_epc_wakeup_host() - Wakeup the host + * @epc: the EPC device which has to wakeup the host + * @func_no: the physical endpoint function number in the EPC device + * @vfunc_no: the virtual endpoint function number in the physical function + * @send_pme: true if wakeup is by sending PME + * + * Invoke to wakeup host + */ +bool pci_epc_wakeup_host(struct pci_epc *epc, u8 func_no, u8 vfunc_no, bool send_pme) +{ + int ret; + + if (IS_ERR_OR_NULL(epc) || func_no >= epc->max_functions) + return false; + + if (vfunc_no > 0 && (!epc->max_vfs || vfunc_no > epc->max_vfs[func_no])) + return false; + + if (!epc->ops->wakeup_host) + return true; + + mutex_lock(&epc->lock); + ret = epc->ops->wakeup_host(epc, func_no, vfunc_no, send_pme); + mutex_unlock(&epc->lock); + + return ret; +} +EXPORT_SYMBOL_GPL(pci_epc_wakeup_host); + /** * pci_epc_stop() - stop the PCI link * @epc: the link of the EPC device that has to be stopped diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h index e473d1780928..fffde507da47 100644 --- a/include/linux/pci-epc.h +++ b/include/linux/pci-epc.h @@ -52,6 +52,7 @@ pci_epc_interface_string(enum pci_epc_interface_type type) * @start: ops to start the PCI link * @stop: ops to stop the PCI link * @get_features: ops to get the features supported by the EPC + * @wakeup_host: ops to wakeup the host * @owner: the module owner containing the ops */ struct pci_epc_ops { @@ -81,6 +82,8 @@ struct pci_epc_ops { void (*stop)(struct pci_epc *epc); const struct pci_epc_features* (*get_features)(struct pci_epc *epc, u8 func_no, u8 vfunc_no); + bool (*wakeup_host)(struct pci_epc *epc, u8 func_no, u8 vfunc_no, + bool send_pme); struct module *owner; }; @@ -258,6 +261,8 @@ int pci_epc_start(struct pci_epc *epc); void pci_epc_stop(struct pci_epc *epc); const struct pci_epc_features *pci_epc_get_features(struct pci_epc *epc, u8 func_no, u8 vfunc_no); +bool pci_epc_wakeup_host(struct pci_epc *epc, u8 func_no, u8 vfunc_no, + bool send_pme); enum pci_barno pci_epc_get_first_free_bar(const struct pci_epc_features *epc_features); enum pci_barno pci_epc_get_next_free_bar(const struct pci_epc_features From patchwork Wed Jul 10 11:16:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna chaitanya chundru X-Patchwork-Id: 13729197 X-Patchwork-Delegate: manivannanece23@gmail.com Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D396191478; 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Signed-off-by: Krishna chaitanya chundru --- drivers/pci/controller/dwc/pcie-designware-ep.c | 12 ++++++++++++ drivers/pci/controller/dwc/pcie-designware.h | 1 + 2 files changed, 13 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index 43ba5c6738df..a20b6bec6078 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -440,6 +440,17 @@ dw_pcie_ep_get_features(struct pci_epc *epc, u8 func_no, u8 vfunc_no) return ep->ops->get_features(ep); } +static bool dw_pcie_ep_wakeup_host(struct pci_epc *epc, u8 func_no, u8 vfunc_no, + bool send_pme) +{ + struct dw_pcie_ep *ep = epc_get_drvdata(epc); + + if (!ep->ops->wakeup_host) + return false; + + return ep->ops->wakeup_host(ep, func_no, send_pme); +} + static const struct pci_epc_ops epc_ops = { .write_header = dw_pcie_ep_write_header, .set_bar = dw_pcie_ep_set_bar, @@ -454,6 +465,7 @@ static const struct pci_epc_ops epc_ops = { .start = dw_pcie_ep_start, .stop = dw_pcie_ep_stop, .get_features = dw_pcie_ep_get_features, + .wakeup_host = dw_pcie_ep_wakeup_host, }; /** diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 53c4c8f399c8..da15ccd7a3f5 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -365,6 +365,7 @@ struct dw_pcie_ep_ops { */ unsigned int (*get_dbi_offset)(struct dw_pcie_ep *ep, u8 func_no); unsigned int (*get_dbi2_offset)(struct dw_pcie_ep *ep, u8 func_no); + bool (*wakeup_host)(struct dw_pcie_ep *ep, u8 func_no, bool send_pme); }; struct dw_pcie_ep_func { From patchwork Wed Jul 10 11:16:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna chaitanya chundru X-Patchwork-Id: 13729194 X-Patchwork-Delegate: manivannanece23@gmail.com Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8422E18FDB1; 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If the wakeup type is PME, then trigger inband PME by writing to the PARF PARF_PM_CTRL register, otherwise toggle #WAKE. Signed-off-by: Krishna chaitanya chundru --- drivers/pci/controller/dwc/pcie-qcom-ep.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-qcom-ep.c b/drivers/pci/controller/dwc/pcie-qcom-ep.c index 627a33a1c5ca..d17e8542d07a 100644 --- a/drivers/pci/controller/dwc/pcie-qcom-ep.c +++ b/drivers/pci/controller/dwc/pcie-qcom-ep.c @@ -97,6 +97,7 @@ /* PARF_PM_CTRL register fields */ #define PARF_PM_CTRL_REQ_EXIT_L1 BIT(1) #define PARF_PM_CTRL_READY_ENTR_L23 BIT(2) +#define PARF_PM_CTRL_XMT_PME BIT(4) #define PARF_PM_CTRL_REQ_NOT_ENTR_L1 BIT(5) /* PARF_MHI_CLOCK_RESET_CTRL fields */ @@ -817,10 +818,34 @@ static void qcom_pcie_ep_init(struct dw_pcie_ep *ep) dw_pcie_ep_reset_bar(pci, bar); } +static bool qcom_pcie_ep_wakeup_host(struct dw_pcie_ep *ep, u8 func_no, bool send_pme) +{ + struct dw_pcie *pci = to_dw_pcie_from_ep(ep); + struct qcom_pcie_ep *pcie_ep = to_pcie_ep(pci); + struct device *dev = pci->dev; + u32 val; + + if (send_pme) { + dev_dbg(dev, "Waking up the host using PME\n"); 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If the D-state is in D3cold toggle wake signal, otherwise send PME. Signed-off-by: Krishna chaitanya chundru --- drivers/pci/endpoint/functions/pci-epf-mhi.c | 11 +++++++++++ include/linux/mhi_ep.h | 1 + 2 files changed, 12 insertions(+) diff --git a/drivers/pci/endpoint/functions/pci-epf-mhi.c b/drivers/pci/endpoint/functions/pci-epf-mhi.c index 6de9014e6e53..82fc52490324 100644 --- a/drivers/pci/endpoint/functions/pci-epf-mhi.c +++ b/drivers/pci/endpoint/functions/pci-epf-mhi.c @@ -708,6 +708,16 @@ static int pci_epf_mhi_dma_init(struct pci_epf_mhi *epf_mhi) return ret; } +static int pci_epf_mhi_wakeup_host(struct mhi_ep_cntrl *mhi_cntrl) +{ + struct pci_epf_mhi *epf_mhi = to_epf_mhi(mhi_cntrl); + struct pci_epf *epf = epf_mhi->epf; + struct pci_epc *epc = epf->epc; + + return pci_epc_wakeup_host(epc, epf->func_no, epf->vfunc_no, + (mhi_cntrl->dstate == PCI_D3cold) ? false : true); +} + static void pci_epf_mhi_dma_deinit(struct pci_epf_mhi *epf_mhi) { destroy_workqueue(epf_mhi->dma_wq); @@ -803,6 +813,7 @@ static int pci_epf_mhi_link_up(struct pci_epf *epf) mhi_cntrl->unmap_free = pci_epf_mhi_unmap_free; mhi_cntrl->read_sync = mhi_cntrl->read_async = pci_epf_mhi_iatu_read; mhi_cntrl->write_sync = mhi_cntrl->write_async = pci_epf_mhi_iatu_write; + mhi_cntrl->wakeup_host = pci_epf_mhi_wakeup_host; if (info->flags & MHI_EPF_USE_DMA) { mhi_cntrl->read_sync = pci_epf_mhi_edma_read; mhi_cntrl->write_sync = pci_epf_mhi_edma_write; diff --git a/include/linux/mhi_ep.h b/include/linux/mhi_ep.h index 7c9e5895ea2c..04646cf7782b 100644 --- a/include/linux/mhi_ep.h +++ b/include/linux/mhi_ep.h @@ -165,6 +165,7 @@ struct mhi_ep_cntrl { int (*write_sync)(struct mhi_ep_cntrl *mhi_cntrl, struct mhi_ep_buf_info *buf_info); int (*read_async)(struct mhi_ep_cntrl *mhi_cntrl, struct mhi_ep_buf_info *buf_info); int (*write_async)(struct mhi_ep_cntrl *mhi_cntrl, struct mhi_ep_buf_info *buf_info); + int (*wakeup_host)(struct mhi_ep_cntrl *mhi_cntrl); enum mhi_state mhi_state; From patchwork Wed Jul 10 11:16:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krishna chaitanya chundru X-Patchwork-Id: 13729198 X-Patchwork-Delegate: manivannanece23@gmail.com Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 89B271922C6; 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Wed, 10 Jul 2024 11:16:44 +0000 (GMT) Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.19/8.17.1.19) with ESMTPS id 46ABGiD0005026 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 10 Jul 2024 11:16:44 GMT Received: from hu-krichai-hyd.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Wed, 10 Jul 2024 04:16:38 -0700 From: Krishna chaitanya chundru Date: Wed, 10 Jul 2024 16:46:12 +0530 Subject: [PATCH v6 5/5] bus: mhi: ep: wake up host if the MHI state is in M3 Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <20240710-wakeup_host-v6-5-ef00f31ea38d@quicinc.com> References: <20240710-wakeup_host-v6-0-ef00f31ea38d@quicinc.com> In-Reply-To: <20240710-wakeup_host-v6-0-ef00f31ea38d@quicinc.com> To: Manivannan Sadhasivam , =?utf-8?q?Krzy?= =?utf-8?q?sztof_Wilczy=C5=84ski?= , Kishon Vijay Abraham I , Bjorn Helgaas , Jonathan Corbet , Jingoo Han , Lorenzo Pieralisi , Rob Herring CC: , , , , , , , , , , "Krishna chaitanya chundru" X-Mailer: b4 0.13-dev-83828 X-Developer-Signature: v=1; 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Signed-off-by: Krishna chaitanya chundru --- drivers/bus/mhi/ep/main.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/bus/mhi/ep/main.c b/drivers/bus/mhi/ep/main.c index b3eafcf2a2c5..b8713e5c1e1a 100644 --- a/drivers/bus/mhi/ep/main.c +++ b/drivers/bus/mhi/ep/main.c @@ -25,6 +25,26 @@ static DEFINE_IDA(mhi_ep_cntrl_ida); static int mhi_ep_create_device(struct mhi_ep_cntrl *mhi_cntrl, u32 ch_id); static int mhi_ep_destroy_device(struct device *dev, void *data); +static int mhi_ep_wake_host(struct mhi_ep_cntrl *mhi_cntrl) +{ + enum mhi_state state; + bool mhi_reset; + u32 count = 0; + + mhi_cntrl->wakeup_host(mhi_cntrl); + + /* Wait for Host to set the M0 state */ + while (count++ < M0_WAIT_COUNT) { + msleep(M0_WAIT_DELAY_MS); + + mhi_ep_mmio_get_mhi_state(mhi_cntrl, &state, &mhi_reset); + if (state == MHI_STATE_M0) + return 0; + } + + return -ENODEV; +} + static int mhi_ep_send_event(struct mhi_ep_cntrl *mhi_cntrl, u32 ring_idx, struct mhi_ring_element *el, bool bei) { @@ -564,6 +584,14 @@ int mhi_ep_queue_skb(struct mhi_ep_device *mhi_dev, struct sk_buff *skb) mutex_lock(&mhi_chan->lock); + if (mhi_cntrl->mhi_state == MHI_STATE_M3) { + ret = mhi_ep_wake_host(mhi_cntrl); + if (ret) { + dev_err(dev, "Failed to wakeup host\n"); + goto err_exit; + } + } + do { /* Don't process the transfer ring if the channel is not in RUNNING state */ if (mhi_chan->state != MHI_CH_STATE_RUNNING) {