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devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, cros-qcom-dts-watchers@chromium.org, Danila Tikhonov Subject: [PATCH 1/2] drivers: drm/msm/a6xx_catalog: Add A642L speedbin (0x81) Date: Mon, 22 Jul 2024 21:43:13 +0300 Message-ID: <20240722184314.36510-2-danila@jiaxyga.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240722184314.36510-1-danila@jiaxyga.com> References: <20240722184314.36510-1-danila@jiaxyga.com> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mailru-Src: smtp X-4EC0790: 10 X-7564579A: 646B95376F6C166E X-77F55803: 4F1203BC0FB41BD909E26770D4D56B7CCCBDD1BE5E962567A5A873F5605CE152182A05F538085040F0F80B61667D01C13DE06ABAFEAF67055FDBE47B3E6A5E4F48430ABBF7BBE8AF242CE91CCB49B96E X-7FA49CB5: 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3ZO7eAau8CL7WIMRKs4sN3D3tLDjz0dLbV79QFUyzQ2Ujvy7cMT6pYYqY16iZVKkSc3dCLJ7zSJH7+u4VD18S7Vl4ZUrpaVfd2+vE6kuoey4m4VkSEu530nj6fImhcD4MUrOEAnl0W826KZ9Q+tr5ycPtXkTV4k65bRjmOUUP8cvGozZ33TWg5HZplvhhXbhDGzqmQDTd6OAevLeAnq3Ra9uf7zvY2zzsIhlcp/Y7m53TZgf2aB4JOg4gkr2biojWvq7+FFlTiPu0/l/w6bsKA== X-Mailru-MI: 8000000000000800 X-Mras: Ok From: Eugene Lepshy According to downstream, A642L's speedbin is 129 and uses 4 as index Signed-off-by: Eugene Lepshy Signed-off-by: Danila Tikhonov Reviewed-by: Konrad Dybcio --- drivers/gpu/drm/msm/adreno/a6xx_catalog.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c index 68ba9aed5506e..99f0ee1a2edea 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_catalog.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_catalog.c @@ -869,6 +869,7 @@ static const struct adreno_info a6xx_gpus[] = { .speedbins = ADRENO_SPEEDBINS( { 0, 0 }, { 117, 0 }, + { 129, 4 }, { 172, 2 }, /* Called speedbin 1 downstream, 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9EB879F2C80682A09F26F806C7394981436F3F81E16DA28EF7A6B01B8567BB20E91A1BC8F7CB7EFEFE0723CD85807B622C62728BC403A049225EC17F3711B6CF1A6F2E8989E84EC137BFB0221605B344978139F6FA5A77F05FEEDEB644C299C0ED14614B50AE0675 X-Mras: Ok X-7564579A: 646B95376F6C166E X-77F55803: 6242723A09DB00B401F4E5391F75DBFDFFE17084D77CFDC2474D8639A849E268049FFFDB7839CE9E832BBE59233B4F3742706E38AB0D909C02AF80C9B4DF8AC2DACFC2978A2FBAC8 X-7FA49CB5: 0D63561A33F958A5F0F9510BAEF9C8D2E435EF869C6126F805271FD3395ACEB78941B15DA834481FA18204E546F3947CC11B1E8D35EB7500F6B57BC7E64490618DEB871D839B7333395957E7521B51C2DFABB839C843B9C08941B15DA834481F8AA50765F7900637A38BAC9F596BD8CD389733CBF5DBD5E9B5C8C57E37DE458BD96E472CDF7238E0725E5C173C3A84C3975373433331DEB835872C767BF85DA2F004C90652538430E4A6367B16DE6309 X-87b9d050: 1 X-D57D3AED: 3ZO7eAau8CL7WIMRKs4sN3D3tLDjz0dLbV79QFUyzQ2Ujvy7cMT6pYYqY16iZVKkSc3dCLJ7zSJH7+u4VD18S7Vl4ZUrpaVfd2+vE6kuoey4m4VkSEu530nj6fImhcD4MUrOEAnl0W826KZ9Q+tr5ycPtXkTV4k65bRjmOUUP8cvGozZ33TWg5HZplvhhXbhDGzqmQDTd6OAevLeAnq3Ra9uf7zvY2zzsIhlcp/Y7m53TZgf2aB4JOg4gkr2biojWvq7+FFlTiPVOoADqh7tvg== X-Mailru-MI: 8000000000000800 X-Mras: Ok From: Eugene Lepshy A642L (speedbin 0x81) uses index 4, so this commit sets the fourth bit for A642L supported opps. Signed-off-by: Eugene Lepshy Signed-off-by: Danila Tikhonov Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 3d8410683402f..91cc5e74d8f5a 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2834,14 +2834,14 @@ opp-315000000 { opp-hz = /bits/ 64 <315000000>; opp-level = ; opp-peak-kBps = <1804000>; - opp-supported-hw = <0x07>; + opp-supported-hw = <0x17>; }; opp-450000000 { opp-hz = /bits/ 64 <450000000>; opp-level = ; opp-peak-kBps = <4068000>; - opp-supported-hw = <0x07>; + opp-supported-hw = <0x17>; }; /* Only applicable for SKUs which has 550Mhz as Fmax */ @@ -2856,14 +2856,14 @@ opp-550000000-1 { opp-hz = /bits/ 64 <550000000>; opp-level = ; opp-peak-kBps = <6832000>; - opp-supported-hw = <0x06>; + opp-supported-hw = <0x16>; }; opp-608000000 { opp-hz = /bits/ 64 <608000000>; opp-level = ; opp-peak-kBps = <8368000>; - opp-supported-hw = <0x06>; + opp-supported-hw = <0x16>; }; opp-700000000 {