From patchwork Sun Aug 4 05:40:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13752458 Received: from mail-ej1-f46.google.com (mail-ej1-f46.google.com [209.85.218.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 84951AD59 for ; Sun, 4 Aug 2024 05:40:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750023; cv=none; b=NOtfdpLMKbZhFQsoam3XI9zbUhUpmlJ0xECikRCnUpMVcX7geFzOpKG4Q7NFzA8o6ggAjZf1xmgsmhdChisGeWMX7u/fd4Z3tVbvIaDpRLXSQ2kGYVuX6v3Ici2YZ/VjWFcaVVUevpq5OXkzDS+4OHff93eYA27MKahds4VYfsY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750023; c=relaxed/simple; bh=t+tMTzX+SM35TGMLlS8U+3Typ2b9GAQHOxtHcxsEDtY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BVy4uBOowB48e9Cqst5+ccsvMLfttc2qllFJSy5Mk7i+ACFRQGE1K/zURqcYmtI4mooWZpCGixS3oZckgvp2QFsEfCcBhv4iZM+RA9/GaRS7n0HrZRXB4E7C7Sc9HXUbv6G3N/Rslv3mF/+LUfDEzfkkcu6hSRi9tiJ6A7heT50= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=D8gmPCeg; arc=none smtp.client-ip=209.85.218.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="D8gmPCeg" Received: by mail-ej1-f46.google.com with SMTP id a640c23a62f3a-a7a9185e1c0so899977966b.1 for ; Sat, 03 Aug 2024 22:40:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1722750020; x=1723354820; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=ysYzFvs5nz+WvJxUYQ+2QczfFsuOxY/5HM9LuZLHg+Q=; b=D8gmPCegHv8AxpuqYhyc4Yuio3kZT1+Yyyc6F7EPzUw2j42RD4bLM3Uy/8x1V5JwXG uICH62OX8Z/xbLkU8SyGNyA8iVJ9s30FLnnof16/JY8nut9YkYmDqOaBYMuscjv1pQQe MrV++V5EUNzVfzWQq56jIokaCSlANJP1M6oDqim9rM0OtJjDXezkgEXTGfQkNbBG420L shckkrkx4xGshPUN9KtV9ak1Odg4QVbatVzBORXmWrPPJSptucgsNvTXOSRP3ssEcGHQ Q+uk9qIf3IdjvwhjC/fjmG9Bxpl5dC8UVv3Y5aztFEDjb9tOwyTQaxOgd2Di+h0Mfp4V jszg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722750020; x=1723354820; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ysYzFvs5nz+WvJxUYQ+2QczfFsuOxY/5HM9LuZLHg+Q=; b=QXso2w3dj74j3zpq5Cw35r1nfHhKMSNPnVUSYjGiE1dFdrDiL4MJOG9zxPbSM3mpqn jfBtdWt+kPN4b591wIpISxAU6PLmaWVCVrPM4SFYL663x7M7x8kSF399VSXrUg+1S+P+ VaqUaR4RMHjV6Bdm6UJRfFLgWBHq2HRQrhDJqw7esqthXlOI9GsfCzDl0VRbK+mwJUix VyRaRMgqWKCdvj79BHljtLJorPaJZa17rys75Uk9qx46EBYoSG43D44dHqpRWZw/Ej1J XtRUJQiaRbbN7HuZ/Fp1hMpy6rdoyAKwi7LRkrW0ViwU+OVqnRoBXgpoCAySTpUlKSvk li4Q== X-Forwarded-Encrypted: i=1; AJvYcCWbMy4sOQxTAYxBjtB9xkpo2vsHocADc9X7kyz6LpCX0wCLJeNfjzEeYSrGaTIXdblqQHcVogM4g5pJ/l8+gD7RHTRu39x15WX8 X-Gm-Message-State: AOJu0YxS5hRHfHRAkRR3xCwUweejJ/AEnoxfnf+kkPyiKWwzZtYUGgZ+ tzT91wYdy2XN1biOkuRIDGK2h1c+TWsZaprcC2WohNDJsmNMimh6/CPaM8uzhHg= X-Google-Smtp-Source: AGHT+IHJn6+1jqc0ahvJHM7K4NrLWHr1zsbLKGyqs6RoLVAK1GPH/qUlqIcWAn4yddgy8+w8Ih8egQ== X-Received: by 2002:a17:907:97c9:b0:a7a:aa35:4089 with SMTP id a640c23a62f3a-a7dc4e87671mr627357466b.24.1722750019793; Sat, 03 Aug 2024 22:40:19 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7dc9bc3bd7sm292248466b.34.2024.08.03.22.40.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Aug 2024 22:40:19 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 04 Aug 2024 08:40:05 +0300 Subject: [PATCH 01/11] clk: qcom: dispcc-sm8250: use CLK_SET_RATE_PARENT for branch clocks Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240804-sm8350-fixes-v1-1-1149dd8399fe@linaro.org> References: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> In-Reply-To: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Jonathan Marek , Robert Foss , Vinod Koul , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mike Tipton , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Dmitry Baryshkov , stable@vger.kernel.org X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1328; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=t+tMTzX+SM35TGMLlS8U+3Typ2b9GAQHOxtHcxsEDtY=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmrxQ+Ojq+KjeMNpaJEqMBBa4cusWyrZKtW0x0l Gg26p9OB/SJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZq8UPgAKCRCLPIo+Aiko 1fR3B/4uCLNre4w7YVTFSx9cfyW6gnVvsmmbvpOvS3ZzLKsqrob+fkNOW4zMQe0FdXktkSgd/ty QOPkK0yjPxHlDNC4x3MivgMr0PyMCbeiuZkXk/MZjtfYf4ly3ii6+gT2rx+640bkdPyxKWtv0/L NW6g13t7c2O1nFd/0i7HXwEqjoVVikW2RrENql/AR7LUMjRWpQTqdUoBTo+gBK0L9oUspLHwu1D 4EyfBP0KcHkIo4OQdBh7juAQD/ltGj9MCDZd/ym3bjWKI1dpWcXXuMHIUfc1pjLyj2YIZVUpige dvqeT18Z3ZEoxYL/dN2CfoEsxZ3S/DSJpub48/+FxE6bKSzy X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Add CLK_SET_RATE_PARENT for several branch clocks. Such clocks don't have a way to change the rate, so set the parent rate instead. Fixes: 80a18f4a8567 ("clk: qcom: Add display clock controller driver for SM8150 and SM8250") Cc: stable@vger.kernel.org Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/dispcc-sm8250.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c index 5a09009b7289..eb78cd5439d0 100644 --- a/drivers/clk/qcom/dispcc-sm8250.c +++ b/drivers/clk/qcom/dispcc-sm8250.c @@ -849,6 +849,7 @@ static struct clk_branch disp_cc_mdss_dp_link1_intf_clk = { &disp_cc_mdss_dp_link1_div_clk_src.clkr.hw, }, .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, }, }, @@ -884,6 +885,7 @@ static struct clk_branch disp_cc_mdss_dp_link_intf_clk = { &disp_cc_mdss_dp_link_div_clk_src.clkr.hw, }, .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, }, }, @@ -1009,6 +1011,7 @@ static struct clk_branch disp_cc_mdss_mdp_lut_clk = { &disp_cc_mdss_mdp_clk_src.clkr.hw, }, .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, }, }, From patchwork Sun Aug 4 05:40:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13752459 Received: from mail-ej1-f47.google.com (mail-ej1-f47.google.com [209.85.218.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 326DEF9CB for ; Sun, 4 Aug 2024 05:40:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750026; cv=none; b=eUQ1jgzaP+4UrWd4saDR2lrdLkPW75kOjM4QZif3y81c05TJaVu9OZLDLCZVse8/TfWDEwA3fO55DjMzFRmXnA2wWpnWrzVDAoxdDT3rM2Fe0irvFmntdbpUph8dAi9Fv4FP5O5O1DFbYwaLgWKFsRHn18d9WZ200Z5zaPNjXl8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750026; c=relaxed/simple; bh=jmcv3QZDbF0/FB7C2A1nETsdriKJ1dXxo+mdoIZ+Ot8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PwEKyYgmAyztgM/pyJ+68WpWbFBEQJ8DjVTwQQqdsOCrjdUwE3icatOAJLVkn+YtQqk1i8jWvSah+reiBEKH7o0dRK+Mkm9bOwC1my+KJyj1y5Ev3BsBqYdERbzg/XIroLiSyRfCHM+dNYln3cD4rCxizQeqNRMt5zg50fCwENE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=Gswo4N3l; arc=none smtp.client-ip=209.85.218.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Gswo4N3l" Received: by mail-ej1-f47.google.com with SMTP id a640c23a62f3a-a7a9a7af0d0so1197415766b.3 for ; Sat, 03 Aug 2024 22:40:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1722750021; x=1723354821; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=QAmP59CsMg1OmM3gD5Is1pyiJbDBWr21J5h6ZsQbULc=; b=Gswo4N3lA+BuEYX/Eph0AWWldcoclH+qo+zux31SLbtUFr4pjdXiGYD5VTc+J7MGaj 0+rb/jlZeemPS7cd1uSc+2AOSbJSMYpqPxk97acYLjhBWkEEeut+dehxp/6fxeI1nAIN WqKYCmADtjrrBVGolSxWdW+VfsP+36oik5u0I96ykNBKkc+ozYvpJkrhb0AYo0aONx80 /esgQEew+TlGuONhQXtZ8JkKzW3dS71nN/lEpS9GAVHFUcKret97beJ2Ppew4sBg3SIM ySxUsBf1cdQVZWtUVsAdwH7V8KedCPYrpC7+E14RKno5eIkoJQIxPXFab1y64HsnpPPt K71g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722750021; x=1723354821; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QAmP59CsMg1OmM3gD5Is1pyiJbDBWr21J5h6ZsQbULc=; b=prG3iPVsSCuj5TN5laHMtEPW8poIbuQkiQJ4m5zVqHxNiFr13E689WDwBZfoRpt+7A oiVxH4H4DU0exlpKszEeC7d0EuugsCynFuCmOF9wf/EjGTgaZwJiVqYU5jN5LaB6MOeK f24IDvZMnxEWsaI4PetJimSu7OCFh+SMj0hJUl5/agTKJWp/aSazRY22mkGjcAMybrRo 9+EH0H2K1Csp2FizHjmd/OAuLeQxjSVGOP9QyAHxCXopE2Zrkh5Y2vkNVvMiQ3aAtx3l 2vBxxJLotlr03a2u7Ba12ZQkhsr48iVq9oHicWZ+vc72xypkhjkMti0q6tCZ8jTmIrOb ZhQw== X-Forwarded-Encrypted: i=1; AJvYcCWbH0M9V04mWvfvQRRuPj3lziOBYgArRycZJxlTiXo+mtfctw36vrxYp1TEQePycjIoF0w7QB1iA7I=@vger.kernel.org X-Gm-Message-State: AOJu0Yxr8a8TJ/CTGfGWErJUpLPJjAf7W85aMba5czNvU6LaKh4YCIKV M6kw7aP73GYw/ti6v4M8wRH12K8Q/PJOCLq31Bc8m75diQB4X+Qh/w5jBAHA570= X-Google-Smtp-Source: AGHT+IFVLTR76CbNV5qahJQoIGpt3Vzypxa8q34XuuIwmITvoXxOKd6/Ru/9TyTfB1g1mcja4mQVgg== X-Received: by 2002:a17:907:a096:b0:a7d:d1a6:d943 with SMTP id a640c23a62f3a-a7dd1a6dec8mr392048566b.40.1722750021473; Sat, 03 Aug 2024 22:40:21 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7dc9bc3bd7sm292248466b.34.2024.08.03.22.40.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Aug 2024 22:40:21 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 04 Aug 2024 08:40:06 +0300 Subject: [PATCH 02/11] clk: qcom: dispcc-sm8250: use special function for Lucid 5LPE PLL Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240804-sm8350-fixes-v1-2-1149dd8399fe@linaro.org> References: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> In-Reply-To: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Jonathan Marek , Robert Foss , Vinod Koul , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mike Tipton , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Dmitry Baryshkov X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=4876; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=jmcv3QZDbF0/FB7C2A1nETsdriKJ1dXxo+mdoIZ+Ot8=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmrxQ+bL7txinbbvtpaZCB41puWCXaqSR2+yfiX +7P7Ff+UomJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZq8UPgAKCRCLPIo+Aiko 1c0CCACx/TGWwylNnfimpuNOVKIxADSMA2GbffeGvgGYp+409LFZHjV8RPg5nyWwwhARcdnhDCk ZRv9hR4KhHmZF8C/Bmh1c9XxTeaj2mLaH4qwpNgycQavj8ZTli/pQUcCRg+/BEZrxSgsMsVa0F5 8QvJInBHia3iHgVKJzoh7P7xCsbCudufusswKl3z27BrrQrNVF8QUeMV8/5fQ23LSvQXFj4P1sL wI4itM1zoO5ZnBQeyPPpHU0WuctZTd+0NaskZeZeo3y8Mtv4CHuTuVzDlkZ9HU+3igoyrnneVNP gtibXN/1UhcT3R5hnWf7rrhn82vRAV1kkitFhrlW2wYWcNDL X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A According to msm-5.10 the lucid 5lpe PLLs have require slightly different configuration that trion / lucid PLLs, it doesn't set PLL_UPDATE_BYPASS bit. Add corresponding function and use it for the display clock controller on Qualcomm SM8350 platform. Fixes: 205737fe3345 ("clk: qcom: add support for SM8350 DISPCC") Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/clk-alpha-pll.c | 52 ++++++++++++++++++++++++++++++++++++++++ drivers/clk/qcom/clk-alpha-pll.h | 2 ++ drivers/clk/qcom/dispcc-sm8250.c | 9 +++++-- 3 files changed, 61 insertions(+), 2 deletions(-) diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index d87314042528..d0b911499cf9 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -1831,6 +1831,58 @@ const struct clk_ops clk_alpha_pll_agera_ops = { }; EXPORT_SYMBOL_GPL(clk_alpha_pll_agera_ops); +/** + * clk_lucid_5lpe_pll_configure - configure the lucid 5lpe pll + * + * @pll: clk alpha pll + * @regmap: register map + * @config: configuration to apply for pll + */ +void clk_lucid_5lpe_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, + const struct alpha_pll_config *config) +{ + /* + * If the bootloader left the PLL enabled it's likely that there are + * RCGs that will lock up if we disable the PLL below. + */ + if (trion_pll_is_enabled(pll, regmap)) { + pr_debug("Lucid 5LPE PLL is already enabled, skipping configuration\n"); + return; + } + + clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l); + regmap_write(regmap, PLL_CAL_L_VAL(pll), TRION_PLL_CAL_VAL); + clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha); + clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), + config->config_ctl_val); + clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), + config->config_ctl_hi_val); + clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), + config->config_ctl_hi1_val); + clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), + config->user_ctl_val); + clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), + config->user_ctl_hi_val); + clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U1(pll), + config->user_ctl_hi1_val); + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), + config->test_ctl_val); + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), + config->test_ctl_hi_val); + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), + config->test_ctl_hi1_val); + + /* Disable PLL output */ + regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0); + + /* Set operation mode to OFF */ + regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY); + + /* Place the PLL in STANDBY mode */ + regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N); +} +EXPORT_SYMBOL_GPL(clk_lucid_5lpe_pll_configure); + static int alpha_pll_lucid_5lpe_enable(struct clk_hw *hw) { struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h index df8f0fe15531..e2cf5c7e501d 100644 --- a/drivers/clk/qcom/clk-alpha-pll.h +++ b/drivers/clk/qcom/clk-alpha-pll.h @@ -208,6 +208,8 @@ void clk_agera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config); +void clk_lucid_5lpe_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, + const struct alpha_pll_config *config); void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config); void clk_lucid_ole_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c index eb78cd5439d0..884bbd3fb305 100644 --- a/drivers/clk/qcom/dispcc-sm8250.c +++ b/drivers/clk/qcom/dispcc-sm8250.c @@ -1360,8 +1360,13 @@ static int disp_cc_sm8250_probe(struct platform_device *pdev) disp_cc_sm8250_clocks[DISP_CC_MDSS_EDP_GTC_CLK_SRC] = NULL; } - clk_lucid_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config); - clk_lucid_pll_configure(&disp_cc_pll1, regmap, &disp_cc_pll1_config); + if (of_device_is_compatible(pdev->dev.of_node, "qcom,sm8350-dispcc")) { + clk_lucid_5lpe_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config); + clk_lucid_5lpe_pll_configure(&disp_cc_pll1, regmap, &disp_cc_pll1_config); + } else { + clk_lucid_pll_configure(&disp_cc_pll0, regmap, &disp_cc_pll0_config); + clk_lucid_pll_configure(&disp_cc_pll1, regmap, &disp_cc_pll1_config); + } /* Enable clock gating for MDP clocks */ regmap_update_bits(regmap, 0x8000, 0x10, 0x10); From patchwork Sun Aug 4 05:40:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13752460 Received: from mail-ed1-f51.google.com (mail-ed1-f51.google.com [209.85.208.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B5D2614F6C for ; Sun, 4 Aug 2024 05:40:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750026; cv=none; b=KBbHUpx/7X29HQxe4HVs6v8c8ADsYykJH39quVW3EzrPv2GU0vgBgOo9YAXQJ9kl3ml3mrd6I6g3TrIBWWBnyWVa0ldNxAjKZh7KbiF78+4gysiBC5DolICXwJUNHEzqGx/HJ/bVs0DYI1JNHLJ9OrMb/5TcoLHkvgZNRicl24c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750026; c=relaxed/simple; bh=ZrQo3KWLh48xJDJlDCJhnd58UA7Hm/hQisnNq+wC8eQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=n9TtfvcvgURY6qqsoUhQzWA3zIYZaaav0wokpkhgykxe9gPPoz+AkQRrnLz4lN55mQIA7uw9ktH0QbJJmw3rF79xCPSwJJ3x6eRl+KE2KesScHRpMQdt21qEC6rdki1PJR+dUPjbTdKn0iEPn6KPLui6ZYC91lRiWZ0iymw6KfY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=ngwoZELE; arc=none smtp.client-ip=209.85.208.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ngwoZELE" Received: by mail-ed1-f51.google.com with SMTP id 4fb4d7f45d1cf-5a156557029so13936168a12.2 for ; Sat, 03 Aug 2024 22:40:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1722750023; x=1723354823; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=EYBxyQ/YvwiIHaG8jzR0Y70dVbuym8PFNWRpFtHQEf8=; b=ngwoZELE+oofageJ+Jk7kU3B+XlQdxE2snHsdxOPDGbyemKbEYwIEYNNBATA+iuYSU O32EHhkhDrMMTmABzzGbzqiioDZX+q0fUC6qurywgbtgftM9oRRO5LdNrgLNHOl3L5s9 yR/4eNVdMmNTtwtIlW6A2IJDz34PMiZhV7YwvGUh/PTsfvzsHEI2FE6UVB30gV7yA0GT jVFNlDXxK8hZ93EQsVgRDmV67ggJPEuTvAzTFf5OlV+qYp6VNd3zboPyDORrl7Z2up6G nV0Ju3qt4eFvl1+muhv9hAK9LyAj/dnmf4K6uhemMJP50lhgSy8fFVm5uLmj8JLK5l8L MuHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722750023; x=1723354823; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=EYBxyQ/YvwiIHaG8jzR0Y70dVbuym8PFNWRpFtHQEf8=; b=F50egyGwaRQASc/1AzpTOZHIFXqRIqI89/r5rEgs8+hoyXPJDaiUOhu/QWJ5IWfp8T afuHhhKI1edBy+Jp2/PeRG4SixIeOkfE6LNXhiWbDHefmzNl1WjWqlbEt2QrP8400yDN /yHUfpwDlH7Wsq7WJcTpo0bnz7kR6QJx1kXOKbStBeWkbeDkx9nk0RUytpF/x+Y+e1UN +my1fRwDLc0GRIgo3WQLQTdXbBHyxf4sAO3k2C26UbZIPzwa332JfDWgat5Q84gSPLmO vpEAjD7zaHvfjRXg1PuscARyRg5ohsN/P/mVvjbKDtuSSoYcHNte7pl3wm02yymE4xsb wtXQ== X-Forwarded-Encrypted: i=1; AJvYcCUL2he98BYGbk+oW37p6qFgugM+U6LCjT0tSX68y+MA6whArYwpSW7IM9Rw4pcHKhfbhRQTnCCC9+R/jwDL/u8prwX8cxOrRttR X-Gm-Message-State: AOJu0YwwXONQfgMTGJzYCOEMb4YGN4dhG0R3YjSVRQ6CVFgrHiG+GRNe cVsS0l3DRQVFNsQeLkFZ0SpZx9cTUAqytyLP/0L9DPuRGucl6H9o4a76dp6MlDE= X-Google-Smtp-Source: AGHT+IEb56JcXEdp3cHrbP3Zdb4R00iMmwymYCH9bJ87K9H4uB8Y3mr62+YvNqwi5wZXe7TBUA0HwQ== X-Received: by 2002:a17:907:7b8d:b0:a7a:97a9:ba28 with SMTP id a640c23a62f3a-a7dc4fb6a93mr575059266b.26.1722750023107; Sat, 03 Aug 2024 22:40:23 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7dc9bc3bd7sm292248466b.34.2024.08.03.22.40.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Aug 2024 22:40:22 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 04 Aug 2024 08:40:07 +0300 Subject: [PATCH 03/11] drm/msm/dsi: correct programming sequence for SM8350 / SM8450 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240804-sm8350-fixes-v1-3-1149dd8399fe@linaro.org> References: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> In-Reply-To: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Jonathan Marek , Robert Foss , Vinod Koul , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mike Tipton , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Dmitry Baryshkov X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1635; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=ZrQo3KWLh48xJDJlDCJhnd58UA7Hm/hQisnNq+wC8eQ=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmrxQ+6l4NppYjUOt2B1Mrx0jUAAKAzHN1dYY7o symZsDcsH6JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZq8UPgAKCRCLPIo+Aiko 1REzB/9ap2qNIrseQCvZa/pTU/KUPvVlida6gouDBjhpuq7T3vUAUBKa74AAqkQOHqraSmgVJ+V SnR9/o7ICUDZaE8E9VS16WvKFpcOOw4OaiaCroRfcqvQLCmu0w+72VZ7YAj+Wyq/JqR7g+asp8D ZDXh/perTUkRZ6OmXanv4Y2J7IxckRnIShcfucpigmfnyPwI3cBaaUiquig/eEBYWGrdmtISth0 Hfl9rpFXrXWvTWgAn1OvlDqKbrlNV5liXA2oOAQr2YruWmCjq1+xqTFcHvxuL/CBMwsAHINjojk RUtYD2MMuk4xqwqJvLOJ7w7LtPfbGJ8VzQCKA/PK5N4aWiWG X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A According to the display-drivers, 5nm DSI PLL (v4.2, v4.3) have different boundaries for pll_clock_inverters programming. Follow the vendor code and use correct values. Fixes: 2f9ae4e395ed ("drm/msm/dsi: add support for DSI-PHY on SM8350 and SM8450") Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c index 3b59137ca674..031446c87dae 100644 --- a/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c +++ b/drivers/gpu/drm/msm/dsi/phy/dsi_phy_7nm.c @@ -135,7 +135,7 @@ static void dsi_pll_calc_dec_frac(struct dsi_pll_7nm *pll, struct dsi_pll_config config->pll_clock_inverters = 0x00; else config->pll_clock_inverters = 0x40; - } else { + } else if (pll->phy->cfg->quirks & DSI_PHY_7NM_QUIRK_V4_1) { if (pll_freq <= 1000000000ULL) config->pll_clock_inverters = 0xa0; else if (pll_freq <= 2500000000ULL) @@ -144,6 +144,16 @@ static void dsi_pll_calc_dec_frac(struct dsi_pll_7nm *pll, struct dsi_pll_config config->pll_clock_inverters = 0x00; else config->pll_clock_inverters = 0x40; + } else { + /* 4.2, 4.3 */ + if (pll_freq <= 1000000000ULL) + config->pll_clock_inverters = 0xa0; + else if (pll_freq <= 2500000000ULL) + config->pll_clock_inverters = 0x20; + else if (pll_freq <= 3500000000ULL) + config->pll_clock_inverters = 0x00; + else + config->pll_clock_inverters = 0x40; } config->decimal_div_start = dec; From patchwork Sun Aug 4 05:40:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13752461 Received: from mail-ed1-f51.google.com (mail-ed1-f51.google.com [209.85.208.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6ADFC1BC39 for ; Sun, 4 Aug 2024 05:40:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.51 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750028; cv=none; b=ApddmnpTii4nZ7SVJTPtkV8LmzpiVt90jsA7YlzOIAdRYc4YEURdSKY276v2m0PnyGqCcTBcCDRB6pENAiiuZX7eCxqB/urAURB/ktzIXxFyWtw9H/3xGTaHR7dtc3v4jxSwEi/B/uVMF0q/sYsW8X+3rkQj1VcTbPO/5+FG6Ok= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750028; c=relaxed/simple; bh=tcJ7LQ1yfUyMvLJV6hSYPEPDWM/piu7AD4k8+F7Xn8M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=MJWaLgf/peM3SpMfK/WU7sxscNP6KY4K1XtAR1I6EpPWU6rn/IHe84oDwTpEDDiG80qWEGz6hUGoiJY6Gld1TvVmz1xpgUZp8f5avlwfI5lyt30nR7Ty1ESvpYZkGOJMmca8WCbzyzCyXgEorKukaQCJkIOgaFPtrtOI6O9NT3Y= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=oFenis/h; arc=none smtp.client-ip=209.85.208.51 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="oFenis/h" Received: by mail-ed1-f51.google.com with SMTP id 4fb4d7f45d1cf-5afa207b8bfso10075425a12.0 for ; Sat, 03 Aug 2024 22:40:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1722750025; x=1723354825; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=F5mt80rOA9qN8jWsdvy84Xdf9Lmua8radXA2BhT4YbQ=; b=oFenis/hQBf50znog9TLO6yEDOtR0wLSf6498uf/JZBDwKNWUdoxoHRIpXkuen9FBD poOAPyZJDKPZsUr9NjDzslPPuL47qh3h0CA9c0KzkgdR3goIb0CDg9TTYEhUNgDGC7PG DzBeM3DssAmaSSGEJN8uWLFP1wfJajKVxTBYao91Gtm9ne292tTJ1YyVNl7WtQfHPtrn VPEGuezETwOnofCwBINp/uOmSPO9ujfYJyqaZhIQtLEKFFvlyvyeKGKWKGV15JJoOO6s FjV87So42c8aOd6INkV+H2Aqe5RGsYi83xGHBt0HWVDk1XqkZK/fLC5UrkxKdgX1fLmv eqSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722750025; x=1723354825; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=F5mt80rOA9qN8jWsdvy84Xdf9Lmua8radXA2BhT4YbQ=; b=ADtg+RzfnKw0BjfuheKcp7qGk03n9fLgAIl9965l8BzyWyY+RApe0dbm3kNloWpzCs 9zSISrG6aeHWK52O7ouwrlliDWSyibvGyUhwGAG1WqgFJ6z/IguBg4rhbYQiyZoshPHR Vg4OJXXB7zGtwPAxIxBqu3BWrXlBwbcwv5FB8Ye/sFm2uYb7yYWe1n29w3nQO7/UXLtr pOLEnX0jkLbu2gxOVg752A3Av6k09//DWUDpaPXIH+iqriB1+cO5/0lElorihbcUBIxN dV5zi8ZpWCuAc+GlOu6JyHZfvo6gXTmcU+jZmr6TPK2Uc5mb990RGvL5a6EU7YtPLLz6 ISyg== X-Forwarded-Encrypted: i=1; AJvYcCU/kwgZuT2bK5AXvpEtRbfkzqZXCiYeFeLJV7Pqqg8ZO2EjFpRZ2Ny4Po4iJ/6dCzHww7yIZKOwzb2Uw7t0jzww41Gz/64re/FQ X-Gm-Message-State: AOJu0YyDJXh2zox6fY1nFM9LxtOat0qWE8oRQVqJjw3EqfR40xXjR/by fZC9YEID1GZsKCtMt1aYkpZ1x0r/Pvu9NEDauHxuDiioRkmeAZXuQea+4zZYPKM= X-Google-Smtp-Source: AGHT+IFcXcCjeK+kirr9HxHNSNYgUwoTUFv8rKvg+BBRx9kFrveQa6yajGPUP6ydfDNRdEA9/ap3lQ== X-Received: by 2002:a17:907:3f0c:b0:a77:eb34:3b4d with SMTP id a640c23a62f3a-a7dc4db8ba5mr615532466b.13.1722750024706; Sat, 03 Aug 2024 22:40:24 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7dc9bc3bd7sm292248466b.34.2024.08.03.22.40.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Aug 2024 22:40:24 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 04 Aug 2024 08:40:08 +0300 Subject: [PATCH 04/11] interconnect: qcom: sm8350: drop DISP nodes Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240804-sm8350-fixes-v1-4-1149dd8399fe@linaro.org> References: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> In-Reply-To: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Jonathan Marek , Robert Foss , Vinod Koul , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mike Tipton , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Dmitry Baryshkov X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=7265; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=tcJ7LQ1yfUyMvLJV6hSYPEPDWM/piu7AD4k8+F7Xn8M=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmrxQ+ycn2GSCazqz66VoIUtMr5Q536pilX24Rk FCuX2JYrTyJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZq8UPgAKCRCLPIo+Aiko 1U+mCACCX8GXfbbnShUSyy2kUZweMQ3X+zXZnp1j4Y19+e8ylvhlxJJkWdiTinLXXILjm81rmzH NTE019I3z/wpfIyt29BJZ4GTnZhCgwH0AemWgRpIng9WbpST14WHHPeJEhSMx7+Mg1WfBLobiGv 4kUa9oHRT7XEFPGPEP7Oyf5vOkilJZXSgHx04kBgAh+u4UhlXzLfHZuhgE64WHIepBb9/XFE/AI Y0nlAhwYY6l18Ha3/GIxdt54kwf0+jaIvei7zvg895bwWmvvieBkZzr7Klxrf0Jv3D9mzId5tEW KB+wOX/I0cC4qTmC79KjzpoBLPnmjpJPNd6o6lGpPIhUphuG X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The msm-5.x kernels have additional display RSC and separate display BCM voter. Since upstream kernel doesn't yet provide display RSC, we end up duplicating several nodes, which can result in incorrect votes being cast. Drop *_DISP nodes. Fixes: d26a56674497 ("interconnect: qcom: Add SM8350 interconnect provider driver") Signed-off-by: Dmitry Baryshkov --- drivers/interconnect/qcom/sm8350.c | 154 ------------------------------------- drivers/interconnect/qcom/sm8350.h | 10 --- 2 files changed, 164 deletions(-) diff --git a/drivers/interconnect/qcom/sm8350.c b/drivers/interconnect/qcom/sm8350.c index b321c3009acb..108934fc8ebf 100644 --- a/drivers/interconnect/qcom/sm8350.c +++ b/drivers/interconnect/qcom/sm8350.c @@ -628,60 +628,6 @@ static struct qcom_icc_node xm_gic = { .links = { SM8350_SLAVE_SNOC_GEM_NOC_GC }, }; -static struct qcom_icc_node qnm_mnoc_hf_disp = { - .name = "qnm_mnoc_hf_disp", - .id = SM8350_MASTER_MNOC_HF_MEM_NOC_DISP, - .channels = 2, - .buswidth = 32, - .num_links = 1, - .links = { SM8350_SLAVE_LLCC_DISP }, -}; - -static struct qcom_icc_node qnm_mnoc_sf_disp = { - .name = "qnm_mnoc_sf_disp", - .id = SM8350_MASTER_MNOC_SF_MEM_NOC_DISP, - .channels = 2, - .buswidth = 32, - .num_links = 1, - .links = { SM8350_SLAVE_LLCC_DISP }, -}; - -static struct qcom_icc_node llcc_mc_disp = { - .name = "llcc_mc_disp", - .id = SM8350_MASTER_LLCC_DISP, - .channels = 4, - .buswidth = 4, - .num_links = 1, - .links = { SM8350_SLAVE_EBI1_DISP }, -}; - -static struct qcom_icc_node qxm_mdp0_disp = { - .name = "qxm_mdp0_disp", - .id = SM8350_MASTER_MDP0_DISP, - .channels = 1, - .buswidth = 32, - .num_links = 1, - .links = { SM8350_SLAVE_MNOC_HF_MEM_NOC_DISP }, -}; - -static struct qcom_icc_node qxm_mdp1_disp = { - .name = "qxm_mdp1_disp", - .id = SM8350_MASTER_MDP1_DISP, - .channels = 1, - .buswidth = 32, - .num_links = 1, - .links = { SM8350_SLAVE_MNOC_HF_MEM_NOC_DISP }, -}; - -static struct qcom_icc_node qxm_rot_disp = { - .name = "qxm_rot_disp", - .id = SM8350_MASTER_ROTATOR_DISP, - .channels = 1, - .buswidth = 32, - .num_links = 1, - .links = { SM8350_SLAVE_MNOC_SF_MEM_NOC_DISP }, -}; - static struct qcom_icc_node qns_a1noc_snoc = { .name = "qns_a1noc_snoc", .id = SM8350_SLAVE_A1NOC_SNOC, @@ -1320,40 +1266,6 @@ static struct qcom_icc_node srvc_snoc = { .buswidth = 4, }; -static struct qcom_icc_node qns_llcc_disp = { - .name = "qns_llcc_disp", - .id = SM8350_SLAVE_LLCC_DISP, - .channels = 4, - .buswidth = 16, - .num_links = 1, - .links = { SM8350_MASTER_LLCC_DISP }, -}; - -static struct qcom_icc_node ebi_disp = { - .name = "ebi_disp", - .id = SM8350_SLAVE_EBI1_DISP, - .channels = 4, - .buswidth = 4, -}; - -static struct qcom_icc_node qns_mem_noc_hf_disp = { - .name = "qns_mem_noc_hf_disp", - .id = SM8350_SLAVE_MNOC_HF_MEM_NOC_DISP, - .channels = 2, - .buswidth = 32, - .num_links = 1, - .links = { SM8350_MASTER_MNOC_HF_MEM_NOC_DISP }, -}; - -static struct qcom_icc_node qns_mem_noc_sf_disp = { - .name = "qns_mem_noc_sf_disp", - .id = SM8350_SLAVE_MNOC_SF_MEM_NOC_DISP, - .channels = 2, - .buswidth = 32, - .num_links = 1, - .links = { SM8350_MASTER_MNOC_SF_MEM_NOC_DISP }, -}; - static struct qcom_icc_bcm bcm_acv = { .name = "ACV", .enable_mask = BIT(3), @@ -1583,55 +1495,6 @@ static struct qcom_icc_bcm bcm_sn14 = { .nodes = { &qns_pcie_mem_noc }, }; -static struct qcom_icc_bcm bcm_acv_disp = { - .name = "ACV", - .keepalive = false, - .num_nodes = 1, - .nodes = { &ebi_disp }, -}; - -static struct qcom_icc_bcm bcm_mc0_disp = { - .name = "MC0", - .keepalive = false, - .num_nodes = 1, - .nodes = { &ebi_disp }, -}; - -static struct qcom_icc_bcm bcm_mm0_disp = { - .name = "MM0", - .keepalive = false, - .num_nodes = 1, - .nodes = { &qns_mem_noc_hf_disp }, -}; - -static struct qcom_icc_bcm bcm_mm1_disp = { - .name = "MM1", - .keepalive = false, - .num_nodes = 2, - .nodes = { &qxm_mdp0_disp, &qxm_mdp1_disp }, -}; - -static struct qcom_icc_bcm bcm_mm4_disp = { - .name = "MM4", - .keepalive = false, - .num_nodes = 1, - .nodes = { &qns_mem_noc_sf_disp }, -}; - -static struct qcom_icc_bcm bcm_mm5_disp = { - .name = "MM5", - .keepalive = false, - .num_nodes = 1, - .nodes = { &qxm_rot_disp }, -}; - -static struct qcom_icc_bcm bcm_sh0_disp = { - .name = "SH0", - .keepalive = false, - .num_nodes = 1, - .nodes = { &qns_llcc_disp }, -}; - static struct qcom_icc_bcm * const aggre1_noc_bcms[] = { }; @@ -1785,7 +1648,6 @@ static struct qcom_icc_bcm * const gem_noc_bcms[] = { &bcm_sh2, &bcm_sh3, &bcm_sh4, - &bcm_sh0_disp, }; static struct qcom_icc_node * const gem_noc_nodes[] = { @@ -1808,9 +1670,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = { [SLAVE_SERVICE_GEM_NOC_1] = &srvc_even_gemnoc, [SLAVE_SERVICE_GEM_NOC_2] = &srvc_odd_gemnoc, [SLAVE_SERVICE_GEM_NOC] = &srvc_sys_gemnoc, - [MASTER_MNOC_HF_MEM_NOC_DISP] = &qnm_mnoc_hf_disp, - [MASTER_MNOC_SF_MEM_NOC_DISP] = &qnm_mnoc_sf_disp, - [SLAVE_LLCC_DISP] = &qns_llcc_disp, }; static const struct qcom_icc_desc sm8350_gem_noc = { @@ -1843,15 +1702,11 @@ static const struct qcom_icc_desc sm8350_lpass_ag_noc = { static struct qcom_icc_bcm * const mc_virt_bcms[] = { &bcm_acv, &bcm_mc0, - &bcm_acv_disp, - &bcm_mc0_disp, }; static struct qcom_icc_node * const mc_virt_nodes[] = { [MASTER_LLCC] = &llcc_mc, [SLAVE_EBI1] = &ebi, - [MASTER_LLCC_DISP] = &llcc_mc_disp, - [SLAVE_EBI1_DISP] = &ebi_disp, }; static const struct qcom_icc_desc sm8350_mc_virt = { @@ -1866,10 +1721,6 @@ static struct qcom_icc_bcm * const mmss_noc_bcms[] = { &bcm_mm1, &bcm_mm4, &bcm_mm5, - &bcm_mm0_disp, - &bcm_mm1_disp, - &bcm_mm4_disp, - &bcm_mm5_disp, }; static struct qcom_icc_node * const mmss_noc_nodes[] = { @@ -1886,11 +1737,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = { [SLAVE_MNOC_HF_MEM_NOC] = &qns_mem_noc_hf, [SLAVE_MNOC_SF_MEM_NOC] = &qns_mem_noc_sf, [SLAVE_SERVICE_MNOC] = &srvc_mnoc, - [MASTER_MDP0_DISP] = &qxm_mdp0_disp, - [MASTER_MDP1_DISP] = &qxm_mdp1_disp, - [MASTER_ROTATOR_DISP] = &qxm_rot_disp, - [SLAVE_MNOC_HF_MEM_NOC_DISP] = &qns_mem_noc_hf_disp, - [SLAVE_MNOC_SF_MEM_NOC_DISP] = &qns_mem_noc_sf_disp, }; static const struct qcom_icc_desc sm8350_mmss_noc = { diff --git a/drivers/interconnect/qcom/sm8350.h b/drivers/interconnect/qcom/sm8350.h index 328d15238a0d..074c6131ab36 100644 --- a/drivers/interconnect/qcom/sm8350.h +++ b/drivers/interconnect/qcom/sm8350.h @@ -154,15 +154,5 @@ #define SM8350_SLAVE_PCIE_1 143 #define SM8350_SLAVE_QDSS_STM 144 #define SM8350_SLAVE_TCU 145 -#define SM8350_MASTER_LLCC_DISP 146 -#define SM8350_MASTER_MNOC_HF_MEM_NOC_DISP 147 -#define SM8350_MASTER_MNOC_SF_MEM_NOC_DISP 148 -#define SM8350_MASTER_MDP0_DISP 149 -#define SM8350_MASTER_MDP1_DISP 150 -#define SM8350_MASTER_ROTATOR_DISP 151 -#define SM8350_SLAVE_EBI1_DISP 152 -#define SM8350_SLAVE_LLCC_DISP 153 -#define SM8350_SLAVE_MNOC_HF_MEM_NOC_DISP 154 -#define SM8350_SLAVE_MNOC_SF_MEM_NOC_DISP 155 #endif From patchwork Sun Aug 4 05:40:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13752462 Received: from mail-ej1-f54.google.com (mail-ej1-f54.google.com [209.85.218.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EDCB91CD39 for ; Sun, 4 Aug 2024 05:40:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750030; cv=none; b=dgMo61vRX5hcKcozbbuNSj/MBGdciTw7DrfC8v4gurFCfU208rhhqpUZFKtJP0HEHuErcvLKUEvStW9IXGnUaPKk6/+yc5AIYx7bdJFF3/zWCVSENQUEfEfvp2lYrXYBVSM34d29Fi5Us1JQ8dTCb4q+oh/qg+HztY4hv7jQd+w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750030; c=relaxed/simple; bh=V2ZoMG0XQ7V5BO7EN50H81+c0HsVA7ayIuEkYqIPZQc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=s88RNAU1rBT1tePzf6yjUc6B/HYWqtNtEmNvaAS0j3P9YqQBVrWZluaJvimJnHk+oWY6HX9NDFVJpPqGKcUrCwAsvqOVK60QczF0JsOo2/QS7W83Tyn/LAjPY5/sXsBgovPeDjBRtQ4cBuB61bEATyj1ePT4OnpbRpn0uskWb8w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=AoYMb2ir; arc=none smtp.client-ip=209.85.218.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="AoYMb2ir" Received: by mail-ej1-f54.google.com with SMTP id a640c23a62f3a-a7a9a7af0d0so1197419066b.3 for ; Sat, 03 Aug 2024 22:40:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1722750026; x=1723354826; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=TiZnALWAQxF8iYVD1tb/bB08Yu0cJ6IHSObEO/DdoVE=; b=AoYMb2irAMhRg3m4uOr7m1NinecoTGoujn2f9YTIwscdvwbWohvM30VoS3YopBdzmy lHwG1WOa8HpLhm0dv+Z7iPqZmVvSd2BL7wXpe5i759bKgMcQEk+bKKBqTene8+kXRfhN HNKYyopmf6qlXYTOUY8kKiHE734OuZqSORAm/L+LKum00Sn4nRIKx2h8QGwJ2CzV79Kd 1kQQ5pL293Ir6xU2dbL0Ei1evt0JsPdxfcOl7X4nT8fZD5vdPwEKLpaJldIyDpnjyhYo 5iFEvjaX6Wdt4XAhxVWJra5x5k7UVbH2a5XhXKCbJcinbE7RKK0FKLrm2uytD4Pf6C6O iGyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722750026; x=1723354826; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=TiZnALWAQxF8iYVD1tb/bB08Yu0cJ6IHSObEO/DdoVE=; b=OOjoUhnztyxh3IVIuYUAR7tPVi/Rmm7i7Q43DQMakK+YR4lQl2dOAQxhkgXqfi/Te5 SI9AYHc7sNBfmOFgfQEUSOis4o7obNKcwwy93IpR8+xh2xuAPJ/oVm7RzVmflhogYy0c EROTQNTaN3/RkWG+pnrEJQAfuZ/vPUXwXVvkq/vjLFo0G7q4fQ88L7MzaAr/FwNt7nTS PbEDzpFt3efedDXSjvFOycwRHs6gWOSTiw5c7rbBLT1G4fI/Nzw92YoG/HHGv7usioOf 4kVvS4s8YD0s7GOyqod5deSCWVMbmYAV2fb5vI2fZ8OF7aGvFhLsY9SgNhVneaLm9Vt/ YEpA== X-Forwarded-Encrypted: i=1; AJvYcCWQvu9j850ntBrgVi7GL3PvSwN3oM2W8VDsCp9lkk6IxMS860CaNmoG7CDjUjVx69axypVLyxpvX3/MC6IVqQCih+/V/Q9XfOUI X-Gm-Message-State: AOJu0YwHbSE8dM7I0oTxcD3+rDApqM503mIur15tKijA0vzRIauCMhUV XCnGe1ZSEJYfx1z2iXjm+ydtjRkFLjdQwWgmoPfR3p+cka/K1iZpVIKlIggFqCA= X-Google-Smtp-Source: AGHT+IFvfS/OgcbVrrYsEWO4JXW+fzZSh1xCZ71TmWnyRNpi6mH/DWeqN076lOEnJTaUEwR4OV6ixQ== X-Received: by 2002:a17:907:3f8b:b0:a7a:9954:1fc1 with SMTP id a640c23a62f3a-a7dc4ea981cmr559390966b.24.1722750026376; Sat, 03 Aug 2024 22:40:26 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7dc9bc3bd7sm292248466b.34.2024.08.03.22.40.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Aug 2024 22:40:26 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 04 Aug 2024 08:40:09 +0300 Subject: [PATCH 05/11] interconnect: qcom: sm8450: drop DISP nodes Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240804-sm8350-fixes-v1-5-1149dd8399fe@linaro.org> References: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> In-Reply-To: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Jonathan Marek , Robert Foss , Vinod Koul , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mike Tipton , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Dmitry Baryshkov X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=7277; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=V2ZoMG0XQ7V5BO7EN50H81+c0HsVA7ayIuEkYqIPZQc=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmrxQ+0RdFIXikZu6YJ0gSar4zzgFVTzMIkQJ4W AbO6Ud9B/mJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZq8UPgAKCRCLPIo+Aiko 1XBiB/41xzyh7/aKJoyKuLUdDakg2wC5+CZIw9wg05uFFdgtKNpXuKR2fY0/e9o/w1APgDN3pKK Joy9zkuMNGqg5nu9Hwoce1pry//4nj19uSs7lVp9GCtzTLA8xVA4KYRYGUMUExTgwpWeHIu+CMr z0p5MoNFZGtImsz7X1zv3vhnQhPP85zy7Y3hmgi6pj5GWghhwJHyFUo9guUSRro6gK0PnKc924Q uTZedEc6w7NmZc+bXnTlMXQe8royY5p6qpgymADstzag3KAuWss/Sbg2rSLLQrj63wpe6eAB31g 4QWxMDrqDHnhPERb+X9jbFLk8t7jFvAub6aP9Z0Te/tyCWPl X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The msm-5.x kernels have additional display RSC and separate display BCM voter. Since upstream kernel doesn't yet provide display RSC, we end up duplicating several nodes, which can result in incorrect votes being cast. Drop *_DISP nodes. Fixes: fafc114a468e ("interconnect: qcom: Add SM8450 interconnect provider driver") Signed-off-by: Dmitry Baryshkov --- drivers/interconnect/qcom/sm8450.c | 145 ------------------------------------- drivers/interconnect/qcom/sm8450.h | 12 --- 2 files changed, 157 deletions(-) diff --git a/drivers/interconnect/qcom/sm8450.c b/drivers/interconnect/qcom/sm8450.c index b3cd0087377c..1c61e606915f 100644 --- a/drivers/interconnect/qcom/sm8450.c +++ b/drivers/interconnect/qcom/sm8450.c @@ -580,60 +580,6 @@ static struct qcom_icc_node xm_gic = { .links = { SM8450_SLAVE_SNOC_GEM_NOC_GC }, }; -static struct qcom_icc_node qnm_mnoc_hf_disp = { - .name = "qnm_mnoc_hf_disp", - .id = SM8450_MASTER_MNOC_HF_MEM_NOC_DISP, - .channels = 2, - .buswidth = 32, - .num_links = 1, - .links = { SM8450_SLAVE_LLCC_DISP }, -}; - -static struct qcom_icc_node qnm_mnoc_sf_disp = { - .name = "qnm_mnoc_sf_disp", - .id = SM8450_MASTER_MNOC_SF_MEM_NOC_DISP, - .channels = 2, - .buswidth = 32, - .num_links = 1, - .links = { SM8450_SLAVE_LLCC_DISP }, -}; - -static struct qcom_icc_node qnm_pcie_disp = { - .name = "qnm_pcie_disp", - .id = SM8450_MASTER_ANOC_PCIE_GEM_NOC_DISP, - .channels = 1, - .buswidth = 16, - .num_links = 1, - .links = { SM8450_SLAVE_LLCC_DISP }, -}; - -static struct qcom_icc_node llcc_mc_disp = { - .name = "llcc_mc_disp", - .id = SM8450_MASTER_LLCC_DISP, - .channels = 4, - .buswidth = 4, - .num_links = 1, - .links = { SM8450_SLAVE_EBI1_DISP }, -}; - -static struct qcom_icc_node qnm_mdp_disp = { - .name = "qnm_mdp_disp", - .id = SM8450_MASTER_MDP_DISP, - .channels = 2, - .buswidth = 32, - .num_links = 1, - .links = { SM8450_SLAVE_MNOC_HF_MEM_NOC_DISP }, -}; - -static struct qcom_icc_node qnm_rot_disp = { - .name = "qnm_rot_disp", - .id = SM8450_MASTER_ROTATOR_DISP, - .channels = 1, - .buswidth = 32, - .num_links = 1, - .links = { SM8450_SLAVE_MNOC_SF_MEM_NOC_DISP }, -}; - static struct qcom_icc_node qns_a1noc_snoc = { .name = "qns_a1noc_snoc", .id = SM8450_SLAVE_A1NOC_SNOC, @@ -1302,41 +1248,6 @@ static struct qcom_icc_node srvc_snoc = { .num_links = 0, }; -static struct qcom_icc_node qns_llcc_disp = { - .name = "qns_llcc_disp", - .id = SM8450_SLAVE_LLCC_DISP, - .channels = 4, - .buswidth = 16, - .num_links = 1, - .links = { SM8450_MASTER_LLCC_DISP }, -}; - -static struct qcom_icc_node ebi_disp = { - .name = "ebi_disp", - .id = SM8450_SLAVE_EBI1_DISP, - .channels = 4, - .buswidth = 4, - .num_links = 0, -}; - -static struct qcom_icc_node qns_mem_noc_hf_disp = { - .name = "qns_mem_noc_hf_disp", - .id = SM8450_SLAVE_MNOC_HF_MEM_NOC_DISP, - .channels = 2, - .buswidth = 32, - .num_links = 1, - .links = { SM8450_MASTER_MNOC_HF_MEM_NOC_DISP }, -}; - -static struct qcom_icc_node qns_mem_noc_sf_disp = { - .name = "qns_mem_noc_sf_disp", - .id = SM8450_SLAVE_MNOC_SF_MEM_NOC_DISP, - .channels = 2, - .buswidth = 32, - .num_links = 1, - .links = { SM8450_MASTER_MNOC_SF_MEM_NOC_DISP }, -}; - static struct qcom_icc_bcm bcm_acv = { .name = "ACV", .enable_mask = 0x8, @@ -1498,46 +1409,6 @@ static struct qcom_icc_bcm bcm_sn7 = { .nodes = { &qns_pcie_mem_noc }, }; -static struct qcom_icc_bcm bcm_acv_disp = { - .name = "ACV", - .enable_mask = 0x1, - .num_nodes = 1, - .nodes = { &ebi_disp }, -}; - -static struct qcom_icc_bcm bcm_mc0_disp = { - .name = "MC0", - .num_nodes = 1, - .nodes = { &ebi_disp }, -}; - -static struct qcom_icc_bcm bcm_mm0_disp = { - .name = "MM0", - .num_nodes = 1, - .nodes = { &qns_mem_noc_hf_disp }, -}; - -static struct qcom_icc_bcm bcm_mm1_disp = { - .name = "MM1", - .enable_mask = 0x1, - .num_nodes = 3, - .nodes = { &qnm_mdp_disp, &qnm_rot_disp, - &qns_mem_noc_sf_disp }, -}; - -static struct qcom_icc_bcm bcm_sh0_disp = { - .name = "SH0", - .num_nodes = 1, - .nodes = { &qns_llcc_disp }, -}; - -static struct qcom_icc_bcm bcm_sh1_disp = { - .name = "SH1", - .enable_mask = 0x1, - .num_nodes = 1, - .nodes = { &qnm_pcie_disp }, -}; - static struct qcom_icc_bcm * const aggre1_noc_bcms[] = { }; @@ -1680,8 +1551,6 @@ static const struct qcom_icc_desc sm8450_config_noc = { static struct qcom_icc_bcm * const gem_noc_bcms[] = { &bcm_sh0, &bcm_sh1, - &bcm_sh0_disp, - &bcm_sh1_disp, }; static struct qcom_icc_node * const gem_noc_nodes[] = { @@ -1699,10 +1568,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = { [SLAVE_GEM_NOC_CNOC] = &qns_gem_noc_cnoc, [SLAVE_LLCC] = &qns_llcc, [SLAVE_MEM_NOC_PCIE_SNOC] = &qns_pcie, - [MASTER_MNOC_HF_MEM_NOC_DISP] = &qnm_mnoc_hf_disp, - [MASTER_MNOC_SF_MEM_NOC_DISP] = &qnm_mnoc_sf_disp, - [MASTER_ANOC_PCIE_GEM_NOC_DISP] = &qnm_pcie_disp, - [SLAVE_LLCC_DISP] = &qns_llcc_disp, }; static const struct qcom_icc_desc sm8450_gem_noc = { @@ -1737,15 +1602,11 @@ static const struct qcom_icc_desc sm8450_lpass_ag_noc = { static struct qcom_icc_bcm * const mc_virt_bcms[] = { &bcm_acv, &bcm_mc0, - &bcm_acv_disp, - &bcm_mc0_disp, }; static struct qcom_icc_node * const mc_virt_nodes[] = { [MASTER_LLCC] = &llcc_mc, [SLAVE_EBI1] = &ebi, - [MASTER_LLCC_DISP] = &llcc_mc_disp, - [SLAVE_EBI1_DISP] = &ebi_disp, }; static const struct qcom_icc_desc sm8450_mc_virt = { @@ -1758,8 +1619,6 @@ static const struct qcom_icc_desc sm8450_mc_virt = { static struct qcom_icc_bcm * const mmss_noc_bcms[] = { &bcm_mm0, &bcm_mm1, - &bcm_mm0_disp, - &bcm_mm1_disp, }; static struct qcom_icc_node * const mmss_noc_nodes[] = { @@ -1777,10 +1636,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = { [SLAVE_MNOC_HF_MEM_NOC] = &qns_mem_noc_hf, [SLAVE_MNOC_SF_MEM_NOC] = &qns_mem_noc_sf, [SLAVE_SERVICE_MNOC] = &srvc_mnoc, - [MASTER_MDP_DISP] = &qnm_mdp_disp, - [MASTER_ROTATOR_DISP] = &qnm_rot_disp, - [SLAVE_MNOC_HF_MEM_NOC_DISP] = &qns_mem_noc_hf_disp, - [SLAVE_MNOC_SF_MEM_NOC_DISP] = &qns_mem_noc_sf_disp, }; static const struct qcom_icc_desc sm8450_mmss_noc = { diff --git a/drivers/interconnect/qcom/sm8450.h b/drivers/interconnect/qcom/sm8450.h index a5790ec6767b..e1e91ed3f77e 100644 --- a/drivers/interconnect/qcom/sm8450.h +++ b/drivers/interconnect/qcom/sm8450.h @@ -153,17 +153,5 @@ #define SM8450_SLAVE_PCIE_1 590 #define SM8450_SLAVE_QDSS_STM 591 #define SM8450_SLAVE_TCU 592 -#define SM8450_MASTER_LLCC_DISP 1000 -#define SM8450_MASTER_MDP_DISP 1001 -#define SM8450_MASTER_MDP0_DISP SM8450_MASTER_MDP_DISP -#define SM8450_MASTER_MDP1_DISP SM8450_MASTER_MDP_DISP -#define SM8450_MASTER_MNOC_HF_MEM_NOC_DISP 1002 -#define SM8450_MASTER_MNOC_SF_MEM_NOC_DISP 1003 -#define SM8450_MASTER_ANOC_PCIE_GEM_NOC_DISP 1004 -#define SM8450_MASTER_ROTATOR_DISP 1005 -#define SM8450_SLAVE_EBI1_DISP 1512 -#define SM8450_SLAVE_LLCC_DISP 1513 -#define SM8450_SLAVE_MNOC_HF_MEM_NOC_DISP 1514 -#define SM8450_SLAVE_MNOC_SF_MEM_NOC_DISP 1515 #endif From patchwork Sun Aug 4 05:40:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13752463 Received: from mail-lj1-f169.google.com (mail-lj1-f169.google.com [209.85.208.169]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 097871CD15 for ; Sun, 4 Aug 2024 05:40:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.169 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750031; cv=none; b=SGNe6/G9AUi5ZPly/TGexG+cbrTnxtaARcZGSNR36I7bwd9XXaB8XG73lSNB5vM2JMvGfYPbPYVp+7mPWd4uP38mI6Wx4z9oMeKe+GIzr/BQEPHXAmWjCuR53xbn9A/oziKJzi5/EsxGH8HitnwlabPPTGRb0Du9CXy8fyEKpM0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750031; c=relaxed/simple; bh=6M151A/97deCg4Tzy6kbdcdNo2uWiEunw9WlWKXXE4A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RYiFVarAhk50f+gAC1DLCMBh3/K0K1S4D0PpMOLoWKY87vtoV6hw7QrzwUZ+Ggzvj5xwe+POV1zsW7vHkSzs/uVs4I16sdjXl6PnIBouziWXzsC1mGvSevLAL5MGBvpiArT4A+H6ZCnBL5aeX5FqYThGBxj9SxFHNU1rjlp2JP4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=EaaUbXZP; arc=none smtp.client-ip=209.85.208.169 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="EaaUbXZP" Received: by mail-lj1-f169.google.com with SMTP id 38308e7fff4ca-2eeb1ba040aso148031231fa.1 for ; Sat, 03 Aug 2024 22:40:29 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1722750028; x=1723354828; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=D/cm1jjd1/iMw8x+MPa4aHpCJxIMLcu4Yu6VZJrkd+4=; b=EaaUbXZPMZBJsut7Ji/ZgKF66ShKG1B01Hy1HPgZiaR9u454YJRQTlX9cUlGlxloOo 0ZuU6Q5JgKvBtExl90n/YZii9YMLkzKvNLAdd44Ck4TRVNV+3Rm32EeyswUmu0/fOEPq edYCrXtFHgj/NdmYp+vWKvQlTwdsN8IS+htrxZs7nleA6MLPEh2cps3d0PxRUgoWtcKZ DojXAFsMzVnqYGgXCEuADUjE5qhDwjFmqkiyDpROxamitAMujcjPNFWgp4SY30F6k2Qh 5q+17f6D/bzgWWBq15q2aNxtSosS5LlpTak6B8iwNSx+F9Aux6Eq+TXYnG9rsLqlxh19 fHFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722750028; x=1723354828; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=D/cm1jjd1/iMw8x+MPa4aHpCJxIMLcu4Yu6VZJrkd+4=; b=PvhHTN8trYDnz0ky5EWwGSU+ti2U/WqHUiboCuDLQ/Au7HrJNYQTngZojehyIN74P4 DIoP4Zy62uKqXDca8SPB8dqm7t6kueL3jN8ozTNjyOpg12UdXGFfvHMvzpcc73vSJDGU sB294GNtZuZ5HRb/6jePwcVk2omUr95gEVwAjnVtYgUrk+5rOqCqQ+b6LTKhYA01Hwfb SPiXyNk4R21ouisCtJS/GZJjKgzx8AAi6zL435JEf8YA/nqv1lGd1wBZHQk9GNkP5f1n z0H9rhvASUtnYGZrzphbVQxSdBbzTsGWCwJ0tounp55Phore8eV89jc0pcNHM2D7WeHR lI1A== X-Forwarded-Encrypted: i=1; AJvYcCU3BMi3aAanElZv3RRIMytuxm4Slq1CqZYXThXoHda0g79DatWWQbv0lHHyvW4Dvkbm52uIWdDmxSF74splkTpd2MPw/5iX5PXL X-Gm-Message-State: AOJu0YwhsR1RW+BWEpYXM2sVd2eOXWfFf+LNljuzFVf9d0XSLe0/XpLZ 5lnHFlOqO5Cr26itFDTmuRQPiLWzh45X1vQO/dcxPiV20JdYw7jNg3qQf2w4x5I= X-Google-Smtp-Source: AGHT+IE6GCHKaYeu075bskYasZyEb1ipCnNJJfXpONn3eXOF68PSgyACnVQniJRme2MpKU/LdTcexg== X-Received: by 2002:a05:6512:eaa:b0:52e:be1f:bf8b with SMTP id 2adb3069b0e04-530bb3d42b1mr5422436e87.47.1722750028079; Sat, 03 Aug 2024 22:40:28 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7dc9bc3bd7sm292248466b.34.2024.08.03.22.40.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Aug 2024 22:40:27 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 04 Aug 2024 08:40:10 +0300 Subject: [PATCH 06/11] dt-bindings: interconnect: qcom,sm8350: drop DISP nodes Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240804-sm8350-fixes-v1-6-1149dd8399fe@linaro.org> References: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> In-Reply-To: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Jonathan Marek , Robert Foss , Vinod Koul , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mike Tipton , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Dmitry Baryshkov X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1599; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=6M151A/97deCg4Tzy6kbdcdNo2uWiEunw9WlWKXXE4A=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmrxQ/a5ai99IBr5oLB8ihNDDVEDnC6eztQD2HB FkuS5H6ISyJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZq8UPwAKCRCLPIo+Aiko 1ViwB/9juYoqen35TB+9r5HLnBBlnG536bV8RJOZZNMkwuu/waZjRhGhQ2VDNJczXk5zaGvPOvG drisN5/S9gg+LmPxTOxmaCZv1CQWFlrokspmyhOPC+aAksf2Qo2dmfMbTMsGQDYVBKrWtiCsame 0gWlHLYx878V+EPtrF/d0XvSJznPWW74EKe90xRKbd5McrDXSsEwIhimLUZH/ZbhbZ+E+LmbGdB MagDA5tAYUGDxowGRVXnmmW87XayUf1XbWy6FJqt0XyWJJjHVm6R6ZISzAKPHVNF/95idOh10ON v68ACSaDApfvmxV2mBKHgVWLDfKCncRi2s4pDsve1YZjiwDV X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Vendor msm-5.x kernels declared duplicate indices for some of display nodes to be used by separate display RSC and BCM voters. As it is not clear how this separate BCM should be modelled upstream and the device trees do not use these indices, drop them for now. Signed-off-by: Dmitry Baryshkov Acked-by: Krzysztof Kozlowski --- include/dt-bindings/interconnect/qcom,sm8350.h | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/include/dt-bindings/interconnect/qcom,sm8350.h b/include/dt-bindings/interconnect/qcom,sm8350.h index c7f7ed315aeb..2282f93607bc 100644 --- a/include/dt-bindings/interconnect/qcom,sm8350.h +++ b/include/dt-bindings/interconnect/qcom,sm8350.h @@ -119,9 +119,6 @@ #define SLAVE_SERVICE_GEM_NOC_1 16 #define SLAVE_SERVICE_GEM_NOC_2 17 #define SLAVE_SERVICE_GEM_NOC 18 -#define MASTER_MNOC_HF_MEM_NOC_DISP 19 -#define MASTER_MNOC_SF_MEM_NOC_DISP 20 -#define SLAVE_LLCC_DISP 21 #define MASTER_CNOC_LPASS_AG_NOC 0 #define SLAVE_LPASS_CORE_CFG 1 @@ -133,8 +130,6 @@ #define MASTER_LLCC 0 #define SLAVE_EBI1 1 -#define MASTER_LLCC_DISP 2 -#define SLAVE_EBI1_DISP 3 #define MASTER_CAMNOC_HF 0 #define MASTER_CAMNOC_ICP 1 @@ -149,11 +144,6 @@ #define SLAVE_MNOC_HF_MEM_NOC 10 #define SLAVE_MNOC_SF_MEM_NOC 11 #define SLAVE_SERVICE_MNOC 12 -#define MASTER_MDP0_DISP 13 -#define MASTER_MDP1_DISP 14 -#define MASTER_ROTATOR_DISP 15 -#define SLAVE_MNOC_HF_MEM_NOC_DISP 16 -#define SLAVE_MNOC_SF_MEM_NOC_DISP 17 #define MASTER_CDSP_NOC_CFG 0 #define MASTER_CDSP_PROC 1 From patchwork Sun Aug 4 05:40:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13752464 Received: from mail-lf1-f42.google.com (mail-lf1-f42.google.com [209.85.167.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A054125624 for ; Sun, 4 Aug 2024 05:40:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.42 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750033; cv=none; b=Cny+DnGlV4Rk6/4/yEuv7MUI88Z8cpzBmmXWrL14F3HcCZVG/OdoTE/sWmzsZGk6DBlBsCZqiLnGzhm1brTrpBdedhOsIobabCMx76DjfKxGktLf6vx3QpOwkgmmEwmrRq9o698xfa9QetuVYXqal4aXDjtDzL8RuoH3NG3P4CU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750033; c=relaxed/simple; bh=HqA05YSLsUf+ulIvMnFT+oPDyD4eqTz55YVfBO0RMbk=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=abO5DOX8AtiPjuocsNDS5IUxab9goJQrhQjie7EDSPUpX3Id811CYorFFAldpFzl78fGPt3tyxc1XX7XBh8LurZm5z+VytUBVy/phqPS5ge7iLjzpzXgxMzGRNUL5+sXT/5gF8Sp10zT2K3Fvw2cXeIGhG9AmOvWcPBaZ3Dxtkk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=oLaVfb7R; arc=none smtp.client-ip=209.85.167.42 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="oLaVfb7R" Received: by mail-lf1-f42.google.com with SMTP id 2adb3069b0e04-52ef95ec938so11119491e87.3 for ; Sat, 03 Aug 2024 22:40:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1722750030; x=1723354830; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=kh5Pprq/CtcmFsRRpKtCskri/dUUv13iwNLegjB0jwk=; b=oLaVfb7RUWf6YQDPmxL6eUc+dnE1hZoZpmxqia8YkcdYS83ukL0wVflKo7uk3XyGIX jkDggZeVQ6YQ8Rq/7i2pvwdDlkLjZae+qP14hTxJqU0UhNx6giLEHJm87+bI0kukaHD9 l3k2jnBF8mUubFeAUmZikjYWzV25F7XJ1SABOV2MhizX3fMb2mbY0Bldpp2hle8XKTgw NQ+kj5A8Tzr7M2DYe1oE/69T7kc69LQjmAlMlGWFjK+2ckHcDL5dDQnw7vlqyPWxr9RS tE/JGl6swQVPAOkxwhKEqol1MyVye1vumteq6+prwuMwK/5oqycUilFb/hsSoFcLu4rK Cfxw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722750030; x=1723354830; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kh5Pprq/CtcmFsRRpKtCskri/dUUv13iwNLegjB0jwk=; b=MbSyIzPfYIZGKf1ynGLoHkzqnRH7OaYVgp+VLFB/SOKTA5TsZlfNYfuxrF9BK2OwrT ap1zwCmv4qn9F5GW1URJbMih4nXiABVmKJ0m7x6N3tLHd1qzIOurLer3/L0aw32YMVpX Wyj/fisZFCdcrcIOzkZCMWb71h9lcDy7qKrmg0QMhX/nj2JJdzoAv9Kv/jDt4DF9JLtH /IVhl8DN/t/nkmHQOEuD0vB4Yi1XoXA/klPeTGUov3f70KkTnPga8+XRoPlbLwhF5uaJ k0pcYLbbPsd35eJ8PcV1E9H7fslfNYgmeQYS6Pa1TIXZfrgQsyk0e1oF2xoGT+0Cd1vg Umxw== X-Forwarded-Encrypted: i=1; AJvYcCUxOdrl45pQUwnKjmB0xocOeDoLoJXng3ffuvXjrCbCWYq1YYKKi2xXT3/LXD3CURCDJBcQ2XbjY+8GC+SSByINnZ4Nb6Pdja6l X-Gm-Message-State: AOJu0YwG/6TVSNjOyCpdUGGdIomzeAz5yZotnmOqIxFmxOTN3UQt8vRu UisYlYdqzcBozTcY34PoPrIWCTGczY1d3VT83bpSFVixwI1qWh+r2BHRlauqacI= X-Google-Smtp-Source: AGHT+IF/r6ICPMs1cY1y1zDA4LrgDq2W/xE+84RLh2kTzHBB0v+PBdUhnePF0ZgzMXwDr3Q0aeg8mw== X-Received: by 2002:a05:6512:3baa:b0:52c:ebd0:609 with SMTP id 2adb3069b0e04-530bb3929bcmr5449531e87.7.1722750029774; Sat, 03 Aug 2024 22:40:29 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7dc9bc3bd7sm292248466b.34.2024.08.03.22.40.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Aug 2024 22:40:29 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 04 Aug 2024 08:40:11 +0300 Subject: [PATCH 07/11] dt-bindings: interconnect: qcom,sm8450: drop DISP nodes Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240804-sm8350-fixes-v1-7-1149dd8399fe@linaro.org> References: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> In-Reply-To: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Jonathan Marek , Robert Foss , Vinod Koul , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mike Tipton , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Dmitry Baryshkov X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1618; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=HqA05YSLsUf+ulIvMnFT+oPDyD4eqTz55YVfBO0RMbk=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmrxQ/HTA5NQJ6LsRevJYj0C2Pr6D9xtPQQ+WCy eo51Z+HCpmJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZq8UPwAKCRCLPIo+Aiko 1bLBB/48GQBxTDQT00TIgC7oHJTS/6Kx4lfz8o0zy4if5ZYZmMsCSpNneZE72T5mtXQXX6inZsq mV/awunxEK11ZNIGAHAPCaiVDR830NutY8xITX682fXqYHykCguNmUebqk0KR7h17TtOg/Y/g8H H+Sgmi9L7zerOshGe+/1TSEv1ANciFemqiE1ofIQ4BLHPnHOibBUnlwG5lVSgs7s0w5nhWImrg+ JnPGJS9BBNDM2XZQJFlLJdPXYddO/qK6pZ8PG7qidYZTsEUgzRb/8dW6JnNkDaknIVDuKl1FYaY ub7CXnRYvPdnNBSrCBuL+/XQrahkCOFnPz7poUvL1Sq5NyL4 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Vendor msm-5.x kernels declared duplicate indices for some of display nodes to be used by separate display RSC and BCM voters. As it is not clear how this separate BCM should be modelled upstream and the device trees do not use these indices, drop them for now. Signed-off-by: Dmitry Baryshkov Acked-by: Krzysztof Kozlowski --- include/dt-bindings/interconnect/qcom,sm8450.h | 10 ---------- 1 file changed, 10 deletions(-) diff --git a/include/dt-bindings/interconnect/qcom,sm8450.h b/include/dt-bindings/interconnect/qcom,sm8450.h index 8f3c5e1fb4c4..1fe7839d9f13 100644 --- a/include/dt-bindings/interconnect/qcom,sm8450.h +++ b/include/dt-bindings/interconnect/qcom,sm8450.h @@ -107,10 +107,6 @@ #define SLAVE_GEM_NOC_CNOC 11 #define SLAVE_LLCC 12 #define SLAVE_MEM_NOC_PCIE_SNOC 13 -#define MASTER_MNOC_HF_MEM_NOC_DISP 14 -#define MASTER_MNOC_SF_MEM_NOC_DISP 15 -#define MASTER_ANOC_PCIE_GEM_NOC_DISP 16 -#define SLAVE_LLCC_DISP 17 #define MASTER_CNOC_LPASS_AG_NOC 0 #define MASTER_LPASS_PROC 1 @@ -124,8 +120,6 @@ #define MASTER_LLCC 0 #define SLAVE_EBI1 1 -#define MASTER_LLCC_DISP 2 -#define SLAVE_EBI1_DISP 3 #define MASTER_CAMNOC_HF 0 #define MASTER_CAMNOC_ICP 1 @@ -141,10 +135,6 @@ #define SLAVE_MNOC_HF_MEM_NOC 11 #define SLAVE_MNOC_SF_MEM_NOC 12 #define SLAVE_SERVICE_MNOC 13 -#define MASTER_MDP_DISP 14 -#define MASTER_ROTATOR_DISP 15 -#define SLAVE_MNOC_HF_MEM_NOC_DISP 16 -#define SLAVE_MNOC_SF_MEM_NOC_DISP 17 #define MASTER_CDSP_NOC_CFG 0 #define MASTER_CDSP_PROC 1 From patchwork Sun Aug 4 05:40:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13752465 Received: from mail-lf1-f41.google.com (mail-lf1-f41.google.com [209.85.167.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2E80B2C6B6 for ; Sun, 4 Aug 2024 05:40:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750035; cv=none; b=cLNNevN1Ywhl2cb2oTqcuRjgPauBDtfqTZmiOkIvm65SJkQk90KtVMcdoO94zDLh09y51vrOF6ADWMuo3A36fshW8i52LZRffdmDUJZszkZQ/0bjbgAHxIMoIS78FosM1l2h0kowTf4f2hLnqDXi91pmS+N0pRB0GaFeRP4enE0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750035; c=relaxed/simple; bh=ZI9fPJt840zyCD0T/bdD2HXJKwtHsbp4pPiV3WmPfv4=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=tqdhdCLfgRjlMVWHW12BQ5VrvuWJEwlzJ0MVO7/nMbbjdzbVhujTrA4e0oop8tV4GpTGz41B8nHRR+CvvH9QXICo3SPYqKaBQy7+602sVsx87crIegaHq5iGGTXorBcwlLPi2SDEILZwLd++vFEIXX3JXp03NClfR3kFJvic/sk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=GY4q7uPB; arc=none smtp.client-ip=209.85.167.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="GY4q7uPB" Received: by mail-lf1-f41.google.com with SMTP id 2adb3069b0e04-52efc60a6e6so14701986e87.1 for ; Sat, 03 Aug 2024 22:40:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1722750031; x=1723354831; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=I8Wu94fGKiTMPD1PzKnesNCvm5Ij4LDiKxVI9I0uyRk=; b=GY4q7uPBdDWYTU7rn8t5qP1GB/6SGbKY69kZXh4mQKhaUT+gOphxgECKRIvNX01Jmv GwQzD4gW5SU+OgM9cB5wfeXqe74vnUkkpyVKfQgQ9jqGJmv27JDXcZ/xXZ2bJuUBgxAR DD8lTxjNkETzHEv8IzZU5DklFe3lE1jWkBnbUOS9Efid7b8V+tHGT6P7J4xRQ+EamiOy K+BFzHm9xNz3bW91iO9mKfblfxuxGUBEx7E0nRo9pW41o3ofJtDK5zheD/ZkbSsk253c 0uHvbYRBnD7skEwqJggPr43k7NyyssvWgzygOiwzAnZOS/xMJBGWRBztnOXoMcyRuhZg pV6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722750031; x=1723354831; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=I8Wu94fGKiTMPD1PzKnesNCvm5Ij4LDiKxVI9I0uyRk=; b=ClgyAqccHoIsoyyVJubcOXP0JcMeZ4J7c4lAWYTKdpve+qVYUwbXWuMyU23e1EOIjv 81rIYMerp0LoB/J4O4ZlKSq+qnisEt0BTKNQFgnIATgi/56IzF8VGERBxL58bA+ASA9F ZJX67ijAA3iyyxJPwzB51dv7C6xatANV7D90jhQh2B4FV0zrLDab+dpPj3YelDdwO3kZ 2kFuYTz6NvCjSIfJob6RxKRwN5bTWZes/mqckMCsQhOom85gQxmfs947QKOCDu2d4GxO Jk5SrbtSreEBK5+2jrLW9f1pooco9z5hHj056GelP5T5yokXR5IMOMKuhfM8Jc/puYg2 ur0A== X-Forwarded-Encrypted: i=1; AJvYcCVkVoCgp4Y9C4pyxRxKjw0cG6dbgI4p1KX8K3ASbZiH9rhj9Ipix4O4D1Oe/D2ZLj4laFmlV/9UEmfQJbjlhcqBfHy9lTaeOPa3 X-Gm-Message-State: AOJu0YxZSi7onuURw6azdGRAwZllVrhRSc4IVtE4Pclz25bECUWE0w4y UrSNeICf3Y8AqLVo9hs5VFTaHZ6L0OM2eY+Kqm9A5On7EWKHrew0MlpL5IT7+yQ= X-Google-Smtp-Source: AGHT+IFfmnlD6mrDT3KruFvoon8BUGprvXegwalTaKHvGV+9P6kPPphMtaSDcjG1NUuShKFfX0CTEw== X-Received: by 2002:a05:6512:1590:b0:52c:e28f:4da6 with SMTP id 2adb3069b0e04-530bb3b1517mr4682167e87.51.1722750031400; Sat, 03 Aug 2024 22:40:31 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7dc9bc3bd7sm292248466b.34.2024.08.03.22.40.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Aug 2024 22:40:31 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 04 Aug 2024 08:40:12 +0300 Subject: [PATCH 08/11] interconnect: qcom: sm8250: Enable sync_state Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240804-sm8350-fixes-v1-8-1149dd8399fe@linaro.org> References: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> In-Reply-To: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Jonathan Marek , Robert Foss , Vinod Koul , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mike Tipton , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Dmitry Baryshkov X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=856; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=ZI9fPJt840zyCD0T/bdD2HXJKwtHsbp4pPiV3WmPfv4=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmrxQ/jMwL35sKEU5D9Tjp6mYCnOmmqoQLsUae1 0DawQf91CuJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZq8UPwAKCRCLPIo+Aiko 1Wd1CACoGYeZT9QIFHk06IumJN0/f3vOzPfA9od+eKNLVIGC6yd7rm9bCEyQzomcgGvPKr0Hxzz ppcABqc8lJWSoKS3xOJDQ8kD5vZCwVV4MGJ3acpjzTsYn0F2T6GXEp3Sj7DGftexTbNh3Z/JhBx RYS5hdWYsl6yIgSeVKkIo2KoCxvbv3NtX6o/AylXee2y6ZgOXlE90ASOPKaRg+siUF2I7SFsWvR ALaRIt8XmnvWLl2KLVShljReh+EiVuvwBXguCSYi3RqH9dFpHFgdW50ru6PZyu6FO35ucww3HlT CKHK8YPjkcXBS9TJ6g3zS4L3BiEv95HTup5R9lfaU4olHiCn X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Enable the generic icc sync_state callback to ensure interconnect votes are actually taken into account, instead of being forced to the maximum value. Fixes: b95b668eaaa2 ("interconnect: qcom: icc-rpmh: Add BCMs to commit list in pre_aggregate") Signed-off-by: Dmitry Baryshkov --- drivers/interconnect/qcom/sm8350.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/interconnect/qcom/sm8350.c b/drivers/interconnect/qcom/sm8350.c index 108934fc8ebf..4236a43dc256 100644 --- a/drivers/interconnect/qcom/sm8350.c +++ b/drivers/interconnect/qcom/sm8350.c @@ -1811,6 +1811,7 @@ static struct platform_driver qnoc_driver = { .driver = { .name = "qnoc-sm8350", .of_match_table = qnoc_of_match, + .sync_state = icc_sync_state, }, }; module_platform_driver(qnoc_driver); From patchwork Sun Aug 4 05:40:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13752466 Received: from mail-ej1-f54.google.com (mail-ej1-f54.google.com [209.85.218.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AEC8639AFD for ; Sun, 4 Aug 2024 05:40:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750036; cv=none; b=oR7vlH05hQYol8cqlhXeKFETyFr/gZzlWD7lh5lEVcOw+HkOmTWg0nHP4qMkC9qG70Vk+eeSD7dABh0sqjsUQ5zNBgsSTfNS0eL7bByJ9OVi6xAFvCIITTCAwthuMTBcKbruW/JNCImbvqE1DazOacy8boTASG1pvMgYS3A7r7Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750036; c=relaxed/simple; bh=+6qOXA/nRYvF+LJ3fyjiDmQq3/m44DEzHQz0B5kY010=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lQpYcb+8qzqH+mJvN9vKvAHWjye6HmucDpAvNuf38+SZGX+bGKRGgSN7Q842pOh8FkN71SmM6Fg4Hh52o6FNMcCNrzd2B+ikrBL3+QcwfGM0b343CoBNFgWOB0/R+iHqKM8FUNwEziHQltNSid32kBA7PNa4QPtXCsAjY5R51QE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=WIjCvwAU; arc=none smtp.client-ip=209.85.218.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="WIjCvwAU" Received: by mail-ej1-f54.google.com with SMTP id a640c23a62f3a-a7ad02501c3so289206466b.2 for ; Sat, 03 Aug 2024 22:40:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1722750033; x=1723354833; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=jZj9/52rwWNE6aCx1N5+a52yjuW6g5rJuFXIxcVgEH4=; b=WIjCvwAUXg4T8sEHbmYQJY3U0g+td/WfLbRVrkllLQfgHB9/UpA8fZp+lbJoyZDQEA 350lK2myd+trsWAK0DXrtRVuwpwSdiFdgY4HDFnxIChW/hwx3BXKjo1bziAztgM8wabL EAZpJgpUgZ+S5Y/99v69jxAK/J/Q6ltQ/cw/Nfq1S9b9EJ1qf7Wl6rGEj1mwikAYRM16 1UVwf0iw0JdAMn1dXzQwpjNPIAE23PrdYkzLtjqdCDnOij/W8ntTaiLz3+FksIx64vsG 1LRcq5b3RKz1CmPc4d5J925r7ozbVpMsWP9TXYq6Z57g9eKqveke0/kipbJw5mCijF1V /oMg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722750033; x=1723354833; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jZj9/52rwWNE6aCx1N5+a52yjuW6g5rJuFXIxcVgEH4=; b=kFKI8FbmYMQxmMekgJkv2a49w67WkNH4Lhr/RIZYWYEOD3vpUzjeG2LBNw8zBYEWmm i+20T6Df84XR/akuA2jSzNLFW9/X2x47YxXrEzDsoAl0qaHJBZ3ibx+wlbJ8IXmN+d1S Uz5xAbvfid5h0jFh4Fb6Tm40K+34RyaVBwSIuf2TGaEQRBAkMiG+tW9Ry48D/lUNjg1w 7fxGwxcxD1TzuZKb509W17mW8QX473V6c9MqriXIRMzH79naf+TkUtdsgxqLgrtWjuHD OEI5oq7yrPsv+TPoDAdZL38I0bjXJAGBe5LM4luxq/5rq/CL0ZtITNj0SoXjsbvHV0GU bOCQ== X-Forwarded-Encrypted: i=1; AJvYcCXLfUAHTLGY7zT9/QxTQfUgyW0OiJ2cZQVny5jFa9PQKYDBPgWKo1kd2JWyOt5nDsS4lP35I2OKK5LgJducQNfrSy9HuDfYNZEC X-Gm-Message-State: AOJu0Yy9VJ2W3IMbyGFzf6hlQVvAQ8hok70f+A6wlE1Ta3UUbz0OrApW +8sHf45aI5QezUPkArd1SqYM0ejo0ou6HkwQdU04t1HzUgcbqsN5cCzjUPUthXU= X-Google-Smtp-Source: AGHT+IHbci0hVaQgSOMpebGYXLXoRbSJAPdeMpWLhfgxvxEZR+HSx4w/E5jZTEcJ0B5zpBDG5TQSnw== X-Received: by 2002:a17:907:968b:b0:a7d:c9c6:a692 with SMTP id a640c23a62f3a-a7dc9c6a8a1mr583045066b.51.1722750033049; Sat, 03 Aug 2024 22:40:33 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7dc9bc3bd7sm292248466b.34.2024.08.03.22.40.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Aug 2024 22:40:32 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 04 Aug 2024 08:40:13 +0300 Subject: [PATCH 09/11] arm64: dts: qcom: sm8350: add MDSS registers interconnect Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240804-sm8350-fixes-v1-9-1149dd8399fe@linaro.org> References: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> In-Reply-To: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Jonathan Marek , Robert Foss , Vinod Koul , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mike Tipton , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Dmitry Baryshkov X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1178; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=+6qOXA/nRYvF+LJ3fyjiDmQq3/m44DEzHQz0B5kY010=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmrxQ/EZqpfORfNpqmB+gfbID37iTSi1xyvFhc8 yGcwAyMPX6JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZq8UPwAKCRCLPIo+Aiko 1fEVB/4poQ3kFh5IcUQVcpD9WN/E8hoOPvW5xikRPjmU3YFD3FWnNBXl0NKC2mQ7WS3PnupHux4 FvdTXUXKBbSus3+FQxXGfy1KvXfiw8Rfq+bBZ1fSt//qdVQNygZHM/LAU4xRdOcd0+0YshgpLif r0DdSq9HK0mJds3+Utjv76o8LBIV0Vzu5vPJe/TAp8BdLUk/GneFDKIGgPfPx4Lvj2JAd/N/Jfm uj2wWVPXuNxiDTBUBJGcAVBivZkGTIFe0kMQBzzL3kS0L6oPgcGjU2goCBY29+xl6qt+IoIIgnv qFb7CLYVIuCQMxxpLvagpIAeRD5Gpp/pQ9wrZrumALkiMHSh X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Aside from the MDSS<->MEM interconnect, display devices have separate interconnect for register access. Add this interconnect to the display node. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 38ee0850c335..27f36e6366df 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2490,8 +2490,12 @@ mdss: display-subsystem@ae00000 { reg-names = "mdss"; interconnects = <&mmss_noc MASTER_MDP0 0 &mc_virt SLAVE_EBI1 0>, - <&mmss_noc MASTER_MDP1 0 &mc_virt SLAVE_EBI1 0>; - interconnect-names = "mdp0-mem", "mdp1-mem"; + <&mmss_noc MASTER_MDP1 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_DISPLAY_CFG QCOM_ICC_TAG_ACTIVE_ONLY>; + interconnect-names = "mdp0-mem", + "mdp1-mem", + "cpu-cfg"; power-domains = <&dispcc MDSS_GDSC>; resets = <&dispcc DISP_CC_MDSS_CORE_BCR>; From patchwork Sun Aug 4 05:40:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13752467 Received: from mail-lf1-f43.google.com (mail-lf1-f43.google.com [209.85.167.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 779893D3B8 for ; Sun, 4 Aug 2024 05:40:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750038; cv=none; b=Cgt0+FnWWXrtUTw+34ogUX4xIdTimVuNgMleALgtXOW04HGi0Wg0LA5WPJcS8ku40p9I+seB44ZjndjYQtvfOmAXRopxSBxHB5RHcDiTI2SI/X+UPktMKdaCwfD+lTD6TGV8HHjJH7he7sgLI8pOPY39QftWZ/sNHgFlANUUUtE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750038; c=relaxed/simple; bh=jVYTvN/M5oXQ0cuOojPrVIEl/Z9fBYssaRlhkXEzBxU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gD/Hntnw9hfjE27wdrP1++tXwaoGUXwwpQwoSpA1RD8ECB6PAn/t1KjiwiUBLfDelq8T4NEn2BmeSuvRwYN4GG7INHl83x+UOS0J2fHi82LKq8aY2+yCOTloztU+6fhFL4T5AkRmc9VE8gqQiQU0/BShQuxNPDJt0IlRWSLsUOQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=V5bbXfbp; arc=none smtp.client-ip=209.85.167.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="V5bbXfbp" Received: by mail-lf1-f43.google.com with SMTP id 2adb3069b0e04-52f01afa11cso14115489e87.0 for ; Sat, 03 Aug 2024 22:40:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1722750035; x=1723354835; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=rGZoVd2rDgNeiiA+eJxTSi+RLq7K+EuCeMoKQavvKp8=; b=V5bbXfbpkO5lLAl9VtWGBuGemgtN5/PwNwLKQquGOtJGlvSQQZTiq/oCz4947N8Poj I2jVwuQJOv2qJzh7dBlLQKF7f3+ZJEUjELdungX5J44jkxBzUoNeHunCAPklRYiwZu+D cpUlik0poCQaRVdXnJoWg5AURpaZ2JsmPc0oiqrkams5mKdcDO40OqdNX0FyIRLZJA+C epkOU0fco9e5yoPO4Tk/aEbaKo8tY08GMBBKF5hdiKPZ9bMPmGu1PwB3LsO+gfpaKJHw 3VS+88UUQl1EGPafVzokIr/pkhMLvDVtH4ZylkCzdIsNKPyCMDn68Illv04xUpfKZvS0 //ng== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722750035; x=1723354835; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rGZoVd2rDgNeiiA+eJxTSi+RLq7K+EuCeMoKQavvKp8=; b=j0qZyWfZoiRu9WaqCDDvhDWiKmUpxg6OPe2+y+azKWPHAl+UslILuUkTCM1N5+8KCO St/GIGkJsWq8wycDDK3Xpo3f1TWf2aBox+uFtG4VIGcT38TwYgnFBMNZVBqnj1PNcA0U M1afMYo8gmzMlHllJ706+lHtZLsoxWvfVPFdZhhIri8u8dzwKPMAVRiUCu2VcijNmb/O T/Ez+A+xa0IsAUcspY+0xeuCT1LKPK2vNQFNeCCaeVQiVNFWYX2yw7sgo+KavQtImnIY /cqHBXCf9a8dBjFKtazlJnqTHgJzGe7g3agVEjwKnAS+0bSXe+Znh89+DmFHkCpVTI+u +4xw== X-Forwarded-Encrypted: i=1; AJvYcCXFxG5AmGpEORtv0Z2OYUftqaLhN2nl98LnB5jCg4/KxEDsbuExIGrEViGNY0zL2QY6AeMEb7hA/buVtYqYw45mCMzeS6utyYrA X-Gm-Message-State: AOJu0YyzCDpD3CdtFK59PQAUO2Xb165lokuif/Y56E5dR2fiIBx0hz7M 2L0kdSkcF0bp3Njlsg0rhAkMsE7jG0ktdrm16sKH8LAUJvXjHvQ8JEUlAsz1Ink= X-Google-Smtp-Source: AGHT+IEPlAu7+t1OD9xkZBZB+NNWj0yEEWFX5JqjgVG0e9+KB+gZngiGtuqgNS6nmYBsvDyIL2hvxA== X-Received: by 2002:a05:6512:12d2:b0:52c:82fa:ef7b with SMTP id 2adb3069b0e04-530bb3a351cmr4927864e87.44.1722750034659; Sat, 03 Aug 2024 22:40:34 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7dc9bc3bd7sm292248466b.34.2024.08.03.22.40.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Aug 2024 22:40:34 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 04 Aug 2024 08:40:14 +0300 Subject: [PATCH 10/11] arm64: dts: qcom: sm8350: add refgen regulator Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240804-sm8350-fixes-v1-10-1149dd8399fe@linaro.org> References: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> In-Reply-To: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Jonathan Marek , Robert Foss , Vinod Koul , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mike Tipton , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Dmitry Baryshkov X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1354; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=jVYTvN/M5oXQ0cuOojPrVIEl/Z9fBYssaRlhkXEzBxU=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQ9p6EfvbJs11IWt2KySeq1a453nXk+N4QleS7+4FFfmh7 112W23pZDRmYWDkYpAVU2TxKWiZGrMpOezDjqn1MINYmUCmMHBxCsBElrex/xVnkppt/SZk00ar XNlFkenx77pbV31njlzh7OjUJ13Q3GwY/XSPo82lVULHrvZ8NNqZZXh065xDLesqVII2VKSdfu5 arcjOJneoNEL89RtDbb93903q20stEmVC56iv+z2dj+uNkeC+pNtXjKQEVJ1kNJnPrGRb3W5yWf Zr/64NMvznzzsmW13fOy0oYLPYJnXLbU8vrz/fuzus9mnQo/81uaYXfPXCum6/4Kj2rl0akxile +xCyJ35Armi1uZaiWuYnGXK3Z8vmv9jynIj7w61x9PYvLelyTwOUm46fsu7QM21R1ejaGNWTbj2 tybFiW83CnZLLDnNoR7vs6dfiGON4BpN1qgvW++tfMsMAA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A On SM8350 platform the DSI internally is using the refgen regulator. Add corresponding device node and link it as a supply to the DSI node. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 27f36e6366df..37a2aba0d4ca 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -2251,6 +2251,12 @@ usb_2_hsphy: phy@88e4000 { resets = <&gcc GCC_QUSB2PHY_SEC_BCR>; }; + refgen: regulator@88e7000 { + compatible = "qcom,sm8350-refgen-regulator", + "qcom,sm8250-refgen-regulator"; + reg = <0x0 0x088e7000 0x0 0x84>; + }; + usb_1_qmpphy: phy@88e8000 { compatible = "qcom,sm8350-qmp-usb3-dp-phy"; reg = <0 0x088e8000 0 0x3000>; @@ -2710,6 +2716,7 @@ mdss_dsi0: dsi@ae94000 { operating-points-v2 = <&dsi0_opp_table>; power-domains = <&rpmhpd RPMHPD_MMCX>; + refgen-supply = <&refgen>; phys = <&mdss_dsi0_phy>; @@ -2808,6 +2815,7 @@ mdss_dsi1: dsi@ae96000 { operating-points-v2 = <&dsi1_opp_table>; power-domains = <&rpmhpd RPMHPD_MMCX>; + refgen-supply = <&refgen>; phys = <&mdss_dsi1_phy>; From patchwork Sun Aug 4 05:40:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13752468 Received: from mail-lf1-f53.google.com (mail-lf1-f53.google.com [209.85.167.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 50A6C481D1 for ; Sun, 4 Aug 2024 05:40:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.53 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750040; cv=none; b=Gg8HeC/VKIY7hm2OOrgQhbObzFxeU9mmzi/VLUIzxc0X1U+9JxeiapBAY1GLEdpzWtSuM+FuapIjUSA50H8RowIA/cHsrk0g2i6VRI8CKORFwLsRFSjtPi63EC2l5NspbAckcQAn4hJZwIuPv4+rJLay4JbZnm24Ev5vwy2MkDs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1722750040; c=relaxed/simple; bh=7W77DHzgi+hLXIXlbdxA6fq9mb4+K6aSLuzwwza3sX8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qND2424zHeqHzR3JDEh6kgzcINWF2zbw169IpeHlDUuNNJZu+8HW2rV19GqZ7NaqESeNIxMrb4TlTOPkSastl/22cHu/FWY+Lq/NctatIERcTiNBr4n4bM1LawPMKjzn0OvUw64hZo3KndNWxjv8i0Z6oN1O3rjL7k48gtatEOc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=qeZ2+f0f; arc=none smtp.client-ip=209.85.167.53 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="qeZ2+f0f" Received: by mail-lf1-f53.google.com with SMTP id 2adb3069b0e04-530ae4ef29dso8964373e87.3 for ; Sat, 03 Aug 2024 22:40:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1722750036; x=1723354836; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=XXeR89FVIJZ1QYlIHMei/0fKATGUZGncxK0+auVBf0M=; b=qeZ2+f0fXMt7i0RjEU+X1AJuVC+Xy1/PJGXxy+VOmWjAxaqCoiDvEaLpdypRih/ss8 BNzuwA+0ghCFVA99lvSAogEW+DyTfg5rFgAJqyiZMx+Dz8TdvddhJGoAG4UXp7th12vG PMfHs6lX24aSagYEvqgFweOYYeRZTKo7QcvWufAYiYLSM3CfvERw2A0N04H5XqsWDYMA 70Zvi2TtdL25acjgbEI9UT9McpKKFtQ8kokVqtU2LTT+i/9G72rD5gExHwfvF4fCcbdM W71a8XJ/aUuGU3Mpor9hjfh7jarGiCy1GUuPW5ADWDngsCuji4cXb/xg93h9nvEazOrp ejJg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1722750036; x=1723354836; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XXeR89FVIJZ1QYlIHMei/0fKATGUZGncxK0+auVBf0M=; b=JY234MicqzEwcKdYQTLrfUiwM968dCk+o9rVQA2qxVhJy+zLQK3Xq8S0dcX6XpYlCo 9sxPBUL29G0F2jb0F/20MYnnRZlOLURwMpxn2IsuTwzdPFZWzw9EOAVBvs3l8NSTksSv gfT6Mw2vX8kTDyeGVZNZPX0yN+b7R2KiK5eeFlEZdlHzeA1kN2aTXs/wRtkCqAVv2CV3 Annptv0G+RWo4JpJ37o9P8a8SQVol1PCG+N43jUicNjR6NbdGMZzw8kEPdiuzqNMwlQb TdaBNiOFFaabdHcDZixTYU17qONndJc6v/sg8uK4ycs1bb3nHOys8Cq+13TueMoJlHCW yLfw== X-Forwarded-Encrypted: i=1; AJvYcCXcbK3Mj7DKGlTvToHnbUfSpMxBE3g9awcKxsMyNEFcOcKMqH07okfsp3cc3gd2pSSiLMBdxvSgQVuPwBRKk/FGz9D41kd7jKcz X-Gm-Message-State: AOJu0Yw7BOJS2YTnYUWIG9OmL+6H0tafk9ez87kEngNVOCFwASkxY2IP htq/IQZAVCOyNDMnu3ZxEksxCS6Px2dqXVixZDe4xcActngRMpQz02mC4CG2Z1k= X-Google-Smtp-Source: AGHT+IEzUJcr2/eYzNRxco80M9GSQYJGQHfmdybo4///4ibYBJxjdyGj5/rEDh0x2sR8bPV+/8p/Qw== X-Received: by 2002:a05:6512:ba3:b0:52c:df8e:a367 with SMTP id 2adb3069b0e04-530bb3bbfd1mr6797281e87.53.1722750036270; Sat, 03 Aug 2024 22:40:36 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a7dc9bc3bd7sm292248466b.34.2024.08.03.22.40.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 03 Aug 2024 22:40:35 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 04 Aug 2024 08:40:15 +0300 Subject: [PATCH 11/11] arm64: defconfig: build CONFIG_REGULATOR_QCOM_REFGEN as module Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240804-sm8350-fixes-v1-11-1149dd8399fe@linaro.org> References: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> In-Reply-To: <20240804-sm8350-fixes-v1-0-1149dd8399fe@linaro.org> To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Jonathan Marek , Robert Foss , Vinod Koul , Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Konrad Dybcio , Georgi Djakov , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Mike Tipton , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Dmitry Baryshkov X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=769; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=7W77DHzgi+hLXIXlbdxA6fq9mb4+K6aSLuzwwza3sX8=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmrxQ/eMRA4Offoaww9Ngbll18r3n+dpMYOd4zk 1LX05cPA76JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZq8UPwAKCRCLPIo+Aiko 1fvWB/0R2sNi/9ToQYvmH1y02gU7itzPPtSuSYTjQe3wK3HxfagVOQ+PRhSPWQVs0A7TkiFTAHF 2zh+KOHutngVNaCrW4/J1z9Ht75Z9yBk+oNzuoS7RHXtc3eXoyfBT3NXaRX5+sCBTlSGF5VX2ee njIFhdPDBBM4U2DdRC/bt8XEiT3OvUf89NWxoRJG87uH2jrv+mkWUiTMejKzpM9GynjmEJMI/+j XqromIoKcDYND0GkXZcw/4iuOoU2bOmcX7CJq5vbAX8NN2LmJCIJ2PGlyYQKzLBy1U01AXPK2KV 6+EDFfDZfRvpa9dICunQw3XJDPHE1krN5s3aTxCHpt7law+D X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Enable CONFIG_REGULATOR_QCOM_REFGEN and build it as a module. It is an internal supply used by the DSI on SM8350-based platforms (e.g. on the SM8350 HDK device). Signed-off-by: Dmitry Baryshkov Reviewed-by: Krzysztof Kozlowski --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index 7d32fca64996..20e07ceaf239 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -785,6 +785,7 @@ CONFIG_REGULATOR_PCA9450=y CONFIG_REGULATOR_PF8X00=y CONFIG_REGULATOR_PFUZE100=y CONFIG_REGULATOR_PWM=y +CONFIG_REGULATOR_QCOM_REFGEN=m CONFIG_REGULATOR_QCOM_RPMH=y CONFIG_REGULATOR_QCOM_SMD_RPM=y CONFIG_REGULATOR_QCOM_SPMI=y