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We start at some point in the tree and recurse up the tree to find the oldest parent clk that needs to be enabled or prepared. Then we enable/prepare and return to the caller, going back to the clk we started at and enabling/preparing along the way. This also unroll the recursion in unprepare,disable which can just be done in the order of walking up the clk tree. The problem is recursion isn't great for kernel code where we have a limited stack size. Furthermore, we may be calling this code inside clk_set_rate() which also has recursion in it, so we're really not looking good if we encounter a tall clk tree. Let's create a stack instead by looping over the parent chain and collecting clks of interest. Then the enable/prepare becomes as simple as iterating over that list and calling enable. Modified verison of https://lore.kernel.org/patchwork/patch/814369/ -Fixed kernel warning -unrolled recursion in unprepare/disable too Cc: Jerome Brunet Signed-off-by: Stephen Boyd Signed-off-by: Derek Basehore --- drivers/clk/clk.c | 191 ++++++++++++++++++++++++++-------------------- 1 file changed, 107 insertions(+), 84 deletions(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index d2477a5058ac..94b3ac783d90 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -68,6 +68,8 @@ struct clk_core { struct hlist_head children; struct hlist_node child_node; struct hlist_head clks; + struct list_head prepare_list; + struct list_head enable_list; unsigned int notifier_count; #ifdef CONFIG_DEBUG_FS struct dentry *dentry; @@ -677,34 +679,34 @@ static void clk_core_unprepare(struct clk_core *core) { lockdep_assert_held(&prepare_lock); - if (!core) - return; - - if (WARN(core->prepare_count == 0, - "%s already unprepared\n", core->name)) - return; - - if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL, - "Unpreparing critical %s\n", core->name)) - return; + while (core) { + if (WARN(core->prepare_count == 0, + "%s already unprepared\n", core->name)) + return; - if (core->flags & CLK_SET_RATE_GATE) - clk_core_rate_unprotect(core); + if (WARN(core->prepare_count == 1 && + core->flags & CLK_IS_CRITICAL, + "Unpreparing critical %s\n", core->name)) + return; - if (--core->prepare_count > 0) - return; + if (core->flags & CLK_SET_RATE_GATE) + clk_core_rate_unprotect(core); - WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name); + if (--core->prepare_count > 0) + return; - trace_clk_unprepare(core); + WARN(core->enable_count > 0, "Unpreparing enabled %s\n", + core->name); + trace_clk_unprepare(core); - if (core->ops->unprepare) - core->ops->unprepare(core->hw); + if (core->ops->unprepare) + core->ops->unprepare(core->hw); - clk_pm_runtime_put(core); + clk_pm_runtime_put(core); - trace_clk_unprepare_complete(core); - clk_core_unprepare(core->parent); + trace_clk_unprepare_complete(core); + core = core->parent; + } } static void clk_core_unprepare_lock(struct clk_core *core) @@ -737,49 +739,57 @@ EXPORT_SYMBOL_GPL(clk_unprepare); static int clk_core_prepare(struct clk_core *core) { int ret = 0; + LIST_HEAD(head); lockdep_assert_held(&prepare_lock); - if (!core) - return 0; + while (core) { + list_add(&core->prepare_list, &head); + /* + * Stop once we see a clk that is already prepared. Adding a clk + * to the list with a non-zero prepare count (or reaching NULL) + * makes error handling work as implemented. + */ + if (core->prepare_count) + break; + core = core->parent; + } - if (core->prepare_count == 0) { - ret = clk_pm_runtime_get(core); - if (ret) - return ret; + /* First entry has either a prepare_count of 0 or a NULL parent. */ + list_for_each_entry(core, &head, prepare_list) { + if (core->prepare_count == 0) { + ret = clk_pm_runtime_get(core); + if (ret) + goto unprepare_parent; - ret = clk_core_prepare(core->parent); - if (ret) - goto runtime_put; + trace_clk_prepare(core); - trace_clk_prepare(core); + if (core->ops->prepare) + ret = core->ops->prepare(core->hw); - if (core->ops->prepare) - ret = core->ops->prepare(core->hw); + trace_clk_prepare_complete(core); - trace_clk_prepare_complete(core); + if (ret) + goto runtime_put; + } + core->prepare_count++; - if (ret) - goto unprepare; + /* + * CLK_SET_RATE_GATE is a special case of clock protection + * Instead of a consumer claiming exclusive rate control, it is + * actually the provider which prevents any consumer from making + * any operation which could result in a rate change or rate + * glitch while the clock is prepared. + */ + if (core->flags & CLK_SET_RATE_GATE) + clk_core_rate_protect(core); } - core->prepare_count++; - - /* - * CLK_SET_RATE_GATE is a special case of clock protection - * Instead of a consumer claiming exclusive rate control, it is - * actually the provider which prevents any consumer from making any - * operation which could result in a rate change or rate glitch while - * the clock is prepared. - */ - if (core->flags & CLK_SET_RATE_GATE) - clk_core_rate_protect(core); - return 0; -unprepare: - clk_core_unprepare(core->parent); runtime_put: clk_pm_runtime_put(core); +unprepare_parent: + clk_core_unprepare(core->parent); return ret; } @@ -819,27 +829,27 @@ static void clk_core_disable(struct clk_core *core) { lockdep_assert_held(&enable_lock); - if (!core) - return; - - if (WARN(core->enable_count == 0, "%s already disabled\n", core->name)) - return; - - if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL, - "Disabling critical %s\n", core->name)) - return; + while (core) { + if (WARN(core->enable_count == 0, "%s already disabled\n", + core->name)) + return; - if (--core->enable_count > 0) - return; + if (--core->enable_count > 0) + return; - trace_clk_disable_rcuidle(core); + if (WARN(core->enable_count == 1 && + core->flags & CLK_IS_CRITICAL, + "Disabling critical %s\n", core->name)) + return; - if (core->ops->disable) - core->ops->disable(core->hw); + trace_clk_disable_rcuidle(core); - trace_clk_disable_complete_rcuidle(core); + if (core->ops->disable) + core->ops->disable(core->hw); - clk_core_disable(core->parent); + trace_clk_disable_complete_rcuidle(core); + core = core->parent; + } } static void clk_core_disable_lock(struct clk_core *core) @@ -875,37 +885,48 @@ EXPORT_SYMBOL_GPL(clk_disable); static int clk_core_enable(struct clk_core *core) { int ret = 0; + LIST_HEAD(head); lockdep_assert_held(&enable_lock); - if (!core) - return 0; + while (core) { + if (WARN(core->prepare_count == 0, + "Enabling unprepared %s\n", core->name)) + return -ESHUTDOWN; - if (WARN(core->prepare_count == 0, - "Enabling unprepared %s\n", core->name)) - return -ESHUTDOWN; - - if (core->enable_count == 0) { - ret = clk_core_enable(core->parent); + list_add(&core->enable_list, &head); + /* + * Stop once we see a clk that is already enabled. Adding a clk + * to the list with a non-zero prepare count (or reaching NULL) + * makes error handling work as implemented. + */ + if (core->enable_count) + break; - if (ret) - return ret; + core = core->parent; + } - trace_clk_enable_rcuidle(core); + /* First entry has either an enable_count of 0 or a NULL parent. */ + list_for_each_entry(core, &head, enable_list) { + if (core->enable_count == 0) { + trace_clk_enable_rcuidle(core); - if (core->ops->enable) - ret = core->ops->enable(core->hw); + if (core->ops->enable) + ret = core->ops->enable(core->hw); - trace_clk_enable_complete_rcuidle(core); + trace_clk_enable_complete_rcuidle(core); - if (ret) { - clk_core_disable(core->parent); - return ret; + if (ret) + goto err; } + + core->enable_count++; } - core->enable_count++; return 0; +err: + clk_core_disable(core->parent); + return ret; } static int clk_core_enable_lock(struct clk_core *core) @@ -3288,6 +3309,8 @@ struct clk *clk_register(struct device *dev, struct clk_hw *hw) core->num_parents = hw->init->num_parents; core->min_rate = 0; core->max_rate = ULONG_MAX; + INIT_LIST_HEAD(&core->prepare_list); + INIT_LIST_HEAD(&core->enable_list); hw->core = core; /* allocate local copy in case parent_names is __initdata */ From patchwork Tue Mar 5 04:49:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Derek Basehore X-Patchwork-Id: 10838947 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A42C51803 for ; Tue, 5 Mar 2019 04:50:22 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8F8092B75F for ; Tue, 5 Mar 2019 04:50:22 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 833CB2B77B; Tue, 5 Mar 2019 04:50:22 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 8A02A2B78F for ; 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Since it recursively calls itself for its children, this means it would be called once on each clk for each step above the top clk is. This fixes this by breaking the subtree calculation into two parts. The first part recalcs the rate for each child of the parent clk in clk_calc_new_rates. This part is not recursive itself. The second part recursively calls a new clk_calc_subtree on the clk_core that was passed into clk_set_rate. Signed-off-by: Derek Basehore --- drivers/clk/clk.c | 49 ++++++++++++++++++++++++++++++++++++----------- 1 file changed, 38 insertions(+), 11 deletions(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 94b3ac783d90..e20364812b54 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -1732,11 +1732,19 @@ static int __clk_speculate_rates(struct clk_core *core, return ret; } -static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate, - struct clk_core *new_parent, u8 p_index) +static void clk_calc_subtree(struct clk_core *core) { struct clk_core *child; + hlist_for_each_entry(child, &core->children, child_node) { + child->new_rate = clk_recalc(child, core->new_rate); + clk_calc_subtree(child); + } +} + +static void clk_set_change(struct clk_core *core, unsigned long new_rate, + struct clk_core *new_parent, u8 p_index) +{ core->new_rate = new_rate; core->new_parent = new_parent; core->new_parent_index = p_index; @@ -1744,11 +1752,6 @@ static void clk_calc_subtree(struct clk_core *core, unsigned long new_rate, core->new_child = NULL; if (new_parent && new_parent != core->parent) new_parent->new_child = core; - - hlist_for_each_entry(child, &core->children, child_node) { - child->new_rate = clk_recalc(child, new_rate); - clk_calc_subtree(child, child->new_rate, NULL, 0); - } } /* @@ -1759,7 +1762,7 @@ static struct clk_core *clk_calc_new_rates(struct clk_core *core, unsigned long rate) { struct clk_core *top = core; - struct clk_core *old_parent, *parent; + struct clk_core *old_parent, *parent, *child; unsigned long best_parent_rate = 0; unsigned long new_rate; unsigned long min_rate; @@ -1806,6 +1809,13 @@ static struct clk_core *clk_calc_new_rates(struct clk_core *core, /* pass-through clock with adjustable parent */ top = clk_calc_new_rates(parent, rate); new_rate = parent->new_rate; + hlist_for_each_entry(child, &parent->children, child_node) { + if (child == core) + continue; + + child->new_rate = clk_recalc(child, new_rate); + clk_calc_subtree(child); + } goto out; } @@ -1828,11 +1838,19 @@ static struct clk_core *clk_calc_new_rates(struct clk_core *core, } if ((core->flags & CLK_SET_RATE_PARENT) && parent && - best_parent_rate != parent->rate) + best_parent_rate != parent->rate) { top = clk_calc_new_rates(parent, best_parent_rate); + hlist_for_each_entry(child, &parent->children, child_node) { + if (child == core) + continue; + + child->new_rate = clk_recalc(child, parent->new_rate); + clk_calc_subtree(child); + } + } out: - clk_calc_subtree(core, new_rate, parent, p_index); + clk_set_change(core, new_rate, parent, p_index); return top; } @@ -2007,7 +2025,7 @@ static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core, static int clk_core_set_rate_nolock(struct clk_core *core, unsigned long req_rate) { - struct clk_core *top, *fail_clk; + struct clk_core *top, *fail_clk, *child; unsigned long rate; int ret = 0; @@ -2033,6 +2051,15 @@ static int clk_core_set_rate_nolock(struct clk_core *core, if (ret) return ret; + if (top != core) { + /* new_parent cannot be NULL in this case */ + hlist_for_each_entry(child, &core->new_parent->children, + child_node) + clk_calc_subtree(child); + } else { + clk_calc_subtree(core); + } + /* notify that we are about to change rates */ fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); 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b=rQVtHT74imGWai1OJkK+nnlW0kwuHox91Ss7BCmlXtN6Sw7+0MHRIqs7s1rNgEL3h8 cAccYl6CrpHk9ECzd4Iiu/MOvMznSZ5YCNQg9uNo6Biw4CrdssO76zCyyE0TeThoIgCe pgwcThIaQjN5nj/6t0PH9V7i2kFvtFrNUBCamyyveNmg+bQ4GWodkC33Kw3I81rtJ1Db kO9ge0OzvfSPFJMwz8kDhkOaZgJ+NnasGQBPqN9dg8hT4oHC+ormTKqiJQv3sa1q+bTe WSvOc/WxCOEF9P68dgHJ6vCYw2m6gR/yOyFqVefEOqknIEN8CqTVEwtH1vgLSXBoC8cz oQFg== X-Gm-Message-State: APjAAAWiXFIHwWEqqg40WZ07BbKp07Acj9ogj/IuMYrjnT1bn8DIGBgh D0DUFkELqLbt7pjRwjzyRjR89g== X-Google-Smtp-Source: APXvYqxkSuh99By9w3rFrEdxIj+mJDpASbHAWXWa1T0T05n7KYvO7hqRFF+ZwOA2JbZ08BQhUxLz7w== X-Received: by 2002:a63:5d48:: with SMTP id o8mr22113314pgm.297.1551761385844; Mon, 04 Mar 2019 20:49:45 -0800 (PST) Received: from exogeni.mtv.corp.google.com ([2620:15c:202:1:db8d:8e3f:2514:5db8]) by smtp.gmail.com with ESMTPSA id z15sm15893883pgc.25.2019.03.04.20.49.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Mar 2019 20:49:45 -0800 (PST) From: Derek Basehore To: linux-kernel@vger.kernel.org Subject: [PATCH v3 3/6] clk: change rates via list iteration Date: Mon, 4 Mar 2019 20:49:33 -0800 Message-Id: <20190305044936.22267-4-dbasehore@chromium.org> X-Mailer: git-send-email 2.21.0.352.gf09ad66450-goog In-Reply-To: <20190305044936.22267-1-dbasehore@chromium.org> References: <20190305044936.22267-1-dbasehore@chromium.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190304_204947_016351_523EC036 X-CRM114-Status: GOOD ( 22.90 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aisheng.dong@nxp.com, Derek Basehore , heiko@sntech.de, linux-doc@vger.kernel.org, sboyd@kernel.org, mturquette@baylibre.com, corbet@lwn.net, linux-rockchip@lists.infradead.org, mchehab+samsung@kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jbrunet@baylibre.com Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This changes the clk_set_rate code to use lists instead of recursion. While making this change, also add error handling for clk_set_rate. This means that errors in the set_rate/set_parent/set_rate_and_parent functions will not longer be ignored. When an error occurs, the clk rates and parents are reset, unless an error occurs here, in which we bail and cross our fingers. Signed-off-by: Derek Basehore --- drivers/clk/clk.c | 256 +++++++++++++++++++++++++++++++--------------- 1 file changed, 176 insertions(+), 80 deletions(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index e20364812b54..1637dc262884 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -39,6 +39,13 @@ static LIST_HEAD(clk_notifier_list); /*** private data structures ***/ +struct clk_change { + struct list_head change_list; + unsigned long rate; + struct clk_core *core; + struct clk_core *parent; +}; + struct clk_core { const char *name; const struct clk_ops *ops; @@ -49,11 +56,9 @@ struct clk_core { const char **parent_names; struct clk_core **parents; u8 num_parents; - u8 new_parent_index; unsigned long rate; unsigned long req_rate; - unsigned long new_rate; - struct clk_core *new_parent; + struct clk_change change; struct clk_core *new_child; unsigned long flags; bool orphan; @@ -1735,19 +1740,52 @@ static int __clk_speculate_rates(struct clk_core *core, static void clk_calc_subtree(struct clk_core *core) { struct clk_core *child; + LIST_HEAD(tmp_list); - hlist_for_each_entry(child, &core->children, child_node) { - child->new_rate = clk_recalc(child, core->new_rate); - clk_calc_subtree(child); + list_add(&core->prepare_list, &tmp_list); + while (!list_empty(&tmp_list)) { + core = list_first_entry(&tmp_list, struct clk_core, + prepare_list); + + hlist_for_each_entry(child, &core->children, child_node) { + child->change.rate = clk_recalc(child, + core->change.rate); + list_add_tail(&child->prepare_list, &tmp_list); + } + + list_del(&core->prepare_list); + } +} + +static void clk_prepare_changes(struct list_head *change_list, + struct clk_core *core) +{ + struct clk_change *change; + struct clk_core *tmp, *child; + LIST_HEAD(tmp_list); + + list_add(&core->change.change_list, &tmp_list); + while (!list_empty(&tmp_list)) { + change = list_first_entry(&tmp_list, struct clk_change, + change_list); + tmp = change->core; + + hlist_for_each_entry(child, &tmp->children, child_node) + list_add_tail(&child->change.change_list, &tmp_list); + + child = tmp->new_child; + if (child) + list_add_tail(&child->change.change_list, &tmp_list); + + list_move_tail(&tmp->change.change_list, change_list); } } static void clk_set_change(struct clk_core *core, unsigned long new_rate, - struct clk_core *new_parent, u8 p_index) + struct clk_core *new_parent) { - core->new_rate = new_rate; - core->new_parent = new_parent; - core->new_parent_index = p_index; + core->change.rate = new_rate; + core->change.parent = new_parent; /* include clk in new parent's PRE_RATE_CHANGE notifications */ core->new_child = NULL; if (new_parent && new_parent != core->parent) @@ -1767,7 +1805,6 @@ static struct clk_core *clk_calc_new_rates(struct clk_core *core, unsigned long new_rate; unsigned long min_rate; unsigned long max_rate; - int p_index = 0; long ret; /* sanity */ @@ -1803,17 +1840,15 @@ static struct clk_core *clk_calc_new_rates(struct clk_core *core, return NULL; } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) { /* pass-through clock without adjustable parent */ - core->new_rate = core->rate; return NULL; } else { /* pass-through clock with adjustable parent */ top = clk_calc_new_rates(parent, rate); - new_rate = parent->new_rate; + new_rate = parent->change.rate; hlist_for_each_entry(child, &parent->children, child_node) { if (child == core) continue; - - child->new_rate = clk_recalc(child, new_rate); + child->change.rate = clk_recalc(child, new_rate); clk_calc_subtree(child); } goto out; @@ -1827,16 +1862,6 @@ static struct clk_core *clk_calc_new_rates(struct clk_core *core, return NULL; } - /* try finding the new parent index */ - if (parent && core->num_parents > 1) { - p_index = clk_fetch_parent_index(core, parent); - if (p_index < 0) { - pr_debug("%s: clk %s can not be parent of clk %s\n", - __func__, parent->name, core->name); - return NULL; - } - } - if ((core->flags & CLK_SET_RATE_PARENT) && parent && best_parent_rate != parent->rate) { top = clk_calc_new_rates(parent, best_parent_rate); @@ -1844,13 +1869,14 @@ static struct clk_core *clk_calc_new_rates(struct clk_core *core, if (child == core) continue; - child->new_rate = clk_recalc(child, parent->new_rate); + child->change.rate = clk_recalc(child, + parent->change.rate); clk_calc_subtree(child); } } out: - clk_set_change(core, new_rate, parent, p_index); + clk_set_change(core, new_rate, parent); return top; } @@ -1866,18 +1892,18 @@ static struct clk_core *clk_propagate_rate_change(struct clk_core *core, struct clk_core *child, *tmp_clk, *fail_clk = NULL; int ret = NOTIFY_DONE; - if (core->rate == core->new_rate) + if (core->rate == core->change.rate) return NULL; if (core->notifier_count) { - ret = __clk_notify(core, event, core->rate, core->new_rate); + ret = __clk_notify(core, event, core->rate, core->change.rate); if (ret & NOTIFY_STOP_MASK) fail_clk = core; } hlist_for_each_entry(child, &core->children, child_node) { /* Skip children who will be reparented to another clock */ - if (child->new_parent && child->new_parent != core) + if (child->change.parent && child->change.parent != core) continue; tmp_clk = clk_propagate_rate_change(child, event); if (tmp_clk) @@ -1898,101 +1924,152 @@ static struct clk_core *clk_propagate_rate_change(struct clk_core *core, * walk down a subtree and set the new rates notifying the rate * change on the way */ -static void clk_change_rate(struct clk_core *core) +static int clk_change_rate(struct clk_change *change) { - struct clk_core *child; - struct hlist_node *tmp; - unsigned long old_rate; + struct clk_core *core = change->core; + unsigned long old_rate, flags; unsigned long best_parent_rate = 0; bool skip_set_rate = false; - struct clk_core *old_parent; + struct clk_core *old_parent = NULL; struct clk_core *parent = NULL; + int p_index; + int ret = 0; old_rate = core->rate; - if (core->new_parent) { - parent = core->new_parent; - best_parent_rate = core->new_parent->rate; + if (change->parent) { + parent = change->parent; + best_parent_rate = parent->rate; } else if (core->parent) { parent = core->parent; - best_parent_rate = core->parent->rate; + best_parent_rate = parent->rate; } - if (clk_pm_runtime_get(core)) - return; - if (core->flags & CLK_SET_RATE_UNGATE) { - unsigned long flags; - clk_core_prepare(core); flags = clk_enable_lock(); clk_core_enable(core); clk_enable_unlock(flags); } - if (core->new_parent && core->new_parent != core->parent) { - old_parent = __clk_set_parent_before(core, core->new_parent); - trace_clk_set_parent(core, core->new_parent); + if (core->flags & CLK_OPS_PARENT_ENABLE) + clk_core_prepare_enable(parent); + + if (parent != core->parent) { + p_index = clk_fetch_parent_index(core, parent); + if (p_index < 0) { + pr_debug("%s: clk %s can not be parent of clk %s\n", + __func__, parent->name, core->name); + ret = p_index; + goto out; + } + old_parent = __clk_set_parent_before(core, parent); + + trace_clk_set_parent(core, change->parent); if (core->ops->set_rate_and_parent) { skip_set_rate = true; - core->ops->set_rate_and_parent(core->hw, core->new_rate, + ret = core->ops->set_rate_and_parent(core->hw, + change->rate, best_parent_rate, - core->new_parent_index); + p_index); } else if (core->ops->set_parent) { - core->ops->set_parent(core->hw, core->new_parent_index); + ret = core->ops->set_parent(core->hw, p_index); } - trace_clk_set_parent_complete(core, core->new_parent); - __clk_set_parent_after(core, core->new_parent, old_parent); - } + trace_clk_set_parent_complete(core, change->parent); + if (ret) { + flags = clk_enable_lock(); + clk_reparent(core, old_parent); + clk_enable_unlock(flags); + __clk_set_parent_after(core, old_parent, parent); - if (core->flags & CLK_OPS_PARENT_ENABLE) - clk_core_prepare_enable(parent); + goto out; + } + __clk_set_parent_after(core, parent, old_parent); + + } - trace_clk_set_rate(core, core->new_rate); + trace_clk_set_rate(core, change->rate); if (!skip_set_rate && core->ops->set_rate) - core->ops->set_rate(core->hw, core->new_rate, best_parent_rate); + ret = core->ops->set_rate(core->hw, change->rate, + best_parent_rate); - trace_clk_set_rate_complete(core, core->new_rate); + trace_clk_set_rate_complete(core, change->rate); core->rate = clk_recalc(core, best_parent_rate); - if (core->flags & CLK_SET_RATE_UNGATE) { - unsigned long flags; +out: + if (core->flags & CLK_OPS_PARENT_ENABLE) + clk_core_disable_unprepare(parent); + + if (core->notifier_count && old_rate != core->rate) + __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate); + if (core->flags & CLK_SET_RATE_UNGATE) { flags = clk_enable_lock(); clk_core_disable(core); clk_enable_unlock(flags); clk_core_unprepare(core); } - if (core->flags & CLK_OPS_PARENT_ENABLE) - clk_core_disable_unprepare(parent); + if (core->flags & CLK_RECALC_NEW_RATES) + (void)clk_calc_new_rates(core, change->rate); - if (core->notifier_count && old_rate != core->rate) - __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate); + /* + * Keep track of old parent and requested rate in case we have + * to undo the change due to an error. + */ + change->parent = old_parent; + change->rate = old_rate; + return ret; +} - if (core->flags & CLK_RECALC_NEW_RATES) - (void)clk_calc_new_rates(core, core->new_rate); +static int clk_change_rates(struct list_head *list) +{ + struct clk_change *change, *tmp; + int ret = 0; /* - * Use safe iteration, as change_rate can actually swap parents - * for certain clock types. + * Make pm runtime get/put calls outside of clk_change_rate to avoid + * clks bouncing back and forth between runtime_resume/suspend. */ - hlist_for_each_entry_safe(child, tmp, &core->children, child_node) { - /* Skip children who will be reparented to another clock */ - if (child->new_parent && child->new_parent != core) - continue; - clk_change_rate(child); + list_for_each_entry(change, list, change_list) { + ret = clk_pm_runtime_get(change->core); + if (ret) { + list_for_each_entry_continue_reverse(change, list, + change_list) + clk_pm_runtime_put(change->core); + + return ret; + } } - /* handle the new child who might not be in core->children yet */ - if (core->new_child) - clk_change_rate(core->new_child); + list_for_each_entry(change, list, change_list) { + ret = clk_change_rate(change); + clk_pm_runtime_put(change->core); + if (ret) + goto err; + } - clk_pm_runtime_put(core); + return 0; +err: + /* Unwind the changes on an error. */ + list_for_each_entry_continue_reverse(change, list, change_list) { + /* Just give up on an error when undoing changes. */ + ret = clk_pm_runtime_get(change->core); + if (WARN_ON(ret)) + return ret; + + ret = clk_change_rate(change); + if (WARN_ON(ret)) + return ret; + + clk_pm_runtime_put(change->core); + } + + return ret; } static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core, @@ -2026,7 +2103,9 @@ static int clk_core_set_rate_nolock(struct clk_core *core, unsigned long req_rate) { struct clk_core *top, *fail_clk, *child; + struct clk_change *change, *tmp; unsigned long rate; + LIST_HEAD(changes); int ret = 0; if (!core) @@ -2052,14 +2131,17 @@ static int clk_core_set_rate_nolock(struct clk_core *core, return ret; if (top != core) { - /* new_parent cannot be NULL in this case */ - hlist_for_each_entry(child, &core->new_parent->children, + /* change.parent cannot be NULL in this case */ + hlist_for_each_entry(child, &core->change.parent->children, child_node) clk_calc_subtree(child); } else { clk_calc_subtree(core); } + /* Construct the list of changes */ + clk_prepare_changes(&changes, top); + /* notify that we are about to change rates */ fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); if (fail_clk) { @@ -2071,7 +2153,19 @@ static int clk_core_set_rate_nolock(struct clk_core *core, } /* change the rates */ - clk_change_rate(top); + ret = clk_change_rates(&changes); + list_for_each_entry_safe(change, tmp, &changes, change_list) { + change->rate = 0; + change->parent = NULL; + list_del_init(&change->change_list); + } + + if (ret) { + pr_debug("%s: failed to set %s rate via top clk %s\n", __func__, + core->name, top->name); + clk_propagate_rate_change(top, ABORT_RATE_CHANGE); + goto err; + } core->req_rate = req_rate; err: @@ -3338,6 +3432,8 @@ struct clk *clk_register(struct device *dev, struct clk_hw *hw) core->max_rate = ULONG_MAX; INIT_LIST_HEAD(&core->prepare_list); INIT_LIST_HEAD(&core->enable_list); + INIT_LIST_HEAD(&core->change.change_list); + core->change.core = core; hw->core = core; /* allocate local copy in case parent_names is __initdata */ From patchwork Tue Mar 5 04:49:34 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Derek Basehore X-Patchwork-Id: 10838963 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 2A45E17E0 for ; Tue, 5 Mar 2019 04:51:08 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1471C2BC70 for ; Tue, 5 Mar 2019 04:51:08 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 07EDB2BC7B; Tue, 5 Mar 2019 04:51:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 3D8582BCEA for ; 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It allows clks to setup an intermediate state when clk rates are changed. One use case for this is when a clk needs to switch to a safe parent when its PLL ancestor changes rates. This is needed when a PLL cannot guarantee that it will not exceed the new rate before it locks. The set_rate, set_parent, and set_rate_and_parent callbacks are used with the pre_rate_req callback. Signed-off-by: Derek Basehore --- drivers/clk/clk.c | 207 ++++++++++++++++++++++++++++++++--- include/linux/clk-provider.h | 10 ++ 2 files changed, 200 insertions(+), 17 deletions(-) diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c index 1637dc262884..b86940ca3c81 100644 --- a/drivers/clk/clk.c +++ b/drivers/clk/clk.c @@ -59,6 +59,7 @@ struct clk_core { unsigned long rate; unsigned long req_rate; struct clk_change change; + struct clk_change pre_change; struct clk_core *new_child; unsigned long flags; bool orphan; @@ -1920,6 +1921,141 @@ static struct clk_core *clk_propagate_rate_change(struct clk_core *core, return fail_clk; } +static void clk_add_change(struct list_head *changes, + struct clk_change *change, + struct clk_core *parent, + unsigned long rate) +{ + change->parent = parent; + change->rate = rate; + list_add(&change->change_list, changes); +} + +static int clk_prepare_pre_changes(struct list_head *pre_changes, + struct list_head *post_changes, + struct clk_core *core, + unsigned long rate) +{ + while (core) { + struct clk_core *parent = core->parent; + unsigned long new_rate, min_rate, max_rate, best_parent_rate; + int ret; + + clk_core_get_boundaries(core, &min_rate, &max_rate); + /* TODO: change to clk_core_can_round() */ + if (clk_core_can_round(core)) { + struct clk_rate_request req; + + req.rate = rate; + req.min_rate = min_rate; + req.max_rate = max_rate; + + clk_core_init_rate_req(core, &req); + + ret = clk_core_determine_round_nolock(core, &req); + if (ret < 0) + return -EINVAL; + + best_parent_rate = req.best_parent_rate; + new_rate = req.rate; + parent = req.best_parent_hw ? req.best_parent_hw->core : NULL; + + if (new_rate < min_rate || new_rate > max_rate) + return -EINVAL; + } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) { + /* pass-through clock without adjustable parent */ + return -EINVAL; + } else { + core = parent; + continue; + } + + if (parent != core->parent || new_rate != core->rate) { + clk_add_change(pre_changes, &core->pre_change, parent, + new_rate); + if (list_empty(&core->change.change_list)) + clk_add_change(post_changes, &core->change, + core->parent, core->rate); + } + + core = parent; + } + + return -EINVAL; +} + +static int clk_pre_rate_req(struct list_head *pre_changes, + struct list_head *post_changes, + struct clk_core *core) +{ + struct clk_core *child, *parent = core->parent; + struct clk_rate_request next, pre; + struct clk_change *change, *tmp; + LIST_HEAD(tmp_list); + int ret; + + /* The change list needs to be prepared already. */ + WARN_ON(list_empty(&core->change.change_list)); + + if (!list_empty(&core->pre_change.change_list)) + return -EINVAL; + + list_add(&core->pre_change.change_list, &tmp_list); + while (!list_empty(&tmp_list)) { + change = list_first_entry(&tmp_list, struct clk_change, + change_list); + core = change->core; + list_del_init(&core->pre_change.change_list); + hlist_for_each_entry(child, &core->children, child_node) { + if (!list_empty(&core->pre_change.change_list)) { + ret = -EINVAL; + goto err; + } + + list_add(&child->pre_change.change_list, &tmp_list); + } + + if (!core->ops->pre_rate_req) + continue; + + parent = core->change.parent ? core->change.parent : + core->parent; + if (parent) { + next.best_parent_hw = parent->hw; + next.best_parent_rate = parent->change.rate; + } + + next.rate = core->change.rate; + clk_core_get_boundaries(core, &next.min_rate, &next.max_rate); + ret = core->ops->pre_rate_req(core->hw, &next, &pre); + if (ret < 0) + goto err; + + /* + * A return value of 0 means that no pre_rate_req change is + * needed. + */ + if (ret == 0) + continue; + + parent = pre.best_parent_hw ? pre.best_parent_hw->core : NULL; + clk_add_change(pre_changes, &core->pre_change, parent, + pre.rate); + if (parent != core->parent && + pre.best_parent_rate != parent->rate) + ret = clk_prepare_pre_changes(pre_changes, post_changes, + parent, + pre.best_parent_rate); + } + + return 0; +err: + list_for_each_entry_safe(change, tmp, &tmp_list, change_list) + list_del_init(&change->core->pre_change.change_list); + + return ret; +} + /* * walk down a subtree and set the new rates notifying the rate * change on the way @@ -2028,7 +2164,7 @@ static int clk_change_rate(struct clk_change *change) static int clk_change_rates(struct list_head *list) { - struct clk_change *change, *tmp; + struct clk_change *change; int ret = 0; /* @@ -2099,13 +2235,25 @@ static unsigned long clk_core_req_round_rate_nolock(struct clk_core *core, return ret ? 0 : req.rate; } +static void clk_del_change_list_entries(struct list_head *changes) +{ + struct clk_change *change, *tmp; + + list_for_each_entry_safe(change, tmp, changes, change_list) { + change->rate = 0; + change->parent = NULL; + list_del_init(&change->change_list); + } +} + static int clk_core_set_rate_nolock(struct clk_core *core, unsigned long req_rate) { struct clk_core *top, *fail_clk, *child; - struct clk_change *change, *tmp; unsigned long rate; + LIST_HEAD(pre_changes); LIST_HEAD(changes); + LIST_HEAD(post_changes); int ret = 0; if (!core) @@ -2133,7 +2281,7 @@ static int clk_core_set_rate_nolock(struct clk_core *core, if (top != core) { /* change.parent cannot be NULL in this case */ hlist_for_each_entry(child, &core->change.parent->children, - child_node) + child_node) clk_calc_subtree(child); } else { clk_calc_subtree(core); @@ -2142,33 +2290,54 @@ static int clk_core_set_rate_nolock(struct clk_core *core, /* Construct the list of changes */ clk_prepare_changes(&changes, top); + /* We need a separate list for these changes due to error handling. */ + ret = clk_pre_rate_req(&pre_changes, &post_changes, top); + if (ret) { + pr_debug("%s: failed pre_rate_req via top clk %s: %d\n", + __func__, top->name, ret); + goto pre_rate_req; + } + /* notify that we are about to change rates */ fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); if (fail_clk) { pr_debug("%s: failed to set %s rate\n", __func__, - fail_clk->name); - clk_propagate_rate_change(top, ABORT_RATE_CHANGE); + fail_clk->name); ret = -EBUSY; - goto err; + goto prop_rate; } - /* change the rates */ - ret = clk_change_rates(&changes); - list_for_each_entry_safe(change, tmp, &changes, change_list) { - change->rate = 0; - change->parent = NULL; - list_del_init(&change->change_list); + ret = clk_change_rates(&pre_changes); + if (ret) { + pr_debug("%s: rate rate changes failed via top clk %s: %d\n", + __func__, top->name, ret); + goto pre_rate_req; } + /* change the rates */ + ret = clk_change_rates(&changes); + clk_del_change_list_entries(&changes); if (ret) { pr_debug("%s: failed to set %s rate via top clk %s\n", __func__, - core->name, top->name); - clk_propagate_rate_change(top, ABORT_RATE_CHANGE); - goto err; + core->name, top->name); + goto change_rates; } + ret = clk_change_rates(&post_changes); + clk_del_change_list_entries(&post_changes); + + clk_del_change_list_entries(&pre_changes); core->req_rate = req_rate; -err: + + return 0; + +change_rates: + WARN_ON(clk_change_rates(&pre_changes)); +prop_rate: + clk_propagate_rate_change(top, ABORT_RATE_CHANGE); +pre_rate_req: + clk_del_change_list_entries(&pre_changes); + clk_del_change_list_entries(&changes); clk_pm_runtime_put(core); return ret; @@ -3186,7 +3355,9 @@ static int __clk_core_init(struct clk_core *core) /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */ if (core->ops->set_rate && - !((core->ops->round_rate || core->ops->determine_rate) && + !((core->ops->round_rate || + core->ops->determine_rate || + core->ops->pre_rate_req) && core->ops->recalc_rate)) { pr_err("%s: %s must implement .round_rate or .determine_rate in addition to .recalc_rate\n", __func__, core->name); @@ -3433,7 +3604,9 @@ struct clk *clk_register(struct device *dev, struct clk_hw *hw) INIT_LIST_HEAD(&core->prepare_list); INIT_LIST_HEAD(&core->enable_list); INIT_LIST_HEAD(&core->change.change_list); + INIT_LIST_HEAD(&core->pre_change.change_list); core->change.core = core; + core->pre_change.core = core; hw->core = core; /* allocate local copy in case parent_names is __initdata */ diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index e443fa9fa859..c11ca22e2089 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -133,6 +133,13 @@ struct clk_duty { * actually supported by the clock, and optionally the parent clock * that should be used to provide the clock rate. * + * @pre_rate_req: Given the next state that the clk will enter via a + * clk_rate_request struct, next, fill in another clk_rate_request + * struct, pre, with any desired intermediate state to change to + * before the state in next is applied. Returns positive to request + * an intermediate state transition, 0 for no transition, and + * -EERROR otherwise. + * * @set_parent: Change the input source of this clock; for clocks with multiple * possible parents specify a new parent by passing in the index * as a u8 corresponding to the parent in either the .parent_names @@ -231,6 +238,9 @@ struct clk_ops { unsigned long *parent_rate); int (*determine_rate)(struct clk_hw *hw, struct clk_rate_request *req); + int (*pre_rate_req)(struct clk_hw *hw, + const struct clk_rate_request *next, + struct clk_rate_request *pre); int (*set_parent)(struct clk_hw *hw, u8 index); u8 (*get_parent)(struct clk_hw *hw); int (*set_rate)(struct clk_hw *hw, unsigned long rate, From patchwork Tue Mar 5 04:49:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Derek Basehore X-Patchwork-Id: 10838955 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 16D5E1669 for ; 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Mon, 04 Mar 2019 20:49:48 -0800 (PST) Received: from exogeni.mtv.corp.google.com ([2620:15c:202:1:db8d:8e3f:2514:5db8]) by smtp.gmail.com with ESMTPSA id z15sm15893883pgc.25.2019.03.04.20.49.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 04 Mar 2019 20:49:47 -0800 (PST) From: Derek Basehore To: linux-kernel@vger.kernel.org Subject: [PATCH v2 5/6] docs: driver-api: add pre_rate_req to clk documentation Date: Mon, 4 Mar 2019 20:49:35 -0800 Message-Id: <20190305044936.22267-6-dbasehore@chromium.org> X-Mailer: git-send-email 2.21.0.352.gf09ad66450-goog In-Reply-To: <20190305044936.22267-1-dbasehore@chromium.org> References: <20190305044936.22267-1-dbasehore@chromium.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190304_204948_579560_E881A961 X-CRM114-Status: GOOD ( 10.46 ) X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aisheng.dong@nxp.com, Derek Basehore , heiko@sntech.de, linux-doc@vger.kernel.org, sboyd@kernel.org, mturquette@baylibre.com, corbet@lwn.net, linux-rockchip@lists.infradead.org, mchehab+samsung@kernel.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, jbrunet@baylibre.com Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org X-Virus-Scanned: ClamAV using ClamSMTP This adds documentation for the new clk op pre_rate_req. Signed-off-by: Derek Basehore --- Documentation/driver-api/clk.rst | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/driver-api/clk.rst b/Documentation/driver-api/clk.rst index 593cca5058b1..917f6ac29645 100644 --- a/Documentation/driver-api/clk.rst +++ b/Documentation/driver-api/clk.rst @@ -82,6 +82,9 @@ the operations defined in clk-provider.h:: unsigned long *parent_rate); int (*determine_rate)(struct clk_hw *hw, struct clk_rate_request *req); + int (*pre_rate_req)(struct clk_hw *hw, + const struct clk_rate_request *next, + struct clk_rate_request *pre); int (*set_parent)(struct clk_hw *hw, u8 index); u8 (*get_parent)(struct clk_hw *hw); int (*set_rate)(struct clk_hw *hw, @@ -224,6 +227,8 @@ optional or must be evaluated on a case-by-case basis. +----------------+------+-------------+---------------+-------------+------+ |.determine_rate | | y [1]_ | | | | +----------------+------+-------------+---------------+-------------+------+ + |.pre_rate_req | | y [1]_ | | | | + +----------------+------+-------------+---------------+-------------+------+ |.set_rate | | y | | | | +----------------+------+-------------+---------------+-------------+------+ +----------------+------+-------------+---------------+-------------+------+ @@ -238,7 +243,7 @@ optional or must be evaluated on a case-by-case basis. |.init | | | | | | +----------------+------+-------------+---------------+-------------+------+ -.. [1] either one of round_rate or determine_rate is required. +.. [1] one of round_rate, determine_rate, or pre_rate_req is required. Finally, register your clock at run-time with a hardware-specific registration function. This function simply populates struct clk_foo's From patchwork Tue Mar 5 04:49:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Derek Basehore X-Patchwork-Id: 10838967 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7D386139A for ; Tue, 5 Mar 2019 04:51:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 664982BD70 for ; Tue, 5 Mar 2019 04:51:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5A1032BDA5; Tue, 5 Mar 2019 04:51:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.2 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED autolearn=unavailable version=3.3.1 Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id 90BA72BD70 for ; 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This has the benefit of the clk not changing parents behind the back of the common clk framework. It also changes the divider setting for the alt parent to only divide when the alt parent rate is higher than both the old and new rates. Signed-off-by: Derek Basehore --- drivers/clk/rockchip/clk-cpu.c | 256 ++++++++++++++++++--------------- 1 file changed, 137 insertions(+), 119 deletions(-) diff --git a/drivers/clk/rockchip/clk-cpu.c b/drivers/clk/rockchip/clk-cpu.c index 32c19c0f1e14..3829e8e75c9e 100644 --- a/drivers/clk/rockchip/clk-cpu.c +++ b/drivers/clk/rockchip/clk-cpu.c @@ -45,8 +45,6 @@ * @alt_parent: alternate parent clock to use when switching the speed * of the primary parent clock. * @reg_base: base register for cpu-clock values. - * @clk_nb: clock notifier registered for changes in clock speed of the - * primary parent clock. * @rate_count: number of rates in the rate_table * @rate_table: pll-rates and their associated dividers * @reg_data: cpu-specific register settings @@ -60,7 +58,6 @@ struct rockchip_cpuclk { struct clk *alt_parent; void __iomem *reg_base; - struct notifier_block clk_nb; unsigned int rate_count; struct rockchip_cpuclk_rate_table *rate_table; const struct rockchip_cpuclk_reg_data *reg_data; @@ -78,12 +75,21 @@ static const struct rockchip_cpuclk_rate_table *rockchip_get_cpuclk_settings( cpuclk->rate_table; int i; + /* + * Find the lowest rate settings for which the prate is greater than or + * equal to the rate. Final rates should match exactly, but some + * intermediate rates from pre_rate_req will not exactly match, but the + * settings for a higher prate will work. + */ for (i = 0; i < cpuclk->rate_count; i++) { - if (rate == rate_table[i].prate) - return &rate_table[i]; + if (rate > rate_table[i].prate) + break; } - return NULL; + if (i == 0 || i == cpuclk->rate_count) + return NULL; + + return &rate_table[i - 1]; } static unsigned long rockchip_cpuclk_recalc_rate(struct clk_hw *hw, @@ -98,9 +104,70 @@ static unsigned long rockchip_cpuclk_recalc_rate(struct clk_hw *hw, return parent_rate / (clksel0 + 1); } -static const struct clk_ops rockchip_cpuclk_ops = { - .recalc_rate = rockchip_cpuclk_recalc_rate, -}; +static int rockchip_cpuclk_pre_rate_req(struct clk_hw *hw, + const struct clk_rate_request *next, + struct clk_rate_request *pre) +{ + struct rockchip_cpuclk *cpuclk = container_of(hw, + struct rockchip_cpuclk, hw); + const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data; + unsigned long alt_prate, alt_div, hi_rate; + + pre->best_parent_hw = __clk_get_hw(cpuclk->alt_parent); + alt_prate = clk_get_rate(cpuclk->alt_parent); + pre->best_parent_rate = alt_prate; + hi_rate = max_t(unsigned long, next->rate, clk_hw_get_rate(hw)); + + /* Set dividers if we would go above the current or next rate. */ + if (alt_prate > hi_rate) { + alt_div = DIV_ROUND_UP(alt_prate, hi_rate); + if (alt_div > reg_data->div_core_mask) { + pr_warn("%s: limiting alt-divider %lu to %d\n", + __func__, alt_div, reg_data->div_core_mask); + alt_div = reg_data->div_core_mask; + } + + pre->rate = alt_prate / alt_div; + } else { + pre->rate = alt_prate; + } + + return 1; +} + +static int rockchip_cpuclk_set_parent(struct clk_hw *hw, u8 index) +{ + struct rockchip_cpuclk *cpuclk = container_of(hw, + struct rockchip_cpuclk, hw); + const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data; + unsigned long flags; + + spin_lock_irqsave(cpuclk->lock, flags); + writel(HIWORD_UPDATE(index, + reg_data->mux_core_mask, + reg_data->mux_core_shift), + cpuclk->reg_base + reg_data->core_reg); + spin_unlock_irqrestore(cpuclk->lock, flags); + + return 0; +} + +static u8 rockchip_cpuclk_get_parent(struct clk_hw *hw) +{ + struct rockchip_cpuclk *cpuclk = container_of(hw, + struct rockchip_cpuclk, hw); + const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data; + unsigned long flags; + u32 val; + + spin_lock_irqsave(cpuclk->lock, flags); + val = readl_relaxed(cpuclk->reg_base + reg_data->core_reg); + val >>= reg_data->mux_core_shift; + val &= reg_data->mux_core_mask; + spin_unlock_irqrestore(cpuclk->lock, flags); + + return val; +} static void rockchip_cpuclk_set_dividers(struct rockchip_cpuclk *cpuclk, const struct rockchip_cpuclk_rate_table *rate) @@ -120,131 +187,92 @@ static void rockchip_cpuclk_set_dividers(struct rockchip_cpuclk *cpuclk, } } -static int rockchip_cpuclk_pre_rate_change(struct rockchip_cpuclk *cpuclk, - struct clk_notifier_data *ndata) +static int rockchip_cpuclk_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) { + struct rockchip_cpuclk *cpuclk = container_of(hw, + struct rockchip_cpuclk, hw); const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data; - const struct rockchip_cpuclk_rate_table *rate; - unsigned long alt_prate, alt_div; - unsigned long flags; + const struct rockchip_cpuclk_rate_table *rate_divs; + unsigned long div = (parent_rate / rate) - 1; + unsigned long old_rate, flags; - /* check validity of the new rate */ - rate = rockchip_get_cpuclk_settings(cpuclk, ndata->new_rate); - if (!rate) { - pr_err("%s: Invalid rate : %lu for cpuclk\n", - __func__, ndata->new_rate); + if (div > reg_data->div_core_mask || rate > parent_rate) { + pr_err("%s: Invalid rate : %lu %lu for cpuclk\n", __func__, + rate, parent_rate); return -EINVAL; } - alt_prate = clk_get_rate(cpuclk->alt_parent); - + old_rate = clk_hw_get_rate(hw); + rate_divs = rockchip_get_cpuclk_settings(cpuclk, rate); spin_lock_irqsave(cpuclk->lock, flags); + if (old_rate < rate) + rockchip_cpuclk_set_dividers(cpuclk, rate_divs); - /* - * If the old parent clock speed is less than the clock speed - * of the alternate parent, then it should be ensured that at no point - * the armclk speed is more than the old_rate until the dividers are - * set. - */ - if (alt_prate > ndata->old_rate) { - /* calculate dividers */ - alt_div = DIV_ROUND_UP(alt_prate, ndata->old_rate) - 1; - if (alt_div > reg_data->div_core_mask) { - pr_warn("%s: limiting alt-divider %lu to %d\n", - __func__, alt_div, reg_data->div_core_mask); - alt_div = reg_data->div_core_mask; - } - - /* - * Change parents and add dividers in a single transaction. - * - * NOTE: we do this in a single transaction so we're never - * dividing the primary parent by the extra dividers that were - * needed for the alt. - */ - pr_debug("%s: setting div %lu as alt-rate %lu > old-rate %lu\n", - __func__, alt_div, alt_prate, ndata->old_rate); - - writel(HIWORD_UPDATE(alt_div, reg_data->div_core_mask, - reg_data->div_core_shift) | - HIWORD_UPDATE(reg_data->mux_core_alt, - reg_data->mux_core_mask, - reg_data->mux_core_shift), - cpuclk->reg_base + reg_data->core_reg); - } else { - /* select alternate parent */ - writel(HIWORD_UPDATE(reg_data->mux_core_alt, - reg_data->mux_core_mask, - reg_data->mux_core_shift), - cpuclk->reg_base + reg_data->core_reg); - } + writel(HIWORD_UPDATE(div, + reg_data->div_core_mask, + reg_data->div_core_shift), + cpuclk->reg_base + reg_data->core_reg); + if (old_rate > rate) + rockchip_cpuclk_set_dividers(cpuclk, rate_divs); spin_unlock_irqrestore(cpuclk->lock, flags); + return 0; } -static int rockchip_cpuclk_post_rate_change(struct rockchip_cpuclk *cpuclk, - struct clk_notifier_data *ndata) +static int rockchip_cpuclk_set_rate_and_parent(struct clk_hw *hw, + unsigned long rate, + unsigned long parent_rate, + u8 index) { + struct rockchip_cpuclk *cpuclk = container_of(hw, + struct rockchip_cpuclk, hw); const struct rockchip_cpuclk_reg_data *reg_data = cpuclk->reg_data; - const struct rockchip_cpuclk_rate_table *rate; - unsigned long flags; + const struct rockchip_cpuclk_rate_table *rate_divs; + unsigned long div = (parent_rate / rate) - 1; + unsigned long old_rate, flags; - rate = rockchip_get_cpuclk_settings(cpuclk, ndata->new_rate); - if (!rate) { - pr_err("%s: Invalid rate : %lu for cpuclk\n", - __func__, ndata->new_rate); + if (div > reg_data->div_core_mask || rate > parent_rate) { + pr_err("%s: Invalid rate : %lu %lu for cpuclk\n", __func__, + rate, parent_rate); return -EINVAL; } + old_rate = clk_hw_get_rate(hw); + rate_divs = rockchip_get_cpuclk_settings(cpuclk, rate); spin_lock_irqsave(cpuclk->lock, flags); - - if (ndata->old_rate < ndata->new_rate) - rockchip_cpuclk_set_dividers(cpuclk, rate); - /* - * post-rate change event, re-mux to primary parent and remove dividers. - * - * NOTE: we do this in a single transaction so we're never dividing the - * primary parent by the extra dividers that were needed for the alt. + * TODO: This ain't great... Should change the get_cpuclk_settings code + * to work with inexact matches to work with alt parent rates. */ - - writel(HIWORD_UPDATE(0, reg_data->div_core_mask, - reg_data->div_core_shift) | - HIWORD_UPDATE(reg_data->mux_core_main, - reg_data->mux_core_mask, - reg_data->mux_core_shift), + if (old_rate < rate) + rockchip_cpuclk_set_dividers(cpuclk, rate_divs); + + writel(HIWORD_UPDATE(div, + reg_data->div_core_mask, + reg_data->div_core_shift) | + HIWORD_UPDATE(index, + reg_data->mux_core_mask, + reg_data->mux_core_shift), cpuclk->reg_base + reg_data->core_reg); - - if (ndata->old_rate > ndata->new_rate) - rockchip_cpuclk_set_dividers(cpuclk, rate); + /* Not technically correct */ + if (old_rate > rate) + rockchip_cpuclk_set_dividers(cpuclk, rate_divs); spin_unlock_irqrestore(cpuclk->lock, flags); + return 0; } -/* - * This clock notifier is called when the frequency of the parent clock - * of cpuclk is to be changed. This notifier handles the setting up all - * the divider clocks, remux to temporary parent and handling the safe - * frequency levels when using temporary parent. - */ -static int rockchip_cpuclk_notifier_cb(struct notifier_block *nb, - unsigned long event, void *data) -{ - struct clk_notifier_data *ndata = data; - struct rockchip_cpuclk *cpuclk = to_rockchip_cpuclk_nb(nb); - int ret = 0; - - pr_debug("%s: event %lu, old_rate %lu, new_rate: %lu\n", - __func__, event, ndata->old_rate, ndata->new_rate); - if (event == PRE_RATE_CHANGE) - ret = rockchip_cpuclk_pre_rate_change(cpuclk, ndata); - else if (event == POST_RATE_CHANGE) - ret = rockchip_cpuclk_post_rate_change(cpuclk, ndata); - - return notifier_from_errno(ret); -} +static const struct clk_ops rockchip_cpuclk_ops = { + .recalc_rate = rockchip_cpuclk_recalc_rate, + .pre_rate_req = rockchip_cpuclk_pre_rate_req, + .set_parent = rockchip_cpuclk_set_parent, + .get_parent = rockchip_cpuclk_get_parent, + .set_rate = rockchip_cpuclk_set_rate, + .set_rate_and_parent = rockchip_cpuclk_set_rate_and_parent, +}; struct clk *rockchip_clk_register_cpuclk(const char *name, const char *const *parent_names, u8 num_parents, @@ -267,8 +295,8 @@ struct clk *rockchip_clk_register_cpuclk(const char *name, return ERR_PTR(-ENOMEM); init.name = name; - init.parent_names = &parent_names[reg_data->mux_core_main]; - init.num_parents = 1; + init.parent_names = parent_names; + init.num_parents = num_parents; init.ops = &rockchip_cpuclk_ops; /* only allow rate changes when we have a rate table */ @@ -282,7 +310,6 @@ struct clk *rockchip_clk_register_cpuclk(const char *name, cpuclk->reg_base = reg_base; cpuclk->lock = lock; cpuclk->reg_data = reg_data; - cpuclk->clk_nb.notifier_call = rockchip_cpuclk_notifier_cb; cpuclk->hw.init = &init; cpuclk->alt_parent = __clk_lookup(parent_names[reg_data->mux_core_alt]); @@ -309,13 +336,6 @@ struct clk *rockchip_clk_register_cpuclk(const char *name, goto free_alt_parent; } - ret = clk_notifier_register(clk, &cpuclk->clk_nb); - if (ret) { - pr_err("%s: failed to register clock notifier for %s\n", - __func__, name); - goto free_alt_parent; - } - if (nrates > 0) { cpuclk->rate_count = nrates; cpuclk->rate_table = kmemdup(rates, @@ -323,7 +343,7 @@ struct clk *rockchip_clk_register_cpuclk(const char *name, GFP_KERNEL); if (!cpuclk->rate_table) { ret = -ENOMEM; - goto unregister_notifier; + goto free_alt_parent; } } @@ -338,8 +358,6 @@ struct clk *rockchip_clk_register_cpuclk(const char *name, free_rate_table: kfree(cpuclk->rate_table); -unregister_notifier: - clk_notifier_unregister(clk, &cpuclk->clk_nb); free_alt_parent: clk_disable_unprepare(cpuclk->alt_parent); free_cpuclk: