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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: dLC5DajCljROUYk7x8j2wPGUdE7UbuJz0g/cu4epJUctGcAugKUdG4eYXv/lIdTdwcg/sTHurREcyR1F+9jX3mv/9oR3ldRklYrlyS0eSc5tweOHRQkQY7si3F269ofoETO2HHemjbtHSElurc9ZxR60oFRtv6S1sbNu0lLT6JEVDSjEmrqtLEbh1zfXNY/4CcEXEp0qc+3FADo1U340YUdnmddj9ct60lS+zKRFtAxzQHOOBmZ0PCYn4TvN54zKVhWFov2rStUi53d/4/N4QZ/EFy8ArjrJ3vA8wlbjuxNfA75GS030aIVFnb65rX8TogLRrZdZSqkpxoQT9B/DxeAU9w8IZEsqfsi87eT+Wqlo2H6jZKPge/LzajoPJTGHSjROdh5Od6Qei61KKwbLvxRoIxJie4O5rF0TA01I9dtOOlCNMBWcP6wDPkbj4zHlRxm6zLqLI02OqFCM6TQv1SOcAMr5XiohsTb5ny0HwnbMNDP0qfptdXG54qy2YF0xPKa9NuoFGnkW4Dh6WsQXURz8psVgIHuQV1h441VX9XB+b2H1uIP0CwEgrkz8PCG2dtsFNTkkXWZaegyXEJP+FIem5LSQ2UcIsCmPzBelRwgMAEhr3n8ie5SjbWTZOVF1uVhCSt7OXdop+gIjBDedvN6ZmS6rRqguchox/EF3TXy9I1t1HYxToD0ol7KvDsEMESRlGvMZQnr7YovMDSauNv4V3WKfhqB4ru8UO1/2dTU7SmPAcVxcK9sRHIFTTwIV10dQRppgEmOd1nO5sOw8bIvNrhJmMhqC9G0fb/6az86UbRaX65FAfjm7jysv0lFDWVKdXUvojCLYWIstD591kBiUly5kOAh+2/Ow5xo/3OCtsFxrT/I+YlHIMVVwqRCR1Vz3FY5SdxAK+Dnn1xHHiGiBrK0Yg83dShSsX8V9cay557j+wtqrQ0T99rsVdkmsu26mXcylnij7v7zroaLbGF1NpEIz7Te5EarLEbz6FeuMawygt8V/0Yux5XrhR6N5WI+HSZmM3bYhEhFoZSBP2qbWaniyA7xqTyTPel8uArtFcBwyYvd02FkVTHyw7Ct61PWE9UdqeZ8/+P6DbRMf8HSpTEDf3cu3NcN4uS0kncVVb2wm3bTvadU6g7Uc7uwlgOLflP92hzKrCg7ZybIcN8qwVi4m3ALfKDVNKFwpeaBynE9YA/F0oYoDaK/OByr9G/zyetl3tR2y9kQ4buz2ZVBqmQyTUnEdHnxwHLjOaofDf6uEvpmaQ5L4EMuAIT8ruiS47tlQr1mL/K6SbCHUrVxqHZTIoGSuF7bcDorlmGJQVinLz4CbfM8gX+fGCd3G1b8jafJ6J9jjkgquoQb56qotzMC+zkBc3PlM+XGKGkFT22CWW6cshcChXpQckTdmVIKHouzwM6XYjaNk8pfU4R5JHafO3yqMRJBp/+Un4gmIh9dvNskm03zxFFghiqgICKqyl/sK++TWjDXKf7sb4POWuTM/zKcQq24XMblBdorMAMhltrlqLNGz1Id0Ja2neGotYIQ3bcNHPhKA9sc4pMi40NGTlbf8g0/DJtrOQbaMq6GI2M/3H0Ql0IjZlvu1 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8e1e4978-5052-413e-9e11-08dcb6a6ef78 X-MS-Exchange-CrossTenant-AuthSource: DB7PR04MB5003.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Aug 2024 06:05:28.0482 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: u2xAgZFM73RepRaeqZidTOPYxp70+iuNRupE1kQvr8Pl3X9eh+N/hIAzgNThg+vXt9LcG+6aDunECuQNEwEXSQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU4PR04MB10696 From: Carlos Song According to I3C spec 6.2 Timing Specification, the Open Drain High Period of SCL Clock timing for first broadcast address should be adjusted to 200ns at least. I3C device working as i2c device will see the broadcast to close its Spike Filter then change to work at I3C mode. After that I3C open drain SCL high level should be adjusted back. Signed-off-by: Carlos Song Reviewed-by: Frank Li --- - Fix set_speed description from Frank's comment --- drivers/i3c/master.c | 12 ++++++++++++ include/linux/i3c/master.h | 18 ++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c index 7028f03c2c42..6f3eb710a75d 100644 --- a/drivers/i3c/master.c +++ b/drivers/i3c/master.c @@ -1868,6 +1868,12 @@ static int i3c_master_bus_init(struct i3c_master_controller *master) goto err_bus_cleanup; } + if (master->ops->set_speed) { + ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_SLOW_SPEED); + if (ret) + goto err_bus_cleanup; + } + /* * Reset all dynamic address that may have been assigned before * (assigned by the bootloader for example). @@ -1876,6 +1882,12 @@ static int i3c_master_bus_init(struct i3c_master_controller *master) if (ret && ret != I3C_ERROR_M2) goto err_bus_cleanup; + if (master->ops->set_speed) { + master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED); + if (ret) + goto err_bus_cleanup; + } + /* Disable all slave events before starting DAA. */ ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR, I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR | diff --git a/include/linux/i3c/master.h b/include/linux/i3c/master.h index 074f632868d9..b8daf09a9a4a 100644 --- a/include/linux/i3c/master.h +++ b/include/linux/i3c/master.h @@ -277,6 +277,20 @@ enum i3c_bus_mode { I3C_BUS_MODE_MIXED_SLOW, }; +/** + * enum i3c_open_drain_speed - I3C open drain speed + * @I3C_OPEN_DRAIN_SLOW_SPEED: Slow open drain speed for First Broadcast Address. + * First Broadcast Address in this speed is visible to all I2C/I3C + * devices on the I3C bus. I3C device working as a I2C device will + * turn off its 50ns Spike Filter to change to work in I3C mode. + * @I3C_OPEN_DRAIN_NORMAL_SPEED: Normal open drain speed configured according to + * I3C bus mode. + */ +enum i3c_open_drain_speed { + I3C_OPEN_DRAIN_SLOW_SPEED, + I3C_OPEN_DRAIN_NORMAL_SPEED, +}; + /** * enum i3c_addr_slot_status - I3C address slot status * @I3C_ADDR_SLOT_FREE: address is free @@ -436,6 +450,9 @@ struct i3c_bus { * NULL. * @enable_hotjoin: enable hot join event detect. * @disable_hotjoin: disable hot join event detect. + * @set_speed: adjust I3C bus speed, which is generally used for reducing the speed + * for first broardcast address. + * */ struct i3c_master_controller_ops { int (*bus_init)(struct i3c_master_controller *master); @@ -464,6 +481,7 @@ struct i3c_master_controller_ops { struct i3c_ibi_slot *slot); int (*enable_hotjoin)(struct i3c_master_controller *master); int (*disable_hotjoin)(struct i3c_master_controller *master); + int (*set_speed)(struct i3c_master_controller *master, enum i3c_open_drain_speed speed); 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Signed-off-by: Carlos Song Reviewed-by: Frank Li --- - Adjust variable definition order - Add mctrl_config description to fix build warning --- drivers/i3c/master/svc-i3c-master.c | 52 +++++++++++++++++++++++++++++ 1 file changed, 52 insertions(+) diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i3c-master.c index 7c30f58e344b..423db3dca257 100644 --- a/drivers/i3c/master/svc-i3c-master.c +++ b/drivers/i3c/master/svc-i3c-master.c @@ -184,6 +184,7 @@ struct svc_i3c_regs_save { * @ibi.lock: IBI lock * @lock: Transfer lock, protect between IBI work thread and callbacks from master * @enabled_events: Bit masks for enable events (IBI, HotJoin). + * @mctrl_config: Configuration value in SVC_I3C_MCTRL for setting speed back. */ struct svc_i3c_master { struct i3c_master_controller base; @@ -214,6 +215,7 @@ struct svc_i3c_master { } ibi; struct mutex lock; int enabled_events; + u32 mctrl_config; }; /** @@ -531,6 +533,54 @@ static irqreturn_t svc_i3c_master_irq_handler(int irq, void *dev_id) return IRQ_HANDLED; } +static int svc_i3c_master_set_speed(struct i3c_master_controller *m, + enum i3c_open_drain_speed speed) +{ + struct svc_i3c_master *master = to_svc_i3c_master(m); + struct i3c_bus *bus = i3c_master_get_bus(&master->base); + u32 ppbaud, odbaud, odhpp, mconfig; + unsigned long fclk_rate; + int ret; + + ret = pm_runtime_resume_and_get(master->dev); + if (ret < 0) { + dev_err(master->dev, "<%s> Cannot get runtime PM.\n", __func__); + return ret; + } + + switch (speed) { + case I3C_OPEN_DRAIN_SLOW_SPEED: + fclk_rate = clk_get_rate(master->fclk); + if (!fclk_rate) { + ret = -EINVAL; + goto rpm_out; + } + /* + * Set 50% duty-cycle I2C speed to I3C OPEN-DRAIN mode, so the first + * broadcast address is visible to all I2C/I3C devices on the I3C bus. + * I3C device working as a I2C device will turn off its 50ns Spike + * Filter to change to I3C mode. + */ + mconfig = master->mctrl_config; + ppbaud = FIELD_GET(GENMASK(11, 8), mconfig); + odhpp = 0; + odbaud = DIV_ROUND_UP(fclk_rate, bus->scl_rate.i2c * (2 + 2 * ppbaud)) - 1; + mconfig &= ~GENMASK(24, 16); + mconfig |= SVC_I3C_MCONFIG_ODBAUD(odbaud) | SVC_I3C_MCONFIG_ODHPP(odhpp); + writel(mconfig, master->regs + SVC_I3C_MCONFIG); + break; + case I3C_OPEN_DRAIN_NORMAL_SPEED: + writel(master->mctrl_config, master->regs + SVC_I3C_MCONFIG); + break; + } + +rpm_out: + pm_runtime_mark_last_busy(master->dev); + pm_runtime_put_autosuspend(master->dev); + + return ret; +} + static int svc_i3c_master_bus_init(struct i3c_master_controller *m) { struct svc_i3c_master *master = to_svc_i3c_master(m); @@ -624,6 +674,7 @@ static int svc_i3c_master_bus_init(struct i3c_master_controller *m) SVC_I3C_MCONFIG_I2CBAUD(i2cbaud); writel(reg, master->regs + SVC_I3C_MCONFIG); + master->mctrl_config = reg; /* Master core's registration */ ret = i3c_master_get_free_addr(m, 0); if (ret < 0) @@ -1658,6 +1709,7 @@ static const struct i3c_master_controller_ops svc_i3c_master_ops = { .disable_ibi = svc_i3c_master_disable_ibi, .enable_hotjoin = svc_i3c_master_enable_hotjoin, .disable_hotjoin = svc_i3c_master_disable_hotjoin, + .set_speed = svc_i3c_master_set_speed, }; static int svc_i3c_master_prepare_clks(struct svc_i3c_master *master)