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So change it to fsl,lx2160ar2-pcie and allow fall back to fsl,ls2088a-pcie. Sort compatible string. Fixes: 24cd7ecb3886 ("dt-bindings: PCI: layerscape-pci: Convert to YAML format") Signed-off-by: Frank Li Reviewed-by: Rob Herring (Arm) --- .../bindings/pci/fsl,layerscape-pcie.yaml | 26 ++++++++++++---------- 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie.yaml index 793986c5af7ff..daeab5c0758d1 100644 --- a/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,layerscape-pcie.yaml @@ -22,18 +22,20 @@ description: properties: compatible: - enum: - - fsl,ls1021a-pcie - - fsl,ls2080a-pcie - - fsl,ls2085a-pcie - - fsl,ls2088a-pcie - - fsl,ls1088a-pcie - - fsl,ls1046a-pcie - - fsl,ls1043a-pcie - - fsl,ls1012a-pcie - - fsl,ls1028a-pcie - - fsl,lx2160a-pcie - + oneOf: + - enum: + - fsl,ls1012a-pcie + - fsl,ls1021a-pcie + - fsl,ls1028a-pcie + - fsl,ls1043a-pcie + - fsl,ls1046a-pcie + - fsl,ls1088a-pcie + - fsl,ls2080a-pcie + - fsl,ls2085a-pcie + - fsl,ls2088a-pcie + - items: + - const: fsl,lx2160ar2-pcie + - const: fsl,ls2088a-pcie reg: maxItems: 2 From patchwork Mon Aug 26 21:38:33 2024 Content-Type: text/plain; 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Although uboot fixup can change compatible string fsl,lx2160a-pcie to fsl,ls2088a-pcie since 2019, it is quite confused and should correctly reflect hardware status. So add fsl-lx2160a-rev2.dtsi to overwrite pcie's compatible string. Add PCIe EP nodes. Signed-off-by: Frank Li --- .../arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi | 170 +++++++++++++++++++++ arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi | 2 +- 2 files changed, 171 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi new file mode 100644 index 0000000000000..432e54f6f7ae5 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rev2.dtsi @@ -0,0 +1,170 @@ +// SPDX-License-Identifier: (GPL-2.0 OR MIT) +// +// Device Tree file for LX2160 REV2 +// +// Copyright 2025 NXP + +/dts-v1/; + +#include "fsl-lx2160a.dtsi" + +&pcie1 { + compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; + reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ + 0x80 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; + + ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000 + 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; + + interrupts = ; + interrupt-names = "intr"; + + /delete-property/ apio-wins; + /delete-property/ ppio-wins; +}; + +&pcie2 { + compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; + reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ + 0x88 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; + + ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000 + 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; + + interrupts = ; + interrupt-names = "intr"; + + /delete-property/ apio-wins; + /delete-property/ ppio-wins; +}; + +&pcie3 { + compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; + reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ + 0x90 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; + + ranges = <0x81000000 0x0 0x00000000 0x90 0x00010000 0x0 0x00010000 + 0x82000000 0x0 0x40000000 0x90 0x40000000 0x0 0x40000000>; + + interrupts = ; + interrupt-names = "intr"; + + /delete-property/ apio-wins; + /delete-property/ ppio-wins; +}; + + +&pcie4 { + compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; + reg = <0x00 0x03700000 0x0 0x00100000 /* controller registers */ + 0x98 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; + + ranges = <0x81000000 0x0 0x00000000 0x98 0x00010000 0x0 0x00010000 + 0x82000000 0x0 0x40000000 0x98 0x40000000 0x0 0x40000000>; + + interrupts = ; + interrupt-names = "intr"; + + /delete-property/ apio-wins; + /delete-property/ ppio-wins; +}; + +&pcie5 { + compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; + reg = <0x00 0x03800000 0x0 0x00100000 /* controller registers */ + 0xa0 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; + + ranges = <0x81000000 0x0 0x00000000 0xa0 0x00010000 0x0 0x00010000 + 0x82000000 0x0 0x40000000 0xa0 0x40000000 0x0 0x40000000>; + + interrupts = ; + interrupt-names = "intr"; + + /delete-property/ apio-wins; + /delete-property/ ppio-wins; +}; + +&pcie6 { + compatible = "fsl,lx2160ar2-pcie", "fsl,ls2088a-pcie"; + reg = <0x00 0x03900000 0x0 0x00100000 /* controller registers */ + 0xa8 0x00000000 0x0 0x00002000>; /* configuration space */ + reg-names = "regs", "config"; + + ranges = <0x81000000 0x0 0x00000000 0xa8 0x00010000 0x0 0x00010000 + 0x82000000 0x0 0x40000000 0xa8 0x40000000 0x0 0x40000000>; + + interrupts = ; + interrupt-names = "intr"; + + /delete-property/ apio-wins; + /delete-property/ ppio-wins; +}; + +&soc { + pcie_ep1: pcie-ep@3400000 { + compatible = "fsl,lx2160ar2-pcie-ep"; + reg = <0x00 0x03400000 0x0 0x00100000 + 0x80 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <8>; + num-ib-windows = <8>; + status = "disabled"; + }; + + pcie_ep2: pcie-ep@3500000 { + compatible = "fsl,lx2160ar2-pcie-ep"; + reg = <0x00 0x03500000 0x0 0x00100000 + 0x88 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <8>; + num-ib-windows = <8>; + status = "disabled"; + }; + + pcie_ep3: pcie-ep@3600000 { + compatible = "fsl,lx2160ar2-pcie-ep"; + reg = <0x00 0x03600000 0x0 0x00100000 + 0x90 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <256>; + num-ib-windows = <24>; + status = "disabled"; + }; + + pcie_ep4: pcie-ep@3700000 { + compatible = "fsl,lx2160ar2-pcie-ep"; + reg = <0x00 0x03700000 0x0 0x00100000 + 0x98 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <8>; + num-ib-windows = <8>; + status = "disabled"; + }; + + + pcie_ep5: pcie-ep@3800000 { + compatible = "fsl,lx2160ar2-pcie-ep"; + reg = <0x00 0x03800000 0x0 0x00100000 + 0xa0 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <256>; + num-ib-windows = <24>; + status = "disabled"; + }; + + pcie_ep6: pcie-ep@3900000 { + compatible = "fsl,lx2160ar2-pcie-ep"; + reg = <0x00 0x03900000 0x0 0x00100000 + 0xa8 0x00000000 0x8 0x00000000>; + reg-names = "regs", "addr_space"; + num-ob-windows = <8>; + num-ib-windows = <8>; + status = "disabled"; + }; +}; + diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi index 26c7ca31e22e7..b2dea03e1b8ec 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi @@ -613,7 +613,7 @@ cluster2-3-crit { }; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?hPiFUE+6oFHfu8pgcLffOd4TQLPm?= =?utf-8?q?G0tz1Ao04JaW1G8HdcoK3TI+kQ7+ipsAEh66IeYO4FK8Omda37nWzivH48J2g1PvK?= =?utf-8?q?fK5rSAE7jmz47QpWuVYGusKhmz+LWKLjeMLJmR2SjhnzMtI82x1pd5e6MOk9GJ736?= =?utf-8?q?iQZJhkbuIDxw4pIfJedIwDz0xTs6h4RNq2xUBwDOSTjM/RWDumD6X3Es+tiHKsjZv?= =?utf-8?q?Tn9t7epwMjL3Y4G45hnlJgJadQjD3XCFE7G1bUyEw2wBGUwoTBrFyZGqw2+iqcbLn?= =?utf-8?q?m6XVxtD3woR2TuAQkP+zPns8bS+wvTSb1kMXRGtOSLdv4tk8kDgHLK5SdPG9QJAsS?= =?utf-8?q?mudJ6190mByAMYz1C/fUke/BThVcX7a2me45LHC9nyzb5QwTCU6wLspT9IRq47N4Q?= =?utf-8?q?rY7lFFNsZSgk6rsk039oT9VbDB4M3aXM7SnsjBems6F1WbkAjpoITo4b2lqxwK+97?= =?utf-8?q?8XoVhKUmSFJTDQkPIdeRTxU2zqrSHK3t84gA51iaadTqxIcd1Heu05kiyK6IH4bBi?= =?utf-8?q?pycbTJHN+eUivzHywrhM8vVl3T7TGSfhdYzzaK2O3l8Sae7lY349IrLmDu4MYTy4O?= =?utf-8?q?Ykv2gCg9KbIee4+fphlppn++v/RjrKugcfPYR8HiygETtW5obld6Avr7Fa6S20XHm?= =?utf-8?q?j2S1INstJymjIAwRqZrDE5PqlN2Zkpd7h4OB+7PiSy8IfNz9YdOEBT8mXDZ4q5ByJ?= =?utf-8?q?VvnFWDpUz/+bj4pnTrKk18XLf4BqdJc/xikp9FQ2P3uZboxjNY4Le+qJo2hkMiRoh?= =?utf-8?q?of7Il0WGu6eQtbTMc+eab08SD4RLSs3Ui0Enesrtg7A2nZVc77IObRo9AEcMmowid?= =?utf-8?q?AFZbPf+OylSSQdwWXMW4vqF1+ErUAVJjWyRZ83ZBGL3nq1+th9swjqQO0ZFmC+IK3?= =?utf-8?q?73lw25t26uBaKysZaZLBDkKKLxwHJgL4VOaLVGlrVKshzwQCCtW0Pm97dmp+tOK5y?= =?utf-8?q?tCCG9VauRtGFvLwCqDch+sW+ub4kQ2tN0Tfa9UnLtgEwrT6tKZ4Sk0YcdUtpbnLrW?= =?utf-8?q?KSHmNGJ65oBVJsRE/njQxV5f714cgZykvRh/HhWU2WBnwXCltlKN6dqyxJQY9LD5b?= =?utf-8?q?vfX/9M9IPTtyaJnaYMKmXOl6s6obllLhaj5qewGJEo0TG2zqdaXzdg8zppY78OjCE?= =?utf-8?q?2ZNJhD8qkjy3uwzHjabO7ErxXICk9BCs0HooiZzge/Z8VhzDiCX1Zo8Q5tFRiToS2?= =?utf-8?q?vFm16YnHJQ58+InimHERp0zwcAG8Lxhm+5ynrwmYHVI984S0pnwGM8yaYt8W3Av6N?= =?utf-8?q?Cm0xAZ9nuR70EJ59bTXqI91uNNM82cxBOvoxa3gI7A6vYFsZv12D7WfbMooEfAOj+?= =?utf-8?q?iK8nMIrZfNgkoqY6LbOhrYZKLADknnSl6PpPUisVA2Df3naPm5wkcbkFRw6wcKXGF?= =?utf-8?q?7fv2xPpuxg7h5AjvKwRfVvSoVvyczwgeRWM4lhNjTgYklUt+yyY43wrouXU0ueI+B?= =?utf-8?q?17boUaB+f+WCTSYlOaXERugZpzRGTlPoHUPQ3qQIfQlY5a4NHVqiAgMY5ZhdQIFOq?= =?utf-8?q?tOfyRNxO9T/h?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 1884c5e3-57dd-476c-070e-08dcc6179259 X-MS-Exchange-CrossTenant-AuthSource: PAXPR04MB9642.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Aug 2024 21:39:32.2432 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: dkcj7HGB+D/j4WMTunNoXVluDyZPhfuBHYLSJT25df+wCEp3vjTlUPgKjCw87n342eBR9SEYre3eXMv7XWgAcA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AS1PR04MB9360 The mass production lx2160 rev2 use designware PCIe Controller. Old Rev1 which use mobivel PCIe controller was not supported. Although uboot fixup can change compatible string fsl,lx2160a-pcie to fsl,ls2088a-pcie since 2019, it is quite confused and should correctly reflect hardware status in dtb. Change freescale's board to use rev2's dtsi firstly. Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 2 +- arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts | 2 +- arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts index 4d721197d837e..71d0d6745e44a 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts @@ -6,7 +6,7 @@ /dts-v1/; -#include "fsl-lx2160a.dtsi" +#include "fsl-lx2160a-rev2.dtsi" / { model = "NXP Layerscape LX2160AQDS"; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts index 0c44b3cbef773..2373e1c371e8c 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-rdb.dts @@ -6,7 +6,7 @@ /dts-v1/; -#include "fsl-lx2160a.dtsi" +#include "fsl-lx2160a-rev2.dtsi" / { model = "NXP Layerscape LX2160ARDB"; diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts index 9f5ff1ffe7d5e..7a595fddc0273 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a-qds.dts @@ -6,7 +6,7 @@ /dts-v1/; -#include "fsl-lx2160a.dtsi" +#include "fsl-lx2160a-rev2.dtsi" / { model = "NXP Layerscape LX2162AQDS";