From patchwork Wed Aug 28 10:14:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Heiko_St=C3=BCbner?= X-Patchwork-Id: 13781074 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D2384C54E71 for ; Wed, 28 Aug 2024 10:20:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=H2K0zAoArSYqxte5X2D4PhODsFIDA8efuofXW5WP5do=; b=1YKUMLj8SaH6A/QFJ8jY2zq1J5 lKFG95CoJYp58NXLxWZZd7aMJOtS3Tcu8DcBQulfC1UI2d63y82z7bLOkvoaX+05jZ0WzNU58kLx0 GteYwpmBLgnxEroYA5LEvbsxxLEHiFS8fU+caE7SaYMcHp3PxT3e63MAT/YGhakdq1wahR93qjOMn INoRAW9ckV9AkXVzxByRvic7MhsGEl7eq1KltCtZofF5Fdo8kQRWj5CA3TNpi9QjCWYZLXNzlTXZc HPeFyrsMCRGmj1uVIBh3QEo1Aau9+1c/G5luQVOZjdu/7j61rTLO3E/tl9hsrI03RAWmYe3jk+LO4 xqpgmCwA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sjFn7-0000000EuP2-1nU9; Wed, 28 Aug 2024 10:20:41 +0000 Received: from gloria.sntech.de ([185.11.138.130]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sjFhx-0000000EsRX-2ZHC; Wed, 28 Aug 2024 10:15:25 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=H2K0zAoArSYqxte5X2D4PhODsFIDA8efuofXW5WP5do=; b=Ng3MEAGJ2czRhxq3mImVOHknWx TEbw0Nm6FsoEYe7ymgW0ivBDzvWutrqN32bLfl6BKPBVNDvnwo35StNPtfpifr4ziIx1GQLOqpjGv omypbq5QJk+T/Npzv5sd6zHn45pL2Y/d/LuHx8ogdUi3lpZoZrIN0Pn/jsoSUe8oe5GI0vy+95DkD inFffYhQIrTtO9uLNbqNbakQ2mDFPgNfDV6MxOx8j7Fl/Pt8RzW6fwz3ySL+PNk1KgflXSRNUXe3i mkA7Y2pE+ahLJaxsK8lrVDVGbnJYGsJO0xqeiuOEL1FYb2ujXU5RNU2HRs8GbD5IDwCctGL4n9SRo B57WXp2w==; Received: from i5e8616cd.versanet.de ([94.134.22.205] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sjFhs-0004M3-94; Wed, 28 Aug 2024 12:15:16 +0200 From: Heiko Stuebner To: mturquette@baylibre.com, sboyd@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-clk@vger.kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v3 1/5] dt-bindings: clocks: add binding for gated-fixed-clocks Date: Wed, 28 Aug 2024 12:14:59 +0200 Message-ID: <20240828101503.1478491-2-heiko@sntech.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240828101503.1478491-1-heiko@sntech.de> References: <20240828101503.1478491-1-heiko@sntech.de> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240828_031521_677684_CA4A228E X-CRM114-Status: GOOD ( 16.60 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In contrast to fixed clocks that are described as ungateable, boards sometimes use additional oscillators for things like PCIe reference clocks, that need actual supplies to get enabled and enable-gpios to be toggled for them to work. This adds a binding for such oscillators that are not configurable themself, but need to handle supplies for them to work. In schematics they often can be seen as ---------------- Enable - | 100MHz,3.3V, | - VDD | 3225 | GND - | | - OUT ---------------- or similar. The enable pin might be separate but can also just be tied to the vdd supply, hence it is optional in the binding. Signed-off-by: Heiko Stuebner Reviewed-by: Rob Herring (Arm) Reviewed-by: Conor Dooley --- .../bindings/clock/gated-fixed-clock.yaml | 49 +++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/gated-fixed-clock.yaml diff --git a/Documentation/devicetree/bindings/clock/gated-fixed-clock.yaml b/Documentation/devicetree/bindings/clock/gated-fixed-clock.yaml new file mode 100644 index 000000000000..76d264770d35 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/gated-fixed-clock.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/gated-fixed-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Gated Fixed clock + +maintainers: + - Heiko Stuebner + +properties: + compatible: + const: gated-fixed-clock + + "#clock-cells": + const: 0 + + clock-frequency: true + + clock-output-names: + maxItems: 1 + + enable-gpios: + description: + Contains a single GPIO specifier for the GPIO that enables and disables + the oscillator. + maxItems: 1 + + vdd-supply: + description: handle of the regulator that provides the supply voltage + +required: + - compatible + - "#clock-cells" + - clock-frequency + - vdd-supply + +additionalProperties: false + +examples: + - | + voltage-oscillator { + compatible = "gated-fixed-clock"; + #clock-cells = <0>; + clock-frequency = <1000000000>; + vdd-supply = <®_vdd>; + }; +... From patchwork Wed Aug 28 10:15:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Heiko_St=C3=BCbner?= X-Patchwork-Id: 13781071 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0EC75C54E71 for ; Wed, 28 Aug 2024 10:18:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=URObYksO4gN+9lzuCPAOWuGaNp4UNR2zdQZmZnnacwI=; b=BqICyKR2MuhKgLJqR5yDXMia/I QOyRymG0A2tmIrE+ccK4JQqn2ljuvEAyWdZf0h/Tn9BKpb/TeaSHEYS5qMP9AGZc36o0LFnMWm9yP UyrdGPo1rxWODhQFoLpXOS20CJfpL+n4J9+/gUmor/4I+GmDjCpSiDQxObQ614kCxJtkHT9F02Inj iAiLs4JPhfI6NAxCavrBqXOChTp3IGPMy4aVaHG8tQMdsOqRCh419n5zs//TTh5+nANsJVwLrwxPm 7d/MBlzpv6lPLS0enjfHL4ycOGzCP7XfDnw/yTo+SvSUzh/twRVlcJ/6aicxkgU+RTAr4y/XrKJed 3PVErDQA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sjFke-0000000EtbY-2HTz; Wed, 28 Aug 2024 10:18:08 +0000 Received: from gloria.sntech.de ([185.11.138.130]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sjFhy-0000000EsRd-0BqZ; Wed, 28 Aug 2024 10:15:24 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=URObYksO4gN+9lzuCPAOWuGaNp4UNR2zdQZmZnnacwI=; b=Sda/R7lYsoCJLuDum6wi0TU5bE CxN9bn5NOJ3MADFrG4eMp2UGcz3N6Y7nYLYOC7PjiV69uJGXswRg958TqFzb741ocfGzOYegXbOS1 G3ekmUTAhq+dMQZ+AqfQwVqETHflTGPOh0uIqvvhwkEBHW0NVS7//iuuAoaOsHYMGc53NCWwpdPyb IXLTOrh4y9q9ryhCFScLBCarILEcvHlmkxl0EzMqSMKBramZJd3G1/fohQDamcJU2XvvQmCSR6D6u 5N0JI4Mt0+9CY/X9qz+CqgwiaqnD5C0yeVBiND4ZrUDyg7QEPSXSwZaVLh9nUHyRfN2HF3FvsoHYM H2Tte17Q==; Received: from i5e8616cd.versanet.de ([94.134.22.205] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sjFhs-0004M3-Oa; Wed, 28 Aug 2024 12:15:16 +0200 From: Heiko Stuebner To: mturquette@baylibre.com, sboyd@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-clk@vger.kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v3 2/5] clk: clk-gpio: update documentation for gpio-gate clock Date: Wed, 28 Aug 2024 12:15:00 +0200 Message-ID: <20240828101503.1478491-3-heiko@sntech.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240828101503.1478491-1-heiko@sntech.de> References: <20240828101503.1478491-1-heiko@sntech.de> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240828_031522_105273_51A774E1 X-CRM114-Status: GOOD ( 13.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The main documentation block seems to be from a time before the driver handled sleeping and non-sleeping gpios and which that change it seems updating the doc was overlooked. So do that now. Signed-off-by: Heiko Stuebner --- drivers/clk/clk-gpio.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/clk/clk-gpio.c b/drivers/clk/clk-gpio.c index 5b114043771d..98415782f9a2 100644 --- a/drivers/clk/clk-gpio.c +++ b/drivers/clk/clk-gpio.c @@ -22,8 +22,9 @@ * DOC: basic gpio gated clock which can be enabled and disabled * with gpio output * Traits of this clock: - * prepare - clk_(un)prepare only ensures parent is (un)prepared - * enable - clk_enable and clk_disable are functional & control gpio + * prepare - clk_(un)prepare are functional and control a gpio that can sleep + * enable - clk_enable and clk_disable are functional & control + * non-sleeping gpio * rate - inherits rate from parent. No clk_set_rate support * parent - fixed parent. No clk_set_parent support */ From patchwork Wed Aug 28 10:15:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Heiko_St=C3=BCbner?= X-Patchwork-Id: 13781049 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3518CC54E71 for ; Wed, 28 Aug 2024 10:16:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=TqxynQHVtMcMYcTlZ9c4J6WTyfOvhuPEE/JTjaFof8c=; b=Q3WRo6H4t8Wi57wTJU7Pz4P1sR bvaCzH1E1i8CVK/dm2Rv4cVki/2OzqrB5Pi1coBT+u8Sq7gJ56ccb32hXsG1OuE7DiBuDokUSwgrc k2ppgjUZymEEAN9znFHNrZjdHHpmzm3opg8AUeUUwBi2VDjf5pNVU9GoeX8SliU5U89Clu1/4FPua ymH0uP0aWBxhcnKyigndAz93pcRcUy1PJY8liwhil6N58qbdVZJqjCCZks2LUID3dpJf9xtuQmmqQ jHcYdsP8txRrDTEK+vRk5d3dOgkm2ESJtyoI+PHCp9C4zBpei1JwSxuprsHggRB7C94h/D8Vmdnwn +fiR2onw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sjFiy-0000000Et0f-238a; Wed, 28 Aug 2024 10:16:24 +0000 Received: from gloria.sntech.de ([185.11.138.130]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sjFhx-0000000EsRV-2Ilk; Wed, 28 Aug 2024 10:15:22 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=TqxynQHVtMcMYcTlZ9c4J6WTyfOvhuPEE/JTjaFof8c=; b=F/STKZbs9HYU2hW/BAcH9J8QdX npIMSwV+jCcbEuetF3pk9E3pVByxVRdfkfgtCyH7M+t0C08UyXZ2HDGTUnCcWGj90h6Z5FSuqoc8D CohnJ9sfqeb9wByiNVfzvF0w8qcR9NCa4cYXcSJd89oXdQ7rdrpbmqPmezwKDUzErp3CYytTvYoo0 P3KtVBdolN6fE5eeZ9pjUJRmg4171zp0cdnhZS6V+I++bX33/5ISNhlTo8Fc5u/rb2qGswd7hWeeY 7xENuFKrAoQZuG1eDR3h13YG6AqGWweSnt3Gt1V6zcWg0/BMQQJt3MjNzhuph/oKTCQ+ZhOts0obN VZrmIMrw==; Received: from i5e8616cd.versanet.de ([94.134.22.205] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sjFht-0004M3-8q; Wed, 28 Aug 2024 12:15:17 +0200 From: Heiko Stuebner To: mturquette@baylibre.com, sboyd@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-clk@vger.kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v3 3/5] clk: clk-gpio: use dev_err_probe for gpio-get failure Date: Wed, 28 Aug 2024 12:15:01 +0200 Message-ID: <20240828101503.1478491-4-heiko@sntech.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240828101503.1478491-1-heiko@sntech.de> References: <20240828101503.1478491-1-heiko@sntech.de> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240828_031521_607352_13DC7A33 X-CRM114-Status: GOOD ( 14.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This is a real driver and dev_err_probe will hide the distinction between EPROBE_DEFER and other errors automatically, so there is no need to open-code this. Signed-off-by: Heiko Stuebner --- drivers/clk/clk-gpio.c | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/drivers/clk/clk-gpio.c b/drivers/clk/clk-gpio.c index 98415782f9a2..cda362a2eca0 100644 --- a/drivers/clk/clk-gpio.c +++ b/drivers/clk/clk-gpio.c @@ -200,7 +200,6 @@ static int gpio_clk_driver_probe(struct platform_device *pdev) struct gpio_desc *gpiod; struct clk_hw *hw; bool is_mux; - int ret; is_mux = of_device_is_compatible(node, "gpio-mux-clock"); @@ -212,17 +211,9 @@ static int gpio_clk_driver_probe(struct platform_device *pdev) gpio_name = is_mux ? "select" : "enable"; gpiod = devm_gpiod_get(dev, gpio_name, GPIOD_OUT_LOW); - if (IS_ERR(gpiod)) { - ret = PTR_ERR(gpiod); - if (ret == -EPROBE_DEFER) - pr_debug("%pOFn: %s: GPIOs not yet available, retry later\n", - node, __func__); - else - pr_err("%pOFn: %s: Can't get '%s' named GPIO property\n", - node, __func__, - gpio_name); - return ret; - } + if (IS_ERR(gpiod)) + return dev_err_probe(dev, PTR_ERR(gpiod), + "Can't get '%s' named GPIO property\n", gpio_name); if (is_mux) hw = clk_hw_register_gpio_mux(dev, gpiod); From patchwork Wed Aug 28 10:15:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Heiko_St=C3=BCbner?= X-Patchwork-Id: 13781073 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DE98FC54E71 for ; Wed, 28 Aug 2024 10:20:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=2vEIhifhCgUZJb7JLEMEs6FgsfJuYynN2BlO+zQ+JIg=; b=IZ7+G7se0SiIlKgYXk2xqE6utN CxSsZdcCYW8OLCiPjNw5T1HtVV6TSdEcQoPebag8EPF/jIH9nlm5bxwt1ayQ5EcDvzZ0S0MQoYu7n 0cEA+L0kteUP3FS2U/GkTV8GFc2QPLzQPKVTPgqjQGYQ46MuVyY4+rsKRSp9g3kXOEdntUKXy0MmT q+dwwqn82CNDNrrK8ItZpogPwCP884WJmnYYP5HEqm9e2WCYNwnypL19D1EnKGD1DquV6BC67cgH7 mk90QHt1h0zKG+pr+qu3VhNcpNYrZNkL12CZA/wdOupW52KjH7vtGGWCGR8B3YJH4jZjrTBBdTUWQ KYl2icAw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sjFmJ-0000000Eu9f-1vSW; Wed, 28 Aug 2024 10:19:51 +0000 Received: from gloria.sntech.de ([185.11.138.130]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sjFhy-0000000EsSL-2ciM; Wed, 28 Aug 2024 10:15:24 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:List-Id:List-Help:List-Unsubscribe: List-Subscribe:List-Post:List-Owner:List-Archive; bh=2vEIhifhCgUZJb7JLEMEs6FgsfJuYynN2BlO+zQ+JIg=; b=DXz8PeaaBwK3stcuG4xOq3+jEa t0pc4wEGkwsDwLAKzV7lSJllRe57nMtdiCu8loAHut3ETib8zEGPT1VmUWmKSfuh06Es7v/cJIyJp aolH63EZ8Zx2GpGoYoZrYSkzExaejScFlPgJ2FN1/f0jDQU/RIfMHFXob36O9yz+n++b5hJZtDb0x 7wkpNlhiOAtSl2/3ZX1psHo9ou3cDlE4Be2q+5fpLb8i+hmxreufSrIs+iw8tNhO0QmS2ihSbOggv mnrXFDBHneFsq4xHenDLZGLg7IxZ2/lDnW/eD0Piy5DMsx1lbfVvVzWenqdE7UKtwdCZGHrWd3/bK TKAusGmw==; Received: from i5e8616cd.versanet.de ([94.134.22.205] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sjFht-0004M3-OU; Wed, 28 Aug 2024 12:15:17 +0200 From: Heiko Stuebner To: mturquette@baylibre.com, sboyd@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-clk@vger.kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v3 4/5] clk: clk-gpio: add driver for gated-fixed-clocks Date: Wed, 28 Aug 2024 12:15:02 +0200 Message-ID: <20240828101503.1478491-5-heiko@sntech.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240828101503.1478491-1-heiko@sntech.de> References: <20240828101503.1478491-1-heiko@sntech.de> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240828_031522_826689_047B5C3F X-CRM114-Status: GOOD ( 23.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In contrast to fixed clocks that are described as ungateable, boards sometimes use additional oscillators for things like PCIe reference clocks, that need actual supplies to get enabled and enable-gpios to be toggled for them to work. This adds a driver for those generic gated-fixed-clocks that can show up in schematics looking like ---------------- Enable - | 100MHz,3.3V, | - VDD | 3225 | GND - | | - OUT ---------------- The new driver gets grouped together with the existing gpio-gate and gpio-mux, as it for one re-uses a lot of the gpio-gate functions and also in it's core it's just another gpio-controlled clock, just with a fixed rate and a regulator-supply added in. The regulator-API provides function stubs for the !CONFIG_REGULATOR case, so no special handling is necessary. Signed-off-by: Heiko Stuebner --- drivers/clk/clk-gpio.c | 182 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 182 insertions(+) diff --git a/drivers/clk/clk-gpio.c b/drivers/clk/clk-gpio.c index cda362a2eca0..8bcdef340b4c 100644 --- a/drivers/clk/clk-gpio.c +++ b/drivers/clk/clk-gpio.c @@ -17,6 +17,7 @@ #include #include #include +#include /** * DOC: basic gpio gated clock which can be enabled and disabled @@ -239,3 +240,184 @@ static struct platform_driver gpio_clk_driver = { }, }; builtin_platform_driver(gpio_clk_driver); + +/** + * DOC: gated fixed clock, controlled with a gpio output and a regulator + * Traits of this clock: + * prepare - clk_prepare and clk_unprepare are function & control regulator + * optionally a gpio that can sleep + * enable - clk_enable and clk_disable are functional & control gpio + * rate - rate is fixed and set on clock generation + * parent - fixed clock is a root clock and has no parent. + */ + +/** + * struct clk_gate_fixed - gated-fixed-clock + * + * clk_gpio: instance of clk_gpio for gate-gpio + * supply: supply regulator + * rate: fixed rate + */ +struct clk_gated_fixed { + struct clk_gpio clk_gpio; + struct regulator *supply; + u32 rate; +}; + +#define to_clk_gated_fixed(_clk_gpio) container_of(_clk_gpio, struct clk_gated_fixed, clk_gpio) + +static unsigned long clk_gated_fixed_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + return to_clk_gated_fixed(to_clk_gpio(hw))->rate; +} + +static int clk_gated_fixed_prepare(struct clk_hw *hw) +{ + struct clk_gated_fixed *clk = to_clk_gated_fixed(to_clk_gpio(hw)); + + if (!clk->supply) + return 0; + + return regulator_enable(clk->supply); +} + +static void clk_gated_fixed_unprepare(struct clk_hw *hw) +{ + struct clk_gated_fixed *clk = to_clk_gated_fixed(to_clk_gpio(hw)); + + if (!clk->supply) + return; + + regulator_disable(clk->supply); +} + +static int clk_gated_fixed_is_prepared(struct clk_hw *hw) +{ + struct clk_gated_fixed *clk = to_clk_gated_fixed(to_clk_gpio(hw)); + + if (!clk->supply) + return true; + + return regulator_is_enabled(clk->supply); +} + +/* + * Fixed gated clock with non-sleeping gpio. + * + * Prepare operation turns on the supply regulator + * and the enable operation switches the enable-gpio. + */ +const struct clk_ops clk_gated_fixed_ops = { + .prepare = clk_gated_fixed_prepare, + .unprepare = clk_gated_fixed_unprepare, + .is_prepared = clk_gated_fixed_is_prepared, + .enable = clk_gpio_gate_enable, + .disable = clk_gpio_gate_disable, + .is_enabled = clk_gpio_gate_is_enabled, + .recalc_rate = clk_gated_fixed_recalc_rate, +}; + +static int clk_sleeping_gated_fixed_prepare(struct clk_hw *hw) +{ + int ret; + + ret = clk_gated_fixed_prepare(hw); + if (ret) + return ret; + + ret = clk_sleeping_gpio_gate_prepare(hw); + if (ret) + clk_gated_fixed_unprepare(hw); + + return ret; +} + +static void clk_sleeping_gated_fixed_unprepare(struct clk_hw *hw) +{ + clk_gated_fixed_unprepare(hw); + clk_sleeping_gpio_gate_unprepare(hw); +} + +/* + * Fixed gated clock with non-sleeping gpio. + * + * Enabling the supply regulator and switching the enable-gpio happens + * both in the prepare step. + * is_prepared only needs to check the gpio state, as toggling the + * gpio is the last step when preparing. + */ +const struct clk_ops clk_sleeping_gated_fixed_ops = { + .prepare = clk_sleeping_gated_fixed_prepare, + .unprepare = clk_sleeping_gated_fixed_unprepare, + .is_prepared = clk_sleeping_gpio_gate_is_prepared, + .recalc_rate = clk_gated_fixed_recalc_rate, +}; + +static int clk_gated_fixed_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct clk_gated_fixed *clk; + const struct clk_ops *ops; + const char *clk_name; + int ret; + + clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL); + if (!clk) + return -ENOMEM; + + if (device_property_read_u32(dev, "clock-frequency", &clk->rate)) + return dev_err_probe(dev, -EIO, "failed to get clock-frequency"); + + ret = device_property_read_string(dev, "clock-output-names", &clk_name); + if (ret) + clk_name = fwnode_get_name(dev->fwnode); + + clk->supply = devm_regulator_get_optional(dev, "vdd"); + if (IS_ERR(clk->supply)) { + if (PTR_ERR(clk->supply) != -ENODEV) + return dev_err_probe(dev, PTR_ERR(clk->supply), + "failed to get regulator\n"); + clk->supply = NULL; + } + + clk->clk_gpio.gpiod = devm_gpiod_get_optional(dev, "enable", + GPIOD_OUT_LOW); + if (IS_ERR(clk->clk_gpio.gpiod)) + return dev_err_probe(dev, PTR_ERR(clk->clk_gpio.gpiod), + "failed to get gpio\n"); + + if (gpiod_cansleep(clk->clk_gpio.gpiod)) + ops = &clk_sleeping_gated_fixed_ops; + else + ops = &clk_gated_fixed_ops; + + clk->clk_gpio.hw.init = CLK_HW_INIT_NO_PARENT(clk_name, ops, 0); + + /* register the clock */ + ret = devm_clk_hw_register(dev, &clk->clk_gpio.hw); + if (ret) + return dev_err_probe(dev, ret, + "failed to register clock\n"); + + ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, + &clk->clk_gpio.hw); + if (ret) + return dev_err_probe(dev, ret, + "failed to register clock provider\n"); + + return 0; +} + +static const struct of_device_id gated_fixed_clk_match_table[] = { + { .compatible = "gated-fixed-clock" }, +}; + +static struct platform_driver gated_fixed_clk_driver = { + .probe = clk_gated_fixed_probe, + .driver = { + .name = "gated-fixed-clk", + .of_match_table = gated_fixed_clk_match_table, + }, +}; +builtin_platform_driver(gated_fixed_clk_driver); From patchwork Wed Aug 28 10:15:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Heiko_St=C3=BCbner?= X-Patchwork-Id: 13781072 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4929DC54E71 for ; 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Received: from i5e8616cd.versanet.de ([94.134.22.205] helo=phil.lan) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1sjFhu-0004M3-7X; Wed, 28 Aug 2024 12:15:18 +0200 From: Heiko Stuebner To: mturquette@baylibre.com, sboyd@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-clk@vger.kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org Subject: [PATCH v3 5/5] arm64: dts: rockchip: fix the pcie refclock oscillator on Rock 5 ITX Date: Wed, 28 Aug 2024 12:15:03 +0200 Message-ID: <20240828101503.1478491-6-heiko@sntech.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240828101503.1478491-1-heiko@sntech.de> References: <20240828101503.1478491-1-heiko@sntech.de> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240828_031522_557854_D7C04254 X-CRM114-Status: GOOD ( 16.80 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Rock 5 ITX uses two PCIe controllers to drive both a M.2 slot and its SATA controller with 2 lanes each. The supply for the refclk oscillator is the same that supplies the M.2 slot, but the SATA controller port is supplied by a different rail. This leads to the effect that if the PCIe30x4 controller for the M.2 probes first, everything works normally. But if the PCIe30x2 controller that is connected to the SATA controller probes first, it will hang on the first DBI read as nothing will have enabled the refclock before. Fix this by describing the clock generator with its supplies so that both controllers can reference it as needed. Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3588-rock-5-itx.dts | 38 ++++++++++++++++++- 1 file changed, 36 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts b/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts index d0b922b8d67e..2d0bcf90bf0f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5-itx.dts @@ -72,6 +72,15 @@ hdd-led2 { }; }; + /* Unnamed gated oscillator: 100MHz,3.3V,3225 */ + pcie30_port0_refclk: pcie30_port1_refclk: pcie-oscillator { + compatible = "gated-fixed-clock"; + #clock-cells = <0>; + clock-frequency = <100000000>; + clock-output-names = "pcie30_refclk"; + vdd-supply = <&vcc3v3_pi6c_05>; + }; + fan0: pwm-fan { compatible = "pwm-fan"; #cooling-cells = <2>; @@ -146,13 +155,14 @@ vcc3v3_lan: vcc3v3_lan_phy2: regulator-vcc3v3-lan { vin-supply = <&vcc_3v3_s3>; }; - vcc3v3_mkey: regulator-vcc3v3-mkey { + /* The PCIE30x4_PWREN_H controls two regulators */ + vcc3v3_mkey: vcc3v3_pi6c_05: regulator-vcc3v3-pi6c-05 { compatible = "regulator-fixed"; enable-active-high; gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pcie30x4_pwren_h>; - regulator-name = "vcc3v3_mkey"; + regulator-name = "vcc3v3_pi6c_05"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; startup-delay-us = <5000>; @@ -513,6 +523,18 @@ &pcie30phy { /* ASMedia ASM1164 Sata controller */ &pcie3x2 { + /* + * The board has a "pcie_refclk" oscillator that needs enabling, + * so add it to the list of clocks. + */ + clocks = <&cru ACLK_PCIE_2L_MSTR>, <&cru ACLK_PCIE_2L_SLV>, + <&cru ACLK_PCIE_2L_DBI>, <&cru PCLK_PCIE_2L>, + <&cru CLK_PCIE_AUX1>, <&cru CLK_PCIE2L_PIPE>, + <&pcie30_port1_refclk>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux", "pipe", + "ref"; pinctrl-names = "default"; pinctrl-0 = <&pcie30x2_perstn_m1_l>; reset-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; @@ -522,6 +544,18 @@ &pcie3x2 { /* M.2 M.key */ &pcie3x4 { + /* + * The board has a "pcie_refclk" oscillator that needs enabling, + * so add it to the list of clocks. + */ + clocks = <&cru ACLK_PCIE_4L_MSTR>, <&cru ACLK_PCIE_4L_SLV>, + <&cru ACLK_PCIE_4L_DBI>, <&cru PCLK_PCIE_4L>, + <&cru CLK_PCIE_AUX0>, <&cru CLK_PCIE4L_PIPE>, + <&pcie30_port0_refclk>; + clock-names = "aclk_mst", "aclk_slv", + "aclk_dbi", "pclk", + "aux", "pipe", + "ref"; num-lanes = <2>; pinctrl-names = "default"; pinctrl-0 = <&pcie30x4_perstn_m1_l>;