From patchwork Wed Sep 4 23:54:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Abhishek Chauhan (ABC)" X-Patchwork-Id: 13791533 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 43C8BCD4F4A for ; Wed, 4 Sep 2024 23:56:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=68k4qQEoXrGyQZBkFjNkcJ8HHmo7tapvZuWiVrbuvvs=; b=WlAWVDpU9FnaOENNr6qQIqIcF7 GAV7ZaSSyyKor+nq1C4nJErwue5TfCRP6SzMPOTYVvcSJyHXqdhcKTF6J5XyIVr1GWxXqsBtXA6fp FF0wkuoqq4PNSw0WuxyB+xva1XFRiBPcYtmJjyIf/gjjSq18g8YlVtkrCZxc4tDOxZnNO7Tog+hPF ktOnrc6/9VvPOsKLA0Ji2ngEFFzTVZIlkmFZBvO8Sm9zBHSNX2s45ryTpRk1eFFOL+4mcl1YTOpVn NGIsO7onvzgJAjnv+WQ+4rDQejptlIEcfNw+gH3ZQrgX/yXcxHcSyMfrsZon22NTJKmf9JFOqNciz smncZ7Ww==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1slzr6-00000006QJ2-1IA2; Wed, 04 Sep 2024 23:56:08 +0000 Received: from mx0a-0031df01.pphosted.com ([205.220.168.131]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1slzq8-00000006Q9o-3zmd for linux-arm-kernel@lists.infradead.org; Wed, 04 Sep 2024 23:55:10 +0000 Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 484LFOfk005033; Wed, 4 Sep 2024 23:54:58 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= cc:content-transfer-encoding:date:from:message-id:mime-version :subject:to; s=qcppdkim1; bh=68k4qQEoXrGyQZBkFjNkcJ8HHmo7tapvZuW iVrbuvvs=; b=Vp7jx3wtzuHOjDSd0PLoDYU/VDEbeAUfG4Pp+I7tcnjTiECC3TA XwulwtEYLp3c5ruWVR6mlSkJyrTgXjttSnCpYWzjPpkmWOsJApV9P9J5nn/wnBwu iGVmusXgF8nyobbxIXpmwmMXOMdK+p/admyNo+QmXGttTVeUoQgYxjEbAWQkDtPk seCTJTA+nJ9qYeV2rb/y1BR/pHKD4l1W8X5hCq2u17iYx3H2jkQhOUFvg+5rzGa/ KV1/FcWhCL5IBOF6kmbtzkYXk3wKP2WsPKU9C50sqElKCIMJRJ/jBO8J1mZgwaTU REVgDwbJ+vU1ThIj8W+eehp7lYZCuzKKwHg== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 41bvbkm3ub-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Sep 2024 23:54:58 +0000 (GMT) Received: from pps.filterd (NALASPPMTA05.qualcomm.com [127.0.0.1]) by NALASPPMTA05.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTP id 484NsvAY007763; Wed, 4 Sep 2024 23:54:57 GMT Received: from pps.reinject (localhost [127.0.0.1]) by NALASPPMTA05.qualcomm.com (PPS) with ESMTPS id 41ecqfsxu6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Sep 2024 23:54:57 +0000 Received: from NALASPPMTA05.qualcomm.com (NALASPPMTA05.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 484NsvGS007756; Wed, 4 Sep 2024 23:54:57 GMT Received: from hu-devc-lv-u20-a-new.qualcomm.com (hu-abchauha-lv.qualcomm.com [10.81.25.35]) by NALASPPMTA05.qualcomm.com (PPS) with ESMTPS id 484Nsu1E007684 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 04 Sep 2024 23:54:57 +0000 Received: by hu-devc-lv-u20-a-new.qualcomm.com (Postfix, from userid 214165) id B2864229B8; Wed, 4 Sep 2024 16:54:56 -0700 (PDT) From: Abhishek Chauhan To: Alexandre Torgue , Jose Abreu , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Andrew Halaney Cc: kernel@quicinc.com Subject: [PATCH net-next v1] net: stmmac: Programming sequence for VLAN packets with split header Date: Wed, 4 Sep 2024 16:54:56 -0700 Message-Id: <20240904235456.2663335-1-quic_abchauha@quicinc.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: UMBGnH4pK9QdSnfrwN1xWdpJAAWraeKe X-Proofpoint-GUID: UMBGnH4pK9QdSnfrwN1xWdpJAAWraeKe X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-04_21,2024-09-04_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 adultscore=0 suspectscore=0 phishscore=0 lowpriorityscore=0 mlxscore=0 impostorscore=0 malwarescore=0 bulkscore=0 spamscore=0 clxscore=1011 mlxlogscore=999 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2407110000 definitions=main-2409040180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240904_165509_030502_877730D1 X-CRM114-Status: GOOD ( 14.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Currently reset state configuration of split header works fine for non-tagged packets and we see no corruption in payload of any size We need additional programming sequence with reset configuration to handle VLAN tagged packets to avoid corruption in payload for packets of size greater than 256 bytes. Without this change ping application complains about corruption in payload when the size of the VLAN packet exceeds 256 bytes. With this change tagged and non-tagged packets of any size works fine and there is no corruption seen. Signed-off-by: Abhishek Chauhan --- Changes since v0 - The reason for posting it on net-next is to enable this new feature. drivers/net/ethernet/stmicro/stmmac/dwmac4.h | 9 +++++++++ drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c | 11 +++++++++++ 2 files changed, 20 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h index 93a78fd0737b..4e340937dc78 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4.h +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4.h @@ -44,6 +44,7 @@ #define GMAC_MDIO_DATA 0x00000204 #define GMAC_GPIO_STATUS 0x0000020C #define GMAC_ARP_ADDR 0x00000210 +#define GMAC_EXT_CFG1 0x00000238 #define GMAC_ADDR_HIGH(reg) (0x300 + reg * 8) #define GMAC_ADDR_LOW(reg) (0x304 + reg * 8) #define GMAC_L3L4_CTRL(reg) (0x900 + (reg) * 0x30) @@ -235,6 +236,14 @@ enum power_event { #define GMAC_CONFIG_HDSMS_SHIFT 20 #define GMAC_CONFIG_HDSMS_256 (0x2 << GMAC_CONFIG_HDSMS_SHIFT) +/* MAC extended config1 */ +#define GMAC_CONFIG1_SAVE_EN BIT(24) +#define GMAC_CONFIG1_SPLM GENMASK(9, 8) +#define GMAC_CONFIG1_SPLM_L2OFST_EN BIT(0) +#define GMAC_CONFIG1_SPLM_SHIFT 8 +#define GMAC_CONFIG1_SAVO GENMASK(22, 16) +#define GMAC_CONFIG1_SAVO_SHIFT 16 + /* MAC HW features0 bitmap */ #define GMAC_HW_FEAT_SAVLANINS BIT(27) #define GMAC_HW_FEAT_ADDMAC BIT(18) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c index e0165358c4ac..dbd1be4e4a92 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c @@ -526,6 +526,17 @@ static void dwmac4_enable_sph(struct stmmac_priv *priv, void __iomem *ioaddr, value |= GMAC_CONFIG_HDSMS_256; /* Segment max 256 bytes */ writel(value, ioaddr + GMAC_EXT_CONFIG); + /* Additional configuration to handle VLAN tagged packets */ + value = readl(ioaddr + GMAC_EXT_CFG1); + value &= ~GMAC_CONFIG1_SPLM; + /* Enable Split mode for header and payload at L2 */ + value |= GMAC_CONFIG1_SPLM_L2OFST_EN << GMAC_CONFIG1_SPLM_SHIFT; + value &= ~GMAC_CONFIG1_SAVO; + /* Enables the MAC to distinguish between tagged vs untagged pkts */ + value |= 4 << GMAC_CONFIG1_SAVO_SHIFT; + value |= GMAC_CONFIG1_SAVE_EN; + writel(value, ioaddr + GMAC_EXT_CFG1); + value = readl(ioaddr + DMA_CHAN_CONTROL(dwmac4_addrs, chan)); if (en) value |= DMA_CONTROL_SPH;