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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(82310400026)(1800799024)(36860700013)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2024 21:39:11.9024 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 42c3f947-12f2-4c02-c7fe-08dcd82a55d1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C7.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB9177 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Melissa Wen Replace raw edid handling (struct edid) with the opaque EDID type (struct drm_edid) on amdgpu_dm_connector for consistency. It may also prevent mismatch of approaches in different parts of the driver code. Signed-off-by: Melissa Wen Co-developed-by: Mario Limonciello Signed-off-by: Mario Limonciello --- v7: fix LKP robot issue --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 123 ++++++++---------- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h | 4 +- .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 13 +- .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 34 ++--- 4 files changed, 84 insertions(+), 90 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 6f4b753f5f51..b7d93787667c 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -3487,7 +3487,7 @@ void amdgpu_dm_update_connector_after_detect( aconnector->dc_sink = sink; dc_sink_retain(aconnector->dc_sink); amdgpu_dm_update_freesync_caps(connector, - aconnector->edid); + aconnector->drm_edid); } else { amdgpu_dm_update_freesync_caps(connector, NULL); if (!aconnector->dc_sink) { @@ -3546,18 +3546,19 @@ void amdgpu_dm_update_connector_after_detect( aconnector->dc_sink = sink; dc_sink_retain(aconnector->dc_sink); if (sink->dc_edid.length == 0) { - aconnector->edid = NULL; + aconnector->drm_edid = NULL; if (aconnector->dc_link->aux_mode) { drm_dp_cec_unset_edid( &aconnector->dm_dp_aux.aux); } } else { - aconnector->edid = - (struct edid *)sink->dc_edid.raw_edid; + const struct edid *edid = (const struct edid *)sink->dc_edid.raw_edid; + + aconnector->drm_edid = drm_edid_alloc(edid, sink->dc_edid.length); + drm_edid_connector_update(connector, aconnector->drm_edid); if (aconnector->dc_link->aux_mode) - drm_dp_cec_set_edid(&aconnector->dm_dp_aux.aux, - aconnector->edid); + drm_dp_cec_set_edid(&aconnector->dm_dp_aux.aux, edid); } if (!aconnector->timing_requested) { @@ -3568,17 +3569,18 @@ void amdgpu_dm_update_connector_after_detect( "failed to create aconnector->requested_timing\n"); } - drm_connector_update_edid_property(connector, aconnector->edid); - amdgpu_dm_update_freesync_caps(connector, aconnector->edid); + drm_edid_connector_update(connector, aconnector->drm_edid); + amdgpu_dm_update_freesync_caps(connector, aconnector->drm_edid); update_connector_ext_caps(aconnector); } else { drm_dp_cec_unset_edid(&aconnector->dm_dp_aux.aux); amdgpu_dm_update_freesync_caps(connector, NULL); - drm_connector_update_edid_property(connector, NULL); + drm_edid_connector_update(connector, NULL); aconnector->num_modes = 0; dc_sink_release(aconnector->dc_sink); aconnector->dc_sink = NULL; - aconnector->edid = NULL; + drm_edid_free(aconnector->drm_edid); + aconnector->drm_edid = NULL; kfree(aconnector->timing_requested); aconnector->timing_requested = NULL; /* Set CP to DESIRED if it was ENABLED, so we can re-enable it again on hotplug */ @@ -7105,32 +7107,24 @@ static void amdgpu_dm_connector_funcs_force(struct drm_connector *connector) struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector); struct dc_link *dc_link = aconnector->dc_link; struct dc_sink *dc_em_sink = aconnector->dc_em_sink; - struct edid *edid; - struct i2c_adapter *ddc; - - if (dc_link && dc_link->aux_mode) - ddc = &aconnector->dm_dp_aux.aux.ddc; - else - ddc = &aconnector->i2c->base; + const struct drm_edid *drm_edid; - /* - * Note: drm_get_edid gets edid in the following order: - * 1) override EDID if set via edid_override debugfs, - * 2) firmware EDID if set via edid_firmware module parameter - * 3) regular DDC read. - */ - edid = drm_get_edid(connector, ddc); - if (!edid) { + drm_edid = drm_edid_read(connector); + drm_edid_connector_update(connector, drm_edid); + if (!drm_edid) { DRM_ERROR("No EDID found on connector: %s.\n", connector->name); return; } - aconnector->edid = edid; - + aconnector->drm_edid = drm_edid; /* Update emulated (virtual) sink's EDID */ if (dc_em_sink && dc_link) { + // FIXME: Get rid of drm_edid_raw() + const struct edid *edid = drm_edid_raw(drm_edid); + memset(&dc_em_sink->edid_caps, 0, sizeof(struct dc_edid_caps)); - memmove(dc_em_sink->dc_edid.raw_edid, edid, (edid->extensions + 1) * EDID_LENGTH); + memmove(dc_em_sink->dc_edid.raw_edid, edid, + (edid->extensions + 1) * EDID_LENGTH); dm_helpers_parse_edid_caps( dc_link, &dc_em_sink->dc_edid, @@ -7160,36 +7154,26 @@ static int get_modes(struct drm_connector *connector) static void create_eml_sink(struct amdgpu_dm_connector *aconnector) { struct drm_connector *connector = &aconnector->base; - struct dc_link *dc_link = aconnector->dc_link; struct dc_sink_init_data init_params = { .link = aconnector->dc_link, .sink_signal = SIGNAL_TYPE_VIRTUAL }; - struct edid *edid; - struct i2c_adapter *ddc; - - if (dc_link->aux_mode) - ddc = &aconnector->dm_dp_aux.aux.ddc; - else - ddc = &aconnector->i2c->base; + const struct drm_edid *drm_edid; + const struct edid *edid; - /* - * Note: drm_get_edid gets edid in the following order: - * 1) override EDID if set via edid_override debugfs, - * 2) firmware EDID if set via edid_firmware module parameter - * 3) regular DDC read. - */ - edid = drm_get_edid(connector, ddc); - if (!edid) { + drm_edid = drm_edid_read(connector); + drm_edid_connector_update(connector, drm_edid); + if (!drm_edid) { DRM_ERROR("No EDID found on connector: %s.\n", connector->name); return; } - if (drm_detect_hdmi_monitor(edid)) + if (connector->display_info.is_hdmi) init_params.sink_signal = SIGNAL_TYPE_HDMI_TYPE_A; - aconnector->edid = edid; + aconnector->drm_edid = drm_edid; + edid = drm_edid_raw(drm_edid); // FIXME: Get rid of drm_edid_raw() aconnector->dc_em_sink = dc_link_add_remote_sink( aconnector->dc_link, (uint8_t *)edid, @@ -7876,16 +7860,16 @@ static void amdgpu_set_panel_orientation(struct drm_connector *connector) } static void amdgpu_dm_connector_ddc_get_modes(struct drm_connector *connector, - struct edid *edid) + const struct drm_edid *drm_edid) { struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector); - if (edid) { + if (drm_edid) { /* empty probed_modes */ INIT_LIST_HEAD(&connector->probed_modes); amdgpu_dm_connector->num_modes = - drm_add_edid_modes(connector, edid); + drm_edid_connector_add_modes(connector); /* sorting the probed modes before calling function * amdgpu_dm_get_native_mode() since EDID can have @@ -7899,10 +7883,10 @@ static void amdgpu_dm_connector_ddc_get_modes(struct drm_connector *connector, amdgpu_dm_get_native_mode(connector); /* Freesync capabilities are reset by calling - * drm_add_edid_modes() and need to be + * drm_edid_connector_add_modes() and need to be * restored here. */ - amdgpu_dm_update_freesync_caps(connector, edid); + amdgpu_dm_update_freesync_caps(connector, drm_edid); } else { amdgpu_dm_connector->num_modes = 0; } @@ -7998,12 +7982,12 @@ static uint add_fs_modes(struct amdgpu_dm_connector *aconnector) } static void amdgpu_dm_connector_add_freesync_modes(struct drm_connector *connector, - struct edid *edid) + const struct drm_edid *drm_edid) { struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector); - if (!(amdgpu_freesync_vid_mode && edid)) + if (!(amdgpu_freesync_vid_mode && drm_edid)) return; if (amdgpu_dm_connector->max_vfreq - amdgpu_dm_connector->min_vfreq > 10) @@ -8016,24 +8000,24 @@ static int amdgpu_dm_connector_get_modes(struct drm_connector *connector) struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector); struct drm_encoder *encoder; - struct edid *edid = amdgpu_dm_connector->edid; + const struct drm_edid *drm_edid = amdgpu_dm_connector->drm_edid; struct dc_link_settings *verified_link_cap = &amdgpu_dm_connector->dc_link->verified_link_cap; const struct dc *dc = amdgpu_dm_connector->dc_link->dc; encoder = amdgpu_dm_connector_to_encoder(connector); - if (!drm_edid_is_valid(edid)) { + if (!drm_edid) { amdgpu_dm_connector->num_modes = drm_add_modes_noedid(connector, 640, 480); if (dc->link_srv->dp_get_encoding_format(verified_link_cap) == DP_128b_132b_ENCODING) amdgpu_dm_connector->num_modes += drm_add_modes_noedid(connector, 1920, 1080); } else { - amdgpu_dm_connector_ddc_get_modes(connector, edid); + amdgpu_dm_connector_ddc_get_modes(connector, drm_edid); if (encoder) amdgpu_dm_connector_add_common_modes(encoder, connector); - amdgpu_dm_connector_add_freesync_modes(connector, edid); + amdgpu_dm_connector_add_freesync_modes(connector, drm_edid); } amdgpu_dm_fbc_init(connector); @@ -11958,7 +11942,7 @@ static bool parse_edid_cea(struct amdgpu_dm_connector *aconnector, } static void parse_edid_displayid_vrr(struct drm_connector *connector, - struct edid *edid) + const struct edid *edid) { u8 *edid_ext = NULL; int i; @@ -12001,7 +11985,7 @@ static void parse_edid_displayid_vrr(struct drm_connector *connector, } static int parse_amd_vsdb(struct amdgpu_dm_connector *aconnector, - struct edid *edid, struct amdgpu_hdmi_vsdb_info *vsdb_info) + const struct edid *edid, struct amdgpu_hdmi_vsdb_info *vsdb_info) { u8 *edid_ext = NULL; int i; @@ -12036,7 +12020,8 @@ static int parse_amd_vsdb(struct amdgpu_dm_connector *aconnector, } static int parse_hdmi_amd_vsdb(struct amdgpu_dm_connector *aconnector, - struct edid *edid, struct amdgpu_hdmi_vsdb_info *vsdb_info) + const struct edid *edid, + struct amdgpu_hdmi_vsdb_info *vsdb_info) { u8 *edid_ext = NULL; int i; @@ -12070,7 +12055,7 @@ static int parse_hdmi_amd_vsdb(struct amdgpu_dm_connector *aconnector, * amdgpu_dm_update_freesync_caps - Update Freesync capabilities * * @connector: Connector to query. - * @edid: EDID from monitor + * @drm_edid: DRM EDID from monitor * * Amdgpu supports Freesync in DP and HDMI displays, and it is required to keep * track of some of the display information in the internal data struct used by @@ -12078,19 +12063,19 @@ static int parse_hdmi_amd_vsdb(struct amdgpu_dm_connector *aconnector, * FreeSync parameters. */ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, - struct edid *edid) + const struct drm_edid *drm_edid) { int i = 0; - struct detailed_timing *timing; - struct detailed_non_pixel *data; - struct detailed_data_monitor_range *range; + const struct detailed_timing *timing; + const struct detailed_non_pixel *data; + const struct detailed_data_monitor_range *range; struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector); struct dm_connector_state *dm_con_state = NULL; struct dc_sink *sink; - struct amdgpu_device *adev = drm_to_adev(connector->dev); struct amdgpu_hdmi_vsdb_info vsdb_info = {0}; + const struct edid *edid; bool freesync_capable = false; enum adaptive_sync_type as_type = ADAPTIVE_SYNC_TYPE_NONE; @@ -12103,7 +12088,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, amdgpu_dm_connector->dc_sink : amdgpu_dm_connector->dc_em_sink; - if (!edid || !sink) { + if (!drm_edid || !sink) { dm_con_state = to_dm_connector_state(connector->state); amdgpu_dm_connector->min_vfreq = 0; @@ -12120,6 +12105,8 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, if (!adev->dm.freesync_module) goto update; + edid = drm_edid_raw(drm_edid); // FIXME: Get rid of drm_edid_raw() + /* Some eDP panels only have the refresh rate range info in DisplayID */ if ((connector->display_info.monitor_range.min_vfreq == 0 || connector->display_info.monitor_range.max_vfreq == 0)) @@ -12196,7 +12183,7 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, amdgpu_dm_connector->as_type = ADAPTIVE_SYNC_TYPE_EDP; } - } else if (edid && sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A) { + } else if (drm_edid && sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A) { i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info); if (i >= 0 && vsdb_info.freesync_supported) { timing = &edid->detailed_timings[i]; diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h index 15d4690c74d6..5e49b97b3d46 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h @@ -673,7 +673,7 @@ struct amdgpu_dm_connector { /* we need to mind the EDID between detect and get modes due to analog/digital/tvencoder */ - struct edid *edid; + const struct drm_edid *drm_edid; /* shared with amdgpu */ struct amdgpu_hpd hpd; @@ -951,7 +951,7 @@ void dm_restore_drm_connector_state(struct drm_device *dev, struct drm_connector *connector); void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, - struct edid *edid); + const struct drm_edid *drm_edid); void amdgpu_dm_trigger_timing_sync(struct drm_device *dev); diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c index 50109d13d967..b8004ccdcc33 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c @@ -897,7 +897,8 @@ enum dc_edid_status dm_helpers_read_local_edid( struct i2c_adapter *ddc; int retry = 3; enum dc_edid_status edid_status; - struct edid *edid; + const struct drm_edid *drm_edid; + const struct edid *edid; if (link->aux_mode) ddc = &aconnector->dm_dp_aux.aux.ddc; @@ -909,25 +910,27 @@ enum dc_edid_status dm_helpers_read_local_edid( */ do { - edid = drm_get_edid(&aconnector->base, ddc); + drm_edid = drm_edid_read_ddc(connector, ddc); + drm_edid_connector_update(connector, drm_edid); /* DP Compliance Test 4.2.2.6 */ if (link->aux_mode && connector->edid_corrupt) drm_dp_send_real_edid_checksum(&aconnector->dm_dp_aux.aux, connector->real_edid_checksum); - if (!edid && connector->edid_corrupt) { + if (!drm_edid && connector->edid_corrupt) { connector->edid_corrupt = false; return EDID_BAD_CHECKSUM; } - if (!edid) + if (!drm_edid) return EDID_NO_RESPONSE; + edid = drm_edid_raw(drm_edid); // FIXME: Get rid of drm_edid_raw() sink->dc_edid.length = EDID_LENGTH * (edid->extensions + 1); memmove(sink->dc_edid.raw_edid, (uint8_t *)edid, sink->dc_edid.length); /* We don't need the original edid anymore */ - kfree(edid); + drm_edid_free(drm_edid); edid_status = dm_helpers_parse_edid_caps( link, diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c index 83a31b97e96b..5e3d3eda3c9f 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c @@ -129,7 +129,7 @@ dm_dp_mst_connector_destroy(struct drm_connector *connector) dc_sink_release(aconnector->dc_sink); } - kfree(aconnector->edid); + drm_edid_free(aconnector->drm_edid); drm_connector_cleanup(connector); drm_dp_mst_put_port_malloc(aconnector->mst_output_port); @@ -182,7 +182,7 @@ amdgpu_dm_mst_connector_early_unregister(struct drm_connector *connector) dc_sink_release(dc_sink); aconnector->dc_sink = NULL; - aconnector->edid = NULL; + aconnector->drm_edid = NULL; aconnector->dsc_aux = NULL; port->passthrough_aux = NULL; } @@ -302,16 +302,18 @@ static int dm_dp_mst_get_modes(struct drm_connector *connector) if (!aconnector) return drm_add_edid_modes(connector, NULL); - if (!aconnector->edid) { - struct edid *edid; + if (!aconnector->drm_edid) { + const struct drm_edid *drm_edid; - edid = drm_dp_mst_get_edid(connector, &aconnector->mst_root->mst_mgr, aconnector->mst_output_port); + drm_edid = drm_dp_mst_edid_read(connector, + &aconnector->mst_root->mst_mgr, + aconnector->mst_output_port); - if (!edid) { + if (!drm_edid) { amdgpu_dm_set_mst_status(&aconnector->mst_status, MST_REMOTE_EDID, false); - drm_connector_update_edid_property( + drm_edid_connector_update( &aconnector->base, NULL); @@ -345,7 +347,7 @@ static int dm_dp_mst_get_modes(struct drm_connector *connector) return ret; } - aconnector->edid = edid; + aconnector->drm_edid = drm_edid; amdgpu_dm_set_mst_status(&aconnector->mst_status, MST_REMOTE_EDID, true); } @@ -360,10 +362,13 @@ static int dm_dp_mst_get_modes(struct drm_connector *connector) struct dc_sink_init_data init_params = { .link = aconnector->dc_link, .sink_signal = SIGNAL_TYPE_DISPLAY_PORT_MST }; + const struct edid *edid; + + edid = drm_edid_raw(aconnector->drm_edid); // FIXME: Get rid of drm_edid_raw() dc_sink = dc_link_add_remote_sink( aconnector->dc_link, - (uint8_t *)aconnector->edid, - (aconnector->edid->extensions + 1) * EDID_LENGTH, + (uint8_t *)edid, + (edid->extensions + 1) * EDID_LENGTH, &init_params); if (!dc_sink) { @@ -405,7 +410,7 @@ static int dm_dp_mst_get_modes(struct drm_connector *connector) if (aconnector->dc_sink) { amdgpu_dm_update_freesync_caps( - connector, aconnector->edid); + connector, aconnector->drm_edid); #if defined(CONFIG_DRM_AMD_DC_FP) if (!validate_dsc_caps_on_connector(aconnector)) @@ -419,10 +424,9 @@ static int dm_dp_mst_get_modes(struct drm_connector *connector) } } - drm_connector_update_edid_property( - &aconnector->base, aconnector->edid); + drm_edid_connector_update(&aconnector->base, aconnector->drm_edid); - ret = drm_add_edid_modes(connector, aconnector->edid); + ret = drm_edid_connector_add_modes(connector); return ret; } @@ -500,7 +504,7 @@ dm_dp_mst_detect(struct drm_connector *connector, dc_sink_release(aconnector->dc_sink); aconnector->dc_sink = NULL; - aconnector->edid = NULL; + aconnector->drm_edid = NULL; aconnector->dsc_aux = NULL; port->passthrough_aux = NULL; From patchwork Wed Sep 18 21:38:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13807221 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A0320CDD561 for ; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(376014)(1800799024)(36860700013)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2024 21:39:12.9492 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 89bb2fbd-6d92-4751-e806-08dcd82a5673 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C7.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN6PR12MB8541 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Melissa Wen Connectors have source physical address available in display info. Use drm_dp_cec_attach() to use it instead of parsing the EDID again. Signed-off-by: Melissa Wen Signed-off-by: Mario Limonciello --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index b7d93787667c..0b6c936be7a6 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -3548,8 +3548,7 @@ void amdgpu_dm_update_connector_after_detect( if (sink->dc_edid.length == 0) { aconnector->drm_edid = NULL; if (aconnector->dc_link->aux_mode) { - drm_dp_cec_unset_edid( - &aconnector->dm_dp_aux.aux); + drm_dp_cec_unset_edid(&aconnector->dm_dp_aux.aux); } } else { const struct edid *edid = (const struct edid *)sink->dc_edid.raw_edid; @@ -3558,7 +3557,8 @@ void amdgpu_dm_update_connector_after_detect( drm_edid_connector_update(connector, aconnector->drm_edid); if (aconnector->dc_link->aux_mode) - drm_dp_cec_set_edid(&aconnector->dm_dp_aux.aux, edid); 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Signed-off-by: Melissa Wen Signed-off-by: Mario Limonciello --- drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 0b6c936be7a6..efc1609ff26f 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -3569,13 +3569,11 @@ void amdgpu_dm_update_connector_after_detect( "failed to create aconnector->requested_timing\n"); } - drm_edid_connector_update(connector, aconnector->drm_edid); amdgpu_dm_update_freesync_caps(connector, aconnector->drm_edid); update_connector_ext_caps(aconnector); } else { drm_dp_cec_unset_edid(&aconnector->dm_dp_aux.aux); amdgpu_dm_update_freesync_caps(connector, NULL); - drm_edid_connector_update(connector, NULL); aconnector->num_modes = 0; dc_sink_release(aconnector->dc_sink); aconnector->dc_sink = NULL; @@ -12088,6 +12086,8 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, amdgpu_dm_connector->dc_sink : amdgpu_dm_connector->dc_em_sink; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(376014)(82310400026)(1800799024)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2024 21:39:15.2461 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f32f8fa2-5747-41b0-622e-08dcd82a57d2 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C7.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8509 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Melissa Wen When updating connector under drm_edid infrastructure, many calculations and validations are already done and become redundant inside AMD driver. Remove those driver-specific code in favor of the DRM common code. Signed-off-by: Melissa Wen Co-developed-by: Mario Limonciello Signed-off-by: Mario Limonciello --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 74 +------------------ 1 file changed, 4 insertions(+), 70 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index efc1609ff26f..bd8fb9968c7c 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -12064,9 +12064,6 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, const struct drm_edid *drm_edid) { int i = 0; - const struct detailed_timing *timing; - const struct detailed_non_pixel *data; - const struct detailed_data_monitor_range *range; struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector); struct dm_connector_state *dm_con_state = NULL; @@ -12093,8 +12090,6 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, amdgpu_dm_connector->min_vfreq = 0; amdgpu_dm_connector->max_vfreq = 0; - connector->display_info.monitor_range.min_vfreq = 0; - connector->display_info.monitor_range.max_vfreq = 0; freesync_capable = false; goto update; @@ -12114,67 +12109,10 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, if (edid && (sink->sink_signal == SIGNAL_TYPE_DISPLAY_PORT || sink->sink_signal == SIGNAL_TYPE_EDP)) { - bool edid_check_required = false; - - if (amdgpu_dm_connector->dc_link && - amdgpu_dm_connector->dc_link->dpcd_caps.allow_invalid_MSA_timing_param) { - if (edid->features & DRM_EDID_FEATURE_CONTINUOUS_FREQ) { - amdgpu_dm_connector->min_vfreq = connector->display_info.monitor_range.min_vfreq; - amdgpu_dm_connector->max_vfreq = connector->display_info.monitor_range.max_vfreq; - if (amdgpu_dm_connector->max_vfreq - - amdgpu_dm_connector->min_vfreq > 10) - freesync_capable = true; - } else { - edid_check_required = edid->version > 1 || - (edid->version == 1 && - edid->revision > 1); - } - } - - if (edid_check_required) { - for (i = 0; i < 4; i++) { - - timing = &edid->detailed_timings[i]; - data = &timing->data.other_data; - range = &data->data.range; - /* - * Check if monitor has continuous frequency mode - */ - if (data->type != EDID_DETAIL_MONITOR_RANGE) - continue; - /* - * Check for flag range limits only. If flag == 1 then - * no additional timing information provided. - * Default GTF, GTF Secondary curve and CVT are not - * supported - */ - if (range->flags != 1) - continue; - - connector->display_info.monitor_range.min_vfreq = range->min_vfreq; - connector->display_info.monitor_range.max_vfreq = range->max_vfreq; - - if (edid->revision >= 4) { - if (data->pad2 & DRM_EDID_RANGE_OFFSET_MIN_VFREQ) - connector->display_info.monitor_range.min_vfreq += 255; - if (data->pad2 & DRM_EDID_RANGE_OFFSET_MAX_VFREQ) - connector->display_info.monitor_range.max_vfreq += 255; - } - - amdgpu_dm_connector->min_vfreq = - connector->display_info.monitor_range.min_vfreq; - amdgpu_dm_connector->max_vfreq = - connector->display_info.monitor_range.max_vfreq; - - break; - } - - if (amdgpu_dm_connector->max_vfreq - - amdgpu_dm_connector->min_vfreq > 10) { - - freesync_capable = true; - } - } + amdgpu_dm_connector->min_vfreq = connector->display_info.monitor_range.min_vfreq; + amdgpu_dm_connector->max_vfreq = connector->display_info.monitor_range.max_vfreq; + if (amdgpu_dm_connector->max_vfreq - amdgpu_dm_connector->min_vfreq > 10) + freesync_capable = true; parse_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info); if (vsdb_info.replay_mode) { @@ -12182,13 +12120,9 @@ void amdgpu_dm_update_freesync_caps(struct drm_connector *connector, amdgpu_dm_connector->vsdb_info.amd_vsdb_version = vsdb_info.amd_vsdb_version; amdgpu_dm_connector->as_type = ADAPTIVE_SYNC_TYPE_EDP; } - } else if (drm_edid && sink->sink_signal == SIGNAL_TYPE_HDMI_TYPE_A) { i = parse_hdmi_amd_vsdb(amdgpu_dm_connector, edid, &vsdb_info); if (i >= 0 && vsdb_info.freesync_supported) { - timing = &edid->detailed_timings[i]; - data = &timing->data.other_data; - amdgpu_dm_connector->min_vfreq = vsdb_info.min_refresh_rate_hz; amdgpu_dm_connector->max_vfreq = vsdb_info.max_refresh_rate_hz; if (amdgpu_dm_connector->max_vfreq - amdgpu_dm_connector->min_vfreq > 10) From patchwork Wed Sep 18 21:38:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mario Limonciello X-Patchwork-Id: 13807224 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EAA0ECDD560 for ; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(376014)(36860700013)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2024 21:39:15.8868 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d9748963-bca2-4139-22c3-08dcd82a5834 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C7.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA1PR12MB5659 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Melissa Wen Since [1], we can use drm_edid_product_id to get debug info from drm_edid instead of directly parsing EDID. Link: https://lore.kernel.org/dri-devel/cover.1712655867.git.jani.nikula@intel.com/ [1] Signed-off-by: Melissa Wen Co-developed-by: Mario Limonciello Signed-off-by: Mario Limonciello --- .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 38 ++++++++++--------- 1 file changed, 20 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c index b8004ccdcc33..cf11ac4c1672 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c @@ -45,16 +45,16 @@ #include "dm_helpers.h" #include "ddc_service_types.h" -static u32 edid_extract_panel_id(struct edid *edid) +static u32 edid_extract_panel_id(struct drm_edid_product_id *product_id) { - return (u32)edid->mfg_id[0] << 24 | - (u32)edid->mfg_id[1] << 16 | - (u32)EDID_PRODUCT_ID(edid); + return (u32)be16_to_cpu(product_id->manufacturer_name) << 16 | + (u32)le16_to_cpu(product_id->product_code); } -static void apply_edid_quirks(struct edid *edid, struct dc_edid_caps *edid_caps) +static void apply_edid_quirks(struct drm_edid_product_id *product_id, + struct dc_edid_caps *edid_caps) { - uint32_t panel_id = edid_extract_panel_id(edid); + uint32_t panel_id = edid_extract_panel_id(product_id); switch (panel_id) { /* Workaround for some monitors which does not work well with FAMS */ @@ -94,6 +94,8 @@ enum dc_edid_status dm_helpers_parse_edid_caps( { struct amdgpu_dm_connector *aconnector = link->priv; struct drm_connector *connector = &aconnector->base; + const struct drm_edid *drm_edid = aconnector->drm_edid; + struct drm_edid_product_id product_id; struct edid *edid_buf = edid ? (struct edid *) edid->raw_edid : NULL; struct cea_sad *sads; int sad_count = -1; @@ -109,13 +111,13 @@ enum dc_edid_status dm_helpers_parse_edid_caps( if (!drm_edid_is_valid(edid_buf)) result = EDID_BAD_CHECKSUM; - edid_caps->manufacturer_id = (uint16_t) edid_buf->mfg_id[0] | - ((uint16_t) edid_buf->mfg_id[1])<<8; - edid_caps->product_id = (uint16_t) edid_buf->prod_code[0] | - ((uint16_t) edid_buf->prod_code[1])<<8; - edid_caps->serial_number = edid_buf->serial; - edid_caps->manufacture_week = edid_buf->mfg_week; - edid_caps->manufacture_year = edid_buf->mfg_year; + drm_edid_get_product_id(drm_edid, &product_id); + + edid_caps->manufacturer_id = le16_to_cpu(product_id.manufacturer_name); + edid_caps->product_id = le16_to_cpu(product_id.product_code); + edid_caps->serial_number = le32_to_cpu(product_id.serial_number); + edid_caps->manufacture_week = product_id.week_of_manufacture; + edid_caps->manufacture_year = product_id.year_of_manufacture; drm_edid_get_monitor_name(edid_buf, edid_caps->display_name, @@ -123,7 +125,7 @@ enum dc_edid_status dm_helpers_parse_edid_caps( edid_caps->edid_hdmi = connector->display_info.is_hdmi; - apply_edid_quirks(edid_buf, edid_caps); + apply_edid_quirks(&product_id, edid_caps); sad_count = drm_edid_to_sad((struct edid *) edid->raw_edid, &sads); if (sad_count <= 0) @@ -909,9 +911,9 @@ enum dc_edid_status dm_helpers_read_local_edid( * do check sum and retry to make sure read correct edid. */ do { - drm_edid = drm_edid_read_ddc(connector, ddc); drm_edid_connector_update(connector, drm_edid); + aconnector->drm_edid = drm_edid; /* DP Compliance Test 4.2.2.6 */ if (link->aux_mode && connector->edid_corrupt) @@ -929,14 +931,14 @@ enum dc_edid_status dm_helpers_read_local_edid( sink->dc_edid.length = EDID_LENGTH * (edid->extensions + 1); memmove(sink->dc_edid.raw_edid, (uint8_t *)edid, sink->dc_edid.length); - /* We don't need the original edid anymore */ - drm_edid_free(drm_edid); - edid_status = dm_helpers_parse_edid_caps( link, &sink->dc_edid, &sink->edid_caps); + /* We don't need the original edid anymore */ + drm_edid_free(drm_edid); + } while (edid_status == EDID_BAD_CHECKSUM && --retry > 0); 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Wed, 18 Sep 2024 21:39:16 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by SA2PEPF000015C7.mail.protection.outlook.com (10.167.241.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.7918.13 via Frontend Transport; Wed, 18 Sep 2024 21:39:16 +0000 Received: from AUS-P9-MLIMONCI.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Wed, 18 Sep 2024 16:39:15 -0500 From: Mario Limonciello To: Alex Hung , Alexander Deucher , Melissa Wen CC: , , , , , Mark Pearson , "Mario Limonciello" Subject: [PATCH v7 06/10] drm/amd/display: parse display name from drm_eld Date: Wed, 18 Sep 2024 16:38:41 -0500 Message-ID: <20240918213845.158293-7-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240918213845.158293-1-mario.limonciello@amd.com> References: <20240918213845.158293-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015C7:EE_|LV8PR12MB9418:EE_ X-MS-Office365-Filtering-Correlation-Id: 29a507e0-0cda-421c-0b7b-08dcd82a587e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(376014)(36860700013)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2024 21:39:16.3711 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 29a507e0-0cda-421c-0b7b-08dcd82a587e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C7.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV8PR12MB9418 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Melissa Wen We don't need to parse dc_edid to get the display name since it's already set in drm_eld which in turn had it values updated when updating connector with the opaque drm_edid. Signed-off-by: Melissa Wen Signed-off-by: Mario Limonciello --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c index cf11ac4c1672..854e51c0b3fb 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c @@ -32,7 +32,7 @@ #include #include #include - +#include #include "dm_services.h" #include "amdgpu.h" #include "dc.h" @@ -78,6 +78,7 @@ static void apply_edid_quirks(struct drm_edid_product_id *product_id, } } +#define AMDGPU_ELD_DISPLAY_NAME_SIZE_IN_CHARS 13 /** * dm_helpers_parse_edid_caps() - Parse edid caps * @@ -119,9 +120,10 @@ enum dc_edid_status dm_helpers_parse_edid_caps( edid_caps->manufacture_week = product_id.week_of_manufacture; edid_caps->manufacture_year = product_id.year_of_manufacture; - drm_edid_get_monitor_name(edid_buf, - edid_caps->display_name, - AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS); 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Wed, 18 Sep 2024 16:39:16 -0500 From: Mario Limonciello To: Alex Hung , Alexander Deucher , Melissa Wen CC: , , , , , Mark Pearson , "Mario Limonciello" Subject: [PATCH v7 07/10] drm/amd/display: get SAD from drm_eld when parsing EDID caps Date: Wed, 18 Sep 2024 16:38:42 -0500 Message-ID: <20240918213845.158293-8-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240918213845.158293-1-mario.limonciello@amd.com> References: <20240918213845.158293-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015C7:EE_|SN7PR12MB6909:EE_ X-MS-Office365-Filtering-Correlation-Id: a13645e9-4027-4568-1785-08dcd82a592c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|1800799024|376014|36860700013|82310400026; X-Microsoft-Antispam-Message-Info: nYZB6Ai0n8t2EJbR3lBRvxtPRy5xsNVEjqNlxtM4vO+eRGhBT6KN/yelDhQeni0tf4du0HVN2D+Dye9StmdPawOAcKMeH10159HbKEFqIFNa107tZ5PQ82zmEkZFZjScwuog5hA1rKA1fa1yj9ZQ1O+erEuJx1WyW3OgbmF2arRPhVIYfJn1/lbuZ/RA6wUKwyscWXtbG6IuqbE7DJS0vaTW5mq46c/7oKivmbdRm0UFSOUSoeK0QyhO1VWT81RYGpqbxv3dlVGYgpI89YUxtKtzYivkBDPiyRNfbAgpGTaSZvZqcqxGdfCm2NKwCKAwk+/1jtm165CUIVgVZ8cpTeVrvxqHgmPkrH5cNm4Fy1tgWFBa8Jg/lRLQwBKDfUkBZQ5gL9EsADWqPFr0JxsbdN4j3EX0Hl2GPqyV5FsUZsDZLuBmhuy4jmMyZWZse7yj5XDMbF8M3N+NDnDJK140ZvGAiIRCCfhO7YXORZk8FnFGLNipRCu8L5vRffTSWaKpNl2AXM1M/wtnBddRmlemSX+rqUjHnp/oc4Z10QllEAeocIhilVxw/ao1gU6h2WW70lqmaKDofEXPF5e/8eeC+iMuCakIREDOZahsrFIO8z7rv6ev0pmTdf6YGQ0KXchwP1BMA66pV07/cAfNUFykzwM06ennQ1F2UkZvM1t5zRabe9ih2hMFLrVdcNKFSA/KdtvH6U4o6RcpGhaJngxey6DGkV0AtuNvW516L/UTPnG5/AFQdwcMdHNZH1EEq/AABHizGt9X5mxPVCEPYT6bXnb3hD2f1FNbeWKak2+FqQLBqOFHEQP7PifMcamiST+KdhIkZTqpCXfZWEaJs15hD7kHFi6U82cPEghOmJ8pFxZxxeFEUfPqLZRusiLkKzOX8Ro/DhWLJRiKnpgfyZuvLFompjQZA0nUSmUaBbm7fNVzOLjLpR46mj0bTCta0HBLCc6q+RuOBU+z/GStEuSYvhl9Cha5RnS4d7HfLfds2nENNShaC88dScDLp2CyRUJk3+IYbdhXm8LQPHpedGVpVv0rZGpquiC3C8tYV7WWfKLT7QlZ9TvK/x3mIk7dHx5e51QEnDabRv5q2HR+nSW6A4UTjZeqai857h21uj7y8QZXcMbNWl2trQ3c8vfh5pYwATDxhy7+1eDDl99cEevmGGanm81ELp4sSdsCp5kJpqCrulp2XyehwIPnG5WEPYXUQ6oGril23Hl766Pp9/TkHEhjaOGE+AKRFOqvL+ATisbqEiKomk78Ov1MhGRDA3DrOlgf035AnDbXhEekONeW9djKXION4yzqaOzPzRfBGsiS9t+2Hq0dOfMKTptuTT/dJO1esgG2u1A5fhkrDVk+2+iijfjRbjJxW1N0uwTJi/vSTXAwdrTN+P7TMhx85byJHZuJghwMNYet6zFJw+4mueyiWKeOHy9CaaLFIfgUzpgOofFhe3rUdQNv3YHdfzcK X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(376014)(36860700013)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2024 21:39:17.5274 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a13645e9-4027-4568-1785-08dcd82a592c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C7.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN7PR12MB6909 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Melissa Wen drm_edid_connector_update() updates display info, filling ELD with audio info from Short-Audio Descriptors in the last step of update_dislay_info(). Our goal is stopping using raw edid, so we can extract SAD from drm_eld instead of access raw edid to get audio caps. Signed-off-by: Melissa Wen Signed-off-by: Mario Limonciello --- .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 20 +++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c index 854e51c0b3fb..e0326127fd9a 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c @@ -98,9 +98,7 @@ enum dc_edid_status dm_helpers_parse_edid_caps( const struct drm_edid *drm_edid = aconnector->drm_edid; struct drm_edid_product_id product_id; struct edid *edid_buf = edid ? (struct edid *) edid->raw_edid : NULL; - struct cea_sad *sads; - int sad_count = -1; - int sadb_count = -1; + int sad_count, sadb_count; int i = 0; uint8_t *sadb = NULL; @@ -129,18 +127,21 @@ enum dc_edid_status dm_helpers_parse_edid_caps( apply_edid_quirks(&product_id, edid_caps); - sad_count = drm_edid_to_sad((struct edid *) edid->raw_edid, &sads); + sad_count = drm_eld_sad_count(connector->eld); if (sad_count <= 0) return result; edid_caps->audio_mode_count = min(sad_count, DC_MAX_AUDIO_DESC_COUNT); for (i = 0; i < edid_caps->audio_mode_count; ++i) { - struct cea_sad *sad = &sads[i]; + struct cea_sad sad; - edid_caps->audio_modes[i].format_code = sad->format; - edid_caps->audio_modes[i].channel_count = sad->channels + 1; - edid_caps->audio_modes[i].sample_rate = sad->freq; - edid_caps->audio_modes[i].sample_size = sad->byte2; + if (drm_eld_sad_get(connector->eld, i, &sad) < 0) + continue; + + edid_caps->audio_modes[i].format_code = sad.format; + edid_caps->audio_modes[i].channel_count = sad.channels + 1; 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Wed, 18 Sep 2024 16:39:17 -0500 From: Mario Limonciello To: Alex Hung , Alexander Deucher , Melissa Wen CC: , , , , , Mark Pearson , "Mario Limonciello" Subject: [PATCH v7 08/10] drm/amd/display: get SADB from drm_eld when parsing EDID caps Date: Wed, 18 Sep 2024 16:38:43 -0500 Message-ID: <20240918213845.158293-9-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240918213845.158293-1-mario.limonciello@amd.com> References: <20240918213845.158293-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015C9:EE_|CYYPR12MB8992:EE_ X-MS-Office365-Filtering-Correlation-Id: 6e485825-ddb4-4461-6dda-08dcd82a59bd X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|376014|36860700013|1800799024; X-Microsoft-Antispam-Message-Info: gPNODRS5Gr8E1XN/NGPLnCt+1goEwChbRu0ObGn++J+nYfAFUBL/USjTda61I7U2fbmXDVzC16k6CO/2bjJRxJpNVcppn8rqQpVI+JeZcyCmVovQlBJcGXLMndGitZ//SW9ZGU+N1ri/iAehf80kI4QLCuryNwJ3gzFomgea8cyfPE0evAY32i/NuThe8tVYlI6vJLjOteTtqvb7vHY9QYlBsW59oHnu+hSva8CTx62u4Bp2RtdYU+dNN33xJba7XfUZ9M0Z/pE5QYMgS5Fg0dDDdvDPH3yz4QMKv5ZkSUFwC8jZeV9uWvPyl6eNmr3bqhdgy9xJP7lsnuGr6bo2Cekq12QV5+3RzWbgR5CwEAKF1SAd18uEmwZTDNsdJRFXzjRFsQwP4B5Ms32s65dYBLPCgfuFcuPQG3m2gYBjJUxLM0Ea7tGSSIyRAG9GERM7hdp2WfZHBDuiLxs0Xu3ooTUwufNRaTzlUswIPtTZ6cyefFFyyc++ihQujr0dcPtQ7xr8w4tzrbhR2QWGbpEsPob3j0E4ZcJ1ut4zqZFO5tFts7tDSMBrZu1j2jEViqoNNZ8K2ZdFVkmpumCXzya2k1voZjMYmPCOg0sHKt0se2wZTFs4hJN9DIynLsRIFgE1hSqs6p0ltX2zZbdayC+LtgmVY2TGOWxhMYd/DQKm+h7EYcrbVJ9ug0Imfz6Qh4aW9VoAk/UiYdd6qiB+q5eX6/3+8CzA6Vy2p1e1Zu+6q04AQiHLViZYkMtwoGQU/YJ53m5MVmHDyVjsS4b9UqhP/+U9TtoXDCHjEZWf2oPbO5a348B3sDQASfeYRd/BhNR+nOpkSKR5QZoTMjW1cd3/OaST93rxk7wcFkSphNuic3BNzDX9Ca8AS4qitzDg0tEd1iHcmH1RVRdtSMo71Ggb18Lce+gIGUJNiu7jsOoIdNabyGSfkZLFk71npD9H+epWQ7qNnWsBUl1z++oicseK+U4D5B5K1rAbHaj4W48VokzmhXJwsUTPey03rAX+0+zTU7cEsuRWNkE7nyMfOUIzlUqRS29fkD+D2dgcPSvN8I66ESGv30MJe+JNjl1llCkkbU/iMF11xgiwDrkYht7SgpDrf7IbAuEZr49ImCLhjYj1/nP4TVWsXm8ItXPc7bUd7Yl5ckN9pgy1cxM+nKDFTtJwJMbVRSo6ulZ0TczGrjF3moyBx5/JikPI/bsM3a6y3/cxapoURvK/r98xv7BdD2lSNnFmEMEQRzLTxwawh0FgI9fXOWcOjlaBYtMtmjGOKkKFMslgebJ6/x6max4NhFcA7hZ4WfGUq+n6q1ZhxfBun3FUXOXLyRgDTMH4KfWcP2b+C0b+KSQ2G48C9FNEtnrEkjBn3ONEsnxKC84+s7XmL06Y83V7iC+CygoQpvNxA6Y9+ya1FRQpOa8X6p7j2YztK9I8QQfPCtAMHDb6qSWTJihpyVcXskMi43JtEqYG X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Our goal is stopping using raw edid, so we can extract SADB from drm_eld instead of access raw edid to get audio caps. Signed-off-by: Melissa Wen Signed-off-by: Mario Limonciello --- .../drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 15 +++------------ 1 file changed, 3 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c index e0326127fd9a..d43ed3ea000b 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c @@ -98,9 +98,8 @@ enum dc_edid_status dm_helpers_parse_edid_caps( const struct drm_edid *drm_edid = aconnector->drm_edid; struct drm_edid_product_id product_id; struct edid *edid_buf = edid ? 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(1800799024)(376014)(36860700013)(82310400026); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2024 21:39:21.0268 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2a6c717c-e751-4367-0e94-08dcd82a5b42 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C9.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS0PR12MB7827 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" From: Melissa Wen We can parse edid caps from drm_edid and drm_eld and any calls of dm_helpers_parse_edid_caps is made in a state that we have drm_edid set to amdgpu connector. Signed-off-by: Melissa Wen Co-developed-by: Mario Limonciello Signed-off-by: Mario Limonciello --- .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 5 +--- .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 30 ++++++++----------- drivers/gpu/drm/amd/display/dc/dm_helpers.h | 1 - .../drm/amd/display/dc/link/link_detection.c | 6 ++-- 4 files changed, 16 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index bd8fb9968c7c..bf847ac55475 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -7123,10 +7123,7 @@ static void amdgpu_dm_connector_funcs_force(struct drm_connector *connector) memset(&dc_em_sink->edid_caps, 0, sizeof(struct dc_edid_caps)); memmove(dc_em_sink->dc_edid.raw_edid, edid, (edid->extensions + 1) * EDID_LENGTH); - dm_helpers_parse_edid_caps( - dc_link, - &dc_em_sink->dc_edid, - &dc_em_sink->edid_caps); + dm_helpers_parse_edid_caps(dc_link, &dc_em_sink->edid_caps); } } diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c index d43ed3ea000b..8f4be7a1ec45 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c @@ -83,32 +83,24 @@ static void apply_edid_quirks(struct drm_edid_product_id *product_id, * dm_helpers_parse_edid_caps() - Parse edid caps * * @link: current detected link - * @edid: [in] pointer to edid * @edid_caps: [in] pointer to edid caps * * Return: void */ -enum dc_edid_status dm_helpers_parse_edid_caps( - struct dc_link *link, - const struct dc_edid *edid, - struct dc_edid_caps *edid_caps) +enum dc_edid_status dm_helpers_parse_edid_caps(struct dc_link *link, + struct dc_edid_caps *edid_caps) { struct amdgpu_dm_connector *aconnector = link->priv; struct drm_connector *connector = &aconnector->base; const struct drm_edid *drm_edid = aconnector->drm_edid; struct drm_edid_product_id product_id; - struct edid *edid_buf = edid ? (struct edid *) edid->raw_edid : NULL; int sad_count; int i = 0; - enum dc_edid_status result = EDID_OK; - if (!edid_caps || !edid) + if (!edid_caps || !drm_edid) return EDID_BAD_INPUT; - if (!drm_edid_is_valid(edid_buf)) - result = EDID_BAD_CHECKSUM; - drm_edid_get_product_id(drm_edid, &product_id); edid_caps->manufacturer_id = le16_to_cpu(product_id.manufacturer_name); @@ -920,19 +912,23 @@ enum dc_edid_status dm_helpers_read_local_edid( if (!drm_edid) return EDID_NO_RESPONSE; - edid = drm_edid_raw(drm_edid); // FIXME: Get rid of drm_edid_raw() + /* FIXME: Get rid of drm_edid_raw() + * Raw edid is still needed for dm_helpers_dp_write_dpcd() + */ + edid = drm_edid_raw(drm_edid); sink->dc_edid.length = EDID_LENGTH * (edid->extensions + 1); memmove(sink->dc_edid.raw_edid, (uint8_t *)edid, sink->dc_edid.length); edid_status = dm_helpers_parse_edid_caps( link, - &sink->dc_edid, &sink->edid_caps); - /* We don't need the original edid anymore */ - drm_edid_free(drm_edid); - - } while (edid_status == EDID_BAD_CHECKSUM && --retry > 0); + if (edid_status != EDID_OK) { + /* We can discard the drm_edid and retry */ + drm_edid_free(drm_edid); + drm_edid_connector_update(connector, drm_edid); + } + } while (edid_status != EDID_OK && --retry > 0); if (edid_status != EDID_OK) DRM_ERROR("EDID err: %d, on connector: %s", diff --git a/drivers/gpu/drm/amd/display/dc/dm_helpers.h b/drivers/gpu/drm/amd/display/dc/dm_helpers.h index 2e4a46f1b499..4e1776b5f0d4 100644 --- a/drivers/gpu/drm/amd/display/dc/dm_helpers.h +++ b/drivers/gpu/drm/amd/display/dc/dm_helpers.h @@ -61,7 +61,6 @@ void dm_helpers_free_gpu_mem( enum dc_edid_status dm_helpers_parse_edid_caps( struct dc_link *link, - const struct dc_edid *edid, struct dc_edid_caps *edid_caps); diff --git a/drivers/gpu/drm/amd/display/dc/link/link_detection.c b/drivers/gpu/drm/amd/display/dc/link/link_detection.c index d21ee9d12d26..94c911742dd3 100644 --- a/drivers/gpu/drm/amd/display/dc/link/link_detection.c +++ b/drivers/gpu/drm/amd/display/dc/link/link_detection.c @@ -1413,10 +1413,8 @@ struct dc_sink *link_add_remote_sink( dc_sink)) goto fail_add_sink; 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Wed, 18 Sep 2024 16:39:19 -0500 From: Mario Limonciello To: Alex Hung , Alexander Deucher , Melissa Wen CC: , , , , , Mark Pearson , "Mario Limonciello" Subject: [PATCH v7 10/10] drm/amd/display: Fetch the EDID from _DDC if available for eDP Date: Wed, 18 Sep 2024 16:38:45 -0500 Message-ID: <20240918213845.158293-11-mario.limonciello@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240918213845.158293-1-mario.limonciello@amd.com> References: <20240918213845.158293-1-mario.limonciello@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015C9:EE_|DM3PR12MB9434:EE_ X-MS-Office365-Filtering-Correlation-Id: 48020fb3-36de-414a-e0f2-08dcd82a5bd5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230040|82310400026|376014|1800799024|36860700013; X-Microsoft-Antispam-Message-Info: dqJ4152FIu8lD8aOmzzoVI2yELcznBqNTuva4B91/vLDhX18ePtFZEtsjJqTocoomiX3E0kyKv5AxspIsYO+nL21oM8JbTA5xwgxePLYsdqpyHzVRsomzYrUm3jvY19V6/BR5vqANTCFPY9sQKcH/jAzdkc0mvLFCNcSl8jEo0582Hdt+xgVidgHBGXcq59YuAAPdiKN20WseMbHl2ci3w/EIQRq0sC/ZC6KsE1qzNode3kNzWDSESqS5DdyZPCMPRZUJbbHNBlHPgiLLuQWiymAl4ypFNmRDDDIA98Rd0FlaGvqZsGNEgUCh/8aQGX/sOOxwi5EJ7a2E3xMfyZGrSc/SFnUrqpkjnNICfHWHh+17UVCvztDUb2iV9icQ3ftTSokJsn2qWlzBcmFqol5LRG5ej9DirB6ZBAXE6+xGim8ilZIlwHRhi2o/1QyA5Aty17dKphkv7ZA4iIc32HHfLZzQWwDSD7MrsmiHqEO+NbeuV254n4FbSmiQcpc6O4huDIMQNDCxpqJBRmTrf02pXtTzLtdHO2kbhcK3D8XbC6yYqLzFcdpCd2NRSRo3jGqvFzv2NQcHfYRYykMdANI21nlKJEGLzyk1h6GV5yYqlg75HKsaoKEXODlFy2BvOXDqWkZSr2RQSKfx8qdOJ+p5CkC+9QdlnjnJeMTCK3MX4U2EPy9xs5bTIx3ZsFIm64X+2kgtPg4HKOklG4qU5EvzIJAAl4bpBKyYzYUvPgZ6zTIvNffRlF5h/JA4MIT9u4hrJCBLwpHWjrwRPyr07GqIFvr8PL/rrwaRBheFtz8PdMgSsNCjNfd82zEGNzZRw52tEpAOQML0p1xPNx0woUgMz4qhzFfpc5sW9pr5YVBRPAPLurEOJ3y1hKNGGKma2JRBhGk2l9AJnPYRZ741NuBrir9puNkO35/6RT+AAQGfRndj8MXhuDINqcfYNH3dFFHLqtaiV5LUJ1SypSVeZMJMvssksSZ8K56g/LF3xRaayTmjjwLrtCqSD0iSOFQXCDpHTdv5TWzHd8IUu4Lxdbx2sAyzcn4qfouP5s13RWZ8HXxSYpkVkfvw1g2nuL6xDJXbf8p/DplX3YWztIzHMEAq8NtlXpdnURJ4AzYr3UvsbZtXhv4x6jwbyaejbZcrP6bsgUXo4gMHEkHAK7mT/tS2aAZPH6sWXcisE1jTW5Cmv0yTjdtKo+hGEte11C4i0IkCXVRgVfjWVH2Ccm2lkGHAmBwYsSs2I8XbkEDsADL1Hpgsk/rh7NKLG7hmEXQSqBGTwFRajmJKoS/SJ2aygF7b+RAWJtxc1lwiox7LtyNw5OiGPEhWIz9PU7iM9VKOKca741HZC0sJz02dvQArgTTgyKgyEJHlVjcj0GFPRTwKeK/3BiqI5OOMblSsaxQjFPrLH0M2CqSCwpboMyedSnhOPtDnAWCAXMLnsQipyznaUcjq8+secStjyQBKeZn+NrE X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230040)(82310400026)(376014)(1800799024)(36860700013); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Sep 2024 21:39:21.9799 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 48020fb3-36de-414a-e0f2-08dcd82a5bd5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C9.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PR12MB9434 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Some manufacturers have intentionally put an EDID that differs from the EDID on the internal panel on laptops. Attempt to fetch this EDID if it exists and prefer it over the EDID that is provided by the panel. If a user prefers to use the EDID from the panel, offer a DC debugging parameter that would disable this. Signed-off-by: Mario Limonciello Reviewed-by: Alex Hung --- .../amd/display/amdgpu_dm/amdgpu_dm_helpers.c | 62 ++++++++++++++++++- drivers/gpu/drm/amd/include/amd_shared.h | 5 ++ 2 files changed, 66 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c index 8f4be7a1ec45..05d3e00ecce0 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c @@ -23,6 +23,8 @@ * */ +#include + #include #include #include @@ -874,6 +876,60 @@ bool dm_helpers_is_dp_sink_present(struct dc_link *link) return dp_sink_present; } +static int +dm_helpers_probe_acpi_edid(void *data, u8 *buf, unsigned int block, size_t len) +{ + struct drm_connector *connector = data; + struct acpi_device *acpidev = ACPI_COMPANION(connector->dev->dev); + unsigned char start = block * EDID_LENGTH; + void *edid; + int r; + + if (!acpidev) + return -ENODEV; + + /* fetch the entire edid from BIOS */ + r = acpi_video_get_edid(acpidev, ACPI_VIDEO_DISPLAY_LCD, -1, &edid); + if (r < 0) { + DRM_DEBUG_KMS("Failed to get EDID from ACPI: %d\n", r); + return r; + } + if (len > r || start > r || start + len > r) { + r = -EINVAL; + goto cleanup; + } + + memcpy(buf, edid + start, len); + r = 0; + +cleanup: + kfree(edid); + + return r; +} + +static const struct drm_edid * +dm_helpers_read_acpi_edid(struct amdgpu_dm_connector *aconnector) +{ + struct drm_connector *connector = &aconnector->base; + + if (amdgpu_dc_debug_mask & DC_DISABLE_ACPI_EDID) + return NULL; + + switch (connector->connector_type) { + case DRM_MODE_CONNECTOR_LVDS: + case DRM_MODE_CONNECTOR_eDP: + break; + default: + return NULL; + } + + if (connector->force == DRM_FORCE_OFF) + return NULL; + + return drm_edid_read_custom(connector, dm_helpers_probe_acpi_edid, connector); +} + enum dc_edid_status dm_helpers_read_local_edid( struct dc_context *ctx, struct dc_link *link, @@ -896,7 +952,11 @@ enum dc_edid_status dm_helpers_read_local_edid( * do check sum and retry to make sure read correct edid. */ do { - drm_edid = drm_edid_read_ddc(connector, ddc); + drm_edid = dm_helpers_read_acpi_edid(aconnector); + if (drm_edid) + DRM_DEBUG_KMS("Using ACPI provided EDID for %s\n", connector->name); + else + drm_edid = drm_edid_read_ddc(connector, ddc); drm_edid_connector_update(connector, drm_edid); aconnector->drm_edid = drm_edid; diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h index 3f91926a50e9..1ec7c5e5249e 100644 --- a/drivers/gpu/drm/amd/include/amd_shared.h +++ b/drivers/gpu/drm/amd/include/amd_shared.h @@ -337,6 +337,11 @@ enum DC_DEBUG_MASK { * @DC_FORCE_IPS_ENABLE: If set, force enable all IPS, all the time. */ DC_FORCE_IPS_ENABLE = 0x4000, + /** + * @DC_DISABLE_ACPI_EDID: If set, don't attempt to fetch EDID for + * eDP display from ACPI _DDC method. + */ + DC_DISABLE_ACPI_EDID = 0x8000, }; enum amd_dpm_forced_level;