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Signed-off-by: Judith Mendez --- Changes since v5: - No change --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 27 ++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index 5b92aef5b284..98ba75af8730 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -843,6 +843,33 @@ ecap2: pwm@23120000 { status = "disabled"; }; + eqep0: counter@23200000 { + compatible = "ti,am62-eqep"; + reg = <0x00 0x23200000 0x00 0x100>; + power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 59 0>; + interrupts = ; + status = "disabled"; + }; + + eqep1: counter@23210000 { + compatible = "ti,am62-eqep"; + reg = <0x00 0x23210000 0x00 0x100>; + power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 60 0>; + interrupts = ; + status = "disabled"; + }; + + eqep2: counter@23220000 { + compatible = "ti,am62-eqep"; + reg = <0x00 0x23220000 0x00 0x100>; + power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 62 0>; + interrupts = ; + status = "disabled"; + }; + main_mcan0: can@20701000 { compatible = "bosch,m_can"; reg = <0x00 0x20701000 0x00 0x200>, From patchwork Tue Sep 24 22:06:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 13811273 Received: from fllv0015.ext.ti.com (fllv0015.ext.ti.com [198.47.19.141]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F40CE1AB519; Tue, 24 Sep 2024 22:07:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.141 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727215681; cv=none; b=N6NCuA/QnfKxDCYAJtshrli/5npkguoMhIAMVZjBtEZG4+lC7WtTrVpK03t5L55XsK5yhFFcsJ6MLX+tgBZ9PisCMG4Ek9D+YllaT7Gt3ea7FiTWaTEr8mUSxfRKG3bHTrhcBppH4ufVd/wTW/wo6svaUxSbB9Z/VJY7Aa+Hz94= ARC-Message-Signature: i=1; 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Tue, 24 Sep 2024 17:07:02 -0500 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 48OM72lT037639; Tue, 24 Sep 2024 17:07:02 -0500 From: Judith Mendez To: William Breathitt Gray CC: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vignesh Raghavendra , Nishanth Menon , Tero Kristo , David Lechner , , , , , Judith Mendez Subject: [PATCH v6 2/5] arm64: dts: ti: k3-am62a-main: Add eQEP nodes Date: Tue, 24 Sep 2024 17:06:57 -0500 Message-ID: <20240924220700.886313-3-jm@ti.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240924220700.886313-1-jm@ti.com> References: <20240924220700.886313-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Add eQEP device tree nodes 0-2 for AM62A7 SoC. Signed-off-by: Judith Mendez --- Changes since v5: - No change --- arch/arm64/boot/dts/ti/k3-am62a-main.dtsi | 27 +++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi index 16a578ae2b41..a93e2cd7b8c7 100644 --- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi @@ -943,6 +943,33 @@ ecap2: pwm@23120000 { status = "disabled"; }; + eqep0: counter@23200000 { + compatible = "ti,am62-eqep"; + reg = <0x00 0x23200000 0x00 0x100>; + power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 59 0>; + interrupts = ; + status = "disabled"; + }; + + eqep1: counter@23210000 { + compatible = "ti,am62-eqep"; + reg = <0x00 0x23210000 0x00 0x100>; + power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 60 0>; + interrupts = ; + status = "disabled"; + }; + + eqep2: counter@23220000 { + compatible = "ti,am62-eqep"; + reg = <0x00 0x23220000 0x00 0x100>; + power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 62 0>; + interrupts = ; + status = "disabled"; + }; + mcasp0: audio-controller@2b00000 { compatible = "ti,am33xx-mcasp-audio"; reg = <0x00 0x02b00000 0x00 0x2000>, From patchwork Tue Sep 24 22:06:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 13811270 Received: from lelv0142.ext.ti.com (lelv0142.ext.ti.com [198.47.23.249]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C0BBC1494D9; Tue, 24 Sep 2024 22:07:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.249 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727215679; cv=none; b=M0BZ7rNSGmT6xoEZA8duHuIg/SynvhzU/MDhymua3TUKblyK01JviqeAbt2+nSGRDeLVxvmDqivVHi82CkZYWVcCIi/x4aCmFBCOe75zsRcmWMOHken6xnhVjiBiPlkb5ejf7s5kk/CIgl388vsTWjGkBqZV1PLUokYNg2yKmfo= ARC-Message-Signature: i=1; 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Tue, 24 Sep 2024 17:07:02 -0500 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 48OM72lU037639; Tue, 24 Sep 2024 17:07:02 -0500 From: Judith Mendez To: William Breathitt Gray CC: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vignesh Raghavendra , Nishanth Menon , Tero Kristo , David Lechner , , , , , Judith Mendez Subject: [PATCH v6 3/5] arm64: dts: ti: k3-am62p-main: Add eQEP nodes Date: Tue, 24 Sep 2024 17:06:58 -0500 Message-ID: <20240924220700.886313-4-jm@ti.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240924220700.886313-1-jm@ti.com> References: <20240924220700.886313-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Add eQEP device tree nodes 0-2 for AM62P5 SoC. Signed-off-by: Judith Mendez --- Changes since v5: - No change --- .../dts/ti/k3-am62p-j722s-common-main.dtsi | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi index 9b6f51379108..41e1c24b1144 100644 --- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi @@ -827,6 +827,33 @@ ecap2: pwm@23120000 { status = "disabled"; }; + eqep0: counter@23200000 { + compatible = "ti,am62-eqep"; + reg = <0x00 0x23200000 0x00 0x100>; + power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 59 0>; + interrupts = ; + status = "disabled"; + }; + + eqep1: counter@23210000 { + compatible = "ti,am62-eqep"; + reg = <0x00 0x23210000 0x00 0x100>; + power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 60 0>; + interrupts = ; + status = "disabled"; + }; + + eqep2: counter@23220000 { + compatible = "ti,am62-eqep"; + reg = <0x00 0x23220000 0x00 0x100>; + power-domains = <&k3_pds 62 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 62 0>; + interrupts = ; + status = "disabled"; + }; + main_mcan0: can@20701000 { compatible = "bosch,m_can"; reg = <0x00 0x20701000 0x00 0x200>, From patchwork Tue Sep 24 22:06:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 13811268 Received: from fllv0016.ext.ti.com (fllv0016.ext.ti.com [198.47.19.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E842342A8F; Tue, 24 Sep 2024 22:07:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727215675; cv=none; b=gDrxT0jsoFBO+fyL/ArXkNbfQk2xNvnokD+mVA8uGuLfxTm9/0liQnsGyyfyMrDAZ1oTbQ9CzqjojnkvSYnPPpZMVJtHpyGq6WfoOq1x0U7ISBQU3hdizHfx2O//HzmgjYkMI+eJc94ZvvRrzlJxcBFT236tCATMDlkZLK0qFRs= ARC-Message-Signature: i=1; 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Tue, 24 Sep 2024 17:07:02 -0500 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 48OM72lV037639; Tue, 24 Sep 2024 17:07:02 -0500 From: Judith Mendez To: William Breathitt Gray CC: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vignesh Raghavendra , Nishanth Menon , Tero Kristo , David Lechner , , , , , Judith Mendez Subject: [PATCH v6 4/5] arm64: dts: ti: k3-am64-main: Add eQEP nodes Date: Tue, 24 Sep 2024 17:06:59 -0500 Message-ID: <20240924220700.886313-5-jm@ti.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240924220700.886313-1-jm@ti.com> References: <20240924220700.886313-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Add eQEP device tree nodes 0-2 for AM642 SoC. Signed-off-by: Judith Mendez --- Changes since v5: - No change --- arch/arm64/boot/dts/ti/k3-am64-main.dtsi | 27 ++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi index 7eae18399caa..f96cb19fb3f1 100644 --- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi @@ -1175,6 +1175,33 @@ ecap2: pwm@23120000 { status = "disabled"; }; + eqep0: counter@23200000 { + compatible = "ti,am62-eqep"; + reg = <0x00 0x23200000 0x00 0x100>; + power-domains = <&k3_pds 59 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 59 0>; + interrupts = ; + status = "disabled"; + }; + + eqep1: counter@23210000 { + compatible = "ti,am62-eqep"; + reg = <0x00 0x23210000 0x00 0x100>; + power-domains = <&k3_pds 60 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 60 0>; + interrupts = ; + status = "disabled"; + }; + + eqep2: counter@23220000 { + compatible = "ti,am62-eqep"; + reg = <0x00 0x23220000 0x00 0x100>; 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Tue, 24 Sep 2024 17:07:02 -0500 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp6.itg.ti.com (8.15.2/8.15.2) with ESMTP id 48OM72lW037639; Tue, 24 Sep 2024 17:07:02 -0500 From: Judith Mendez To: William Breathitt Gray CC: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vignesh Raghavendra , Nishanth Menon , Tero Kristo , David Lechner , , , , , Judith Mendez Subject: [PATCH v6 5/5] arm64: dts: ti: k3-am64x-sk: Enable eQEP Date: Tue, 24 Sep 2024 17:07:00 -0500 Message-ID: <20240924220700.886313-6-jm@ti.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20240924220700.886313-1-jm@ti.com> References: <20240924220700.886313-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-iio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea There are 3 instances of eQEP on AM64x. Only EQEP0 signals can be routed to the user expansion so enable only EQEP0 in k3-am642-sk.dts. Signed-off-by: Judith Mendez --- Changes since v5: - No change --- arch/arm64/boot/dts/ti/k3-am642-sk.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts index 86369525259c..47b351067bb8 100644 --- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts @@ -357,6 +357,16 @@ main_ecap0_pins_default: main-ecap0-default-pins { AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */ >; }; + + main_eqep0_pins_default: main-eqep0-default-pins { + pinctrl-single,pins = < + AM64X_IOPAD(0x00a0, PIN_INPUT, 3) /* (N16) GPMC0_WPn.EQEP0_A */ + AM64X_IOPAD(0x00a4, PIN_INPUT, 3) /* (N17) GPMC0_DIR.EQEP0_B */ + AM64X_IOPAD(0x00ac, PIN_INPUT, 3) /* (R20) GPMC0_CSn1.EQEP0_I */ + AM64X_IOPAD(0x00a8, PIN_INPUT, 3) /* (R19) GPMC0_CSn0.EQEP0_S */ + >; + }; + main_wlan_en_pins_default: main-wlan-en-default-pins { pinctrl-single,pins = < AM64X_IOPAD(0x00c4, PIN_OUTPUT_PULLUP, 7) /* (V8) GPIO0_48 */ @@ -687,3 +697,10 @@ &ecap0 { pinctrl-names = "default"; pinctrl-0 = <&main_ecap0_pins_default>; }; + +&eqep0 { + status = "okay"; + /* EQEP0 A & B available on pins 18 & 22 of J4 header */ + pinctrl-names = "default"; + pinctrl-0 = <&main_eqep0_pins_default>; +};