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Wysocki" , Rodrigo Vivi , linux-pci@vger.kernel.org Subject: [PATCH 1/6] PCI/PM: Respect pci_dev->skip_bus_pm in the .poweroff() path Date: Wed, 25 Sep 2024 17:45:21 +0300 Message-ID: <20240925144526.2482-2-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240925144526.2482-1-ville.syrjala@linux.intel.com> References: <20240925144526.2482-1-ville.syrjala@linux.intel.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ville Syrjälä On some older laptops i915 needs to leave the GPU in D0 when hibernating the system, or else the BIOS hangs somewhere. Currently that is achieved by calling pci_save_state() ahead of time, which then skips the whole pci_prepare_to_sleep() stuff. It feels to me that this approach could lead to unintended side effects as it causes the pci code to deviate from the standard path in various ways. In order to keep i915 behaviour more standard it seems preferrable to use pci_dev->skip_bus_pm here. Duplicate the relevant logic from pci_pm_suspend_noirq() in pci_pm_poweroff_noirq(). It also looks like the current code is may put the parent bridge into D3 despite leaving the device in D0. Though perhaps the host bridge (which is where the integrated GPU lives) always has subordinates, which would make this a non-issue for i915. But maybe this could be a problem for other devices. Utilizing skip_bus_pm will make the behaviour of leaving the bridge in D0 a bit more explicit if nothing else. Cc: Bjorn Helgaas Cc: "Rafael J. Wysocki" Cc: Rodrigo Vivi Cc: linux-pci@vger.kernel.org Cc: intel-gfx@lists.freedesktop.org Signed-off-by: Ville Syrjälä --- drivers/pci/pci-driver.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c index f412ef73a6e4..ef436895939c 100644 --- a/drivers/pci/pci-driver.c +++ b/drivers/pci/pci-driver.c @@ -1142,6 +1142,8 @@ static int pci_pm_poweroff(struct device *dev) struct pci_dev *pci_dev = to_pci_dev(dev); const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL; + pci_dev->skip_bus_pm = false; + if (pci_has_legacy_pm_support(pci_dev)) return pci_legacy_suspend(dev, PMSG_HIBERNATE); @@ -1206,9 +1208,21 @@ static int pci_pm_poweroff_noirq(struct device *dev) return error; } - if (!pci_dev->state_saved && !pci_has_subordinate(pci_dev)) + if (!pci_dev->state_saved && !pci_dev->skip_bus_pm && + !pci_has_subordinate(pci_dev)) pci_prepare_to_sleep(pci_dev); + if (pci_dev->current_state == PCI_D0) { + pci_dev->skip_bus_pm = true; + /* + * Per PCI PM r1.2, table 6-1, a bridge must be in D0 if any + * downstream device is in D0, so avoid changing the power state + * of the parent bridge by setting the skip_bus_pm flag for it. + */ + if (pci_dev->bus->self) + pci_dev->bus->self->skip_bus_pm = true; + } + /* * The reason for doing this here is the same as for the analogous code * in pci_pm_suspend_noirq(). From patchwork Wed Sep 25 14:45:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13812054 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 462A23770D for ; Wed, 25 Sep 2024 14:45:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727275538; cv=none; b=AcpoABNcyuEOfdH0jij9HIIEiV944UHii8VhgbK2yIHvq5GZZyQxe1WdkvWqnmp6F50hlKfaO0ISgqQtAAyg00zhOv5r8cpeecDaXTeqbsgbYCApBQBV4ut8QJg/iShJxx27jPF3r5dkVnl7lTRIdpFqhXC+g6V4/xT/W9LN3V8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727275538; c=relaxed/simple; bh=1DnMFU1e1/0MLz85xEqNSfIRbU8roszrXvNJtr1XYtg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=IJyV7bTVCt2DJ+niLhAmxoN8e0Kx0sow/RKr7uloj6gZyDzbfMVc5Js6ZKNcTAsPy71KMoA/agZ8FFZhpuKAVeZQgaxzH5rtH/Nx7PUVRI+r/AMGF/rz+E9EvixfSrPmNOmFzM8lC2Wy/YkQS8Dtoi+PaAf81bE4OYX7HCVNqkU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=fHmrI2Lr; arc=none smtp.client-ip=198.175.65.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="fHmrI2Lr" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1727275538; x=1758811538; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1DnMFU1e1/0MLz85xEqNSfIRbU8roszrXvNJtr1XYtg=; b=fHmrI2LrMgqIaIAYZU+LIez7aJIxCbOlHn9rNrZzUNW/PeZx6HwilFH6 1JtKHVZdliwxkZHc0R/ZVEppn+bcoXpaxxOE7oF2bKy4Szi+N/lxbbQlw EQBAnDdmCRz7K2g7UJDY9x1eevI2nUD95JgWiNZZxa4egSCNWh86mTmvj uxkfPvwrDnv1jMjQDkzwtbZ52lK31j9XhmDwshUGRB/f42n+d6x7AtDON OcEdhY8YhEJRnQiuzzoPK5fwSHAWaQpZJ2ibmR0HY3is8PpoVOG1gsrog j8F6DorNHLXjM4UOyqNXpCD1tN168Ck9vzbi+Jcsu+3hvUELGQBc8JKdp Q==; X-CSE-ConnectionGUID: uvydQYv2QYOTa+pj3/jPLg== X-CSE-MsgGUID: Cwqvk7W6RzSBu4ZGWXNamw== X-IronPort-AV: E=McAfee;i="6700,10204,11206"; a="26470598" X-IronPort-AV: E=Sophos;i="6.10,257,1719903600"; d="scan'208";a="26470598" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Sep 2024 07:45:37 -0700 X-CSE-ConnectionGUID: QXCbu4C2R+uW/mhhhAbaCA== X-CSE-MsgGUID: dhzemH1wRPGMPHN23LGYZw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,257,1719903600"; d="scan'208";a="71941533" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 25 Sep 2024 07:45:34 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 25 Sep 2024 17:45:33 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: Bjorn Helgaas , "Rafael J. Wysocki" , Rodrigo Vivi , linux-pci@vger.kernel.org Subject: [PATCH 2/6] drm/i915/pm: Hoist pci_save_state()+pci_set_power_state() to the end of pm _late() hook Date: Wed, 25 Sep 2024 17:45:22 +0300 Message-ID: <20240925144526.2482-3-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240925144526.2482-1-ville.syrjala@linux.intel.com> References: <20240925144526.2482-1-ville.syrjala@linux.intel.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ville Syrjälä driver/pci does the pci_save_state()+pci_set_power_state() from the _noirq() pm hooks. Move our manual calls (needed for the hibernate+D3 workaround with buggy BIOSes) towards that same point. We currently have no _noirq() hooks, so end of _late() hooks is the best we can do right now. Cc: Bjorn Helgaas Cc: "Rafael J. Wysocki" Cc: Rodrigo Vivi Cc: linux-pci@vger.kernel.org Cc: intel-gfx@lists.freedesktop.org Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_driver.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index 6dc0104a3e36..9d557ff8adf5 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -1015,7 +1015,6 @@ static int i915_drm_suspend(struct drm_device *dev) { struct drm_i915_private *dev_priv = to_i915(dev); struct intel_display *display = &dev_priv->display; - struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); pci_power_t opregion_target_state; disable_rpm_wakeref_asserts(&dev_priv->runtime_pm); @@ -1029,8 +1028,6 @@ static int i915_drm_suspend(struct drm_device *dev) intel_display_driver_disable_user_access(dev_priv); } - pci_save_state(pdev); - intel_display_driver_suspend(dev_priv); intel_dp_mst_suspend(dev_priv); @@ -1090,10 +1087,16 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation) drm_err(&dev_priv->drm, "Suspend complete failed: %d\n", ret); intel_power_domains_resume(dev_priv); - goto out; + goto fail; } + enable_rpm_wakeref_asserts(rpm); + + if (!dev_priv->uncore.user_forcewake_count) + intel_runtime_pm_driver_release(rpm); + pci_disable_device(pdev); + /* * During hibernation on some platforms the BIOS may try to access * the device even though it's already in D3 and hang the machine. So @@ -1105,11 +1108,17 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation) * Lenovo Thinkpad X301, X61s, X60, T60, X41 * Fujitsu FSC S7110 * Acer Aspire 1830T + * + * pci_save_state() is needed to prevent driver/pci from + * automagically putting the device into D3. */ + pci_save_state(pdev); if (!(hibernation && GRAPHICS_VER(dev_priv) < 6)) pci_set_power_state(pdev, PCI_D3hot); -out: + return 0; + +fail: enable_rpm_wakeref_asserts(rpm); if (!dev_priv->uncore.user_forcewake_count) intel_runtime_pm_driver_release(rpm); From patchwork Wed Sep 25 14:45:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13812055 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C2FAB142E6F for ; Wed, 25 Sep 2024 14:45:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727275542; cv=none; b=C2Nem4xrMKkRf5jC5iRbh8az6z94whEGOlZqnWnKTa3crvwoL4pPvYFk9vyJHchawNFK8ejRZfaHZuLnqQsGg6xBkaWeex8WevM40MqJqvCtFOQzHaNfiGg0KjaBxDrtGrnLBzy8THhVWD+ctjuA6vbeYxKSNm7UmUVd3NnqspM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727275542; c=relaxed/simple; bh=e5g2fnzWsdbQ4Znq2+0nMCPlwsOCrNHuDaldxM9Sekk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=RH+cU94R/iNNVMWxfhsus4/lP4n+TK1XYh6JxcJdDjRUOMFBkQ371fsVdxpeyqcvYoaQ66NiSnmmD5k6rZrWd8XPdd5/Wxuyd7XbrFEokXpdZQCjo/E1U7fIwJUV5DIpFAYubsviCtcb9NugswWruHFXG41hh2ZSSM8d4oaZ+ic= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=eHBfZpop; arc=none smtp.client-ip=198.175.65.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="eHBfZpop" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1727275541; x=1758811541; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=e5g2fnzWsdbQ4Znq2+0nMCPlwsOCrNHuDaldxM9Sekk=; b=eHBfZpop0kzWscOPUh8xdX4dE7DUt6A39ijzp09h85NoiZKaG0hcB5KH wWps3Ujxg6DwR53MfqIRC16RIOuq6EoxhLshDDkIB+h/V+c61lYgcgbzp BLTOltsiIbDN1GzSV9SOy16jZZBYo02XPtKHgp39TBx0Ru+FY3tWUKdSW hgSEo+i2oVnYZBtOaLrDZl541ozroItVMJW7RL3FIVSroqtQCucr1SQq0 z4up+TBtxZfScXeaaDo10PJoImljtOq4qFRzQs8KksfGcJYvbKe1w8ktS tr49Pq1SgfBAiGGrFUC5m5sAa1c2RexoMsQXlh0r1xiAvivuQNYQdnD4o w==; X-CSE-ConnectionGUID: 8897FihuT0SCkxOajlSRvw== X-CSE-MsgGUID: S40o8kTYTEqQMDS7aPRYEA== X-IronPort-AV: E=McAfee;i="6700,10204,11206"; a="26470615" X-IronPort-AV: E=Sophos;i="6.10,257,1719903600"; d="scan'208";a="26470615" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Sep 2024 07:45:41 -0700 X-CSE-ConnectionGUID: 0Reib3ztTeGILgK0oLTj7A== X-CSE-MsgGUID: DwgRaTpNRFCAUyRZUhE12g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,257,1719903600"; d="scan'208";a="71941560" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 25 Sep 2024 07:45:38 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 25 Sep 2024 17:45:37 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: Bjorn Helgaas , "Rafael J. Wysocki" , Rodrigo Vivi , linux-pci@vger.kernel.org Subject: [PATCH 3/6] drm/i915/pm: Simplify pm hook documentation Date: Wed, 25 Sep 2024 17:45:23 +0300 Message-ID: <20240925144526.2482-4-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240925144526.2482-1-ville.syrjala@linux.intel.com> References: <20240925144526.2482-1-ville.syrjala@linux.intel.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ville Syrjälä Stop spelling out each variant of the hook ("" vs. "_late" vs. "_early") and just say eg. "@thaw*" to indicate all of them. Avoids having to update the docs whenever we start/stop using one of the variants. Cc: Bjorn Helgaas Cc: "Rafael J. Wysocki" Cc: Rodrigo Vivi Cc: linux-pci@vger.kernel.org Cc: intel-gfx@lists.freedesktop.org Signed-off-by: Ville Syrjälä Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_driver.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index 9d557ff8adf5..1e5abf72dfc4 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -1644,18 +1644,18 @@ const struct dev_pm_ops i915_pm_ops = { /* * S4 event handlers - * @freeze, @freeze_late : called (1) before creating the - * hibernation image [PMSG_FREEZE] and - * (2) after rebooting, before restoring - * the image [PMSG_QUIESCE] - * @thaw, @thaw_early : called (1) after creating the hibernation - * image, before writing it [PMSG_THAW] - * and (2) after failing to create or - * restore the image [PMSG_RECOVER] - * @poweroff, @poweroff_late: called after writing the hibernation - * image, before rebooting [PMSG_HIBERNATE] - * @restore, @restore_early : called after rebooting and restoring the - * hibernation image [PMSG_RESTORE] + * @freeze* : called (1) before creating the + * hibernation image [PMSG_FREEZE] and + * (2) after rebooting, before restoring + * the image [PMSG_QUIESCE] + * @thaw* : called (1) after creating the hibernation + * image, before writing it [PMSG_THAW] + * and (2) after failing to create or + * restore the image [PMSG_RECOVER] + * @poweroff* : called after writing the hibernation + * image, before rebooting [PMSG_HIBERNATE] + * @restore* : called after rebooting and restoring the + * hibernation image [PMSG_RESTORE] */ .freeze = i915_pm_freeze, .freeze_late = i915_pm_freeze_late, From patchwork Wed Sep 25 14:45:24 2024 Content-Type: text/plain; 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25 Sep 2024 07:45:41 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 25 Sep 2024 17:45:40 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: Bjorn Helgaas , "Rafael J. Wysocki" , Rodrigo Vivi , linux-pci@vger.kernel.org Subject: [PATCH 4/6] drm/i915/pm: Move the hibernate+D3 quirk stuff into noirq() pm hooks Date: Wed, 25 Sep 2024 17:45:24 +0300 Message-ID: <20240925144526.2482-5-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240925144526.2482-1-ville.syrjala@linux.intel.com> References: <20240925144526.2482-1-ville.syrjala@linux.intel.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ville Syrjälä If the driver doesn't call pci_save_state() driver/pci will normally save+power manage the device from the _noirq() pm hooks. We can't let that happen as some old BIOSes fail to hibernate when the device is in D3. However, we can get a bit closer to the standard behaviour by doing our explicit pci_save_state() and pci_set_power_state() stuff from driver provided _noirq() hooks as well. This results in a change of behaviur where we no longer go into D3 at the end of .freeze_late(), so when it comes time to .thaw() we'll already be in D0, and thus we can drop the explicit pci_set_power_state(D0) call. Presumable swictcheroo suspend will want to go into D3 so call the _noirq() stuff from the switcheroo suspend hook, and since we dropped the pci_set_power_state(D0) from .resume_early() we'll need to add one back into the swtcheroo resume hook. Cc: Bjorn Helgaas Cc: "Rafael J. Wysocki" Cc: Rodrigo Vivi Cc: linux-pci@vger.kernel.org Cc: intel-gfx@lists.freedesktop.org Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_driver.c | 76 ++++++++++++++++++++---------- 1 file changed, 51 insertions(+), 25 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index 1e5abf72dfc4..fe7c34045794 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -1097,6 +1097,21 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation) pci_disable_device(pdev); + return 0; + +fail: + enable_rpm_wakeref_asserts(rpm); + if (!dev_priv->uncore.user_forcewake_count) + intel_runtime_pm_driver_release(rpm); + + return ret; +} + +static int i915_drm_suspend_noirq(struct drm_device *dev, bool hibernation) +{ + struct drm_i915_private *dev_priv = to_i915(dev); + struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev); + /* * During hibernation on some platforms the BIOS may try to access * the device even though it's already in D3 and hang the machine. So @@ -1117,13 +1132,6 @@ static int i915_drm_suspend_late(struct drm_device *dev, bool hibernation) pci_set_power_state(pdev, PCI_D3hot); return 0; - -fail: - enable_rpm_wakeref_asserts(rpm); - if (!dev_priv->uncore.user_forcewake_count) - intel_runtime_pm_driver_release(rpm); - - return ret; } int i915_driver_suspend_switcheroo(struct drm_i915_private *i915, @@ -1142,7 +1150,15 @@ int i915_driver_suspend_switcheroo(struct drm_i915_private *i915, if (error) return error; - return i915_drm_suspend_late(&i915->drm, false); + error = i915_drm_suspend_late(&i915->drm, false); + if (error) + return error; + + error = i915_drm_suspend_noirq(&i915->drm, false); + if (error) + return error; + + return 0; } static int i915_drm_resume(struct drm_device *dev) @@ -1246,23 +1262,6 @@ static int i915_drm_resume_early(struct drm_device *dev) * similar so that power domains can be employed. */ - /* - * Note that we need to set the power state explicitly, since we - * powered off the device during freeze and the PCI core won't power - * it back up for us during thaw. Powering off the device during - * freeze is not a hard requirement though, and during the - * suspend/resume phases the PCI core makes sure we get here with the - * device powered on. So in case we change our freeze logic and keep - * the device powered we can also remove the following set power state - * call. - */ - ret = pci_set_power_state(pdev, PCI_D0); - if (ret) { - drm_err(&dev_priv->drm, - "failed to set PCI D0 power state (%d)\n", ret); - return ret; - } - /* * Note that pci_enable_device() first enables any parent bridge * device and only then sets the power state for this device. The @@ -1302,11 +1301,16 @@ static int i915_drm_resume_early(struct drm_device *dev) int i915_driver_resume_switcheroo(struct drm_i915_private *i915) { + struct pci_dev *pdev = to_pci_dev(i915->drm.dev); int ret; if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) return 0; + ret = pci_set_power_state(pdev, PCI_D0); + if (ret) + return ret; + ret = i915_drm_resume_early(&i915->drm); if (ret) return ret; @@ -1363,6 +1367,16 @@ static int i915_pm_suspend_late(struct device *kdev) return i915_drm_suspend_late(&i915->drm, false); } +static int i915_pm_suspend_noirq(struct device *kdev) +{ + struct drm_i915_private *i915 = kdev_to_i915(kdev); + + if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) + return 0; + + return i915_drm_suspend_noirq(&i915->drm, false); +} + static int i915_pm_poweroff_late(struct device *kdev) { struct drm_i915_private *i915 = kdev_to_i915(kdev); @@ -1373,6 +1387,16 @@ static int i915_pm_poweroff_late(struct device *kdev) return i915_drm_suspend_late(&i915->drm, true); } +static int i915_pm_poweroff_noirq(struct device *kdev) +{ + struct drm_i915_private *i915 = kdev_to_i915(kdev); + + if (i915->drm.switch_power_state == DRM_SWITCH_POWER_OFF) + return 0; + + return i915_drm_suspend_noirq(&i915->drm, true); +} + static int i915_pm_resume_early(struct device *kdev) { struct drm_i915_private *i915 = kdev_to_i915(kdev); @@ -1638,6 +1662,7 @@ const struct dev_pm_ops i915_pm_ops = { .prepare = i915_pm_prepare, .suspend = i915_pm_suspend, .suspend_late = i915_pm_suspend_late, + .suspend_noirq = i915_pm_suspend_noirq, .resume_early = i915_pm_resume_early, .resume = i915_pm_resume, .complete = i915_pm_complete, @@ -1663,6 +1688,7 @@ const struct dev_pm_ops i915_pm_ops = { .thaw = i915_pm_thaw, .poweroff = i915_pm_suspend, .poweroff_late = i915_pm_poweroff_late, + .poweroff_noirq = i915_pm_poweroff_noirq, .restore_early = i915_pm_restore_early, .restore = i915_pm_restore, From patchwork Wed Sep 25 14:45:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13812057 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C34B143890 for ; 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X-CSE-ConnectionGUID: BV8JQ2IAR6ip2129/7LLOA== X-CSE-MsgGUID: fHnWpFBHTs+HNORm45rhUA== X-IronPort-AV: E=McAfee;i="6700,10204,11206"; a="26470653" X-IronPort-AV: E=Sophos;i="6.10,257,1719903600"; d="scan'208";a="26470653" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Sep 2024 07:45:48 -0700 X-CSE-ConnectionGUID: WsZF+1UHRDqrX3bO2ocNYA== X-CSE-MsgGUID: tv/43O3vTamCvYYOGTkCgg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,257,1719903600"; d="scan'208";a="71941653" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 25 Sep 2024 07:45:45 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 25 Sep 2024 17:45:44 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: Bjorn Helgaas , "Rafael J. Wysocki" , Rodrigo Vivi , linux-pci@vger.kernel.org Subject: [PATCH 5/6] drm/i915/pm: Do pci_restore_state() in switcheroo resume hook Date: Wed, 25 Sep 2024 17:45:25 +0300 Message-ID: <20240925144526.2482-6-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240925144526.2482-1-ville.syrjala@linux.intel.com> References: <20240925144526.2482-1-ville.syrjala@linux.intel.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ville Syrjälä Since this switcheroo stuff bypasses all the core pm we have to manually manage the pci state. To that end add the missing pci_restore_state() to the switcheroo resume hook. We already have the pci_save_state() counterpart on the suspend side. I suppose this might not matter in practice as the integrated GPU probably won't lose any state in D3, and I presume there are no machines where this code would come into play with an Intel discrete GPU. Arguably none of this code should exist in the driver in the first place, and instead the entire switcheroo mechanism should be rewritten and properly integrated into core pm code... Cc: Bjorn Helgaas Cc: "Rafael J. Wysocki" Cc: Rodrigo Vivi Cc: linux-pci@vger.kernel.org Cc: intel-gfx@lists.freedesktop.org Signed-off-by: Ville Syrjälä Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/i915/i915_driver.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index fe7c34045794..c3e7225ea1ba 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -1311,6 +1311,8 @@ int i915_driver_resume_switcheroo(struct drm_i915_private *i915) if (ret) return ret; + pci_restore_state(pdev); + ret = i915_drm_resume_early(&i915->drm); if (ret) return ret; From patchwork Wed Sep 25 14:45:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 13812058 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 716C9143890 for ; Wed, 25 Sep 2024 14:45:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727275552; cv=none; b=L5Cd+sSfu1HXx7mfwnCzvW0qqrngUNQUPEV/XsWTKksEhKxLjlHu5pY+yJDciy5YVhKq9Xe6JBoIGDvQtOBU0fYEKzwxh8GWC9DFjiqIKVndnFiTNrhizMLpx59az2EmzOJYcgharTsfflRfQEhd3LkJa/WjylPjQa/U5SWpH+w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727275552; c=relaxed/simple; bh=QJ3Ia74trw6e9yYEHquXCksV/8nYF89J6fDR+nXnoMA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=gMSpsNjuQ0jzdj40lub1ATIbg9SO8LAREncPA2Le9tjwxfmIIpS2yKituFIMLUSDkVa7cW+t6JRJgz3D/Q+tIktUnOuSwYibdGdJp2jMNrqalGqP5+jBCRahNOs8vdH3rydzNsVwhAZuRaIbKvECeVmyrGmrHbgNgnQj+V33H9o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=IuUQVAla; arc=none smtp.client-ip=198.175.65.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="IuUQVAla" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1727275552; x=1758811552; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=QJ3Ia74trw6e9yYEHquXCksV/8nYF89J6fDR+nXnoMA=; b=IuUQVAlaV0BCeRpdRVu4nY3NoUPEXwsPHH+bwII+r2SqheaEerk7tPiQ hW2lp2mRTErzpUnGCStIQvAOjJUIR+8fHqEfD3YpMi3k5WDmha7yimLWC qkvcxcb29aZVh9dD1GpYjYM+7ZdoxHih84LzPXNzm4G6cRs2syaJZnLlh ab+lLSgtJD5p0lHzrbntuAkOGW7y+2s2iCaZRmyeAeOeWXnRx6zsxiO1f //bGSN9CyUQErRJYnvV3DgYR11fcUKfjb2EKvPDDxwNjnuECRUlVaasXo x+U+Oh7lTdLzOt1KwEAHAQzIzWnxCCzo0QuHG7WD+Dh6KuZLmbaRh7Jns Q==; X-CSE-ConnectionGUID: Wksk/wK1SuKKzsT8zUPCDQ== X-CSE-MsgGUID: l+2iVpF+Smix5AA2Jci2vg== X-IronPort-AV: E=McAfee;i="6700,10204,11206"; a="26470677" X-IronPort-AV: E=Sophos;i="6.10,257,1719903600"; d="scan'208";a="26470677" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 25 Sep 2024 07:45:51 -0700 X-CSE-ConnectionGUID: 1S1T/O/4ScSwwg1OZYtJjQ== X-CSE-MsgGUID: sD11GR1LQRKVZKq3DnI9vA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,257,1719903600"; d="scan'208";a="71941659" Received: from stinkpipe.fi.intel.com (HELO stinkbox) ([10.237.72.74]) by fmviesa008.fm.intel.com with SMTP; 25 Sep 2024 07:45:48 -0700 Received: by stinkbox (sSMTP sendmail emulation); Wed, 25 Sep 2024 17:45:47 +0300 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Cc: Bjorn Helgaas , "Rafael J. Wysocki" , Rodrigo Vivi , linux-pci@vger.kernel.org Subject: [PATCH 6/6] drm/i915/pm: Use pci_dev->skip_bus_pm for hibernate vs. D3 workaround Date: Wed, 25 Sep 2024 17:45:26 +0300 Message-ID: <20240925144526.2482-7-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240925144526.2482-1-ville.syrjala@linux.intel.com> References: <20240925144526.2482-1-ville.syrjala@linux.intel.com> Precedence: bulk X-Mailing-List: linux-pci@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Ville Syrjälä On some older laptops we have to leave the device in D0 during hibernation, or else the BIOS just hangs and never finishes the hibernation. Currently we are achieving that by skipping the pci_set_power_state(D3). However we also need to call pci_save_state() ahead of time, or else pci_pm_suspend_noirq() will do the pci_set_power_state(D3) anyway. This is all rather ugly, and might cause us to deviate from standard pci pm behaviour in unknown ways since we always call pci_save_state() for any kind of suspend operation. Stop calling pci_save_state()+pci_set_power_state() entirely (apart from the switcheroo paths) and instead set pci_dev->skip_bus_pm=true to prevent the D3 during hibernation on old machines. Apart from that we'll just let the normal pci pm code take care of everything for us. Cc: Bjorn Helgaas Cc: "Rafael J. Wysocki" Cc: Rodrigo Vivi Cc: linux-pci@vger.kernel.org Cc: intel-gfx@lists.freedesktop.org Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/i915_driver.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index c3e7225ea1ba..05948d00a874 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -1123,13 +1123,9 @@ static int i915_drm_suspend_noirq(struct drm_device *dev, bool hibernation) * Lenovo Thinkpad X301, X61s, X60, T60, X41 * Fujitsu FSC S7110 * Acer Aspire 1830T - * - * pci_save_state() is needed to prevent driver/pci from - * automagically putting the device into D3. */ - pci_save_state(pdev); - if (!(hibernation && GRAPHICS_VER(dev_priv) < 6)) - pci_set_power_state(pdev, PCI_D3hot); + if (hibernation && GRAPHICS_VER(dev_priv) < 6) + pdev->skip_bus_pm = true; return 0; } @@ -1137,6 +1133,7 @@ static int i915_drm_suspend_noirq(struct drm_device *dev, bool hibernation) int i915_driver_suspend_switcheroo(struct drm_i915_private *i915, pm_message_t state) { + struct pci_dev *pdev = to_pci_dev(i915->drm.dev); int error; if (drm_WARN_ON_ONCE(&i915->drm, state.event != PM_EVENT_SUSPEND && @@ -1158,6 +1155,9 @@ int i915_driver_suspend_switcheroo(struct drm_i915_private *i915, if (error) return error; + pci_save_state(pdev); + pci_set_power_state(pdev, PCI_D3hot); + return 0; }