From patchwork Sun Sep 29 08:17:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gaosong X-Patchwork-Id: 13814881 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 871CBCF6498 for ; Sun, 29 Sep 2024 08:36:16 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1supOg-0006vK-RM; Sun, 29 Sep 2024 04:35:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1supOc-0006kO-MC for qemu-devel@nongnu.org; Sun, 29 Sep 2024 04:35:14 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1supOZ-0006Rp-Dk for qemu-devel@nongnu.org; Sun, 29 Sep 2024 04:35:14 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8CxrrM6Eflm370DAA--.4627S3; Sun, 29 Sep 2024 16:35:06 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by front1 (Coremail) with SMTP id qMiowMBxn+QtEflmFt0UAA--.54891S3; Sun, 29 Sep 2024 16:35:05 +0800 (CST) From: Song Gao To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Bibo Mao , Igor Mammedov Subject: [PULL 1/7] acpi: ged: Add macro for acpi sleep control register Date: Sun, 29 Sep 2024 16:17:18 +0800 Message-Id: <20240929081724.2139556-2-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20240929081724.2139556-1-gaosong@loongson.cn> References: <20240929081724.2139556-1-gaosong@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxn+QtEflmFt0UAA--.54891S3 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Bibo Mao Macro definition is added for acpi sleep control register, ged emulation driver can use the macro , also it can be used in FDT table if ged is exposed with FDT table. Signed-off-by: Bibo Mao Reviewed-by: Igor Mammedov Message-Id: <20240918014206.2165821-2-maobibo@loongson.cn> Signed-off-by: Song Gao --- hw/acpi/generic_event_device.c | 6 +++--- include/hw/acpi/generic_event_device.h | 7 +++++-- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c index 15b4c3ebbf..d00f5a6c1c 100644 --- a/hw/acpi/generic_event_device.c +++ b/hw/acpi/generic_event_device.c @@ -201,9 +201,9 @@ static void ged_regs_write(void *opaque, hwaddr addr, uint64_t data, switch (addr) { case ACPI_GED_REG_SLEEP_CTL: - slp_typ = (data >> 2) & 0x07; - slp_en = (data >> 5) & 0x01; - if (slp_en && slp_typ == 5) { + slp_typ = (data >> ACPI_GED_SLP_TYP_POS) & ACPI_GED_SLP_TYP_MASK; + slp_en = !!(data & ACPI_GED_SLP_EN); + if (slp_en && slp_typ == ACPI_GED_SLP_TYP_S5) { qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); } return; diff --git a/include/hw/acpi/generic_event_device.h b/include/hw/acpi/generic_event_device.h index 40af3550b5..d2dac87b4a 100644 --- a/include/hw/acpi/generic_event_device.h +++ b/include/hw/acpi/generic_event_device.h @@ -81,8 +81,11 @@ OBJECT_DECLARE_SIMPLE_TYPE(AcpiGedState, ACPI_GED) /* ACPI_GED_REG_RESET value for reset*/ #define ACPI_GED_RESET_VALUE 0x42 -/* ACPI_GED_REG_SLEEP_CTL.SLP_TYP value for S5 (aka poweroff) */ -#define ACPI_GED_SLP_TYP_S5 0x05 +/* [ACPI 5.0 Chapter 4.8.3.7] Sleep Control and Status Register */ +#define ACPI_GED_SLP_TYP_POS 0x2 /* SLP_TYPx Bit Offset */ +#define ACPI_GED_SLP_TYP_MASK 0x07 /* SLP_TYPx 3-bit mask */ +#define ACPI_GED_SLP_TYP_S5 0x05 /* System _S5 State (Soft Off) */ +#define ACPI_GED_SLP_EN 0x20 /* SLP_EN write-only bit */ #define GED_DEVICE "GED" #define AML_GED_EVT_REG "EREG" From patchwork Sun Sep 29 08:17:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gaosong X-Patchwork-Id: 13814882 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A0475CF649F for ; Sun, 29 Sep 2024 08:36:16 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1supOg-0006vI-RJ; Sun, 29 Sep 2024 04:35:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1supOc-0006kP-Mb for qemu-devel@nongnu.org; Sun, 29 Sep 2024 04:35:14 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1supOZ-0006Rr-FT for qemu-devel@nongnu.org; Sun, 29 Sep 2024 04:35:14 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8DxyrE7Eflm4r0DAA--.3299S3; Sun, 29 Sep 2024 16:35:07 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by front1 (Coremail) with SMTP id qMiowMBxn+QtEflmFt0UAA--.54891S4; Sun, 29 Sep 2024 16:35:06 +0800 (CST) From: Song Gao To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Bibo Mao Subject: [PULL 2/7] hw/loongarch/virt: Add FDT table support with acpi ged pm register Date: Sun, 29 Sep 2024 16:17:19 +0800 Message-Id: <20240929081724.2139556-3-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20240929081724.2139556-1-gaosong@loongson.cn> References: <20240929081724.2139556-1-gaosong@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxn+QtEflmFt0UAA--.54891S4 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Bibo Mao ACPI ged is used for power management on LoongArch virt platform, in general it is parsed from acpi table. However if system boot directly from elf kernel, no UEFI bios is provided and acpi table cannot be used also. Here acpi ged pm register is exposed with FDT table, it is compatbile with syscon method in FDT table, only that acpi ged pm register is accessed with 8-bit mode, rather with 32-bit mode. Signed-off-by: Bibo Mao Reviewed-by: Song Gao Tested-by: Song Gao Message-Id: <20240918014206.2165821-3-maobibo@loongson.cn> Signed-off-by: Song Gao --- hw/loongarch/virt.c | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c index 75980b6e3c..6e64e1a856 100644 --- a/hw/loongarch/virt.c +++ b/hw/loongarch/virt.c @@ -280,6 +280,44 @@ static void fdt_add_rtc_node(LoongArchVirtMachineState *lvms, g_free(nodename); } +static void fdt_add_ged_reset(LoongArchVirtMachineState *lvms) +{ + char *name; + uint32_t ged_handle; + MachineState *ms = MACHINE(lvms); + hwaddr base = VIRT_GED_REG_ADDR; + hwaddr size = ACPI_GED_REG_COUNT; + + ged_handle = qemu_fdt_alloc_phandle(ms->fdt); + name = g_strdup_printf("/ged@%" PRIx64, base); + qemu_fdt_add_subnode(ms->fdt, name); + qemu_fdt_setprop_string(ms->fdt, name, "compatible", "syscon"); + qemu_fdt_setprop_cells(ms->fdt, name, "reg", 0x0, base, 0x0, size); + /* 8 bit registers */ + qemu_fdt_setprop_cell(ms->fdt, name, "reg-shift", 0); + qemu_fdt_setprop_cell(ms->fdt, name, "reg-io-width", 1); + qemu_fdt_setprop_cell(ms->fdt, name, "phandle", ged_handle); + ged_handle = qemu_fdt_get_phandle(ms->fdt, name); + g_free(name); + + name = g_strdup_printf("/reboot"); + qemu_fdt_add_subnode(ms->fdt, name); + qemu_fdt_setprop_string(ms->fdt, name, "compatible", "syscon-reboot"); + qemu_fdt_setprop_cell(ms->fdt, name, "regmap", ged_handle); + qemu_fdt_setprop_cell(ms->fdt, name, "offset", ACPI_GED_REG_RESET); + qemu_fdt_setprop_cell(ms->fdt, name, "value", ACPI_GED_RESET_VALUE); + g_free(name); + + name = g_strdup_printf("/poweroff"); + qemu_fdt_add_subnode(ms->fdt, name); + qemu_fdt_setprop_string(ms->fdt, name, "compatible", "syscon-poweroff"); + qemu_fdt_setprop_cell(ms->fdt, name, "regmap", ged_handle); + qemu_fdt_setprop_cell(ms->fdt, name, "offset", ACPI_GED_REG_SLEEP_CTL); + qemu_fdt_setprop_cell(ms->fdt, name, "value", ACPI_GED_SLP_EN | + (ACPI_GED_SLP_TYP_S5 << ACPI_GED_SLP_TYP_POS)); + g_free(name); +} + static void fdt_add_uart_node(LoongArchVirtMachineState *lvms, uint32_t *pch_pic_phandle, hwaddr base, int irq, bool chosen) @@ -737,6 +775,7 @@ static void virt_devices_init(DeviceState *pch_pic, qdev_get_gpio_in(pch_pic, VIRT_RTC_IRQ - VIRT_GSI_BASE)); fdt_add_rtc_node(lvms, pch_pic_phandle); + fdt_add_ged_reset(lvms); /* acpi ged */ lvms->acpi_ged = create_acpi_ged(pch_pic, lvms); From patchwork Sun Sep 29 08:17:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gaosong X-Patchwork-Id: 13814885 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EEAA6CF6498 for ; Sun, 29 Sep 2024 08:37:24 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1supOn-0007H1-UL; Sun, 29 Sep 2024 04:35:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1supOd-0006m3-EG for qemu-devel@nongnu.org; Sun, 29 Sep 2024 04:35:16 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1supOZ-0006Rx-LM for qemu-devel@nongnu.org; Sun, 29 Sep 2024 04:35:15 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8Bx22o7Eflm5b0DAA--.3340S3; Sun, 29 Sep 2024 16:35:07 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by front1 (Coremail) with SMTP id qMiowMBxn+QtEflmFt0UAA--.54891S5; Sun, 29 Sep 2024 16:35:07 +0800 (CST) From: Song Gao To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Jiaxun Yang Subject: [PULL 3/7] hw/loongarch/boot: Refactor EFI booting protocol generation Date: Sun, 29 Sep 2024 16:17:20 +0800 Message-Id: <20240929081724.2139556-4-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20240929081724.2139556-1-gaosong@loongson.cn> References: <20240929081724.2139556-1-gaosong@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxn+QtEflmFt0UAA--.54891S5 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Jiaxun Yang Refector EFI style booting data structure generation to support 32bit EFI variant on LoongArch32 CPU. All data structs are filled with padding members if necessary and marked as QEMU_PACKED to avoid host ABI alignment impact. Host endian is being cared as well. It also fixed various problems in old implementation such as null pointer on empty string, memory desc map_size not set, incorrect memory map definition and so on. Signed-off-by: Jiaxun Yang Reviewed-by: Song Gao Message-Id: <20240914-loongarch-booting-v1-1-1517cae11c10@flygoat.com> Signed-off-by: Song Gao --- hw/loongarch/boot.c | 220 ++++++++++++++++++++++++------------ include/hw/loongarch/boot.h | 106 +++++++++++++---- 2 files changed, 237 insertions(+), 89 deletions(-) diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c index cb668703bd..4d01c01594 100644 --- a/hw/loongarch/boot.c +++ b/hw/loongarch/boot.c @@ -5,6 +5,7 @@ * Copyright (c) 2023 Loongson Technology Corporation Limited */ +#include #include "qemu/osdep.h" #include "qemu/units.h" #include "target/loongarch/cpu.h" @@ -31,7 +32,7 @@ static const unsigned int slave_boot_code[] = { /* Clear mailbox. */ 0x1400002d, /* lu12i.w $t1, 1(0x1) */ - 0x038081ad, /* ori $t1, $t1, CORE_BUF_20 */ + 0x038081ad, /* ori $t1, $t1, CORE_BUF_20 */ 0x06481da0, /* iocsrwr.d $zero, $t1 */ /* Enable IPI interrupt. */ @@ -74,88 +75,163 @@ static inline void *guidcpy(void *dst, const void *src) return memcpy(dst, src, sizeof(efi_guid_t)); } -static void init_efi_boot_memmap(struct efi_system_table *systab, - void *p, void *start) +static void efi_hdr_crc32(efi_table_hdr_t *hdr) { - unsigned i; - struct efi_boot_memmap *boot_memmap = p; - efi_guid_t tbl_guid = LINUX_EFI_BOOT_MEMMAP_GUID; - - /* efi_configuration_table 1 */ - guidcpy(&systab->tables[0].guid, &tbl_guid); - systab->tables[0].table = (struct efi_configuration_table *)(p - start); - systab->nr_tables = 1; - - boot_memmap->desc_size = sizeof(efi_memory_desc_t); - boot_memmap->desc_ver = 1; - boot_memmap->map_size = 0; + uint32_t val; - efi_memory_desc_t *map = p + sizeof(struct efi_boot_memmap); - for (i = 0; i < memmap_entries; i++) { - map = (void *)boot_memmap + sizeof(*map); - map[i].type = memmap_table[i].type; - map[i].phys_addr = ROUND_UP(memmap_table[i].address, 64 * KiB); - map[i].num_pages = ROUND_DOWN(memmap_table[i].address + - memmap_table[i].length - map[i].phys_addr, 64 * KiB); - p += sizeof(efi_memory_desc_t); - } + hdr->crc32 = 0; + val = crc32(0, (const unsigned char *)hdr, hdr->headersize); + hdr->crc32 = cpu_to_le32(val); } -static void init_efi_initrd_table(struct efi_system_table *systab, - void *p, void *start) +static void init_efi_vendor_string(void **p) { - efi_guid_t tbl_guid = LINUX_EFI_INITRD_MEDIA_GUID; - struct efi_initrd *initrd_table = p; + uint16_t *vendor_str = *p; - /* efi_configuration_table 2 */ - guidcpy(&systab->tables[1].guid, &tbl_guid); - systab->tables[1].table = (struct efi_configuration_table *)(p - start); - systab->nr_tables = 2; + /* QEMU in UTF16-LE */ + stw_le_p(vendor_str++, 0x0051); /* Q */ + stw_le_p(vendor_str++, 0x0045); /* E */ + stw_le_p(vendor_str++, 0x004D); /* M */ + stw_le_p(vendor_str++, 0x0055); /* U */ + stw_le_p(vendor_str++, 0x0000); /* \0 */ - initrd_table->base = initrd_offset; - initrd_table->size = initrd_size; + *p = vendor_str; + *p = QEMU_ALIGN_PTR_UP(*p, sizeof(target_long)); } -static void init_efi_fdt_table(struct efi_system_table *systab) +static void memmap_write_descs(efi_memory_desc_t *map) { - efi_guid_t tbl_guid = DEVICE_TREE_GUID; - - /* efi_configuration_table 3 */ - guidcpy(&systab->tables[2].guid, &tbl_guid); - systab->tables[2].table = (void *)FDT_BASE; - systab->nr_tables = 3; -} - -static void init_systab(struct loongarch_boot_info *info, void *p, void *start) -{ - void *bp_tables_start; - struct efi_system_table *systab = p; + int i; - info->a2 = p - start; + for (i = 0; i < memmap_entries; i++) { + uint32_t efi_type; + hwaddr start = memmap_table[i].address; + hwaddr end = memmap_table[i].address + memmap_table[i].length; + + switch (memmap_table[i].type) { + case MEMMAP_TYPE_MEMORY: + efi_type = EFI_CONVENTIONAL_MEMORY; + break; + case MEMMAP_TYPE_RESERVED: + efi_type = EFI_RESERVED_TYPE; + break; + case MEMMAP_TYPE_ACPI: + efi_type = EFI_ACPI_RECLAIM_MEMORY; + break; + case MEMMAP_TYPE_NVS: + efi_type = EFI_ACPI_MEMORY_NVS; + break; + default: + efi_type = EFI_RESERVED_TYPE; + break; + } - systab->hdr.signature = EFI_SYSTEM_TABLE_SIGNATURE; - systab->hdr.revision = EFI_SPECIFICATION_VERSION; - systab->hdr.revision = sizeof(struct efi_system_table), - systab->fw_revision = FW_VERSION << 16 | FW_PATCHLEVEL << 8; - systab->runtime = 0; - systab->boottime = 0; - systab->nr_tables = 0; + if (memmap_table[i].reserved) { + start = QEMU_ALIGN_DOWN(start, EFI_PAGE_SIZE); + end = QEMU_ALIGN_UP(end, EFI_PAGE_SIZE); + } else { + start = QEMU_ALIGN_UP(start, EFI_PAGE_SIZE); + end = QEMU_ALIGN_DOWN(end, EFI_PAGE_SIZE); + } - p += ROUND_UP(sizeof(struct efi_system_table), 64 * KiB); + map[i].type = cpu_to_le32(efi_type); + map[i].phys_addr = cpu_to_le64(start); + map[i].virt_addr = cpu_to_le64(start); + map[i].num_pages = cpu_to_le64((end - start) >> EFI_PAGE_SHIFT); + } +} - systab->tables = p; - bp_tables_start = p; +#define EFI_BOOT_MEMMAP_TABLE_GEN(type) \ +static void init_efi_boot_memmap_##type(void *guidp, void **p) \ +{ \ + struct efi_boot_memmap_##type *boot_memmap = *p; \ + efi_guid_t tbl_guid = LINUX_EFI_BOOT_MEMMAP_GUID; \ + \ + /* efi_configuration_table 1 */ \ + guidcpy(guidp, &tbl_guid); \ + \ + boot_memmap->desc_size = cpu_to_le##type(sizeof(efi_memory_desc_t)); \ + boot_memmap->desc_ver = cpu_to_le32(1); \ + boot_memmap->map_size = cpu_to_le##type(boot_memmap->desc_size * \ + memmap_entries); \ + memmap_write_descs(boot_memmap->map); \ + *p += sizeof(struct efi_boot_memmap_##type); \ +} - init_efi_boot_memmap(systab, p, start); - p += ROUND_UP(sizeof(struct efi_boot_memmap) + - sizeof(efi_memory_desc_t) * memmap_entries, 64 * KiB); - init_efi_initrd_table(systab, p, start); - p += ROUND_UP(sizeof(struct efi_initrd), 64 * KiB); - init_efi_fdt_table(systab); +#define EFI_INITRD_TABLE_GEN(type) \ +static void init_efi_initrd_table_##type(void *guidp, void **p) \ +{ \ + efi_guid_t tbl_guid = LINUX_EFI_INITRD_MEDIA_GUID; \ + struct efi_initrd_##type *initrd_table = *p; \ + \ + /* efi_configuration_table */ \ + guidcpy(guidp, &tbl_guid); \ + \ + initrd_table->base = cpu_to_le##type(initrd_offset); \ + initrd_table->size = cpu_to_le##type(initrd_size); \ + *p += sizeof(struct efi_initrd_##type); \ +} - systab->tables = (struct efi_configuration_table *)(bp_tables_start - start); +#define BOOTP_ALIGN_PTR_UP(p, s, n) \ + ((typeof(p))((uintptr_t)(s) + \ + QEMU_ALIGN_UP((uintptr_t)(p) - (uintptr_t)(s), n))) + +#define EFI_INIT_SYSTAB_GEN(type) \ + EFI_BOOT_MEMMAP_TABLE_GEN(type) \ + EFI_INITRD_TABLE_GEN(type) \ +static void init_systab_##type(struct loongarch_boot_info *info, \ + void *p, void *start) \ +{ \ + uint32_t nr_tables = 0; \ + const efi_guid_t fdt_guid = DEVICE_TREE_GUID; \ + struct efi_system_table_##type *systab; \ + struct efi_configuration_table_##type *cfg_tabs; \ + \ + p = BOOTP_ALIGN_PTR_UP(p, start, EFI_TABLE_ALIGN); \ + systab = p; \ + info->a2 = p - start; \ + \ + systab->hdr.signature = cpu_to_le64(EFI_SYSTEM_TABLE_SIGNATURE); \ + systab->hdr.revision = cpu_to_le32(EFI_SPECIFICATION_VERSION); \ + systab->hdr.headersize = \ + cpu_to_le32(sizeof(struct efi_system_table_##type)); \ + systab->fw_revision = \ + cpu_to_le32(FW_VERSION << 16 | FW_PATCHLEVEL << 8); \ + systab->runtime = 0; \ + systab->boottime = 0; \ + systab->nr_tables = 0; \ + \ + p += sizeof(struct efi_system_table_##type); \ + systab->fw_vendor = cpu_to_le##type(p - start); \ + init_efi_vendor_string(&p); \ + \ + p = BOOTP_ALIGN_PTR_UP(p, start, EFI_TABLE_ALIGN); \ + systab->tables = cpu_to_le##type(p - start); \ + cfg_tabs = p; \ + p += sizeof(struct efi_configuration_table_##type) * 3; \ + \ + p = BOOTP_ALIGN_PTR_UP(p, start, EFI_TABLE_ALIGN); \ + cfg_tabs[nr_tables].table = cpu_to_le##type(p - start); \ + init_efi_boot_memmap_##type(&cfg_tabs[nr_tables].guid, &p); \ + nr_tables++; \ + \ + if (initrd_size > 0) { \ + cfg_tabs[nr_tables].table = cpu_to_le##type(p - start); \ + init_efi_initrd_table_##type(&cfg_tabs[nr_tables].guid, &p); \ + nr_tables++; \ + } \ + \ + guidcpy(&cfg_tabs[nr_tables].guid, &fdt_guid); \ + cfg_tabs[nr_tables].table = cpu_to_le##type(FDT_BASE); \ + nr_tables++; \ + \ + systab->nr_tables = cpu_to_le32(nr_tables); \ + efi_hdr_crc32(&systab->hdr); \ } +EFI_INIT_SYSTAB_GEN(32) +EFI_INIT_SYSTAB_GEN(64) + static void init_cmdline(struct loongarch_boot_info *info, void *p, void *start) { hwaddr cmdline_addr = p - start; @@ -223,7 +299,7 @@ static void reset_load_elf(void *opaque) cpu_reset(CPU(cpu)); if (env->load_elf) { - if (cpu == LOONGARCH_CPU(first_cpu)) { + if (cpu == LOONGARCH_CPU(first_cpu)) { env->gpr[4] = env->boot_info->a0; env->gpr[5] = env->boot_info->a1; env->gpr[6] = env->boot_info->a2; @@ -265,21 +341,25 @@ static void loongarch_firmware_boot(LoongArchVirtMachineState *lvms, fw_cfg_add_kernel_info(info, lvms->fw_cfg); } -static void init_boot_rom(struct loongarch_boot_info *info, void *p) +static void init_boot_rom(struct loongarch_boot_info *info, void *p, + bool is_64bit) { void *start = p; init_cmdline(info, p, start); p += COMMAND_LINE_SIZE; - init_systab(info, p, start); + if (is_64bit) + init_systab_64(info, p, start); + else + init_systab_32(info, p, start); } static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info) { void *p, *bp; int64_t kernel_addr = 0; - LoongArchCPU *lacpu; + LoongArchCPU *lacpu = LOONGARCH_CPU(first_cpu); CPUState *cs; if (info->kernel_filename) { @@ -294,7 +374,7 @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info) /* Load cmdline and system tables at [0 - 1 MiB] */ p = g_malloc0(1 * MiB); bp = p; - init_boot_rom(info, p); + init_boot_rom(info, p, is_la64(&lacpu->env)); rom_add_blob_fixed_as("boot_info", bp, 1 * MiB, 0, &address_space_memory); /* Load slave boot code at pflash0 . */ diff --git a/include/hw/loongarch/boot.h b/include/hw/loongarch/boot.h index b3b870df1f..96ec15016a 100644 --- a/include/hw/loongarch/boot.h +++ b/include/hw/loongarch/boot.h @@ -38,11 +38,35 @@ typedef struct { EFI_GUID(0xb1b621d5, 0xf19c, 0x41a5, 0x83, 0x0b, \ 0xd9, 0x15, 0x2c, 0x69, 0xaa, 0xe0) +/* Memory types: */ +#define EFI_RESERVED_TYPE 0 +#define EFI_LOADER_CODE 1 +#define EFI_LOADER_DATA 2 +#define EFI_BOOT_SERVICES_CODE 3 +#define EFI_BOOT_SERVICES_DATA 4 +#define EFI_RUNTIME_SERVICES_CODE 5 +#define EFI_RUNTIME_SERVICES_DATA 6 +#define EFI_CONVENTIONAL_MEMORY 7 +#define EFI_UNUSABLE_MEMORY 8 +#define EFI_ACPI_RECLAIM_MEMORY 9 +#define EFI_ACPI_MEMORY_NVS 10 +#define EFI_MEMORY_MAPPED_IO 11 +#define EFI_MEMORY_MAPPED_IO_PORT_SPACE 12 +#define EFI_PAL_CODE 13 +#define EFI_PERSISTENT_MEMORY 14 +#define EFI_UNACCEPTED_MEMORY 15 +#define EFI_MAX_MEMORY_TYPE 16 + +#define EFI_PAGE_SHIFT 12 +#define EFI_PAGE_SIZE (1UL << EFI_PAGE_SHIFT) + +#define EFI_TABLE_ALIGN (64 * KiB) + struct efi_config_table { efi_guid_t guid; uint64_t *ptr; const char name[16]; -}; +} QEMU_PACKED; typedef struct { uint64_t signature; @@ -50,51 +74,90 @@ typedef struct { uint32_t headersize; uint32_t crc32; uint32_t reserved; -} efi_table_hdr_t; +} QEMU_PACKED efi_table_hdr_t; -struct efi_configuration_table { +struct efi_configuration_table_32 { efi_guid_t guid; - void *table; -}; + uint32_t table; +} QEMU_PACKED; -struct efi_system_table { +struct efi_configuration_table_64 { + efi_guid_t guid; + uint64_t table; +} QEMU_PACKED; + +struct efi_system_table_32 { + efi_table_hdr_t hdr; + uint32_t fw_vendor; /* physical addr of CHAR16 vendor string */ + uint32_t fw_revision; + uint32_t con_in_handle; + uint32_t con_in; + uint32_t con_out_handle; + uint32_t con_out; + uint32_t stderr_handle; + uint32_t stderr_placeholder; + uint32_t runtime; + uint32_t boottime; + uint32_t nr_tables; + uint32_t tables; +} QEMU_PACKED; + +struct efi_system_table_64 { efi_table_hdr_t hdr; uint64_t fw_vendor; /* physical addr of CHAR16 vendor string */ uint32_t fw_revision; + uint32_t __pad1; uint64_t con_in_handle; - uint64_t *con_in; + uint64_t con_in; uint64_t con_out_handle; - uint64_t *con_out; + uint64_t con_out; uint64_t stderr_handle; uint64_t stderr_placeholder; - uint64_t *runtime; - uint64_t *boottime; - uint64_t nr_tables; - struct efi_configuration_table *tables; -}; + uint64_t runtime; + uint64_t boottime; + uint32_t nr_tables; + uint32_t __pad2; + uint64_t tables; +} QEMU_PACKED; typedef struct { uint32_t type; - uint32_t pad; + uint32_t __pad; uint64_t phys_addr; uint64_t virt_addr; uint64_t num_pages; uint64_t attribute; -} efi_memory_desc_t; +} QEMU_PACKED efi_memory_desc_t; + +struct efi_boot_memmap_32 { + uint32_t map_size; + uint32_t desc_size; + uint32_t desc_ver; + uint32_t map_key; + uint32_t buff_size; + uint32_t __pad; + efi_memory_desc_t map[32]; +} QEMU_PACKED; -struct efi_boot_memmap { +struct efi_boot_memmap_64 { uint64_t map_size; uint64_t desc_size; uint32_t desc_ver; + uint32_t __pad; uint64_t map_key; uint64_t buff_size; efi_memory_desc_t map[32]; -}; +} QEMU_PACKED; + +struct efi_initrd_32 { + uint32_t base; + uint32_t size; +} QEMU_PACKED; -struct efi_initrd { +struct efi_initrd_64 { uint64_t base; uint64_t size; -}; +} QEMU_PACKED; struct loongarch_boot_info { uint64_t ram_size; @@ -110,6 +173,11 @@ extern unsigned memmap_entries; struct memmap_entry { uint64_t address; uint64_t length; + /* E820 style type */ +#define MEMMAP_TYPE_MEMORY 1 +#define MEMMAP_TYPE_RESERVED 2 +#define MEMMAP_TYPE_ACPI 3 +#define MEMMAP_TYPE_NVS 4 uint32_t type; uint32_t reserved; }; From patchwork Sun Sep 29 08:17:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gaosong X-Patchwork-Id: 13814883 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6F69ECF6498 for ; Sun, 29 Sep 2024 08:36:19 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1supOo-0007Jy-Gb; Sun, 29 Sep 2024 04:35:27 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1supOd-0006m4-EM for qemu-devel@nongnu.org; Sun, 29 Sep 2024 04:35:16 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1supOa-0006SA-8l for qemu-devel@nongnu.org; Sun, 29 Sep 2024 04:35:15 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8DxfWs9Eflm6L0DAA--.3365S3; Sun, 29 Sep 2024 16:35:09 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by front1 (Coremail) with SMTP id qMiowMBxn+QtEflmFt0UAA--.54891S6; Sun, 29 Sep 2024 16:35:07 +0800 (CST) From: Song Gao To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Jiaxun Yang Subject: [PULL 4/7] hw/loongarch/boot: Rework boot code generation Date: Sun, 29 Sep 2024 16:17:21 +0800 Message-Id: <20240929081724.2139556-5-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20240929081724.2139556-1-gaosong@loongson.cn> References: <20240929081724.2139556-1-gaosong@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxn+QtEflmFt0UAA--.54891S6 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Jiaxun Yang Use stl_p to write instructions so that host endian conversion will be performed. Replace mailbox read/write on LoongArch32 systems with 32bit IOCSR instructions to prevent illegal instructions. Signed-off-by: Jiaxun Yang Reviewed-by: Song Gao Message-Id: <20240914-loongarch-booting-v1-2-1517cae11c10@flygoat.com> Signed-off-by: Song Gao --- hw/loongarch/boot.c | 107 ++++++++++++++++++++++++-------------------- 1 file changed, 59 insertions(+), 48 deletions(-) diff --git a/hw/loongarch/boot.c b/hw/loongarch/boot.c index 4d01c01594..5a1cc5b79b 100644 --- a/hw/loongarch/boot.c +++ b/hw/loongarch/boot.c @@ -22,53 +22,64 @@ unsigned memmap_entries; ram_addr_t initrd_offset; uint64_t initrd_size; -static const unsigned int slave_boot_code[] = { - /* Configure reset ebase. */ - 0x0400302c, /* csrwr $t0, LOONGARCH_CSR_EENTRY */ - - /* Disable interrupt. */ - 0x0380100c, /* ori $t0, $zero,0x4 */ - 0x04000180, /* csrxchg $zero, $t0, LOONGARCH_CSR_CRMD */ - - /* Clear mailbox. */ - 0x1400002d, /* lu12i.w $t1, 1(0x1) */ - 0x038081ad, /* ori $t1, $t1, CORE_BUF_20 */ - 0x06481da0, /* iocsrwr.d $zero, $t1 */ - - /* Enable IPI interrupt. */ - 0x1400002c, /* lu12i.w $t0, 1(0x1) */ - 0x0400118c, /* csrxchg $t0, $t0, LOONGARCH_CSR_ECFG */ - 0x02fffc0c, /* addi.d $t0, $r0,-1(0xfff) */ - 0x1400002d, /* lu12i.w $t1, 1(0x1) */ - 0x038011ad, /* ori $t1, $t1, CORE_EN_OFF */ - 0x064819ac, /* iocsrwr.w $t0, $t1 */ - 0x1400002d, /* lu12i.w $t1, 1(0x1) */ - 0x038081ad, /* ori $t1, $t1, CORE_BUF_20 */ - - /* Wait for wakeup <.L11>: */ - 0x06488000, /* idle 0x0 */ - 0x03400000, /* andi $zero, $zero, 0x0 */ - 0x064809ac, /* iocsrrd.w $t0, $t1 */ - 0x43fff59f, /* beqz $t0, -12(0x7ffff4) # 48 <.L11> */ - - /* Read and clear IPI interrupt. */ - 0x1400002d, /* lu12i.w $t1, 1(0x1) */ - 0x064809ac, /* iocsrrd.w $t0, $t1 */ - 0x1400002d, /* lu12i.w $t1, 1(0x1) */ - 0x038031ad, /* ori $t1, $t1, CORE_CLEAR_OFF */ - 0x064819ac, /* iocsrwr.w $t0, $t1 */ - - /* Disable IPI interrupt. */ - 0x1400002c, /* lu12i.w $t0, 1(0x1) */ - 0x04001180, /* csrxchg $zero, $t0, LOONGARCH_CSR_ECFG */ - - /* Read mail buf and jump to specified entry */ - 0x1400002d, /* lu12i.w $t1, 1(0x1) */ - 0x038081ad, /* ori $t1, $t1, CORE_BUF_20 */ - 0x06480dac, /* iocsrrd.d $t0, $t1 */ - 0x00150181, /* move $ra, $t0 */ - 0x4c000020, /* jirl $zero, $ra,0 */ -}; +static void generate_secondary_boot_code(void *boot_code, bool is_64bit) +{ + uint32_t *p = boot_code; + + /* Configure reset ebase. */ + stl_p(p++, 0x0400302c); /* csrwr $t0, LOONGARCH_CSR_EENTRY */ + + /* Disable interrupt. */ + stl_p(p++, 0x0380100c); /* ori $t0, $zero,0x4 */ + stl_p(p++, 0x04000180); /* csrxchg $zero, $t0, LOONGARCH_CSR_CRMD */ + + /* Clear mailbox. */ + stl_p(p++, 0x1400002d); /* lu12i.w $t1, 1(0x1) */ + stl_p(p++, 0x038081ad); /* ori $t1, $t1, CORE_BUF_20 */ + if (is_64bit) { + stl_p(p++, 0x06481da0); /* iocsrwr.d $zero, $t1 */ + } else { + stl_p(p++, 0x064819a0); /* iocsrwr.w $zero, $t1 */ + } + + /* Enable IPI interrupt. */ + stl_p(p++, 0x1400002c); /* lu12i.w $t0, 1(0x1) */ + stl_p(p++, 0x0400118c); /* csrxchg $t0, $t0, LOONGARCH_CSR_ECFG */ + stl_p(p++, 0x02fffc0c); /* addi.d $t0, $r0, -1(0xfff) */ + stl_p(p++, 0x1400002d); /* lu12i.w $t1, 1(0x1) */ + stl_p(p++, 0x038011ad); /* ori $t1, $t1, CORE_EN_OFF */ + stl_p(p++, 0x064819ac); /* iocsrwr.w $t0, $t1 */ + stl_p(p++, 0x1400002d); /* lu12i.w $t1, 1(0x1) */ + stl_p(p++, 0x038081ad); /* ori $t1, $t1, CORE_BUF_20 */ + + /* Wait for wakeup <.L11>: */ + stl_p(p++, 0x06488000); /* idle 0x0 */ + stl_p(p++, 0x03400000); /* andi $zero, $zero, 0x0 */ + stl_p(p++, 0x064809ac); /* iocsrrd.w $t0, $t1 */ + stl_p(p++, 0x43fff59f); /* beqz $t0, -12(0x7ffff4) # 48 <.L11> */ + + /* Read and clear IPI interrupt. */ + stl_p(p++, 0x1400002d); /* lu12i.w $t1, 1(0x1) */ + stl_p(p++, 0x064809ac); /* iocsrrd.w $t0, $t1 */ + stl_p(p++, 0x1400002d); /* lu12i.w $t1, 1(0x1) */ + stl_p(p++, 0x038031ad); /* ori $t1, $t1, CORE_CLEAR_OFF */ + stl_p(p++, 0x064819ac); /* iocsrwr.w $t0, $t1 */ + + /* Disable IPI interrupt. */ + stl_p(p++, 0x1400002c); /* lu12i.w $t0, 1(0x1) */ + stl_p(p++, 0x04001180); /* csrxchg $zero, $t0, LOONGARCH_CSR_ECFG */ + + /* Read mail buf and jump to specified entry. */ + stl_p(p++, 0x1400002d); /* lu12i.w $t1, 1(0x1) */ + stl_p(p++, 0x038081ad); /* ori $t1, $t1, CORE_BUF_20 */ + if (is_64bit) { + stl_p(p++, 0x06480dac); /* iocsrrd.d $t0, $t1 */ + } else { + stl_p(p++, 0x064809ac); /* iocsrrd.w $t0, $t1 */ + } + stl_p(p++, 0x00150181); /* move $ra, $t0 */ + stl_p(p++, 0x4c000020); /* jirl $zero, $ra, 0 */ +} static inline void *guidcpy(void *dst, const void *src) { @@ -379,7 +390,7 @@ static void loongarch_direct_kernel_boot(struct loongarch_boot_info *info) /* Load slave boot code at pflash0 . */ void *boot_code = g_malloc0(VIRT_FLASH0_SIZE); - memcpy(boot_code, &slave_boot_code, sizeof(slave_boot_code)); + generate_secondary_boot_code(boot_code, is_la64(&lacpu->env)); rom_add_blob_fixed("boot_code", boot_code, VIRT_FLASH0_SIZE, VIRT_FLASH0_BASE); CPU_FOREACH(cs) { From patchwork Sun Sep 29 08:17:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: gaosong X-Patchwork-Id: 13814880 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8CFD0CF649E for ; Sun, 29 Sep 2024 08:36:16 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1supOn-00071n-Ac; Sun, 29 Sep 2024 04:35:25 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1supOd-0006nI-On for qemu-devel@nongnu.org; Sun, 29 Sep 2024 04:35:16 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1supOa-0006SE-Er for qemu-devel@nongnu.org; Sun, 29 Sep 2024 04:35:15 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8Dx+3I+Eflm7r0DAA--.3252S3; Sun, 29 Sep 2024 16:35:10 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by front1 (Coremail) with SMTP id qMiowMBxn+QtEflmFt0UAA--.54891S7; Sun, 29 Sep 2024 16:35:08 +0800 (CST) From: Song Gao To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Bibo Mao , Richard Henderson Subject: [PULL 5/7] target/loongarch: Avoid bits shift exceeding width of bool type Date: Sun, 29 Sep 2024 16:17:22 +0800 Message-Id: <20240929081724.2139556-6-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20240929081724.2139556-1-gaosong@loongson.cn> References: <20240929081724.2139556-1-gaosong@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxn+QtEflmFt0UAA--.54891S7 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Bibo Mao Variable env->cf[i] is defined as bool type, it is treated as int type with shift operation. However the max possible width is 56 for the shift operation, exceeding the width of int type. And there is existing api read_fcc() which is converted to u64 type with bitwise shift, it can be used to dump fp registers into coredump note segment. Resolves: Coverity CID 1561133 Signed-off-by: Bibo Mao Reviewed-by: Richard Henderson Message-Id: <20240914064645.2099169-1-maobibo@loongson.cn> Signed-off-by: Song Gao --- target/loongarch/arch_dump.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/target/loongarch/arch_dump.c b/target/loongarch/arch_dump.c index 4986db970e..d9e1120333 100644 --- a/target/loongarch/arch_dump.c +++ b/target/loongarch/arch_dump.c @@ -97,11 +97,7 @@ static int loongarch_write_elf64_fprpreg(WriteCoreDumpFunction f, loongarch_note_init(¬e, s, "CORE", 5, NT_PRFPREG, sizeof(note.fpu)); note.fpu.fcsr = cpu_to_dump64(s, env->fcsr0); - - for (i = 0; i < 8; i++) { - note.fpu.fcc |= env->cf[i] << (8 * i); - } - note.fpu.fcc = cpu_to_dump64(s, note.fpu.fcc); + note.fpu.fcc = cpu_to_dump64(s, read_fcc(env)); for (i = 0; i < 32; ++i) { note.fpu.fpr[i] = cpu_to_dump64(s, env->fpr[i].vreg.UD[0]); From patchwork Sun Sep 29 08:17:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: gaosong X-Patchwork-Id: 13814884 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 20960CF6495 for ; Sun, 29 Sep 2024 08:37:13 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1supOo-0007IS-3m; Sun, 29 Sep 2024 04:35:26 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1supOe-0006p8-ED for qemu-devel@nongnu.org; Sun, 29 Sep 2024 04:35:17 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1supOa-0006SH-Mp for qemu-devel@nongnu.org; Sun, 29 Sep 2024 04:35:16 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8BxFOk+Eflm670DAA--.4456S3; Sun, 29 Sep 2024 16:35:10 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by front1 (Coremail) with SMTP id qMiowMBxn+QtEflmFt0UAA--.54891S8; Sun, 29 Sep 2024 16:35:09 +0800 (CST) From: Song Gao To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 6/7] hw/loongarch/virt: Remove unnecessary 'cpu.h' inclusion Date: Sun, 29 Sep 2024 16:17:23 +0800 Message-Id: <20240929081724.2139556-7-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20240929081724.2139556-1-gaosong@loongson.cn> References: <20240929081724.2139556-1-gaosong@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxn+QtEflmFt0UAA--.54891S8 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, TVD_SPACE_RATIO=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Song Gao Message-Id: <20240927213254.17552-2-philmd@linaro.org> Signed-off-by: Song Gao --- include/hw/loongarch/virt.h | 1 - 1 file changed, 1 deletion(-) diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h index c373e48f27..9ba47793ef 100644 --- a/include/hw/loongarch/virt.h +++ b/include/hw/loongarch/virt.h @@ -8,7 +8,6 @@ #ifndef HW_LOONGARCH_H #define HW_LOONGARCH_H -#include "target/loongarch/cpu.h" #include "hw/boards.h" #include "qemu/queue.h" #include "hw/block/flash.h" From patchwork Sun Sep 29 08:17:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: gaosong X-Patchwork-Id: 13814878 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5B629CF649E for ; Sun, 29 Sep 2024 08:36:06 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1supOj-00070X-Rh; Sun, 29 Sep 2024 04:35:23 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1supOd-0006ne-S8 for qemu-devel@nongnu.org; Sun, 29 Sep 2024 04:35:16 -0400 Received: from mail.loongson.cn ([114.242.206.163]) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1supOa-0006SC-E3 for qemu-devel@nongnu.org; Sun, 29 Sep 2024 04:35:15 -0400 Received: from loongson.cn (unknown [10.2.5.185]) by gateway (Coremail) with SMTP id _____8BxUeg+Eflm7b0DAA--.3332S3; Sun, 29 Sep 2024 16:35:10 +0800 (CST) Received: from localhost.localdomain (unknown [10.2.5.185]) by front1 (Coremail) with SMTP id qMiowMBxn+QtEflmFt0UAA--.54891S9; Sun, 29 Sep 2024 16:35:10 +0800 (CST) From: Song Gao To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 7/7] hw/loongarch/fw_cfg: Build in common_ss[] Date: Sun, 29 Sep 2024 16:17:24 +0800 Message-Id: <20240929081724.2139556-8-gaosong@loongson.cn> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20240929081724.2139556-1-gaosong@loongson.cn> References: <20240929081724.2139556-1-gaosong@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: qMiowMBxn+QtEflmFt0UAA--.54891S9 X-CM-SenderInfo: 5jdr20tqj6z05rqj20fqof0/ X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Received-SPF: pass client-ip=114.242.206.163; envelope-from=gaosong@loongson.cn; helo=mail.loongson.cn X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org From: Philippe Mathieu-Daudé Nothing in LoongArch fw_cfg.c requires target specific definitions. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Song Gao Message-Id: <20240927213254.17552-3-philmd@linaro.org> Signed-off-by: Song Gao --- hw/loongarch/meson.build | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/loongarch/meson.build b/hw/loongarch/meson.build index bce7ebac97..005f017e21 100644 --- a/hw/loongarch/meson.build +++ b/hw/loongarch/meson.build @@ -1,8 +1,8 @@ loongarch_ss = ss.source_set() loongarch_ss.add(files( - 'fw_cfg.c', 'boot.c', )) +common_ss.add(when: 'CONFIG_LOONGARCH_VIRT', if_true: files('fw_cfg.c')) loongarch_ss.add(when: 'CONFIG_LOONGARCH_VIRT', if_true: files('virt.c')) loongarch_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-build.c'))