From patchwork Mon Sep 30 14:59:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 13816592 Received: from mail.zeus03.de (zeus03.de [194.117.254.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5F2B19258C for ; Mon, 30 Sep 2024 14:59:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=194.117.254.33 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727708401; cv=none; b=R+eCYNgagC5P36R6wweW7HQPegfit0V6ryHXzjPwJ/7MlakcriKgzF7dsT1tUSyo70wiXRREy1HQIhhd5L3rwKU2oQ/EBJo8uyjenjej7WhNEFW0+o2comkpOuCUHbWbtqHAciiDwcdVKsVEnRo2p18v7G0Wi3B22b/nd1YuEkc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727708401; c=relaxed/simple; bh=IW4P0dA51k8Ccb+8Vq9h4ral2GecoXnmNnoryGsZxMM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=GE5E8pL0B+vsT/fhS7FcbLPXRi9RB9Nw8MxKzCRNPqHCi3qyJRLYyyM+QLGlvr1NXSRB/746jzmd8+GyswO5BAOIUEgN+/JvM9CBMoIZhZTPX15S1dcq8EINjyjfchu1F8TLB5pQZhf9B6UDN+KkWJQh+UvAwVP/2UicOt0R9wY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com; spf=pass smtp.mailfrom=sang-engineering.com; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b=Iga73FiM; arc=none smtp.client-ip=194.117.254.33 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b="Iga73FiM" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= sang-engineering.com; h=from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; s=k1; bh=1t1j0IfehHHrwnyAo3CZ9tu5Bk9Gr8jQRiRmvo9kQHA=; b=Iga73F iMy4sZKwtZAfA9pAr1DZK+Y+zzpE6B5fbQJFjnYi9qA4ElO569eiO7GwBB1sn0BC msNOB61C0V7gvwMN55NroSVyWYZtM5oXYsf15FruX7dkoLSzLNg+mvwMfLPgDyJY TyPEXgTUG4yczqM8/MkbVaRZYMUda1U3MdnoSmYKZLDfoBE/sS9Emox8ukrev9yz 3nS02+mkWpUnh3RGDV4n95icMlfFQD0Sd7Ci/0NSWeePQ0+f2zTfjcCIvDBipfU1 yu0UzWjj3S0z62+R5uduR3sTr7+z3pwuZc+nrklwrdbLyWvHlg7sY94q2IFxLEWp SjL/kRgvHWsAn54Q== Received: (qmail 2222634 invoked from network); 30 Sep 2024 16:59:57 +0200 Received: by mail.zeus03.de with ESMTPSA (TLS_AES_256_GCM_SHA384 encrypted, authenticated); 30 Sep 2024 16:59:57 +0200 X-UD-Smtp-Session: l3s3148p1@S1FOdVcj4OYujnsJ From: Wolfram Sang To: linux-renesas-soc@vger.kernel.org Cc: Biju Das , Wolfram Sang , Vinod Koul , Lad Prabhakar , dmaengine@vger.kernel.org Subject: [PATCH 1/3] dmaengine: sh: rz-dmac: handle configs where one address is zero Date: Mon, 30 Sep 2024 16:59:52 +0200 Message-ID: <20240930145955.4248-2-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240930145955.4248-1-wsa+renesas@sang-engineering.com> References: <20240930145955.4248-1-wsa+renesas@sang-engineering.com> Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Configs like the ones coming from the MMC subsystem will have either 'src' or 'dst' zeroed, resulting in an unknown bus width. This will bail out on the RZ DMA driver because of the sanity check for a valid bus width. Reorder the code, so that the check will only be applied when the corresponding address is non-zero. Fixes: 5000d37042a6 ("dmaengine: sh: Add DMAC driver for RZ/G2L SoC") Signed-off-by: Wolfram Sang Reviewed-by: Biju Das Tested-by: Claudiu Beznea Tested-by: Biju Das --- drivers/dma/sh/rz-dmac.c | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c index 65a27c5a7bce..811389fc9cb8 100644 --- a/drivers/dma/sh/rz-dmac.c +++ b/drivers/dma/sh/rz-dmac.c @@ -601,22 +601,25 @@ static int rz_dmac_config(struct dma_chan *chan, struct rz_dmac_chan *channel = to_rz_dmac_chan(chan); u32 val; - channel->src_per_address = config->src_addr; channel->dst_per_address = config->dst_addr; - - val = rz_dmac_ds_to_val_mapping(config->dst_addr_width); - if (val == CHCFG_DS_INVALID) - return -EINVAL; - channel->chcfg &= ~CHCFG_FILL_DDS_MASK; - channel->chcfg |= FIELD_PREP(CHCFG_FILL_DDS_MASK, val); + if (channel->dst_per_address) { + val = rz_dmac_ds_to_val_mapping(config->dst_addr_width); + if (val == CHCFG_DS_INVALID) + return -EINVAL; - val = rz_dmac_ds_to_val_mapping(config->src_addr_width); - if (val == CHCFG_DS_INVALID) - return -EINVAL; + channel->chcfg |= FIELD_PREP(CHCFG_FILL_DDS_MASK, val); + } + channel->src_per_address = config->src_addr; channel->chcfg &= ~CHCFG_FILL_SDS_MASK; - channel->chcfg |= FIELD_PREP(CHCFG_FILL_SDS_MASK, val); + if (channel->src_per_address) { + val = rz_dmac_ds_to_val_mapping(config->src_addr_width); + if (val == CHCFG_DS_INVALID) + return -EINVAL; + + channel->chcfg |= FIELD_PREP(CHCFG_FILL_SDS_MASK, val); + } return 0; } From patchwork Mon Sep 30 14:59:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 13816593 Received: from mail.zeus03.de (zeus03.de [194.117.254.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C9D321925A0 for ; Mon, 30 Sep 2024 15:00:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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30 Sep 2024 16:59:58 +0200 X-UD-Smtp-Session: l3s3148p1@NrtZdVcj6OYujnsJ From: Wolfram Sang To: linux-renesas-soc@vger.kernel.org Cc: Biju Das , Wolfram Sang , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , dmaengine@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH 2/3] dt-bindings: dma: rz-dmac: Document RZ/A1L SoC Date: Mon, 30 Sep 2024 16:59:53 +0200 Message-ID: <20240930145955.4248-3-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240930145955.4248-1-wsa+renesas@sang-engineering.com> References: <20240930145955.4248-1-wsa+renesas@sang-engineering.com> Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Document the Renesas RZ/A1L DMAC block. This one does not require clocks and resets, so update the bindings accordingly. Signed-off-by: Wolfram Sang --- .../bindings/dma/renesas,rz-dmac.yaml | 27 +++++++++++++------ 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml index ca24cf48769f..e05aaf24eb64 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml @@ -4,18 +4,16 @@ $id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Renesas RZ/{G2L,G2UL,V2L} DMA Controller +title: Renesas RZ/{A1L,G2L,G2UL,V2L} DMA Controller maintainers: - Biju Das -allOf: - - $ref: dma-controller.yaml# - properties: compatible: items: - enum: + - renesas,r7s72100-dmac # RZ/A1L - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five - renesas,r9a07g044-dmac # RZ/G2{L,LC} - renesas,r9a07g054-dmac # RZ/V2L @@ -93,13 +91,26 @@ required: - reg - interrupts - interrupt-names - - clocks - - clock-names - '#dma-cells' - dma-channels - power-domains - - resets - - reset-names + +allOf: + - $ref: dma-controller.yaml# + + - if: + not: + properties: + compatible: + contains: + enum: + - renesas,r7s72100-dmac + then: + required: + - clocks + - clock-names + - resets + - reset-names additionalProperties: false From patchwork Mon Sep 30 14:59:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 13816594 Received: from mail.zeus03.de (zeus03.de [194.117.254.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 65F3019259E for ; Mon, 30 Sep 2024 15:00:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=194.117.254.33 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727708405; cv=none; b=R2Wo7T4SAVH22qU01aSgXHHXDzv7MolvtT3EFRcmQCD531qwPLETIwFzJmY3Tt4v3lajSOGgg3xa34RwAi5aq3oAa4cuZALagO1r6efVcGT9bhoHOWvDRmKpuUzNubFOyNjyyvkmuiEzTUSRa4SIEzdXtpOCBQ6r+AC3ltPYBWk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727708405; c=relaxed/simple; bh=uDkerb6KGipRUZ7UYAb411KLuQ1UEZb6wnjIEHvrh/s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VkMyxdJHi8TRGwtanqjc6jtSqCiDhzcxak9YBVigE5lYbeRT+VG9atuC4vNjoIz0PoPQJ2oQGg8B/uq7v1V5KT99Bb4pIKBn2E/Jp564EX8crBaTNkaICi4tq1HElWklAG0+cMPxZo+Dm9K10JVLKuKMC6n/mqmw82IpV5wI068= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com; spf=pass smtp.mailfrom=sang-engineering.com; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b=DgyRxzxK; arc=none smtp.client-ip=194.117.254.33 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b="DgyRxzxK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= sang-engineering.com; h=from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; s=k1; bh=Curcrtbkv6miXmdKoCuAek1GcGgbfQ6RkuxTtIFbBwc=; b=DgyRxz xKLL5NJZJYLV8YCRd8PJJ0+gWqa0dol1ytrvBGR0QxrgZhCMW6S9Q598WEq0f71Y 0utpiYu9/ryKLJG+J05x5Tn8nt4Thn3+Xd7i3P40OvzuDVy7sma4mEj0zN77wYg6 ImbOLr2wZsPvseYSWnDvX7BjeD7giR1PdzdA2E7ewuxSoLVcGYi9VbmZN4ij4xAV 02QkQkTec9PiFaBwxVpJiioTHMdAeLNYifpb3EhKCP3pCg5megfBvIRUMjP1rYWI x5yEYZO5KrhytbJ8LAJStmOZwdwavXRdAyYuSO901jMVPA+RsB44a5q27YPL+Kvg TjSg/sdlCKDc8G6g== Received: (qmail 2222706 invoked from network); 30 Sep 2024 16:59:59 +0200 Received: by mail.zeus03.de with ESMTPSA (TLS_AES_256_GCM_SHA384 encrypted, authenticated); 30 Sep 2024 16:59:59 +0200 X-UD-Smtp-Session: l3s3148p1@qvFmdVcj6uYujnsJ From: Wolfram Sang To: linux-renesas-soc@vger.kernel.org Cc: Biju Das , Wolfram Sang , Vinod Koul , Philipp Zabel , dmaengine@vger.kernel.org Subject: [PATCH 3/3] dmaengine: sh: rz-dmac: add r7s72100 support Date: Mon, 30 Sep 2024 16:59:54 +0200 Message-ID: <20240930145955.4248-4-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240930145955.4248-1-wsa+renesas@sang-engineering.com> References: <20240930145955.4248-1-wsa+renesas@sang-engineering.com> Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Update descriptions and make getting resets optional. Signed-off-by: Wolfram Sang Reviewed-by: Philipp Zabel --- drivers/dma/sh/Kconfig | 6 +++--- drivers/dma/sh/rz-dmac.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/dma/sh/Kconfig b/drivers/dma/sh/Kconfig index c0b2997ab7fd..2b2e8ca257f5 100644 --- a/drivers/dma/sh/Kconfig +++ b/drivers/dma/sh/Kconfig @@ -49,10 +49,10 @@ config RENESAS_USB_DMAC SoCs. config RZ_DMAC - tristate "Renesas RZ/{G2L,V2L} DMA Controller" - depends on ARCH_RZG2L || COMPILE_TEST + tristate "Renesas RZ/{A1,G2L,V2L} DMA Controller" + depends on ARCH_R7S72100 || ARCH_RZG2L || COMPILE_TEST select RENESAS_DMA select DMA_VIRTUAL_CHANNELS help This driver supports the general purpose DMA controller found in the - Renesas RZ/{G2L,V2L} SoC variants. + Renesas RZ/{A1,G2L,V2L} SoC variants. diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c index 811389fc9cb8..03f3f99f0f4a 100644 --- a/drivers/dma/sh/rz-dmac.c +++ b/drivers/dma/sh/rz-dmac.c @@ -893,7 +893,7 @@ static int rz_dmac_probe(struct platform_device *pdev) /* Initialize the channels. */ INIT_LIST_HEAD(&dmac->engine.channels); - dmac->rstc = devm_reset_control_array_get_exclusive(&pdev->dev); + dmac->rstc = devm_reset_control_array_get_optional_exclusive(&pdev->dev); if (IS_ERR(dmac->rstc)) return dev_err_probe(&pdev->dev, PTR_ERR(dmac->rstc), "failed to get resets\n");