From patchwork Tue Oct 1 12:43:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 13817944 X-Patchwork-Delegate: geert@linux-m68k.org Received: from mail.zeus03.de (zeus03.de [194.117.254.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5FACE1C32EC for ; Tue, 1 Oct 2024 12:43:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=194.117.254.33 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727786605; cv=none; b=uqY8PyJJnG4CV1yABz+WnGXoETtcH4yocja+Uoz3HXribvPzW+DiVluYuz4BHegNe0YwzBKGGikUfLJMS5FLUDtFR/v7yPps/pDR50Q8LdI9GKf7yKmgG5Z1Q/Vq/Lgo/xe2OnB00+M6FoYklNV99NQyIYoWKlpIIiO0owud/A8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727786605; c=relaxed/simple; bh=funEQOjGU7Omtk2Q/rdES2ixyx+zejpAJEh/Q5Av1Io=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=plBTYHl2De9AnLlOt6ugY6bch8eCH11hQmqA1JsOb/1+dYr2KzaB11g1oaUnGNvqLRewpvQrCeh4CXkP5hg3RgZE9MA5JslLl0qMU4mJVbfDvbozBoWT2H38iq9SKCtOzg/Uyd2fYuoG2mNoU1+dRDPJvQRV4WkGthXLRqPJ4y8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com; spf=pass smtp.mailfrom=sang-engineering.com; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b=UH0HCM5U; arc=none smtp.client-ip=194.117.254.33 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b="UH0HCM5U" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= sang-engineering.com; h=from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; s=k1; bh=SBKfrYLwWACNHIy0QWXmrXYW2TneHhxDyMo3N9Sf1q8=; b=UH0HCM 5Uh62pLd5khWZ0sXaue0MUonaOodVfTRhvqDA1xBXvmfYx7twGsBEVKgUyVJMsuU KRRub8+2Y0TEz8AZND9b84970NZcgX/BsK3CesqW6wtbpDzS+vrube8DIQXCHpfR wLPOOCcRY17U00Tl0mJn5ZMPdu+DlXlBQ8trlQldIXYBe7jVxo13EH+zhOVfeTOm A7KlSvzzzAYzEJYncXDHYKvKzGXHIznTUROHUU8CkCdu1B1jMJw1X/0WPiPrpbRj an5YteWdqcWTur6+pcmD6vgNBG0wraOQZmOd02Kgh4vYiWcvxchZmvx/oJulYvfv lTTEh9RU+sPaR9YA== Received: (qmail 2523620 invoked from network); 1 Oct 2024 14:43:14 +0200 Received: by mail.zeus03.de with ESMTPSA (TLS_AES_256_GCM_SHA384 encrypted, authenticated); 1 Oct 2024 14:43:14 +0200 X-UD-Smtp-Session: l3s3148p1@D+wrqmkjtNoujnuV From: Wolfram Sang To: linux-renesas-soc@vger.kernel.org Cc: Biju Das , Wolfram Sang , Claudiu Beznea , Vinod Koul , Lad Prabhakar , dmaengine@vger.kernel.org Subject: [PATCH v2 1/3] dmaengine: sh: rz-dmac: handle configs where one address is zero Date: Tue, 1 Oct 2024 14:43:07 +0200 Message-ID: <20241001124310.2336-2-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241001124310.2336-1-wsa+renesas@sang-engineering.com> References: <20241001124310.2336-1-wsa+renesas@sang-engineering.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Configs like the ones coming from the MMC subsystem will have either 'src' or 'dst' zeroed, resulting in an unknown bus width. This will bail out on the RZ DMA driver because of the sanity check for a valid bus width. Reorder the code, so that the check will only be applied when the corresponding address is non-zero. Fixes: 5000d37042a6 ("dmaengine: sh: Add DMAC driver for RZ/G2L SoC") Signed-off-by: Wolfram Sang Reviewed-by: Biju Das Tested-by: Biju Das Tested-by: Claudiu Beznea Reviewed-by: Geert Uytterhoeven --- drivers/dma/sh/rz-dmac.c | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c index 65a27c5a7bce..811389fc9cb8 100644 --- a/drivers/dma/sh/rz-dmac.c +++ b/drivers/dma/sh/rz-dmac.c @@ -601,22 +601,25 @@ static int rz_dmac_config(struct dma_chan *chan, struct rz_dmac_chan *channel = to_rz_dmac_chan(chan); u32 val; - channel->src_per_address = config->src_addr; channel->dst_per_address = config->dst_addr; - - val = rz_dmac_ds_to_val_mapping(config->dst_addr_width); - if (val == CHCFG_DS_INVALID) - return -EINVAL; - channel->chcfg &= ~CHCFG_FILL_DDS_MASK; - channel->chcfg |= FIELD_PREP(CHCFG_FILL_DDS_MASK, val); + if (channel->dst_per_address) { + val = rz_dmac_ds_to_val_mapping(config->dst_addr_width); + if (val == CHCFG_DS_INVALID) + return -EINVAL; - val = rz_dmac_ds_to_val_mapping(config->src_addr_width); - if (val == CHCFG_DS_INVALID) - return -EINVAL; + channel->chcfg |= FIELD_PREP(CHCFG_FILL_DDS_MASK, val); + } + channel->src_per_address = config->src_addr; channel->chcfg &= ~CHCFG_FILL_SDS_MASK; - channel->chcfg |= FIELD_PREP(CHCFG_FILL_SDS_MASK, val); + if (channel->src_per_address) { + val = rz_dmac_ds_to_val_mapping(config->src_addr_width); + if (val == CHCFG_DS_INVALID) + return -EINVAL; + + channel->chcfg |= FIELD_PREP(CHCFG_FILL_SDS_MASK, val); + } return 0; } From patchwork Tue Oct 1 12:43:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 13817943 X-Patchwork-Delegate: geert@linux-m68k.org Received: from mail.zeus03.de (zeus03.de [194.117.254.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 93CDE1C2454 for ; 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1 Oct 2024 14:43:14 +0200 Received: by mail.zeus03.de with ESMTPSA (TLS_AES_256_GCM_SHA384 encrypted, authenticated); 1 Oct 2024 14:43:14 +0200 X-UD-Smtp-Session: l3s3148p1@37k4qmkjwNoujnuV From: Wolfram Sang To: linux-renesas-soc@vger.kernel.org Cc: Biju Das , Wolfram Sang , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , dmaengine@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v2 2/3] dt-bindings: dma: rz-dmac: Document RZ/A1H SoC Date: Tue, 1 Oct 2024 14:43:08 +0200 Message-ID: <20241001124310.2336-3-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241001124310.2336-1-wsa+renesas@sang-engineering.com> References: <20241001124310.2336-1-wsa+renesas@sang-engineering.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Document the Renesas RZ/A1H DMAC block. This one does not require clocks and resets, so update the bindings accordingly. Introduce a generic name in the header to make future additions easier. Signed-off-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven --- .../bindings/dma/renesas,rz-dmac.yaml | 27 +++++++++++++------ 1 file changed, 19 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml index ca24cf48769f..83d79b7d85d2 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml @@ -4,18 +4,16 @@ $id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Renesas RZ/{G2L,G2UL,V2L} DMA Controller +title: Renesas RZ DMA Controller maintainers: - Biju Das -allOf: - - $ref: dma-controller.yaml# - properties: compatible: items: - enum: + - renesas,r7s72100-dmac # RZ/A1H - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five - renesas,r9a07g044-dmac # RZ/G2{L,LC} - renesas,r9a07g054-dmac # RZ/V2L @@ -93,13 +91,26 @@ required: - reg - interrupts - interrupt-names - - clocks - - clock-names - '#dma-cells' - dma-channels - power-domains - - resets - - reset-names + +allOf: + - $ref: dma-controller.yaml# + + - if: + not: + properties: + compatible: + contains: + enum: + - renesas,r7s72100-dmac + then: + required: + - clocks + - clock-names + - resets + - reset-names additionalProperties: false From patchwork Tue Oct 1 12:43:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 13817945 X-Patchwork-Delegate: geert@linux-m68k.org Received: from mail.zeus03.de (zeus03.de [194.117.254.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6EF661C32F0 for ; Tue, 1 Oct 2024 12:43:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=194.117.254.33 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727786605; cv=none; b=cPEQLVoImJYXl3ZKRMtwJmuuPD0uweyGsAEKNeeFgY8YPR4K8yWp0OXYrgZ8SDdzX7+0pngZqptVtvJN31tRkq6XhELVo65luVJTcihglIs5KFYwKz1ADyNUfydG3D6RBaY5QoLzDCr+LWGjujBJBbk8RC4IgecGnHOC8luyeTc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1727786605; c=relaxed/simple; bh=l2t1dqk+r23+R9nbRYF7KoGiQg78YPEB9rKlGp2Gc7M=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ubqX+KbGmwTLFmMfujmQrhrxQkW10WT1iao3OcPjDZe8MpSJbn0nzvIaMUTRf7RjqopG30RSXmSKLtbXCeCJGBztPQ1nbdAnPFC06bVKnsXaABwidDo+O5d1EeEhCTpIDGnDtJRVcfA5q5e9bHk6x24eL4L9ZC49iHPBdwoaKr4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com; spf=pass smtp.mailfrom=sang-engineering.com; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b=R1y1Z7ag; arc=none smtp.client-ip=194.117.254.33 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b="R1y1Z7ag" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= sang-engineering.com; h=from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; s=k1; bh=K9wz5JtX7GBLWOESuR7JRupPXPlzqUViFNdyqc0HSR8=; b=R1y1Z7 agldavc2hi4mg7ZG3v7C2jqi6YAnaAT96cl7s+wwVhd3mis6spdMZ6nk3t+wAFHO 7kLcayoolLgWo9BTBxehyOzIXDcusrtUVUvy8fQj1bHma83RdZtV46oS6GT23SkI 6YE5Fh8GzYF+MwzKnnUgblJ/T1Z8EQfDu2JOq/GVu6UZsGoV9+8A84eYovCOfKwU Dydj79iRwiV608y2i5vnTUVkfYN0eRfejr5VmCbPgeUhJYGqnryLe1yLOj8a8HX4 SLNErM+YO4SfTD7PB0hwSFJWlfejSdWZmBfRKK7CY/MU9D9yFaGt4MBCcJ/AZE2Y neyY/bHVvbNxIPFQ== Received: (qmail 2523696 invoked from network); 1 Oct 2024 14:43:15 +0200 Received: by mail.zeus03.de with ESMTPSA (TLS_AES_256_GCM_SHA384 encrypted, authenticated); 1 Oct 2024 14:43:15 +0200 X-UD-Smtp-Session: l3s3148p1@4DtEqmkjwtoujnuV From: Wolfram Sang To: linux-renesas-soc@vger.kernel.org Cc: Biju Das , Wolfram Sang , Philipp Zabel , Vinod Koul , dmaengine@vger.kernel.org Subject: [PATCH v2 3/3] dmaengine: sh: rz-dmac: add r7s72100 support Date: Tue, 1 Oct 2024 14:43:09 +0200 Message-ID: <20241001124310.2336-4-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241001124310.2336-1-wsa+renesas@sang-engineering.com> References: <20241001124310.2336-1-wsa+renesas@sang-engineering.com> Precedence: bulk X-Mailing-List: linux-renesas-soc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This SoC needs to make getting resets optional. Descriptions are reworded to be more generic. Signed-off-by: Wolfram Sang Reviewed-by: Philipp Zabel Reviewed-by: Geert Uytterhoeven --- drivers/dma/sh/Kconfig | 8 ++++---- drivers/dma/sh/rz-dmac.c | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/dma/sh/Kconfig b/drivers/dma/sh/Kconfig index c0b2997ab7fd..6ea5a880b433 100644 --- a/drivers/dma/sh/Kconfig +++ b/drivers/dma/sh/Kconfig @@ -49,10 +49,10 @@ config RENESAS_USB_DMAC SoCs. config RZ_DMAC - tristate "Renesas RZ/{G2L,V2L} DMA Controller" - depends on ARCH_RZG2L || COMPILE_TEST + tristate "Renesas RZ DMA Controller" + depends on ARCH_R7S72100 || ARCH_RZG2L || COMPILE_TEST select RENESAS_DMA select DMA_VIRTUAL_CHANNELS help - This driver supports the general purpose DMA controller found in the - Renesas RZ/{G2L,V2L} SoC variants. + This driver supports the general purpose DMA controller typically + found in the Renesas RZ SoC variants. diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c index 811389fc9cb8..03f3f99f0f4a 100644 --- a/drivers/dma/sh/rz-dmac.c +++ b/drivers/dma/sh/rz-dmac.c @@ -893,7 +893,7 @@ static int rz_dmac_probe(struct platform_device *pdev) /* Initialize the channels. */ INIT_LIST_HEAD(&dmac->engine.channels); - dmac->rstc = devm_reset_control_array_get_exclusive(&pdev->dev); + dmac->rstc = devm_reset_control_array_get_optional_exclusive(&pdev->dev); if (IS_ERR(dmac->rstc)) return dev_err_probe(&pdev->dev, PTR_ERR(dmac->rstc), "failed to get resets\n");