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Lin" , Singo Chang , "Nancy Lin" , Subject: [PATCH] drm/mediatek: Fix XRGB format breakage for blend_modes unsupported SoCs Date: Sat, 5 Oct 2024 17:52:34 +0800 Message-ID: <20241005095234.12925-1-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-AS-Result: No-10--8.330700-8.000000 X-TMASE-MatchedRID: auvC3QTXpfluEQe6SEvnwbMjW/sniEQKKx5ICGp/WtE0QmmUihPzrMLW UULKqUw6o5qw/iFKtvbzrL9jlOCHAYpsQeZV7e/esTcWkxuDrdLmELBDcs0dnZy1Yc8tPkV90S+ TvGOUgqLrDONdwADMfYAy6p60ZV62fJ5/bZ6npdiyO81X3yak89tr2uEa5q7ZGMXmXH2H4ryBxo by+cqa46Ag6c6nq6DYgoxkRN9FeHp+3BndfXUhXQ== X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--8.330700-8.000000 X-TMASE-Version: SMEX-14.0.0.3152-9.1.1006-23728.005 X-TM-SNTS-SMTP: 0440B8C83F3F2410F268DA0AD1D3FC737721B3F4A49D082B60D1DF1DB68103AD2000:8 X-MTK: N X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" If the constant alpha always set, the SoCs that is not supported the ignore alpha bit will still use constant alpha. That will break the original constant alpha setting of XRGB foramt for blend_modes unsupported SoCs, such as MT8173. Make the constatnt alpha only set when setting has_alpha or supported blend_modes SoC to fix the downgrade issue. Fixes: bc46eb5d5d77 ("drm/mediatek: Support DRM plane alpha in OVL") Signed-off-by: Jason-JH.Lin Tested-by: Yassine Oudjana --- drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 28 +++++++++++++++---------- 1 file changed, 17 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c index 703cd3f6c6d3..de3addd89442 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_ovl.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_ovl.c @@ -494,19 +494,25 @@ void mtk_ovl_layer_config(struct device *dev, unsigned int idx, con = mtk_ovl_fmt_convert(ovl, state); if (state->base.fb) { - con |= OVL_CON_AEN; - con |= state->base.alpha & OVL_CON_ALPHA; + /* + * For blend_modes supported SoCs, always set constant alpha. + * For blend_modes unsupported SoCs, set constant alpha when has_alpha is set. + */ + if (ovl->data->blend_modes || state->base.fb->format->has_alpha) { + con |= OVL_CON_AEN; + con |= state->base.alpha & OVL_CON_ALPHA; + } + + /* + * Although the alpha channel can be ignored, CONST_BLD must be enabled + * for XRGB format, otherwise OVL will still read the value from memory. + * For RGB888 related formats, whether CONST_BLD is enabled or not won't + * affect the result. Therefore we use !has_alpha as the condition. + */ + if (blend_mode == DRM_MODE_BLEND_PIXEL_NONE || !state->base.fb->format->has_alpha) + ignore_pixel_alpha = OVL_CONST_BLEND; } - /* CONST_BLD must be enabled for XRGB formats although the alpha channel - * can be ignored, or OVL will still read the value from memory. - * For RGB888 related formats, whether CONST_BLD is enabled or not won't - * affect the result. Therefore we use !has_alpha as the condition. - */ - if ((state->base.fb && !state->base.fb->format->has_alpha) || - blend_mode == DRM_MODE_BLEND_PIXEL_NONE) - ignore_pixel_alpha = OVL_CONST_BLEND; - if (pending->rotation & DRM_MODE_REFLECT_Y) { con |= OVL_CON_VIRT_FLIP; addr += (pending->height - 1) * pending->pitch;