From patchwork Mon Oct 7 11:02:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 13824452 Received: from mail.zeus03.de (zeus03.de [194.117.254.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DA8E81D0E26 for ; Mon, 7 Oct 2024 11:02:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=194.117.254.33 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728298943; cv=none; b=VdOCnY+KqFEY8v9HUw4DhCARkm3NAagJ505DoNjKyfVsYlBdqCRou7Y95QPL0NRU85vgzDvpCbE16xRyX5pLgKgZuzm0CDnb+e0oAy6lbjGwlOLjD9ClP7xDRMIOGeh6iogOs/EzThXNWSf2dQn1DDNe4G6Zog5SWgKKdwMR14I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728298943; c=relaxed/simple; bh=nngkMCmzlD5/KK2C1otq3AMCD9ZO8njuW2Mc4Pw1Jm8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Ghgv8Zxji+kdUtWcXMSILEIPsnSdGZWTkydtLqw7ErxLCkNCyrj3G6gmbF38nhLmW01EuuljM4V8nYOeWQtQxRFRMcNuRyx8BmyqH/65/H0fRJstRKBp1mLNKiyjDabgmM8S4hxfGv8zsK4GxZy++5xVCrc4OBFhdN+Vqit7HyI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com; spf=pass smtp.mailfrom=sang-engineering.com; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b=AtyVKDjC; arc=none smtp.client-ip=194.117.254.33 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b="AtyVKDjC" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= sang-engineering.com; h=from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; s=k1; bh=5nn0eQkafRUSLXQ4NP1rAJgTSymJ6mkYq8l8n/TCLFU=; b=AtyVKD jCdYpyfqb52c+/EvJ9NaGZD1nBAwrrS91l9lUw9aOpxTBJ7ScsY2zAf1cqPVL+i4 cHYLzP1OxNsYaGKw5/tGHLhdo3Lfhb2sxC+Ke7DGqdGPyiCqgzaPu9PzrdoezxYC +9aByF1miwdOHLfZqqS+I95/hXy/FBpsgxco1PB8Ug8epFcBauLM4I//JBKCOBrv 2ND0kGChhpMCuXxXUhwsj1zfkXZkry8hyYpmpNb7k824YuaFshc5aylr9E+UwSyy UUW0Lrh108jvfu8/V2SPiO78MFqcTlt9/fa4YMY7TUXxf9XoCorFjRFmsQrigeIb Y6X4+VSZGP/D48bA== Received: (qmail 100788 invoked from network); 7 Oct 2024 13:02:16 +0200 Received: by mail.zeus03.de with ESMTPSA (TLS_AES_256_GCM_SHA384 encrypted, authenticated); 7 Oct 2024 13:02:16 +0200 X-UD-Smtp-Session: l3s3148p1@myEt9OAjsI0gAwDPXxi/APzxl2QXB/xr From: Wolfram Sang To: linux-renesas-soc@vger.kernel.org Cc: Wolfram Sang , Biju Das , Geert Uytterhoeven , Claudiu Beznea , Vinod Koul , Lad Prabhakar , dmaengine@vger.kernel.org Subject: [PATCH v3 1/3] dmaengine: sh: rz-dmac: handle configs where one address is zero Date: Mon, 7 Oct 2024 13:02:01 +0200 Message-ID: <20241007110200.43166-6-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241007110200.43166-5-wsa+renesas@sang-engineering.com> References: <20241007110200.43166-5-wsa+renesas@sang-engineering.com> Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Configs like the ones coming from the MMC subsystem will have either 'src' or 'dst' zeroed, resulting in an unknown bus width. This will bail out on the RZ DMA driver because of the sanity check for a valid bus width. Reorder the code, so that the check will only be applied when the corresponding address is non-zero. Fixes: 5000d37042a6 ("dmaengine: sh: Add DMAC driver for RZ/G2L SoC") Signed-off-by: Wolfram Sang Reviewed-by: Biju Das Reviewed-by: Geert Uytterhoeven Tested-by: Biju Das Tested-by: Claudiu Beznea --- drivers/dma/sh/rz-dmac.c | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c index 65a27c5a7bce..811389fc9cb8 100644 --- a/drivers/dma/sh/rz-dmac.c +++ b/drivers/dma/sh/rz-dmac.c @@ -601,22 +601,25 @@ static int rz_dmac_config(struct dma_chan *chan, struct rz_dmac_chan *channel = to_rz_dmac_chan(chan); u32 val; - channel->src_per_address = config->src_addr; channel->dst_per_address = config->dst_addr; - - val = rz_dmac_ds_to_val_mapping(config->dst_addr_width); - if (val == CHCFG_DS_INVALID) - return -EINVAL; - channel->chcfg &= ~CHCFG_FILL_DDS_MASK; - channel->chcfg |= FIELD_PREP(CHCFG_FILL_DDS_MASK, val); + if (channel->dst_per_address) { + val = rz_dmac_ds_to_val_mapping(config->dst_addr_width); + if (val == CHCFG_DS_INVALID) + return -EINVAL; - val = rz_dmac_ds_to_val_mapping(config->src_addr_width); - if (val == CHCFG_DS_INVALID) - return -EINVAL; + channel->chcfg |= FIELD_PREP(CHCFG_FILL_DDS_MASK, val); + } + channel->src_per_address = config->src_addr; channel->chcfg &= ~CHCFG_FILL_SDS_MASK; - channel->chcfg |= FIELD_PREP(CHCFG_FILL_SDS_MASK, val); + if (channel->src_per_address) { + val = rz_dmac_ds_to_val_mapping(config->src_addr_width); + if (val == CHCFG_DS_INVALID) + return -EINVAL; + + channel->chcfg |= FIELD_PREP(CHCFG_FILL_SDS_MASK, val); + } return 0; } From patchwork Mon Oct 7 11:02:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 13824454 Received: from mail.zeus03.de (zeus03.de [194.117.254.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 788F71D0F5F for ; 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7 Oct 2024 13:02:17 +0200 Received: by mail.zeus03.de with ESMTPSA (TLS_AES_256_GCM_SHA384 encrypted, authenticated); 7 Oct 2024 13:02:17 +0200 X-UD-Smtp-Session: l3s3148p1@4Wg59OAjuI0gAwDPXxi/APzxl2QXB/xr From: Wolfram Sang To: linux-renesas-soc@vger.kernel.org Cc: Wolfram Sang , Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Biju Das , dmaengine@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v3 2/3] dt-bindings: dma: rz-dmac: Document RZ/A1H SoC Date: Mon, 7 Oct 2024 13:02:02 +0200 Message-ID: <20241007110200.43166-7-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241007110200.43166-5-wsa+renesas@sang-engineering.com> References: <20241007110200.43166-5-wsa+renesas@sang-engineering.com> Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Document the Renesas RZ/A1H DMAC block. This one does not have clocks, resets and power domains. Update the bindings accordingly. Introduce a generic name in the header to make future additions easier. Signed-off-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring (Arm) --- .../bindings/dma/renesas,rz-dmac.yaml | 29 +++++++++++++------ 1 file changed, 20 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml index ca24cf48769f..b356251de5a8 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml @@ -4,18 +4,16 @@ $id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Renesas RZ/{G2L,G2UL,V2L} DMA Controller +title: Renesas RZ DMA Controller maintainers: - Biju Das -allOf: - - $ref: dma-controller.yaml# - properties: compatible: items: - enum: + - renesas,r7s72100-dmac # RZ/A1H - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five - renesas,r9a07g044-dmac # RZ/G2{L,LC} - renesas,r9a07g054-dmac # RZ/V2L @@ -93,13 +91,26 @@ required: - reg - interrupts - interrupt-names - - clocks - - clock-names - '#dma-cells' - dma-channels - - power-domains - - resets - - reset-names + +allOf: + - $ref: dma-controller.yaml# + + - if: + not: + properties: + compatible: + contains: + enum: + - renesas,r7s72100-dmac + then: + required: + - clocks + - clock-names + - power-domains + - resets + - reset-names additionalProperties: false From patchwork Mon Oct 7 11:02:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wolfram Sang X-Patchwork-Id: 13824455 Received: from mail.zeus03.de (zeus03.de [194.117.254.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3DC811D0E26 for ; Mon, 7 Oct 2024 11:02:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=194.117.254.33 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728298947; cv=none; b=oeqzfKop/zj0jzNJadN42WVteib6ISYjR7znkWSa7GN0z7slo5W/DQkvvY3TBqKrtzB+yEVAvKII6uES2uJsMebwGZsQrVJDam3uPSnUXZf2hb1+SOw6UVFQrhm/iFnYG6LNgpPgdECteSpNavZgf9Q/lt5J7ZFF9vJZRAWO65M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728298947; c=relaxed/simple; bh=tsSefAG1drJ9MherB0rybZ+s6dNlPF6B8TGhA1WjoDg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=f+SfZipC6JKISrsGEUEx1vEfY/9NeXNfzo7PFL6nJ5MuB5kDbyv2S7HLXzlMldYjDWX5g/6LqBoVQvfopf8ATxa0WDPkqwrki56FA2hggQpNWUvJuZICy8oSJ0IFj90/xgfbJCyr+zM0OS5xGXUlUbFLqpNocfPnsTYnubq/B1Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com; spf=pass smtp.mailfrom=sang-engineering.com; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b=ZqGrLKZt; arc=none smtp.client-ip=194.117.254.33 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b="ZqGrLKZt" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= sang-engineering.com; h=from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; s=k1; bh=92I6PtsU//avEIYhvLLIyKwYwxt7ynmhANlRB9S+qYU=; b=ZqGrLK ZtUXKSBJhvUwUo/DpKmxdO7RRdAfqA2qSLgIar8S3btVOCVACSPFvxMNYgA8mxD4 vWnDPTJBIlnGp9AFjG8Y8eZeljtzots9HDd6evoZ6MTpxAbuT6vUG8nQIoKY/fj9 0HxNT/RUlKxr11nDViuYv6W3xsO9Cqf+H4j6Yj881KDhlB6FMjFYBNa8Cuk+1xiq DI5ZshGXchtO6xghnNDHwWIDwcyU/sxpvrKE1rzd93curGrCXHQlkvBaXOvdYF0J 8moIA0ge+P4dL/dpS1p7A2O/1vp7sx2t2GYAcD/0p9IU4PBpkY3B+yNNSGB2rIEf PY3CGPoDhDho3oOw== Received: (qmail 100865 invoked from network); 7 Oct 2024 13:02:18 +0200 Received: by mail.zeus03.de with ESMTPSA (TLS_AES_256_GCM_SHA384 encrypted, authenticated); 7 Oct 2024 13:02:18 +0200 X-UD-Smtp-Session: l3s3148p1@q0xG9OAjxI0gAwDPXxi/APzxl2QXB/xr From: Wolfram Sang To: linux-renesas-soc@vger.kernel.org Cc: Wolfram Sang , Philipp Zabel , Geert Uytterhoeven , Vinod Koul , dmaengine@vger.kernel.org Subject: [PATCH v3 3/3] dmaengine: sh: rz-dmac: add r7s72100 support Date: Mon, 7 Oct 2024 13:02:03 +0200 Message-ID: <20241007110200.43166-8-wsa+renesas@sang-engineering.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20241007110200.43166-5-wsa+renesas@sang-engineering.com> References: <20241007110200.43166-5-wsa+renesas@sang-engineering.com> Precedence: bulk X-Mailing-List: dmaengine@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 This SoC needs to make getting resets optional. Descriptions are reworded to be more generic. Signed-off-by: Wolfram Sang Reviewed-by: Philipp Zabel Reviewed-by: Geert Uytterhoeven --- drivers/dma/sh/Kconfig | 8 ++++---- drivers/dma/sh/rz-dmac.c | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/dma/sh/Kconfig b/drivers/dma/sh/Kconfig index c0b2997ab7fd..6ea5a880b433 100644 --- a/drivers/dma/sh/Kconfig +++ b/drivers/dma/sh/Kconfig @@ -49,10 +49,10 @@ config RENESAS_USB_DMAC SoCs. config RZ_DMAC - tristate "Renesas RZ/{G2L,V2L} DMA Controller" - depends on ARCH_RZG2L || COMPILE_TEST + tristate "Renesas RZ DMA Controller" + depends on ARCH_R7S72100 || ARCH_RZG2L || COMPILE_TEST select RENESAS_DMA select DMA_VIRTUAL_CHANNELS help - This driver supports the general purpose DMA controller found in the - Renesas RZ/{G2L,V2L} SoC variants. + This driver supports the general purpose DMA controller typically + found in the Renesas RZ SoC variants. diff --git a/drivers/dma/sh/rz-dmac.c b/drivers/dma/sh/rz-dmac.c index 811389fc9cb8..03f3f99f0f4a 100644 --- a/drivers/dma/sh/rz-dmac.c +++ b/drivers/dma/sh/rz-dmac.c @@ -893,7 +893,7 @@ static int rz_dmac_probe(struct platform_device *pdev) /* Initialize the channels. */ INIT_LIST_HEAD(&dmac->engine.channels); - dmac->rstc = devm_reset_control_array_get_exclusive(&pdev->dev); + dmac->rstc = devm_reset_control_array_get_optional_exclusive(&pdev->dev); if (IS_ERR(dmac->rstc)) return dev_err_probe(&pdev->dev, PTR_ERR(dmac->rstc), "failed to get resets\n");