From patchwork Fri Oct 11 10:32:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raag Jadav X-Patchwork-Id: 13832351 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EF5F1CFD316 for ; Fri, 11 Oct 2024 10:34:02 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8FB2E10EAAC; Fri, 11 Oct 2024 10:34:02 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="buGZs9iR"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id A899A10EAAC for ; Fri, 11 Oct 2024 10:34:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728642842; x=1760178842; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=mhqTgLHyDyyJDMlyBznGqDXf1qK6DGNPMcf6jqtYtsM=; b=buGZs9iRABDQaFaOaN8RxFzeMVyVGP+TUNHXcbjtjT+hON/TknxC2Xg6 /DTbpOOK16eyK5EEKvvtwG26a0qX+nuHTMjYoqrOrtdiuBv4KPyX5GDMR 5QOoo942Y+SsRdV6ds/jeueLbTJkBf0VU3RIY0KTezJi0I6oa1JPzftXT W+2aw3N3nDxkflvUeA+0UA5rX5Bw3v6UJQilOh5T2nZw4uFvMNEQSkyVK izOF97wXUEiTcWd6Z7d99/FCbXBwECwlPjcSEgOM4gtjjdgdzoA8Uv8aM khGzdRepvHABz6FVFDoCL7/H4zlIJVi1pxy33MNjLa4g++1Q+PPuzbJNt g==; X-CSE-ConnectionGUID: 1NUlngzESFulMM2/Biwf1g== X-CSE-MsgGUID: a6uuQSAUSn+D0imDAmkwBg== X-IronPort-AV: E=McAfee;i="6700,10204,11221"; a="38619594" X-IronPort-AV: E=Sophos;i="6.11,195,1725346800"; d="scan'208";a="38619594" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Oct 2024 03:34:01 -0700 X-CSE-ConnectionGUID: ekF6Mvs/QSevpGyQfvlNRA== X-CSE-MsgGUID: PViaqxgWQ/qIX3PgZ90Jcw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,195,1725346800"; d="scan'208";a="77341115" Received: from jraag-nuc8i7beh.iind.intel.com ([10.145.169.79]) by orviesa007.jf.intel.com with ESMTP; 11 Oct 2024 03:33:59 -0700 From: Raag Jadav To: jani.nikula@linux.intel.com, joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com, matthew.d.roper@intel.com, andi.shyti@linux.intel.com Cc: intel-gfx@lists.freedesktop.org, anshuman.gupta@intel.com, badal.nilawar@intel.com, riana.tauro@intel.com, Raag Jadav Subject: [PATCH v2 1/4] drm/i915/pciids: Refactor DG2 PCI IDs into workaround ranges Date: Fri, 11 Oct 2024 16:02:47 +0530 Message-Id: <20241011103250.1035316-2-raag.jadav@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241011103250.1035316-1-raag.jadav@intel.com> References: <20241011103250.1035316-1-raag.jadav@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Refactor DG2 PCI IDs into device ranges that will be used in a workaround. Signed-off-by: Raag Jadav --- include/drm/intel/i915_pciids.h | 34 +++++++++++++++++++++++---------- 1 file changed, 24 insertions(+), 10 deletions(-) diff --git a/include/drm/intel/i915_pciids.h b/include/drm/intel/i915_pciids.h index 2bf03ebfcf73..82f960f625c7 100644 --- a/include/drm/intel/i915_pciids.h +++ b/include/drm/intel/i915_pciids.h @@ -724,37 +724,51 @@ MACRO__(0xA7AB, ## __VA_ARGS__) /* DG2 */ +#define INTEL_DG2_G10_WA_IDS(MACRO__, ...) \ + MACRO__(0x56A0, ## __VA_ARGS__), \ + MACRO__(0x56A1, ## __VA_ARGS__), \ + MACRO__(0x56A2, ## __VA_ARGS__) + #define INTEL_DG2_G10_IDS(MACRO__, ...) \ + INTEL_DG2_G10_WA_IDS(MACRO__, ## __VA_ARGS__), \ MACRO__(0x5690, ## __VA_ARGS__), \ MACRO__(0x5691, ## __VA_ARGS__), \ MACRO__(0x5692, ## __VA_ARGS__), \ - MACRO__(0x56A0, ## __VA_ARGS__), \ - MACRO__(0x56A1, ## __VA_ARGS__), \ - MACRO__(0x56A2, ## __VA_ARGS__), \ MACRO__(0x56BE, ## __VA_ARGS__), \ MACRO__(0x56BF, ## __VA_ARGS__) +#define INTEL_DG2_G11_WA_IDS(MACRO__, ...) \ + MACRO__(0x56A5, ## __VA_ARGS__), \ + MACRO__(0x56A6, ## __VA_ARGS__), \ + MACRO__(0x56B0, ## __VA_ARGS__), \ + MACRO__(0x56B1, ## __VA_ARGS__) + #define INTEL_DG2_G11_IDS(MACRO__, ...) \ + INTEL_DG2_G11_WA_IDS(MACRO__, ## __VA_ARGS__), \ MACRO__(0x5693, ## __VA_ARGS__), \ MACRO__(0x5694, ## __VA_ARGS__), \ MACRO__(0x5695, ## __VA_ARGS__), \ - MACRO__(0x56A5, ## __VA_ARGS__), \ - MACRO__(0x56A6, ## __VA_ARGS__), \ - MACRO__(0x56B0, ## __VA_ARGS__), \ - MACRO__(0x56B1, ## __VA_ARGS__), \ MACRO__(0x56BA, ## __VA_ARGS__), \ MACRO__(0x56BB, ## __VA_ARGS__), \ MACRO__(0x56BC, ## __VA_ARGS__), \ MACRO__(0x56BD, ## __VA_ARGS__) -#define INTEL_DG2_G12_IDS(MACRO__, ...) \ - MACRO__(0x5696, ## __VA_ARGS__), \ - MACRO__(0x5697, ## __VA_ARGS__), \ +#define INTEL_DG2_G12_WA_IDS(MACRO__, ...) \ MACRO__(0x56A3, ## __VA_ARGS__), \ MACRO__(0x56A4, ## __VA_ARGS__), \ MACRO__(0x56B2, ## __VA_ARGS__), \ MACRO__(0x56B3, ## __VA_ARGS__) +#define INTEL_DG2_G12_IDS(MACRO__, ...) \ + INTEL_DG2_G11_WA_IDS(MACRO__, ## __VA_ARGS__), \ + MACRO__(0x5696, ## __VA_ARGS__), \ + MACRO__(0x5697, ## __VA_ARGS__) + +#define INTEL_DG2_WA_IDS(MACRO__, ...) \ + INTEL_DG2_G10_WA_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G11_WA_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G12_WA_IDS(MACRO__, ## __VA_ARGS__) + #define INTEL_DG2_IDS(MACRO__, ...) \ INTEL_DG2_G10_IDS(MACRO__, ## __VA_ARGS__), \ INTEL_DG2_G11_IDS(MACRO__, ## __VA_ARGS__), \ From patchwork Fri Oct 11 10:32:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raag Jadav X-Patchwork-Id: 13832352 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 08049CFD31D for ; Fri, 11 Oct 2024 10:34:07 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id A211A10EAAE; Fri, 11 Oct 2024 10:34:06 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="gmdZsNHZ"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3B61E10EAB0 for ; Fri, 11 Oct 2024 10:34:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728642845; x=1760178845; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=ZQeJJrVry6nVF6vfSHiIIgyZpY1u5m9+7pMjfaBJKzQ=; b=gmdZsNHZTL7if2blQmz2BuUt2rauNx98O83uM36KWMFrWT28MT6ns3aX 2KFT4zn8dBXNNx5S+CNy8xBHS1x+nsK5hN9oVtdYcUWB/OKMgbdgWBLZg Y5VTnuszsrA0ei/s3UMYBvzFjD9qjiISq0Nl0muJs/YmbMOrHnSJWEI6m 6nN20Br5oCHB0/fKeqG6hUGJS+ucMTF2epoV/iQdreVGHo9oz+sAszChn BJrAjp8yFrddQXiqGI0ISIvvkIroWp2VCOl5Z0vcEYxb/d9IrJ7535Jqz zEjHdgIOmy3OP6aoOODTOIlOXwYyNE9VMHRWscrBU/WMNrGiaYJbpUL/Z A==; X-CSE-ConnectionGUID: 2IAknriPSu2qTRD0pCUBDQ== X-CSE-MsgGUID: KafLBGbQTBmEMFCUzPAHKA== X-IronPort-AV: E=McAfee;i="6700,10204,11221"; a="38619599" X-IronPort-AV: E=Sophos;i="6.11,195,1725346800"; d="scan'208";a="38619599" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Oct 2024 03:34:05 -0700 X-CSE-ConnectionGUID: tBi4MO6MT7y/3UmNL3BiCA== X-CSE-MsgGUID: 7GRrU40OSdWZfMcpqO5JcQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,195,1725346800"; d="scan'208";a="77341122" Received: from jraag-nuc8i7beh.iind.intel.com ([10.145.169.79]) by orviesa007.jf.intel.com with ESMTP; 11 Oct 2024 03:34:02 -0700 From: Raag Jadav To: jani.nikula@linux.intel.com, joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com, matthew.d.roper@intel.com, andi.shyti@linux.intel.com Cc: intel-gfx@lists.freedesktop.org, anshuman.gupta@intel.com, badal.nilawar@intel.com, riana.tauro@intel.com, Raag Jadav Subject: [PATCH v2 2/4] drm/i915/dg2: Introduce DG2_WA subplatform Date: Fri, 11 Oct 2024 16:02:48 +0530 Message-Id: <20241011103250.1035316-3-raag.jadav@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241011103250.1035316-1-raag.jadav@intel.com> References: <20241011103250.1035316-1-raag.jadav@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Introduce DG2_WA subplatform for the devices that will be used in a workaround and span across multiple DG2 subplatforms. Signed-off-by: Raag Jadav --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_device_info.c | 34 +++++++++++++++++------- drivers/gpu/drm/i915/intel_device_info.h | 5 +++- 3 files changed, 31 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 39f6614a0a99..0a68cd9379e8 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -548,6 +548,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G11) #define IS_DG2_G12(i915) \ IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G12) +#define IS_DG2_WA(i915) \ + IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_WA) #define IS_RAPTORLAKE_S(i915) \ IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_S, INTEL_SUBPLATFORM_RPL) #define IS_ALDERLAKE_P_N(i915) \ diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 3c47c625993e..674ab2a4d75e 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -200,6 +200,15 @@ static const u16 subplatform_g12_ids[] = { INTEL_DG2_G12_IDS(ID), }; +static const u16 subplatform_dg2_wa_ids[] = { + INTEL_DG2_WA_IDS(ID), +}; + +static const u16 subplatform_dg2_ids[] = { + INTEL_DG2_IDS(ID), + INTEL_ATS_M_IDS(ID), +}; + static const u16 subplatform_arl_ids[] = { INTEL_ARL_IDS(ID), }; @@ -252,15 +261,22 @@ static void intel_device_info_subplatform_init(struct drm_i915_private *i915) if (find_devid(devid, subplatform_rplu_ids, ARRAY_SIZE(subplatform_rplu_ids))) mask |= BIT(INTEL_SUBPLATFORM_RPLU); - } else if (find_devid(devid, subplatform_g10_ids, - ARRAY_SIZE(subplatform_g10_ids))) { - mask = BIT(INTEL_SUBPLATFORM_G10); - } else if (find_devid(devid, subplatform_g11_ids, - ARRAY_SIZE(subplatform_g11_ids))) { - mask = BIT(INTEL_SUBPLATFORM_G11); - } else if (find_devid(devid, subplatform_g12_ids, - ARRAY_SIZE(subplatform_g12_ids))) { - mask = BIT(INTEL_SUBPLATFORM_G12); + } else if (find_devid(devid, subplatform_dg2_ids, + ARRAY_SIZE(subplatform_dg2_ids))) { + if (find_devid(devid, subplatform_g10_ids, + ARRAY_SIZE(subplatform_g10_ids))) + mask = BIT(INTEL_SUBPLATFORM_G10); + else if (find_devid(devid, subplatform_g11_ids, + ARRAY_SIZE(subplatform_g11_ids))) + mask = BIT(INTEL_SUBPLATFORM_G11); + else if (find_devid(devid, subplatform_g12_ids, + ARRAY_SIZE(subplatform_g12_ids))) + mask = BIT(INTEL_SUBPLATFORM_G12); + + /* DG2 WA ids span across multiple subplatforms */ + if (find_devid(devid, subplatform_dg2_wa_ids, + ARRAY_SIZE(subplatform_dg2_wa_ids))) + mask |= BIT(INTEL_SUBPLATFORM_WA); } else if (find_devid(devid, subplatform_arl_ids, ARRAY_SIZE(subplatform_arl_ids))) { mask = BIT(INTEL_SUBPLATFORM_ARL); diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index 643ff1bf74ee..c3623e859c78 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -95,9 +95,11 @@ enum intel_platform { /* * Subplatform bits share the same namespace per parent platform. In other words * it is fine for the same bit to be used on multiple parent platforms. + * Devices can belong to multiple subplatforms if needed, so it's possible to set + * multiple bits for same device. */ -#define INTEL_SUBPLATFORM_BITS (3) +#define INTEL_SUBPLATFORM_BITS (4) #define INTEL_SUBPLATFORM_MASK (BIT(INTEL_SUBPLATFORM_BITS) - 1) /* HSW/BDW/SKL/KBL/CFL */ @@ -114,6 +116,7 @@ enum intel_platform { #define INTEL_SUBPLATFORM_G10 0 #define INTEL_SUBPLATFORM_G11 1 #define INTEL_SUBPLATFORM_G12 2 +#define INTEL_SUBPLATFORM_WA 3 /* ADL */ #define INTEL_SUBPLATFORM_RPL 0 From patchwork Fri Oct 11 10:32:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Raag Jadav X-Patchwork-Id: 13832353 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DF989CFD31D for ; Fri, 11 Oct 2024 10:34:10 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 8B5D910EAB1; Fri, 11 Oct 2024 10:34:10 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="BNS0Ul/7"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3558D10EAB1 for ; Fri, 11 Oct 2024 10:34:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728642849; x=1760178849; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YTcVZrAT1FxQ7qtx2cxZxjcnXZxA7kZR8k5nUeRJwFs=; b=BNS0Ul/7ULyYxEnoHelSSaEcXdOOigTM2Dv/o0mDF54NBzrOTk0KilsK DLy0p2DJcG6AfZtV5PWhRemyyI1cxyBVSx5IjRzYh3Q37H74zZ5CDfAm8 U+0B7UnSjsv5J51QCy7GZeoYjK7HAgfD9tnp1geX0nx66Zi2iHxlDs9ir svUb7EsP11xjS3J8fpKTLHCC8FGVvgWPdIN8RthVmiO+8bQnN0Lhlgl4H /BSiib+CbHgQGCYYZCDP4i+JPbtSw19xxbI8Krpjcs9tyhSwhnw8ryAhr qm57MKiY+gl/vBsfBXRmxyhU5qhMH4aSS9bEJMyz1Y8Z9H6Dvjj0B4vyN g==; X-CSE-ConnectionGUID: oMxKZ0LySVqus92qKax7Ww== X-CSE-MsgGUID: y8u+AZa6RbSfjjyHP8RCIA== X-IronPort-AV: E=McAfee;i="6700,10204,11221"; a="38619604" X-IronPort-AV: E=Sophos;i="6.11,195,1725346800"; d="scan'208";a="38619604" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Oct 2024 03:34:09 -0700 X-CSE-ConnectionGUID: FApeP7XsTgahWNYsBkUCsg== X-CSE-MsgGUID: H0Ew3FQkRUClt8qqOq5ptg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,195,1725346800"; d="scan'208";a="77341126" Received: from jraag-nuc8i7beh.iind.intel.com ([10.145.169.79]) by orviesa007.jf.intel.com with ESMTP; 11 Oct 2024 03:34:06 -0700 From: Raag Jadav To: jani.nikula@linux.intel.com, joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com, matthew.d.roper@intel.com, andi.shyti@linux.intel.com Cc: intel-gfx@lists.freedesktop.org, anshuman.gupta@intel.com, badal.nilawar@intel.com, riana.tauro@intel.com, Raag Jadav Subject: [PATCH v2 3/4] drm/i915/wa: Introduce intel_wa_cpu.c for CPU specific workarounds Date: Fri, 11 Oct 2024 16:02:49 +0530 Message-Id: <20241011103250.1035316-4-raag.jadav@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241011103250.1035316-1-raag.jadav@intel.com> References: <20241011103250.1035316-1-raag.jadav@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Having similar naming convention in intel-family.h and intel_device_info.h results in redefinition of a few platforms. Define CPU IDs in its own file to avoid this. Signed-off-by: Raag Jadav --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/gt/intel_wa_cpu.c | 34 +++++++++++++++++++++ drivers/gpu/drm/i915/gt/intel_workarounds.h | 2 ++ 3 files changed, 37 insertions(+) create mode 100644 drivers/gpu/drm/i915/gt/intel_wa_cpu.c diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index c63fa2133ccb..1f9b503ab976 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -121,6 +121,7 @@ gt-y += \ gt/intel_timeline.o \ gt/intel_tlb.o \ gt/intel_wopcm.o \ + gt/intel_wa_cpu.o \ gt/intel_workarounds.o \ gt/shmem_utils.o \ gt/sysfs_engines.o diff --git a/drivers/gpu/drm/i915/gt/intel_wa_cpu.c b/drivers/gpu/drm/i915/gt/intel_wa_cpu.c new file mode 100644 index 000000000000..cbdab13e9db6 --- /dev/null +++ b/drivers/gpu/drm/i915/gt/intel_wa_cpu.c @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2024 Intel Corporation + * + * This file is introduced to avoid platform redefinition from + * intel_device_info.h :( + */ + +#include "intel_workarounds.h" + +#ifdef CONFIG_X86 +#include +#include + +static const struct x86_cpu_id wa_cpu_ids[] = { + X86_MATCH_VFM(INTEL_ALDERLAKE, NULL), + X86_MATCH_VFM(INTEL_ALDERLAKE_L, NULL), + X86_MATCH_VFM(INTEL_COMETLAKE, NULL), + X86_MATCH_VFM(INTEL_KABYLAKE, NULL), + X86_MATCH_VFM(INTEL_KABYLAKE_L, NULL), + X86_MATCH_VFM(INTEL_RAPTORLAKE, NULL), + X86_MATCH_VFM(INTEL_RAPTORLAKE_P, NULL), + X86_MATCH_VFM(INTEL_RAPTORLAKE_S, NULL), + X86_MATCH_VFM(INTEL_ROCKETLAKE, NULL), + {} +}; + +bool intel_match_wa_cpu(void) +{ + return x86_match_cpu(wa_cpu_ids); +} +#else +bool intel_match_wa_cpu(void) { return false; } +#endif diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.h b/drivers/gpu/drm/i915/gt/intel_workarounds.h index 9beaab77c7f0..12f24fb31363 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.h +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.h @@ -21,6 +21,8 @@ static inline void intel_wa_list_free(struct i915_wa_list *wal) memset(wal, 0, sizeof(*wal)); } +bool intel_match_wa_cpu(void); + void intel_engine_init_ctx_wa(struct intel_engine_cs *engine); int intel_engine_emit_ctx_wa(struct i915_request *rq); From patchwork Fri Oct 11 10:32:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Raag Jadav X-Patchwork-Id: 13832354 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 921B7CFD316 for ; Fri, 11 Oct 2024 10:34:13 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4071F10EAB2; Fri, 11 Oct 2024 10:34:13 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Rh3rz2E1"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 7A2EC10EAB2 for ; Fri, 11 Oct 2024 10:34:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1728642852; x=1760178852; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RHuPy1XFzq+aHYz9w1R1x2SAacRrvE4130JQZ2Snnnw=; b=Rh3rz2E1YOdbGRg2XIFV47wO4krmrHrIRYDl5Q5QvhQp7Ty+ztR8/eQO 7KWaqqz+wwvTH0Ei3NlUNYoT2XtPaTqbm9yggTkqxx02ARA2FN7tpleua DKo0HL0BTOvJ296hx28T6uHSghD6xXvQFXPTXaVhCgPERfjk85rI8NDQv HulxeOipWtnM1jP5h7bl+yM+/uoTGSUcWy+x+gQ+U6jnj4reqw4A+wdDH VjVF28VciMsFjjQO+KIo7L/gHp2XFC47MPA6ZJPgUPFvgJM5XQy3lkAvj hEN0j/dcHOKHy1k105Kg6HSnYofIYNuMHyc0kgGfsWINdcjLUaOi75Le9 Q==; X-CSE-ConnectionGUID: 1tPHjM9yTjqKfenesvVVCA== X-CSE-MsgGUID: ygpNL94FSd2NBiD5l0FAcA== X-IronPort-AV: E=McAfee;i="6700,10204,11221"; a="38619609" X-IronPort-AV: E=Sophos;i="6.11,195,1725346800"; d="scan'208";a="38619609" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Oct 2024 03:34:12 -0700 X-CSE-ConnectionGUID: fgtQjqv1SlqVv7IlaPQ+Mw== X-CSE-MsgGUID: cL74FHLlRcisW1LI+kzz4Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,195,1725346800"; d="scan'208";a="77341130" Received: from jraag-nuc8i7beh.iind.intel.com ([10.145.169.79]) by orviesa007.jf.intel.com with ESMTP; 11 Oct 2024 03:34:10 -0700 From: Raag Jadav To: jani.nikula@linux.intel.com, joonas.lahtinen@linux.intel.com, rodrigo.vivi@intel.com, matthew.d.roper@intel.com, andi.shyti@linux.intel.com Cc: intel-gfx@lists.freedesktop.org, anshuman.gupta@intel.com, badal.nilawar@intel.com, riana.tauro@intel.com, Raag Jadav Subject: [PATCH v2 4/4] drm/i915/dg2: Implement Wa_14022698537 Date: Fri, 11 Oct 2024 16:02:50 +0530 Message-Id: <20241011103250.1035316-5-raag.jadav@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241011103250.1035316-1-raag.jadav@intel.com> References: <20241011103250.1035316-1-raag.jadav@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" G8 power state entry is disabled due to a limitation on DG2, so we enable it from driver with Wa_14022698537. Fow now we enable it for all DG2 devices with the exception of a few, for which, we enable only when paired with whitelisted CPU models. v2: Fix Wa_ID and include it in subject (Badal) Rephrase commit message (Jani) Signed-off-by: Raag Jadav --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 18 ++++++++++++++++++ drivers/gpu/drm/i915/i915_reg.h | 1 + 2 files changed, 19 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index e539a656cfc3..bcd7630c1631 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -14,6 +14,7 @@ #include "intel_gt_mcr.h" #include "intel_gt_print.h" #include "intel_gt_regs.h" +#include "intel_pcode.h" #include "intel_ring.h" #include "intel_workarounds.h" @@ -1770,9 +1771,26 @@ static void wa_list_apply(const struct i915_wa_list *wal) intel_gt_mcr_unlock(gt, flags); } +/* Wa_14022698537:dg2 */ +static void intel_enable_g8(struct intel_uncore *uncore) +{ + struct drm_i915_private *i915 = uncore->i915; + + if (IS_DG2(i915)) { + if (IS_DG2_WA(i915) && !intel_match_wa_cpu()) + return; + + snb_pcode_write_p(uncore, PCODE_POWER_SETUP, + POWER_SETUP_SUBCOMMAND_G8_ENABLE, 0, 0); + } +} + void intel_gt_apply_workarounds(struct intel_gt *gt) { wa_list_apply(>->wa_list); + + /* Special case for pcode mailbox which can't be on wa_list */ + intel_enable_g8(gt->uncore); } static bool wa_list_verify(struct intel_gt *gt, diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 41f4350a7c6c..e948b194550c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3568,6 +3568,7 @@ #define PCODE_POWER_SETUP 0x7C #define POWER_SETUP_SUBCOMMAND_READ_I1 0x4 #define POWER_SETUP_SUBCOMMAND_WRITE_I1 0x5 +#define POWER_SETUP_SUBCOMMAND_G8_ENABLE 0x6 #define POWER_SETUP_I1_WATTS REG_BIT(31) #define POWER_SETUP_I1_SHIFT 6 /* 10.6 fixed point format */ #define POWER_SETUP_I1_DATA_MASK REG_GENMASK(15, 0)