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[2.200.173.220]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a99a80efe57sm308258366b.188.2024.10.12.02.54.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Oct 2024 02:54:22 -0700 (PDT) From: Jonas Gorski Date: Sat, 12 Oct 2024 11:53:35 +0200 Subject: [PATCH 1/6] spi: fix return code when spi device has too many chipselects Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241012-spi_multi_cs_cleanup-v1-1-dc491113880d@gmail.com> References: <20241012-spi_multi_cs_cleanup-v1-0-dc491113880d@gmail.com> In-Reply-To: <20241012-spi_multi_cs_cleanup-v1-0-dc491113880d@gmail.com> To: Mark Brown , Amit Kumar Mahapatra Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 Don't return a positive value when there are too many chipselects. Fixes: 4d8ff6b0991d ("spi: Add multi-cs memories support in SPI core") Signed-off-by: Jonas Gorski --- drivers/spi/spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 7c5e76b154212585af1c3893005cb353a0eaeafc..ab38978e9c58517bb671d7bda017c8550cc82d58 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -2452,7 +2452,7 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, if (rc > ctlr->num_chipselect) { dev_err(&ctlr->dev, "%pOF has number of CS > ctlr->num_chipselect (%d)\n", nc, rc); - return rc; + return -EINVAL; } if ((of_property_read_bool(nc, "parallel-memories")) && (!(ctlr->flags & SPI_CONTROLLER_MULTI_CS))) { From patchwork Sat Oct 12 09:53:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Gorski X-Patchwork-Id: 13834096 Received: from mail-ej1-f47.google.com (mail-ej1-f47.google.com [209.85.218.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8F5F614F9CF; Sat, 12 Oct 2024 09:54:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728726867; cv=none; b=EFm452PAvxzSwxBstIIPwGjnthDPxYRczda//8QgPWkEHa4ojkcFXfVlZOa3tFcTV4vXTqqsTlKW+bKeo7U4xqA1spz+uVO16dbbgKtIdiaRGCkTR8D5UYlm6obfPsS09aDQLGkQ0RVj5G1VnZnUPhwWtiTuXv3YYjM10q+FTys= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728726867; c=relaxed/simple; bh=fctVUFgjURSsjGlyDkemHSFEutnocSZ1gDP17Fsw6Yo=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=fNEh5bHU/s0XCrd8vww02XcXmtTSIyBmdoTj4bSnZSszPDG0HPT+H/eelZC7vNC8y3I04C80fIJTu3BjK1pBEVS5p4qbiL3XI7/SG3YVAzk/ql7LGmIkuPacbR1WJIyaQyUvL7OqWcE8PHs7hrWxP0Cx3ZfoDS8xUPz7nrbr9cE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=gXu2z9sG; arc=none smtp.client-ip=209.85.218.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="gXu2z9sG" Received: by mail-ej1-f47.google.com with SMTP id a640c23a62f3a-a99f3a5a44cso20498066b.3; Sat, 12 Oct 2024 02:54:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1728726864; x=1729331664; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=PIqunMSrCwkf+DyWUK239/3d0MJnoZNJjh6FmyYnDTM=; b=gXu2z9sG5yoTPuK3/Sq0kvOnpdgf89pkCSTVl6M+8YDufYf7PDrUFFHkXDhicq3uB1 4yJbpabbYMrkKlR0cSx2Yq9R6lUgRJqnlzLaEjmgguWBqgNHSgbdxdT5VFce6cwV+Ywy sqq4N0nJz84fdj3rhEdkwvH6KlYGmWNsfn75OUWNl/+XGDeh28P2FSlW6Zj05q9QB+F7 UKMOLk/x0ELLRh8/BbT01Bh4jpzNWA7tWSsZ4Gj0KQS8PBLo7g99clqwHAACUOyIbrhP 8MwR1CM6pTjMy7hlmesJ02qGbNiZfVRsT6GyvUesxQrydkllWZmNWVAYeVZIyJjFrODp 0C2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728726864; x=1729331664; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PIqunMSrCwkf+DyWUK239/3d0MJnoZNJjh6FmyYnDTM=; b=XQQqW1ghTYyoXC2FdjpIJixY+Ek4oCWe3ChqSzsSM+Pk2q79NRFk9D2hGegQG86wkv 5G8UoFMY/Ylxe6cwjTY7uTRW5i5/6h+pJtOPeilYsCJUW//VK1VuGh7u1xhJJfXR7evo IqCRlcVxrJbjIytoVIiTsjYL+/tIjzd744P3OAGpeelTkR9SCPQMMLIN4RJNr5iEy9TE AdjWidrhA2GY+Ar3UTLI0iqmLIa1qK9ZLfBKTYDox7VGMH1oc5Am9Hub3mlR8J9UWEnX Eykc2d01WNI/m3pkBGBOVlpqvL9Juiy3ZBb+XEhIB3Ow7+rnYv44NW2RotqjSj6VeLje SPMg== X-Forwarded-Encrypted: i=1; AJvYcCWGnpgZ+hy4TxGW3O8I/XKzdXnlz/bmvnqso/1TqumxZnRDKV3R/W7KCmC8A9+xdp5GzY8yS80VWr43qtA=@vger.kernel.org X-Gm-Message-State: AOJu0Yw9Zh9xpwF1DQlj1yo7XkVKP5WyoKU6Z28RhpQ1M/VuZP77voe6 juCQ3M467KulvTchoqM+BsNtr3yFe6Az5NDSnWmQ1FleLoG04sx/QvMi62XA2Gg= X-Google-Smtp-Source: AGHT+IHllUVcysEuC9LWDHgZzH7JRql+CETS/pVf3Ld/eGK6TRuDveJ53z+sNFDAHwksiBIKE3oDDA== X-Received: by 2002:a17:907:1b24:b0:a99:c9a4:a4d5 with SMTP id a640c23a62f3a-a99c9a4b7b6mr385576766b.29.1728726863775; Sat, 12 Oct 2024 02:54:23 -0700 (PDT) Received: from localhost (dslb-002-200-173-220.002.200.pools.vodafone-ip.de. [2.200.173.220]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a99a80bfc5esm309314766b.142.2024.10.12.02.54.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Oct 2024 02:54:23 -0700 (PDT) From: Jonas Gorski Date: Sat, 12 Oct 2024 11:53:36 +0200 Subject: [PATCH 2/6] spi: keep track of number of chipselects in spi_device Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241012-spi_multi_cs_cleanup-v1-2-dc491113880d@gmail.com> References: <20241012-spi_multi_cs_cleanup-v1-0-dc491113880d@gmail.com> In-Reply-To: <20241012-spi_multi_cs_cleanup-v1-0-dc491113880d@gmail.com> To: Mark Brown , Amit Kumar Mahapatra Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 There are several places where we need to iterate over a device's chipselect. To be able to do it efficiently, store the number of chipselects in spi_device, like we do for controllers. Since we now use a device supplied value, add a check to make sure it isn't more than we can support. Signed-off-by: Jonas Gorski --- drivers/spi/spi.c | 29 +++++++++++++++++++++-------- include/linux/spi/spi.h | 4 +++- 2 files changed, 24 insertions(+), 9 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index ab38978e9c58517bb671d7bda017c8550cc82d58..15b2f4e02a685b2c778b27473289197ab08987d8 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -587,6 +587,7 @@ struct spi_device *spi_alloc_device(struct spi_controller *ctlr) spi->dev.bus = &spi_bus_type; spi->dev.release = spidev_release; spi->mode = ctlr->buswidth_override_bits; + spi->num_chipselect = 1; device_initialize(&spi->dev); return spi; @@ -636,7 +637,7 @@ static inline int spi_dev_check_cs(struct device *dev, u8 idx_new; cs = spi_get_chipselect(spi, idx); - for (idx_new = new_idx; idx_new < SPI_CS_CNT_MAX; idx_new++) { + for (idx_new = new_idx; idx_new < new_spi->num_chipselect; idx_new++) { cs_new = spi_get_chipselect(new_spi, idx_new); if (is_valid_cs(cs) && is_valid_cs(cs_new) && cs == cs_new) { dev_err(dev, "chipselect %u already in use\n", cs_new); @@ -653,7 +654,7 @@ static int spi_dev_check(struct device *dev, void *data) int status, idx; if (spi->controller == new_spi->controller) { - for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) { + for (idx = 0; idx < spi->num_chipselect; idx++) { status = spi_dev_check_cs(dev, spi, idx, new_spi, 0); if (status) return status; @@ -675,7 +676,13 @@ static int __spi_add_device(struct spi_device *spi) int status, idx; u8 cs; - for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) { + if (spi->num_chipselect > SPI_CS_CNT_MAX) { + dev_err(dev, "num_cs %d > max %d\n", spi->num_chipselect, + SPI_CS_CNT_MAX); + return -EOVERFLOW; + } + + for (idx = 0; idx < spi->num_chipselect; idx++) { /* Chipselects are numbered 0..max; validate. */ cs = spi_get_chipselect(spi, idx); if (is_valid_cs(cs) && cs >= ctlr->num_chipselect) { @@ -690,7 +697,7 @@ static int __spi_add_device(struct spi_device *spi) * For example, spi->chip_select[0] != spi->chip_select[1] and so on. */ if (!spi_controller_is_target(ctlr)) { - for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) { + for (idx = 0; idx < spi->num_chipselect; idx++) { status = spi_dev_check_cs(dev, spi, idx, spi, idx + 1); if (status) return status; @@ -718,7 +725,7 @@ static int __spi_add_device(struct spi_device *spi) if (ctlr->cs_gpiods) { u8 cs; - for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) { + for (idx = 0; idx < spi->num_chipselect; idx++) { cs = spi_get_chipselect(spi, idx); if (is_valid_cs(cs)) spi_set_csgpiod(spi, idx, ctlr->cs_gpiods[cs]); @@ -1025,7 +1032,7 @@ static void spi_res_release(struct spi_controller *ctlr, struct spi_message *mes /*-------------------------------------------------------------------------*/ #define spi_for_each_valid_cs(spi, idx) \ - for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) \ + for (idx = 0; idx < spi->num_chipselect; idx++) \ if (!(spi->cs_index_mask & BIT(idx))) {} else static inline bool spi_is_last_cs(struct spi_device *spi) @@ -1083,8 +1090,12 @@ static void spi_set_cs(struct spi_device *spi, bool enable, bool force) trace_spi_set_cs(spi, activate); spi->controller->last_cs_index_mask = spi->cs_index_mask; - for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) - spi->controller->last_cs[idx] = enable ? spi_get_chipselect(spi, 0) : SPI_INVALID_CS; + for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) { + if (enable && idx < spi->num_chipselect) + spi->controller->last_cs[idx] = spi_get_chipselect(spi, 0); + else + spi->controller->last_cs[idx] = SPI_INVALID_CS; + } spi->controller->last_cs_mode_high = spi->mode & SPI_CS_HIGH; if (spi->mode & SPI_CS_HIGH) @@ -2459,6 +2470,8 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, dev_err(&ctlr->dev, "SPI controller doesn't support multi CS\n"); return -EINVAL; } + + spi->num_chipselect = rc; for (idx = 0; idx < rc; idx++) spi_set_chipselect(spi, idx, cs[idx]); diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 8497f4747e24d4ecd85b74f49609ac1c82c73535..77511c7d40df7085644cecaae325c982fb306afa 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -136,6 +136,7 @@ extern void spi_transfer_cs_change_delay_exec(struct spi_message *msg, * The spi_transfer.speed_hz can override this for each transfer. * @chip_select: Array of physical chipselect, spi->chipselect[i] gives * the corresponding physical CS for logical CS i. + * @num_chipselect: Number of physical chipselects used. * @mode: The spi mode defines how data is clocked out and in. * This may be changed by the device's driver. * The "active low" default for chipselect mode can be overridden @@ -186,6 +187,7 @@ struct spi_device { struct spi_controller *controller; u32 max_speed_hz; u8 chip_select[SPI_CS_CNT_MAX]; + u8 num_chipselect; u8 bits_per_word; bool rt; #define SPI_NO_TX BIT(31) /* No transmit wire */ @@ -311,7 +313,7 @@ static inline bool spi_is_csgpiod(struct spi_device *spi) { u8 idx; - for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) { + for (idx = 0; idx < spi->num_chipselect; idx++) { if (spi_get_csgpiod(spi, idx)) return true; } From patchwork Sat Oct 12 09:53:37 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Gorski X-Patchwork-Id: 13834097 Received: from mail-ed1-f52.google.com (mail-ed1-f52.google.com [209.85.208.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3DEFB1547E7; Sat, 12 Oct 2024 09:54:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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[2.200.173.220]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5c9370d2251sm2733449a12.12.2024.10.12.02.54.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Oct 2024 02:54:25 -0700 (PDT) From: Jonas Gorski Date: Sat, 12 Oct 2024 11:53:37 +0200 Subject: [PATCH 3/6] spi: do not initialize device chipselects to SPI_INVALID_CS Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241012-spi_multi_cs_cleanup-v1-3-dc491113880d@gmail.com> References: <20241012-spi_multi_cs_cleanup-v1-0-dc491113880d@gmail.com> In-Reply-To: <20241012-spi_multi_cs_cleanup-v1-0-dc491113880d@gmail.com> To: Mark Brown , Amit Kumar Mahapatra Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 Now that we know the number of valid chipselects, we don't need to initialize them to SPI_INVALID_CS to be able to know if they are valid, so we can drop both the initialization to SPI_INVALID_CS, as well as the check for it. We cannot drop the define itself though, since it is still used for spi_controller::last_cs[]'s state. Signed-off-by: Jonas Gorski --- drivers/spi/spi.c | 25 +++---------------------- 1 file changed, 3 insertions(+), 22 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 15b2f4e02a685b2c778b27473289197ab08987d8..495b391710d69a46beaa56c1a4332eb6677d2f45 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -624,11 +624,6 @@ static void spi_dev_set_name(struct spi_device *spi) */ #define SPI_INVALID_CS ((s8)-1) -static inline bool is_valid_cs(s8 chip_select) -{ - return chip_select != SPI_INVALID_CS; -} - static inline int spi_dev_check_cs(struct device *dev, struct spi_device *spi, u8 idx, struct spi_device *new_spi, u8 new_idx) @@ -639,7 +634,7 @@ static inline int spi_dev_check_cs(struct device *dev, cs = spi_get_chipselect(spi, idx); for (idx_new = new_idx; idx_new < new_spi->num_chipselect; idx_new++) { cs_new = spi_get_chipselect(new_spi, idx_new); - if (is_valid_cs(cs) && is_valid_cs(cs_new) && cs == cs_new) { + if (cs == cs_new) { dev_err(dev, "chipselect %u already in use\n", cs_new); return -EBUSY; } @@ -685,7 +680,7 @@ static int __spi_add_device(struct spi_device *spi) for (idx = 0; idx < spi->num_chipselect; idx++) { /* Chipselects are numbered 0..max; validate. */ cs = spi_get_chipselect(spi, idx); - if (is_valid_cs(cs) && cs >= ctlr->num_chipselect) { + if (cs >= ctlr->num_chipselect) { dev_err(dev, "cs%d >= max %d\n", spi_get_chipselect(spi, idx), ctlr->num_chipselect); return -EINVAL; @@ -727,8 +722,7 @@ static int __spi_add_device(struct spi_device *spi) for (idx = 0; idx < spi->num_chipselect; idx++) { cs = spi_get_chipselect(spi, idx); - if (is_valid_cs(cs)) - spi_set_csgpiod(spi, idx, ctlr->cs_gpiods[cs]); + spi_set_csgpiod(spi, idx, ctlr->cs_gpiods[cs]); } } @@ -781,14 +775,6 @@ int spi_add_device(struct spi_device *spi) } EXPORT_SYMBOL_GPL(spi_add_device); -static void spi_set_all_cs_unused(struct spi_device *spi) -{ - u8 idx; - - for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) - spi_set_chipselect(spi, idx, SPI_INVALID_CS); -} - /** * spi_new_device - instantiate one new SPI device * @ctlr: Controller to which device is connected @@ -824,7 +810,6 @@ struct spi_device *spi_new_device(struct spi_controller *ctlr, WARN_ON(strlen(chip->modalias) >= sizeof(proxy->modalias)); /* Use provided chip-select for proxy device */ - spi_set_all_cs_unused(proxy); spi_set_chipselect(proxy, 0, chip->chip_select); proxy->max_speed_hz = chip->max_speed_hz; @@ -2450,8 +2435,6 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, return -EINVAL; } - spi_set_all_cs_unused(spi); - /* Device address */ rc = of_property_read_variable_u32_array(nc, "reg", &cs[0], 1, SPI_CS_CNT_MAX); @@ -2596,7 +2579,6 @@ struct spi_device *spi_new_ancillary_device(struct spi_device *spi, strscpy(ancillary->modalias, "dummy", sizeof(ancillary->modalias)); /* Use provided chip-select for ancillary device */ - spi_set_all_cs_unused(ancillary); spi_set_chipselect(ancillary, 0, chip_select); /* Take over SPI mode/speed from SPI main device */ @@ -2844,7 +2826,6 @@ struct spi_device *acpi_spi_device_alloc(struct spi_controller *ctlr, return ERR_PTR(-ENOMEM); } - spi_set_all_cs_unused(spi); spi_set_chipselect(spi, 0, lookup.chip_select); ACPI_COMPANION_SET(&spi->dev, adev); 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[2.200.173.220]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a99a80cb013sm304462866b.131.2024.10.12.02.54.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Oct 2024 02:54:26 -0700 (PDT) From: Jonas Gorski Date: Sat, 12 Oct 2024 11:53:38 +0200 Subject: [PATCH 4/6] spi: don't check spi_controller::num_chipselect when parsing a dt device Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241012-spi_multi_cs_cleanup-v1-4-dc491113880d@gmail.com> References: <20241012-spi_multi_cs_cleanup-v1-0-dc491113880d@gmail.com> In-Reply-To: <20241012-spi_multi_cs_cleanup-v1-0-dc491113880d@gmail.com> To: Mark Brown , Amit Kumar Mahapatra Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 Do not validate spi_controller::num_chipselect against SPI_CS_CNT_MAX when parsing an spi device firmware node. Firstly this is the wrong place, and this should be done while registering/validating the controller. Secondly, there is no reason for that check, as SPI_CS_CNT_MAX controls the amount of chipselects a device may have, not a controller may have. So drop that check as it needlessly limits controllers to SPI_CS_CNT_MAX number of chipselects. Likewise, drop the check for number of device chipselects larger than controller's number of chipselects, as __spi_add_device() will already catch that as either one of the chip selects will be out of range, or there is a duplicate one. Signed-off-by: Jonas Gorski --- drivers/spi/spi.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index 495b391710d69a46beaa56c1a4332eb6677d2f45..ebf8bc9c2276a6f50ba6e9fded48c870c4bd5ff0 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -2430,11 +2430,6 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, return 0; } - if (ctlr->num_chipselect > SPI_CS_CNT_MAX) { - dev_err(&ctlr->dev, "No. of CS is more than max. no. of supported CS\n"); - return -EINVAL; - } - /* Device address */ rc = of_property_read_variable_u32_array(nc, "reg", &cs[0], 1, SPI_CS_CNT_MAX); @@ -2443,11 +2438,7 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, nc, rc); return rc; } - if (rc > ctlr->num_chipselect) { - dev_err(&ctlr->dev, "%pOF has number of CS > ctlr->num_chipselect (%d)\n", - nc, rc); - return -EINVAL; - } + if ((of_property_read_bool(nc, "parallel-memories")) && (!(ctlr->flags & SPI_CONTROLLER_MULTI_CS))) { dev_err(&ctlr->dev, "SPI controller doesn't support multi CS\n"); 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[2.200.173.220]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a99f5ff0cf7sm14740766b.155.2024.10.12.02.54.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Oct 2024 02:54:27 -0700 (PDT) From: Jonas Gorski Date: Sat, 12 Oct 2024 11:53:39 +0200 Subject: [PATCH 5/6] Revert "spi: Raise limit on number of chip selects" Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241012-spi_multi_cs_cleanup-v1-5-dc491113880d@gmail.com> References: <20241012-spi_multi_cs_cleanup-v1-0-dc491113880d@gmail.com> In-Reply-To: <20241012-spi_multi_cs_cleanup-v1-0-dc491113880d@gmail.com> To: Mark Brown , Amit Kumar Mahapatra Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 Now that we removed the limit of chip selects for the controller, we can reduce the amount of chip selects per device again to its original value. This reverts commit 2f8c7c3715f2c6fb51a4ecc0905c04dd78a3da29. Signed-off-by: Jonas Gorski --- include/linux/spi/spi.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index 77511c7d40df7085644cecaae325c982fb306afa..fe99f46c7d926eeb75398f4dddc5ef64d8f7736e 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -21,7 +21,7 @@ #include /* Max no. of CS supported per spi device */ -#define SPI_CS_CNT_MAX 16 +#define SPI_CS_CNT_MAX 4 struct dma_chan; struct software_node; From patchwork Sat Oct 12 09:53:40 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonas Gorski X-Patchwork-Id: 13834100 Received: from mail-ej1-f54.google.com (mail-ej1-f54.google.com [209.85.218.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7DC7215624C; Sat, 12 Oct 2024 09:54:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728726873; cv=none; b=kaFPB3D5eBobgUAcYomE3ZO153UQUvd/CxH6fLPaxfP+m+dy4wbHkB1Bz1X6NLEeaj37qU7pFua948fXptSCWydOg+1Uemq/ZZzhyQpCGI5rpx6Y26lmrgtjMyXgpsAcI6+t+4m85VVfqfndxBYKQtmBqe3eCBj1yUES9RVUtvU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728726873; c=relaxed/simple; bh=ys5JI1ngpU3G1uGclEajO7jpE8cm1XVyWQVve05jHZg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=F1dgUHgS4LQvokH3CFM8OZaf9eVbujAh2mpsiJa4dAsvujMJ7P3sRt31/p9DE+5b6Abt5sCbwiwzRy6ZalZxEDMEAx7p1WxTo7yKx28o/a30cYmMGLIinhjvim853gQT4KCj/nhGptfyAeANioff8F1D175HRm5qL1wR4/cGBhM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=CAXPbN+R; arc=none smtp.client-ip=209.85.218.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="CAXPbN+R" Received: by mail-ej1-f54.google.com with SMTP id a640c23a62f3a-a99f646ff1bso12125066b.2; Sat, 12 Oct 2024 02:54:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1728726870; x=1729331670; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=n1Thee1kAUeC9PampdCJ2+s3t8t439kgGHTpMFquxb8=; b=CAXPbN+RE92zD4V2Nf+PKTPIBR5C3OTx6gNAMSXaSwuVnJoakX9fnzPdXajhRbApDu KEXZytBkwhGB1MWhKmoA2Xb+6Wur3HZQ2Uwly9AA4sckcVTmVDVQjJoJJyUJAYwq9oey QdvqvLNIHPvDvM53ukO/+GqOELS0nXpxoCOgKbsXwIf6pZ/FUIj1ydqUmeguHfuDU9qM a7PVpRFAVUwPVMhkgFtDlEu8qGdojra0LZvrsLwOfh0+V9JUtA/BPfOyuE4nA+UPUDY+ fMSJH/sxzPJxmsAlRg5GQkO6c3gY9c+6UXJZLbQ0/+gSw78CdVzKteFjvfJOA1O6ARBh UPXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728726870; x=1729331670; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=n1Thee1kAUeC9PampdCJ2+s3t8t439kgGHTpMFquxb8=; b=mU+ae8jc6pUtzX/pyTgRPW/5rIpbln3nF54IMv8vS84zWZDiz05TRZee+2guIpGpQa MyIF9OWBp1FKjezhC5loScpNYBdqld6xzUzt8up03aIZryeHwuaOpJpjhiT0+2Py2ZoG 2RUtXY/iGwTcmSxHpvMhfYwOgdpnRxTwOlwzokyRjI7WlZsSsImBx+CqThvBmE/misrc NYQk02WyB2f/rR/A95diW3/SeJN17fIXeAaIbX8JnVpRmh7UG2RcidSJ2Z4W1yAB3LoP dxah51ssLEPjzNc3hBO1ozuXTGa5uymMmaXrZfmks+hqSYWfPHI5YhPk1Ps47lG0mP7s TVlA== X-Forwarded-Encrypted: i=1; AJvYcCWrwoSmHBDcBTB/dDjQiw3lGht62UF3HWEhTR2860ilwnmIijfNDe7G3+Uo0ctb6OCA0Cuitvc8vLhFv5A=@vger.kernel.org X-Gm-Message-State: AOJu0Yz0iV/fg1OCy6YO21eCgAbmKVQI+OUJq7aeUJrmPOB7I9mc2IuJ UkMe63CsoE3Sr1EXddVO4Wwo1ssx8ZomsGI9g5j9ZnbzTnM4SwovqMhDltdXviM= X-Google-Smtp-Source: AGHT+IF23x4Q8xt+C2xkJXHCIx5ufh0hlAp9EyjODTlu5mgcNg9wjq0+L2LUiez9T+63Op9Z/58wXw== X-Received: by 2002:a17:907:940c:b0:a8d:29b7:ecf3 with SMTP id a640c23a62f3a-a99b930e9d1mr438259866b.13.1728726869491; Sat, 12 Oct 2024 02:54:29 -0700 (PDT) Received: from localhost (dslb-002-200-173-220.002.200.pools.vodafone-ip.de. [2.200.173.220]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a99a80c0217sm304936466b.110.2024.10.12.02.54.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 12 Oct 2024 02:54:29 -0700 (PDT) From: Jonas Gorski Date: Sat, 12 Oct 2024 11:53:40 +0200 Subject: [PATCH 6/6] spi: rename SPI_CS_CNT_MAX => SPI_DEVICE_CS_CNT_MAX Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241012-spi_multi_cs_cleanup-v1-6-dc491113880d@gmail.com> References: <20241012-spi_multi_cs_cleanup-v1-0-dc491113880d@gmail.com> In-Reply-To: <20241012-spi_multi_cs_cleanup-v1-0-dc491113880d@gmail.com> To: Mark Brown , Amit Kumar Mahapatra Cc: linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 Rename SPI_CS_CNT_MAX to SPI_DEVICE_CS_CNT_MAX to make it more obvious that this is the max number of CS per device supported, not per controller. Signed-off-by: Jonas Gorski --- drivers/spi/spi-cadence-quadspi.c | 2 +- drivers/spi/spi.c | 12 ++++++------ include/linux/spi/spi.h | 13 +++++++------ 3 files changed, 14 insertions(+), 13 deletions(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 0b45b7b2b3ab30951d94ea2ce57dcba3a2600847..3b5776c80c6adfdb4ff67f03b065f0bb81fb735b 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -33,7 +33,7 @@ #define CQSPI_NAME "cadence-qspi" #define CQSPI_MAX_CHIPSELECT 4 -static_assert(CQSPI_MAX_CHIPSELECT <= SPI_CS_CNT_MAX); +static_assert(CQSPI_MAX_CHIPSELECT <= SPI_DEVICE_CS_CNT_MAX); /* Quirks */ #define CQSPI_NEEDS_WR_DELAY BIT(0) diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c index ebf8bc9c2276a6f50ba6e9fded48c870c4bd5ff0..a147975cec452bc857f836ce9742da0b6ddfcff2 100644 --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c @@ -671,9 +671,9 @@ static int __spi_add_device(struct spi_device *spi) int status, idx; u8 cs; - if (spi->num_chipselect > SPI_CS_CNT_MAX) { + if (spi->num_chipselect > SPI_DEVICE_CS_CNT_MAX) { dev_err(dev, "num_cs %d > max %d\n", spi->num_chipselect, - SPI_CS_CNT_MAX); + SPI_DEVICE_CS_CNT_MAX); return -EOVERFLOW; } @@ -1075,7 +1075,7 @@ static void spi_set_cs(struct spi_device *spi, bool enable, bool force) trace_spi_set_cs(spi, activate); spi->controller->last_cs_index_mask = spi->cs_index_mask; - for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) { + for (idx = 0; idx < SPI_DEVICE_CS_CNT_MAX; idx++) { if (enable && idx < spi->num_chipselect) spi->controller->last_cs[idx] = spi_get_chipselect(spi, 0); else @@ -2357,7 +2357,7 @@ static void of_spi_parse_dt_cs_delay(struct device_node *nc, static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, struct device_node *nc) { - u32 value, cs[SPI_CS_CNT_MAX]; + u32 value, cs[SPI_DEVICE_CS_CNT_MAX]; int rc, idx; /* Mode (clock phase/polarity/etc.) */ @@ -2432,7 +2432,7 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi, /* Device address */ rc = of_property_read_variable_u32_array(nc, "reg", &cs[0], 1, - SPI_CS_CNT_MAX); + SPI_DEVICE_CS_CNT_MAX); if (rc < 0) { dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n", nc, rc); @@ -3316,7 +3316,7 @@ int spi_register_controller(struct spi_controller *ctlr) } /* Setting last_cs to SPI_INVALID_CS means no chip selected */ - for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) + for (idx = 0; idx < SPI_DEVICE_CS_CNT_MAX; idx++) ctlr->last_cs[idx] = SPI_INVALID_CS; status = device_add(&ctlr->dev); diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h index fe99f46c7d926eeb75398f4dddc5ef64d8f7736e..cdf8e4338f3850075123eec76db75a94033ccaaa 100644 --- a/include/linux/spi/spi.h +++ b/include/linux/spi/spi.h @@ -21,7 +21,7 @@ #include /* Max no. of CS supported per spi device */ -#define SPI_CS_CNT_MAX 4 +#define SPI_DEVICE_CS_CNT_MAX 4 struct dma_chan; struct software_node; @@ -186,7 +186,7 @@ struct spi_device { struct device dev; struct spi_controller *controller; u32 max_speed_hz; - u8 chip_select[SPI_CS_CNT_MAX]; + u8 chip_select[SPI_DEVICE_CS_CNT_MAX]; u8 num_chipselect; u8 bits_per_word; bool rt; @@ -218,7 +218,8 @@ struct spi_device { void *controller_data; char modalias[SPI_NAME_SIZE]; const char *driver_override; - struct gpio_desc *cs_gpiod[SPI_CS_CNT_MAX]; /* Chip select gpio desc */ + /* Chip select gpio desc */ + struct gpio_desc *cs_gpiod[SPI_DEVICE_CS_CNT_MAX]; struct spi_delay word_delay; /* Inter-word delay */ /* CS delays */ struct spi_delay cs_setup; @@ -233,7 +234,7 @@ struct spi_device { * multiple chip selects & memories are connected in parallel * then more than one bit need to be set in cs_index_mask. */ - u32 cs_index_mask : SPI_CS_CNT_MAX; + u32 cs_index_mask : SPI_DEVICE_CS_CNT_MAX; /* * Likely need more hooks for more protocol options affecting how @@ -711,8 +712,8 @@ struct spi_controller { bool auto_runtime_pm; bool fallback; bool last_cs_mode_high; - s8 last_cs[SPI_CS_CNT_MAX]; - u32 last_cs_index_mask : SPI_CS_CNT_MAX; + s8 last_cs[SPI_DEVICE_CS_CNT_MAX]; + u32 last_cs_index_mask : SPI_DEVICE_CS_CNT_MAX; struct completion xfer_completion; size_t max_dma_len;