From patchwork Mon Oct 14 08:19:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 13834318 Received: from mail-wr1-f52.google.com (mail-wr1-f52.google.com [209.85.221.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D8F90142E6F for ; Mon, 14 Oct 2024 08:19:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728893989; cv=none; b=emIxA4mY8RxmaFMqAZ7LyaZIJvWS3jPZFzgNtWmirYrIdvgNxEscMcLZ72V3BvAK8zKtZC944CTph/IoZGvPedBHP5NjlGljGwyyUqSHfOL607TJ7tcMuPNrV4EyKwdOkWHxiIACh0v6rsCytPtMjBc7iQOmyy8CVeaaBw5pLGM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728893989; c=relaxed/simple; bh=4VkCpW8QDcAjyN11pnkcHCM7wZTUs/xHfXdy554thg0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=S1KwVTg3iBwVQMMypIwa99JeKBEmtOVM8O3DgqvtXu0cSIRsBYPnvZkdmtpg0Tq+5BWfB2JOOuAxLTJHSvcCt3vSa7yQrSr6nTt8JE2qXZeDkyJ6of+rjW/IVryEX1pou3uJi2Zww2SlFU6PtMdAEIpK1uZ7ZoIjeuaReK8WSPA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=htxK+5VX; arc=none smtp.client-ip=209.85.221.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="htxK+5VX" Received: by mail-wr1-f52.google.com with SMTP id ffacd0b85a97d-37d4c1b1455so2892257f8f.3 for ; Mon, 14 Oct 2024 01:19:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1728893986; x=1729498786; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=8Pr5xKcTInMzCbHb8CZQ01ukvXjYk9ophuY57YiAzNc=; b=htxK+5VXiJocwNFNg+uOJ4Am56b47V4y22hr4oyAUNyWaZE7VVyiz6adpnLGKTx7pQ HIe3VESuZOaqtw4hlmHd01upDrRNQO/rsg1fsuFQVNuUvEMF4K5KmxxirbD/ErZB1Ig6 lP/gZhY7F9iZCtDp9MXy2gQ9uNDzdEPPihUz4zS1YiF7+UnwMfNBeFwDQxbCFWbtLc4F THPxh36sYfF0qNe49iZCU+ZouxSrJg6CGPYO+T86zyjRI84QTrd9j+pu/3tUoFTclV3D e1iQpLDDbJOqR9fqVqPs21COuQPlswrNcK+RIQIPRgGoK2QH9KNjwlnM5sCOG1DdK/5u Ud1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728893986; x=1729498786; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8Pr5xKcTInMzCbHb8CZQ01ukvXjYk9ophuY57YiAzNc=; b=USBPsQy3zV7oGFAaPyWA/7OgERdXbQvO5OA6ShZp12dmcJGB5degVXsc3SsQP866Wa +hu37F+eMvtEmOsDJ5yxmDenrH0ldRY5bMdJBNk2mbCBEtNjT5z+Emu9Cr+Mx1txLuA+ xVuyJDsOponZKkUo7DcxmxvEmIPE/gpDPDW0unPk/HefolWn/GqIMhLwk+IFLiDHBckA hdzvSFcHk++HQ4dJY4gdeWkAPZIVWTwnvEjfJR4oWC/GmBlxyjlfhmIJD3dS7O0EJ7lm X/t6SLC8LDqnlpVBOiypkxKctlC4UsH5PiHUQFMeRlkNoHxh16TSjU2gESG7vmH6peXL fcsg== X-Forwarded-Encrypted: i=1; AJvYcCU+jdT0+1qiCGQFPcRLb0K9MhsLt/Eni1pU1qmT/o2e2DukwQg6Fe53Ooq9IeOWNRzesVtQ+Xk3S53XAfqG@vger.kernel.org X-Gm-Message-State: AOJu0YxSiqxX8dAIXmv0l6J7Igz3OElKuQbfC2DSGw66vLJI1/b+FnOh z8xZ0pInaNQiW5lu7VRmKBTGfQdfmFNodK7K5REmEcW8Cf5EPfD86uKWNmAcGd4= X-Google-Smtp-Source: AGHT+IGTRwN+f76A9WzqvosdEAiZdB/qwWsKiJOAckCa/UM14JgEkadN2d8lFMi7zwj2YQZBbMZhFA== X-Received: by 2002:a5d:530a:0:b0:37d:377d:c7b0 with SMTP id ffacd0b85a97d-37d5519d618mr7757811f8f.18.1728893986090; Mon, 14 Oct 2024 01:19:46 -0700 (PDT) Received: from [127.0.1.1] ([82.76.168.176]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37d4b6bd04asm10715752f8f.27.2024.10.14.01.19.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Oct 2024 01:19:45 -0700 (PDT) From: Abel Vesa Date: Mon, 14 Oct 2024 11:19:24 +0300 Subject: [PATCH v2 1/3] arm64: dts: qcom: x1e80100: Describe the SDHC controllers Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241014-x1e80100-qcp-sdhc-v2-1-868e70a825e0@linaro.org> References: <20241014-x1e80100-qcp-sdhc-v2-0-868e70a825e0@linaro.org> In-Reply-To: <20241014-x1e80100-qcp-sdhc-v2-0-868e70a825e0@linaro.org> To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: Johan Hovold , Dmitry Baryshkov , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Abel Vesa X-Mailer: b4 0.15-dev-dedf8 X-Developer-Signature: v=1; a=openpgp-sha256; l=3660; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=4VkCpW8QDcAjyN11pnkcHCM7wZTUs/xHfXdy554thg0=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBnDNQatl0+ZaxhTK6HrIKFMggJRViZ3svgxsFMs wG+/0xQq6KJAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZwzUGgAKCRAbX0TJAJUV Vnb9D/9vZhhnQGk3sjlZ48o7ve71Lc1FSN3Gyzt2CF8GgV/NQXnb4PUJ6A2EltVC08EUIzZe4/H HE1FIA5YXf5WWm7oWs8yeSF+pk95qZemVeq4hBBm2eaxEmpXotHaCiqWFUXB5/XvDYr9JXQbm8S fW0mXcjlyZhIj74XW94KIRKvUJAXFjuhpiVNzDQCf2ffYf4UZb5YlMD2V9M7gG7b+xf1YDfL14c 2h612YmPx+Xq4ClKSI9Nl4W5CO8R1KfCVcxbBmI6por3uBiFakAVASfeYbWkM+0aartN74GCtm3 N8lknpdsqLfLJQiX5lrcRCnoBj8ct5NtTd7Sqiw/qw6+AK0df5p+44AXT2ruyvyh6cdOo/MIe9Q qsxlOnMEfPV8RKhpTzWeepTYPB5AmJYjiYjhJ19oi6u4Y14na6fHf2+Wlm8REc9YrekvN+YSWTc d43Vni9tlxluSiH4cT+cR1AzFA9eiWSuM1uQc22lzmejZbGjZ6d8HvUavFZ1IKhbdXgxccNd+z/ D6pT1hstMjS5TZzdWGzU2kUUmH56NtxZcFDCiMLrghqh9EBFqy84Vw+D/pBsuCzhoprfqV/+zVG cnTHk8DTm04Mc8QNmWRAVNcW0lGUJs5a0d0NAMEEIvIsZbbYnrpLLgkvzQlcvJuRDeKxRmdwf8m NtbX3Rdth9pCGvQ== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE Describe the two SHDC v5 controllers found on x1e80100 platform. Signed-off-by: Abel Vesa --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 102 +++++++++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index 0e6802c1d2d8375987c614ec69c440e2f38d25c6..2d0befd6ba0ea11fdf2305d23c0cd8743de303dc 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -3887,6 +3887,108 @@ lpass_lpicx_noc: interconnect@7430000 { #interconnect-cells = <2>; }; + sdhc_2: mmc@8804000 { + compatible = "qcom,x1e80100-sdhci", "qcom,sdhci-msm-v5"; + reg = <0 0x08804000 0 0x1000>; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC2_AHB_CLK>, + <&gcc GCC_SDCC2_APPS_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "core", "xo"; + iommus = <&apps_smmu 0x520 0>; + qcom,dll-config = <0x0007642c>; + qcom,ddr-config = <0x80040868>; + power-domains = <&rpmhpd RPMHPD_CX>; + operating-points-v2 = <&sdhc2_opp_table>; + + interconnects = <&aggre2_noc MASTER_SDCC_2 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_2 0>; + interconnect-names = "sdhc-ddr", "cpu-sdhc"; + bus-width = <4>; + dma-coherent; + + status = "disabled"; + + sdhc2_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-19200000 { + opp-hz = /bits/ 64 <19200000>; + required-opps = <&rpmhpd_opp_min_svs>; + }; + + opp-50000000 { + opp-hz = /bits/ 64 <50000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-202000000 { + opp-hz = /bits/ 64 <202000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + }; + }; + + sdhc_4: mmc@8844000 { + compatible = "qcom,x1e80100-sdhci", "qcom,sdhci-msm-v5"; + reg = <0 0x08844000 0 0x1000>; + + interrupts = , + ; + interrupt-names = "hc_irq", "pwr_irq"; + + clocks = <&gcc GCC_SDCC4_AHB_CLK>, + <&gcc GCC_SDCC4_APPS_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names = "iface", "core", "xo"; + iommus = <&apps_smmu 0x160 0>; + qcom,dll-config = <0x0007642c>; + qcom,ddr-config = <0x80040868>; + power-domains = <&rpmhpd RPMHPD_CX>; + operating-points-v2 = <&sdhc4_opp_table>; + + interconnects = <&aggre2_noc MASTER_SDCC_4 0 &mc_virt SLAVE_EBI1 0>, + <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_SDCC_4 0>; + interconnect-names = "sdhc-ddr", "cpu-sdhc"; + bus-width = <4>; + dma-coherent; + + status = "disabled"; + + sdhc4_opp_table: opp-table { + compatible = "operating-points-v2"; + + opp-19200000 { + opp-hz = /bits/ 64 <19200000>; + required-opps = <&rpmhpd_opp_min_svs>; + }; + + opp-50000000 { + opp-hz = /bits/ 64 <50000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-100000000 { + opp-hz = /bits/ 64 <100000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + + opp-202000000 { + opp-hz = /bits/ 64 <202000000>; + required-opps = <&rpmhpd_opp_svs_l1>; + }; + }; + }; + usb_2_hsphy: phy@88e0000 { compatible = "qcom,x1e80100-snps-eusb2-phy", "qcom,sm8550-snps-eusb2-phy"; From patchwork Mon Oct 14 08:19:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 13834319 Received: from mail-wr1-f45.google.com (mail-wr1-f45.google.com [209.85.221.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2D26514F9D5 for ; Mon, 14 Oct 2024 08:19:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.221.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728893990; cv=none; b=OjcLY1aaF/fNcUiNtyfUBIYIHwRczqv+4g2let/SbjcfB2vPzpuPImp2pH+LHLhdIqBZaiiUvPMk/efV4NQGTY9aeNGOsHShQFAfbccqNbRO3sMo3ALwjrdwqdvbWUSyLtFjV2w6v89V2bl7gkc8oPDXxiR+lT3me5kgQkoQDio= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728893990; c=relaxed/simple; bh=FdnpvhfC+1AEQjp8j5QlbKHf85wWJdM9k4KJpsGX4RM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Con2gbSZrjJoSvIgDV1XM1mXEx1AjSxDTTJfJwZry3iA2R7ohFCLz9al7lRCcjaS/EGxhMqUCjGqPUqVxx5P2mU6RrlFDXeWbECEtP2NJyEY0yKSzbCsJqC57xJo6zqBgnqQapN+nHU1l/9xm1IFIvNEce8W6Xb1PdtLSSY+as0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=RIaPIBHj; arc=none smtp.client-ip=209.85.221.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="RIaPIBHj" Received: by mail-wr1-f45.google.com with SMTP id ffacd0b85a97d-37d6756659eso886856f8f.0 for ; Mon, 14 Oct 2024 01:19:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1728893987; x=1729498787; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=clN8Q/pfP4O2rUUmgPO+Y1PHDWp+8mMr2vEE/cJuHuU=; b=RIaPIBHjE43Zw2WkLW3xn627gwfi9pPKiKTu7D3Q2+8rnk6RFnGtSyUP6uB5wX6jCc QFr7iZyJ08XW7CzZXsPbl3kZjEmL5RdXPx+W7BIU/cd06tO7lri4sVCv7MTkd7eEVAOu LXeyrsvVqT1zdPGDQUjNce4jqW+cN/XFK+AxdNUq+xU14ZyG9RdzdUPdB0FLwQZinelb eGeVeW2/OhcMmikSPA+kcqXtKnLElyd+RgkwAmM97tpQGfEhqL9ahV7HZ1GLjAiAWsGy PDcRoQBTooDVUAXhkVpduYIu9i7e24tqI1yapO7DaH4i3fQD3Y1SLRG0L59aCvXSSmNg wdyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728893987; x=1729498787; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=clN8Q/pfP4O2rUUmgPO+Y1PHDWp+8mMr2vEE/cJuHuU=; b=fNUES/vfX1V+Xu21sY59Jb73fS6iF88Eb5F+MQZCIb04qskQWXG2Rt0L+a9NhI+niv kJh0wZeXtjtde7BwbpO+rLgtfzBsprt8bGCyW0sLD39F55Lbu982cAoxr33FjofIHQ4i XzQoJUb1wUqzwfd/cwSy+IH42cT2S505snh98Ynq3GkKNR+VVuu4kO2LobchPTU9lOAP nvChwpUxRFvmhSRoa3T0+lQ6SUbiiXe4qgG8U79JcLp/dtLUjbFfSJyKBFEcB+2JapGE ppxCWSlbXf1rGXQEgzKTsaxLZzY9ye9iwDFCa5nsNKv6pKklGxQ9beyCui7fFwl6Oe5M ompQ== X-Forwarded-Encrypted: i=1; AJvYcCXwa5wzo7sdyFwL02VH1LhoOhaciN1oMdw5aXfpLXn49HAzRdamtZyRXzK17Uh8xcqmUoReWAnodnPGQK/R@vger.kernel.org X-Gm-Message-State: AOJu0YyALeYvhwX6O3ekI8CdLkgg5n/2qBZQbycej/lfwun9b7/Vduj/ Emw3uf9wMgDQg8qCNnG7xgj/CdDEgLaI6lai5W7bJQySHXhDzX1RCI7lsknoUdg= X-Google-Smtp-Source: AGHT+IHFG67a/n1cQXEKyxem5Tt2gNBr5kLv8Is4C7ERumb9eyVHbbL0HNNznUIOC0T0ErdziFplMQ== X-Received: by 2002:adf:e706:0:b0:37d:39df:8658 with SMTP id ffacd0b85a97d-37d600c926amr4826511f8f.58.1728893987366; Mon, 14 Oct 2024 01:19:47 -0700 (PDT) Received: from [127.0.1.1] ([82.76.168.176]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37d4b6bd04asm10715752f8f.27.2024.10.14.01.19.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Oct 2024 01:19:46 -0700 (PDT) From: Abel Vesa Date: Mon, 14 Oct 2024 11:19:25 +0300 Subject: [PATCH v2 2/3] arm64: dts: qcom: x1e80100: Describe TLMM pins for SDC2 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241014-x1e80100-qcp-sdhc-v2-2-868e70a825e0@linaro.org> References: <20241014-x1e80100-qcp-sdhc-v2-0-868e70a825e0@linaro.org> In-Reply-To: <20241014-x1e80100-qcp-sdhc-v2-0-868e70a825e0@linaro.org> To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: Johan Hovold , Dmitry Baryshkov , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Abel Vesa X-Mailer: b4 0.15-dev-dedf8 X-Developer-Signature: v=1; a=openpgp-sha256; l=1463; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=FdnpvhfC+1AEQjp8j5QlbKHf85wWJdM9k4KJpsGX4RM=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBnDNQclMui5jQYBeoZCVZV6g/nXL/dREtRwI3So 4eSKRyTYY+JAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZwzUHAAKCRAbX0TJAJUV VhgvD/sFAZWsD3ZOm6b/HfM6WsYKqFsCtuYT3wi7ivXWtQu1/tdq0qTmQuihte+pf9rdz/WhB3h mu4q74vmZyFIRwL9wVYY33jjn8IaVUoCTaUkDNGmRzP8jm0yJrhf5rt7VUo8k5e/A4pEKQMgKAN ECwSS1yOvtvomFmnT9Jpm9Gju4Ja22nRATMzoGjZxF+ELf3U3cooLGa5LAEUbqQZ7Ni8AejfhOn lm2d9wBlcbDAgNBJDsMzEGYxzwMjsfZbYII3osB/fLwfc452BSPZp7IWZrLl9u9NSLCXoeIpxcm oyjPAZe1MpjIomgLziaCBGYdSSsoK06ZaU0fCzASC2uf0ve5jcxab2GW4gg5DFmO6lhezaKos7s 2uD1pbn9ryVARcM/KL8I7zf6ehLv9aalIStsk4J6ddsPuXMJvA5eGWfUMDKw/39hIkxREBNmjuc ZF20NUktWj/tbp0X/mNW3rWqrokFDkjk52Zj9/r7aLo60em6a0Yd9uK8DX9avg26VRv8ltyZpNH 0/2dsSGSeEzXW//a2JwroeOHLZvdjnipG1EUq32FXHKH8T8GhhNrm4LvR9UZntTwMPRzkmgLjDm 4WAPEWJxB6y2K9b/eV3NvNF5CE8dMmFY39Ca6kO6GYthurWY4AWHvnDLUc66ARtndor1A8TacqG InbWUg7fZe9QY9g== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE Describe the SDC2 default and sleep state pins configuration in TLMM. Do this in SoC dtsi file since they will be shared across multiple boards. Signed-off-by: Abel Vesa --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 40 ++++++++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index 2d0befd6ba0ea11fdf2305d23c0cd8743de303dc..dfdae4f9225740bb3d2de6b0054ed60a2397bba9 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -5741,6 +5741,46 @@ rx-pins { bias-disable; }; }; + + sdc2_sleep: sdc2-sleep-state { + clk-pins { + pins = "sdc2_clk"; + bias-disable; + drive-strength = <2>; + }; + + cmd-pins { + pins = "sdc2_cmd"; + bias-pull-up; + drive-strength = <2>; + }; + + data-pins { + pins = "sdc2_data"; + bias-pull-up; + drive-strength = <2>; + }; + }; + + sdc2_default: sdc2-default-state { + clk-pins { + pins = "sdc2_clk"; + bias-disable; + drive-strength = <16>; + }; + + cmd-pins { + pins = "sdc2_cmd"; + bias-pull-up; + drive-strength = <10>; + }; + + data-pins { + pins = "sdc2_data"; + bias-pull-up; + drive-strength = <10>; + }; + }; }; apps_smmu: iommu@15000000 { From patchwork Mon Oct 14 08:19:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 13834320 Received: from mail-wm1-f48.google.com (mail-wm1-f48.google.com [209.85.128.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 47154153BF8 for ; Mon, 14 Oct 2024 08:19:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.48 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728893992; cv=none; b=d0CZR1CCmkCBdBtNp8yGQu4xydZxYvKy5FkNqm0G+erIODFOnRdyNG79zgHF4dl3kW80/CT4WyS1xoUFs/CaBc0YzMmXbh5fr/KlCr4FficAkVFeVIFjfmK/jGS7UCbhj9Xov2441Q2nHSrxuJP0q0QSoQXfGz3XcQUV2f499AU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728893992; c=relaxed/simple; bh=HnTSSieNZnln6w8Vcr1MEzPJufKQo6Dj8CE0MlH5veg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=PERE5wUbMUNrhnagin5L7Nj267bXmNdbeE6oNqiDsaJlNZU6rHozrrOm86WrFqY200IZ8CfI1kfhMoR6y1ADg4tZAXsaQBtyco9pRQWObi66bZLeQensgKPo36rSUokgRC4sHxlT6eQQ6EdHVLk0N9fwBZTDuBye9FH0gGJSksM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org; spf=pass smtp.mailfrom=linaro.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b=C/N6EQyB; arc=none smtp.client-ip=209.85.128.48 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="C/N6EQyB" Received: by mail-wm1-f48.google.com with SMTP id 5b1f17b1804b1-431160cdbd0so24589125e9.1 for ; Mon, 14 Oct 2024 01:19:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1728893989; x=1729498789; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=zW3qGb3ZL5G/B18IQmAOlU1aRnTk8u0KXdkSlfqu380=; b=C/N6EQyB/aI7mLAL2LO840jSPOzUGlxp05zrQ3G9JpfnNOIi89Kt/efUB7/gplkBCQ rmmTvm6MCuFlE0GatqSxsGDurJts57VggHa49FoQ6h4lKN5ciZ6jfmOByKTu4mdjlnE6 k5Te1OckxgPhemuB+30Bhb4OnD3Rsziv5qxXtfkbYDUEA40oMYav+nrXK38JiY9chjOL +F4+Wwod/m6hdUxVWuCBx87u33+SKgLuQ+273P0NA2cfzyJVshE/yYRm/VxuQ3u4Zd6o QcP3MVsY7lWzgBWZMBreKBmPpORJ7otwFfhmV6lcqAYHwDDGJa8uIO0C+lWsbNS1OYYo KBfQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1728893989; x=1729498789; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zW3qGb3ZL5G/B18IQmAOlU1aRnTk8u0KXdkSlfqu380=; b=NWmlyCL2HD5KYqypmtx8e/k3tv5uaBQcPFPdgowuGbaUrkB9NHUHcOK3btru6YQByl GFQxTYMWi2AJHgfvcM1feIQJTtvGSF3L1p0R+pw0JHhG6/7XIWZ4gAJeeP3ZErEwnaBO 7oMWEhyeco+1NqsX1MvHxI3gAanAktTtOVed5zCjyypSKgwb3eGt4WKIZomSjUQbXr9O +YvSu+Hey9JzClQ3S6YtOAZoV4knTiAff08tC+8fZIhRV+Ol0Lnv+x2yfHcvTub/Emsx aNv5IkJF3t4VI7q3oXUKC5+5W5NW100x6ZgI4A45deT5zMzFgMaZcFYnkHjAzqpUuMl2 HlpQ== X-Forwarded-Encrypted: i=1; AJvYcCXmcLgyyXoyrBwpqkCnCM6HYf1kMkcAj+5rHZpDEEYF6Um3l7A+nrbJvqceUSB7tt+hjryaLZ1TyqXbQedC@vger.kernel.org X-Gm-Message-State: AOJu0YzTg0WTB+galbyk/JHQGNyCQLv59xCDs67iMGNsnCPgKL/LCzdT ik8/bTGhyWcGrR472GZN7B3WGQ/DcdDJd8xWYIqkOKTE8yHpTyBL66Yg2RzVGtk= X-Google-Smtp-Source: AGHT+IGxn+WeQp9+QxMCE4CBztQKGsBv9JXvh5PNFEr5NEqaEOzVYJTaKsDMBs2RvhtpyVysbWTIDA== X-Received: by 2002:a5d:58fc:0:b0:37c:fdc8:77ab with SMTP id ffacd0b85a97d-37d481650acmr10412332f8f.7.1728893988606; Mon, 14 Oct 2024 01:19:48 -0700 (PDT) Received: from [127.0.1.1] ([82.76.168.176]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37d4b6bd04asm10715752f8f.27.2024.10.14.01.19.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 14 Oct 2024 01:19:48 -0700 (PDT) From: Abel Vesa Date: Mon, 14 Oct 2024 11:19:26 +0300 Subject: [PATCH v2 3/3] arm64: dts: qcom: x1e80100-qcp: Enable SD card support Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241014-x1e80100-qcp-sdhc-v2-3-868e70a825e0@linaro.org> References: <20241014-x1e80100-qcp-sdhc-v2-0-868e70a825e0@linaro.org> In-Reply-To: <20241014-x1e80100-qcp-sdhc-v2-0-868e70a825e0@linaro.org> To: Ulf Hansson , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: Johan Hovold , Dmitry Baryshkov , linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Abel Vesa X-Mailer: b4 0.15-dev-dedf8 X-Developer-Signature: v=1; a=openpgp-sha256; l=1388; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=HnTSSieNZnln6w8Vcr1MEzPJufKQo6Dj8CE0MlH5veg=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBnDNQdM0pI3ZQ8YkP4iXpuc2dWwsY1N167CKnpi rR4dY2C2IKJAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZwzUHQAKCRAbX0TJAJUV VpOnEACkzkNVzJuydaaRA4WznajS/7DEI84hieTuM21xa3ar1MODXbdQ7fKzg6ljeRpA7Vp/krf sARl2fPNSi9UR1Cq7G809avY/P2KNB4qXsh2ZiNVg/iB8jOhOcZ80/azN92s/CzW8UqUAvwT2fc 3CpmlXWWmadgoivighiTaRnPVTMHU1jGKrvhGQUDU4k33iB3Ohzp87xXdm+L7FQbxG/jsz7AFqG izvUcpQVdlUvBlIgl/2B0nNkTuvB4V5H/WM7e748coIJHJSuN993Y9Ap1heaXZsDwWrFh8XTiBL Z3qyyBStp3YG8dZZR7aQOGcB6Jjp8Y4YLcC75RhGvSTdrYJW+a5lbjU93jXoCQve9mCMwGigtML u9T9MqOfHq9UATI8OXehod+8mmv1TXhOLTAl6VrVv3Egyn9BUk4cipk8EJ7P6B+dA+awwxaQDOS LwQ9wKlYgHPVU6WdU2yvZpOu8ODO+SiAcNVrxVT2dRRLIefR5o8zIijecAPgAXrvMgQelO4PiQI 12p7TsBeoQ3n5k7Q1JpXcex4kzuCpTGda0SpPuhG25h8D53yWyuYLbIgavFs9iUapkUlrusCs4E DkTGf0j4rPqh3+xJYCJQurphsUagG6ksRAE/Gh2+JQKePxZ9zJAfTQewIPfsoIo+nNYAL+WYHEu 6Kegb85WoMl1i6g== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE One of the SD card slots found on the X Elite QCP board is controlled by the SDC2. Enable it and describe the board specific resources. Signed-off-by: Abel Vesa --- arch/arm64/boot/dts/qcom/x1e80100-qcp.dts | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts index 1c3a6a7b3ed628e9e05002cf4b4505d9f4fb1a63..a82fabaaac9010ce3b8d6718b3425e84d8864171 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts @@ -729,6 +729,19 @@ &remoteproc_cdsp { status = "okay"; }; +&sdhc_2 { + cd-gpios = <&tlmm 71 GPIO_ACTIVE_LOW>; + pinctrl-0 = <&sdc2_default &sdc2_card_det_n>; + pinctrl-1 = <&sdc2_sleep &sdc2_card_det_n>; + pinctrl-names = "default", "sleep"; + vmmc-supply = <&vreg_l9b_2p9>; + vqmmc-supply = <&vreg_l6b_1p8>; + bus-width = <4>; + no-sdio; + no-mmc; + status = "okay"; +}; + &smb2360_0_eusb2_repeater { vdd18-supply = <&vreg_l3d_1p8>; vdd3-supply = <&vreg_l2b_3p0>; @@ -870,6 +883,13 @@ wake-n-pins { }; }; + sdc2_card_det_n: sdc2-card-det-state { + pins = "gpio71"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + wcd_default: wcd-reset-n-active-state { pins = "gpio191"; function = "gpio";