From patchwork Mon Oct 14 09:06:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrei Simion X-Patchwork-Id: 13834521 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8C317CFC52A for ; Mon, 14 Oct 2024 09:32:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=c2FtSJwkqnETdP9LHwvrtQnF3NHGPO6KqufbTRy7vHY=; b=IQUwAV+lbKM6rsHcIU3FXoT69z 2NhuD7oT8gEqwoVlo3P1Kr/x/YmKaEKPOp5OyQw6hB6JzDMVyfolaitwDrcTO91o6OlBNrwNJ1au9 daJFsyDCQ7LVKtJhXXonK3L0Z5Qm5oLIwWJc8urhsSWEoReH2NXrJy4R5dQL27yLgC9gz7rLOKk0Y 9HFxQpYQ0vuArNrulZ5qBHKC7UR0Dw2SKaTzJ8Aup3Iesn3XXdifeePUNr7Qk0cdXIFP6rYDsMxne 9sOCj7BeH7bSckojsdXa0CXmmd+Vpju5N2l6te3PttispXhYfEtsgElhfBTvTuNCndoqHKi6Hy19L gGvN6rpQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t0HRY-00000004XOu-1mAm; Mon, 14 Oct 2024 09:32:48 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t0H38-00000004RGf-3mBu for linux-arm-kernel@lists.infradead.org; Mon, 14 Oct 2024 09:07:36 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1728896854; x=1760432854; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=x9fwqOuMwQjgugPY531AN6iYwGmRq07cheBKmsfoejk=; b=j0vMOKXFmFjR/HJ9BcjkdTJ32al2qYmBlkLCm5hquvFDFzY6kzrAeAj2 dZAOAAMGyPyCpDaKzIevNn0sIkaxo98z7EGKTdZ/JvYVi2xQzygM9Jzfn ZwTLsDKWuLDhR4/5eO2mUIKnBItiQ8zzoSDrDBTx19eo19wTMTEBzWLja Zo20hhUNsfLOs28lLJYBeh8LYjOcZ8++Cz51tw6D7Our1tNQwy5hFDWUD 5/ddq8TFakShd46UxECcFnY0pLZpHjve7CS3UbaXsCodpHLM98ZRHclaH suCI+ZPX3K+vuR9LW3OaRD2kdopusxEzgrNBmyLj17NXfTq/zBVjc2Jos w==; X-CSE-ConnectionGUID: OewlYZ9kR2OdPvJxEyQCYQ== X-CSE-MsgGUID: gGbDHvaUTX6N7AHqgavBrg== X-IronPort-AV: E=Sophos;i="6.11,202,1725346800"; d="scan'208";a="200399574" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa6.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES128-GCM-SHA256; 14 Oct 2024 02:07:33 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.35; Mon, 14 Oct 2024 02:07:00 -0700 Received: from ROB-ULT-M76677.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.35 via Frontend Transport; Mon, 14 Oct 2024 02:06:58 -0700 From: Andrei Simion To: , , , , , CC: , , , Andrei Simion Subject: [PATCH v2 RESEND] ARM: dts: microchip: sam9x60: Add missing property atmel,usart-mode Date: Mon, 14 Oct 2024 12:06:41 +0300 Message-ID: <20241014090641.44596-1-andrei.simion@microchip.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241014_020735_044235_AD90E826 X-CRM114-Status: UNSURE ( 8.01 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the atmel,usart-mode property to the UART nodes. This ensures compliance with the atmel,at91-usart.yaml schema and resolves the errors below: serial@200: $nodename:0: 'serial@200' does not match '^spi(@.*|-([0-9]|[1-9][0-9]+))?$' serial@200: atmel,use-dma-rx: False schema does not allow True serial@200: atmel,use-dma-tx: False schema does not allow True serial@200: atmel,fifo-size: False schema does not allow [[16]] These errors indicate that the property atmel,usart-mode = is missing for UART nodes 0, 1, 2, 3, 4, 6, 7, 8, 9, 10, 11, and 12. Fixes: 99c808335877 ("ARM: dts: at91: sam9x60: Add missing flexcom definitions") Acked-by: Nicolas Ferre Signed-off-by: Andrei Simion --- v1 -> v2: - reword commit message - add Acked-by received in V1 --- arch/arm/boot/dts/microchip/sam9x60.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) base-commit: 7f773fd61baa9b136faa5c4e6555aa64c758d07c diff --git a/arch/arm/boot/dts/microchip/sam9x60.dtsi b/arch/arm/boot/dts/microchip/sam9x60.dtsi index 04a6d716ecaf..0ba424bba7cc 100644 --- a/arch/arm/boot/dts/microchip/sam9x60.dtsi +++ b/arch/arm/boot/dts/microchip/sam9x60.dtsi @@ -174,6 +174,7 @@ flx4: flexcom@f0000000 { uart4: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <13 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -376,6 +377,7 @@ flx11: flexcom@f0020000 { uart11: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <32 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -427,6 +429,7 @@ flx12: flexcom@f0024000 { uart12: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -586,6 +589,7 @@ flx6: flexcom@f8010000 { uart6: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <9 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -637,6 +641,7 @@ flx7: flexcom@f8014000 { uart7: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <10 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -688,6 +693,7 @@ flx8: flexcom@f8018000 { uart8: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <11 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -739,6 +745,7 @@ flx0: flexcom@f801c000 { uart0: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <5 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -809,6 +816,7 @@ flx1: flexcom@f8020000 { uart1: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <6 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -879,6 +887,7 @@ flx2: flexcom@f8024000 { uart2: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <7 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -949,6 +958,7 @@ flx3: flexcom@f8028000 { uart3: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <8 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -1074,6 +1084,7 @@ flx9: flexcom@f8040000 { uart9: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <15 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | @@ -1125,6 +1136,7 @@ flx10: flexcom@f8044000 { uart10: serial@200 { compatible = "microchip,sam9x60-usart", "atmel,at91sam9260-usart"; reg = <0x200 0x200>; + atmel,usart-mode = ; interrupts = <16 IRQ_TYPE_LEVEL_HIGH 7>; dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) |