From patchwork Fri Oct 18 08:39:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 13841423 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 494D7D2F7E8 for ; Fri, 18 Oct 2024 08:50:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=hXHImGmB/1wV5EIjc38v6T9n6ujCvwzK6mwlsQ6TEm8=; b=0VUvDM7uYI/ZzRThnV4IqD+Byl n3Lc1fhCHNbdBXQMwYNHDBk9SoNzIr78RvQZqj7NEAxIV4BJ9KtBG4cHN/q8rImtvwcL0Lmr/+12G 2jLEZ8m6/aVpHHjx7gDPN9eATd7D1FCwFhWQ9dQ2rwyd1G6JuEFhkAWjLfmg6v1R63o7SOKlOZlhI /EA7Pt+ATd5XilY0O6zHr6uS8s7Sjm78YnA+AAzhW+FOEK8M33J5X1V3L0ol9XjB7khUVLvzWasPg jZRgJnR+gUE4v7PIjGwwzYMdNie/hzGX+uWUVt7fCMmyWhKIOxGy7pjNBNNHYepWMozMxnQ/dmkZr S31x+kSw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t1igr-000000002wU-1BBn; Fri, 18 Oct 2024 08:50:33 +0000 Received: from laurent.telenet-ops.be ([2a02:1800:110:4::f00:19]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t1iWl-0000000HatC-0hGD for linux-arm-kernel@lists.infradead.org; Fri, 18 Oct 2024 08:40:08 +0000 Received: from ramsan.of.borg ([IPv6:2a02:1810:ac12:ed80:9a0:3f16:2bd7:49ca]) by laurent.telenet-ops.be with cmsmtp id Rkfy2D00H1MdCM201kfyxr; Fri, 18 Oct 2024 10:40:02 +0200 Received: from rox.of.borg ([192.168.97.57]) by ramsan.of.borg with esmtp (Exim 4.95) (envelope-from ) id 1t1iWN-003z2E-Dn; Fri, 18 Oct 2024 10:39:58 +0200 Received: from geert by rox.of.borg with local (Exim 4.95) (envelope-from ) id 1t1iWc-005rfp-BT; Fri, 18 Oct 2024 10:39:58 +0200 From: Geert Uytterhoeven To: Tomi Valkeinen , Kieran Bingham , Laurent Pinchart Cc: linux-renesas-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Geert Uytterhoeven Subject: [PATCH] arm64: dts: renesas: white-hawk-cpu-common: Add pin control for DSI-eDP IRQ Date: Fri, 18 Oct 2024 10:39:55 +0200 Message-Id: <89bab2008891be1f003a3c0dbcdf36af3b98da70.1729240573.git.geert+renesas@glider.be> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241018_014007_370539_63BB1B14 X-CRM114-Status: GOOD ( 10.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org When the DSI to eDP bridge was added, pin control for the IRQ pin was left out, because the pin controller did not support INTC-EX pins yet. Commit 10544ec1b3436037 ("pinctrl: renesas: r8a779g0: Add INTC-EX pins, groups, and function") added support for these pins, so add the missing pin control description. Signed-off-by: Geert Uytterhoeven --- To be queued in renesas-devel for v6.13. arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi b/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi index 337ba68342c475b5..f24814d7c924ed51 100644 --- a/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi +++ b/arch/arm64/boot/dts/renesas/white-hawk-cpu-common.dtsi @@ -238,6 +238,9 @@ &i2c1 { clock-frequency = <400000>; bridge@2c { + pinctrl-0 = <&irq0_pins>; + pinctrl-names = "default"; + compatible = "ti,sn65dsi86"; reg = <0x2c>; @@ -341,6 +344,11 @@ i2c1_pins: i2c1 { function = "i2c1"; }; + irq0_pins: irq0 { + groups = "intc_ex_irq0_a"; + function = "intc_ex"; + }; + keys_pins: keys { pins = "GP_5_0", "GP_5_1", "GP_5_2"; bias-pull-up;