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[2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37ecf0ecd89sm2040086f8f.78.2024.10.18.07.13.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Oct 2024 07:13:34 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Jean-Christophe Dubois , Igor Mitsyanko , Andrey Smirnov , Alexandre Iooss , Alistair Francis , "Edgar E. Iglesias" Subject: [PATCH 1/7] docs/system/arm/stm32: List olimex-stm32-h405 in document title Date: Fri, 18 Oct 2024 15:13:26 +0100 Message-Id: <20241018141332.942844-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241018141332.942844-1-peter.maydell@linaro.org> References: <20241018141332.942844-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x431.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org List the olimex-stm32-h405 board in the document title, so that the board name appears in the table of contents in system/target-arm.rst. Signed-off-by: Peter Maydell Reviewed-by: Cédric Le Goater --- docs/system/arm/stm32.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/docs/system/arm/stm32.rst b/docs/system/arm/stm32.rst index ca7a55841b4..511e3eb9ac1 100644 --- a/docs/system/arm/stm32.rst +++ b/docs/system/arm/stm32.rst @@ -1,5 +1,5 @@ -STMicroelectronics STM32 boards (``netduino2``, ``netduinoplus2``, ``stm32vldiscovery``) -======================================================================================== +STMicroelectronics STM32 boards (``netduino2``, ``netduinoplus2``, ``olimex-stm32-h405``, ``stm32vldiscovery``) +=============================================================================================================== The `STM32`_ chips are a family of 32-bit ARM-based microcontroller by STMicroelectronics. From patchwork Fri Oct 18 14:13:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13841861 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 62D14D3000F for ; Fri, 18 Oct 2024 14:14:14 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t1njZ-0000wy-Os; Fri, 18 Oct 2024 10:13:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t1njX-0000vU-Pb for qemu-devel@nongnu.org; Fri, 18 Oct 2024 10:13:39 -0400 Received: from mail-wr1-x42a.google.com ([2a00:1450:4864:20::42a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1t1njV-0006x7-8B for qemu-devel@nongnu.org; Fri, 18 Oct 2024 10:13:39 -0400 Received: by mail-wr1-x42a.google.com with SMTP id ffacd0b85a97d-37d4ba20075so1626595f8f.0 for ; Fri, 18 Oct 2024 07:13:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1729260816; x=1729865616; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Gtbif3E88e+6/TwfMyavJ5V/o1ksnebzcTF5I6GLPpQ=; b=Cuw3XJLYjawlZIRLk1fjtDO8bEIQUb8Nc7mMtnJBwfWddIkpswqrgY6mkAxwRZwjle Q9oebyK5hkciDWvY/IujKu9beJGLSTnqUnPHFi0NIBsg6Kq4y88VDmKMRPGVG4Ra7Qus ZGmGhpZZCFXnlwqkeE3nCY9UxsM+rPA6z84bwLFsJrRXYIl0vy3WtuJGUYbQNc9/9G4U cMShIb+KV9BS+sMNZtl7dFC28UKh7GceKS8ysPvOmkhBNsEaGATWxytRHz+6zKo40Ryh tMtIEGd6S6RTGwgo/cE9GoaP5MqZPlaPW9WNIghJdYgib6T9zmcARgmzQcQsYL0xgIPJ E3+A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729260816; x=1729865616; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Gtbif3E88e+6/TwfMyavJ5V/o1ksnebzcTF5I6GLPpQ=; b=pQZHn9yZal0g0HiCuENkFAUC3NVxDtoFG7W4RTt49YuwXs5WsoKdJ9usWIta4eknDy NCdzrzf8qQRja9QEUFhd1zQ72/GWXZMK00m15v41HnXdO3RDGCzqg2CsOJAU6hfdVFC5 lSDfkHtRbyqWncKXGP9qcc6ZGCxjaJVgjEkqk5ihG3ZAMBjOi3Jra3/JirNW1NavXqt4 uwEn90llqmw+0hK8iJhxGfu/SefuKwtTVUsaBJ81+HF14aym8pSh8b+I7OxSOMUKzsS2 92zGya0sqA01/CxSg1kyOXk8e/4h5G337B0flg/hW84aBoKlGBMTM9BDHS1QYS4slWXa yUrQ== X-Forwarded-Encrypted: i=1; AJvYcCXDRSB/k24z9Q3l1Xgy41A8lFxN2b+faw8F668ufrET840vUV4rTw+F+34GWwXD/sjDhvl9LeWmsQTH@nongnu.org X-Gm-Message-State: AOJu0YzP89dvQBPpJ7lNYyxoS+jwl8SkW59pjcv8dH5I8CnRnfUIZbv6 bRUIp7YQlYsE1cn1bQiA498X57RQ9bR5oCLuG/9lMeYJOag1527Dj/ZNsrYo7m8= X-Google-Smtp-Source: AGHT+IEp+yNVBYg3tGX4pdAvqXy3w7NIVwZmWbVHONAoL1AVUK9Xb0IcINT7gaGzECaX+G4AFBD7WA== X-Received: by 2002:adf:f587:0:b0:37d:4afe:8c98 with SMTP id ffacd0b85a97d-37ea219836emr2093995f8f.26.1729260815779; Fri, 18 Oct 2024 07:13:35 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37ecf0ecd89sm2040086f8f.78.2024.10.18.07.13.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Oct 2024 07:13:35 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Jean-Christophe Dubois , Igor Mitsyanko , Andrey Smirnov , Alexandre Iooss , Alistair Francis , "Edgar E. Iglesias" Subject: [PATCH 2/7] docs/system/arm: Don't use wildcard '*-bmc' in doc titles Date: Fri, 18 Oct 2024 15:13:27 +0100 Message-Id: <20241018141332.942844-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241018141332.942844-1-peter.maydell@linaro.org> References: <20241018141332.942844-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org We have two Arm board doc files which both use '*-bmc' in their documentation title. The result is that when you read the table of contents in system/target-arm.html you don't know which boards are covered by which file. Expand out the board names entirely in the document titles. Signed-off-by: Peter Maydell Reviewed-by: Cédric Le Goater --- docs/system/arm/aspeed.rst | 4 ++-- docs/system/arm/nuvoton.rst | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst index 6733ffd2b94..968ba88b997 100644 --- a/docs/system/arm/aspeed.rst +++ b/docs/system/arm/aspeed.rst @@ -1,5 +1,5 @@ -Aspeed family boards (``*-bmc``, ``ast2500-evb``, ``ast2600-evb``, ``ast2700-evb``) -=================================================================================== +Aspeed family boards (``ast2500-evb``, ``ast2600-evb``, ``ast2700-evb``, ``bletchley-bmc``, ``fuji-bmc``, ``fby35-bmc``, ``fp5280g2-bmc``, ``g220a-bmc``, ``palmetto-bmc``, ``qcom-dc-scm-v1-bmc``, ``qcom-firework-bmc``, ``quanta-q71l-bmc``, ``rainier-bmc``, ``romulus-bmc``, ``sonorapass-bmc``, ``supermicrox11-bmc``, ``tiogapass-bmc``, ``tacoma-bmc``, ``witherspoon-bmc``, ``yosemitev2-bmc``) +======================================================================================================================================================================================================================================================================================================================================================================================================== The QEMU Aspeed machines model BMCs of various OpenPOWER systems and Aspeed evaluation boards. They are based on different releases of the diff --git a/docs/system/arm/nuvoton.rst b/docs/system/arm/nuvoton.rst index 0424cae4b01..05059378e55 100644 --- a/docs/system/arm/nuvoton.rst +++ b/docs/system/arm/nuvoton.rst @@ -1,5 +1,5 @@ -Nuvoton iBMC boards (``*-bmc``, ``npcm750-evb``, ``quanta-gsj``) -================================================================ +Nuvoton iBMC boards (``kudo-bmc``, ``mori-bmc``, ``npcm750-evb``, ``quanta-gbs-bmc``, ``quanta-gsj``) +===================================================================================================== The `Nuvoton iBMC`_ chips (NPCM7xx) are a family of ARM-based SoCs that are designed to be used as Baseboard Management Controllers (BMCs) in various From patchwork Fri Oct 18 14:13:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13841864 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9285CD3000F for ; Fri, 18 Oct 2024 14:14:35 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t1nja-0000yF-Uq; Fri, 18 Oct 2024 10:13:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t1njY-0000w7-D5 for qemu-devel@nongnu.org; Fri, 18 Oct 2024 10:13:40 -0400 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1t1njV-0006xK-VY for qemu-devel@nongnu.org; Fri, 18 Oct 2024 10:13:40 -0400 Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-43161c0068bso6479485e9.1 for ; Fri, 18 Oct 2024 07:13:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1729260816; x=1729865616; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=/CHgIXie95gPd8mgM7wMcsIUcDpBmAMsOaaghgDk4m8=; b=OD6JZv4KtqY/RyUqrW/NoTMzKgtK5FJ6DbSQPbPQ4ijTqpBGfS3JdzVFjDndoywkEm ZRDcS0KKU5ESVB6R8pXOXSTga7s37BNM2j6E4NkD+2zm/xzZpN0sUxFb3KmVlIkVd00e x4ZZDAZJeO44/fv6rgx36f8rcz1cxonGzi0XlqdCSmas9V/1wCdoEVI+KENnOcGV4S5h 5JuKE9Bpf+H1DHiCBSjbTbDKYAWzh8jIzb14ScRZkxMVeIrCOAPLVwbwnGA7ZT/5jbzc 8I6b3V3uilk6uoNm1lDaTqO12hM6uUmdYkPMXNitiycoJG91vaxT+uZNfc2CqKHpUf5G vNaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729260816; x=1729865616; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=/CHgIXie95gPd8mgM7wMcsIUcDpBmAMsOaaghgDk4m8=; b=hlYbjzRpYydklCGPcIvycLuVe06QiWIbu+QMH5SXvzwtyn8LkYL5x2nh6H8oMsnvk1 D3f7fOZnkmhnXW1jOBlr7jcPoYi0EeN+sbqzZktps+dS8mUDHVsbmijOTC4Pl/1f5yI2 VcJV8t/gG9EerF73XYoHakbOY7OElSRlRdoH5UWW34e/WChoY2UmxkHQOD9x0ck/yXpf OnK2WTA2UL9czmZPK2VzYviD4PZ/MQu5cCRhnb4f3v4aL2C0V333wIH8Qa6vcUAkePPw 9xCUK+NwSYFrU+xVKLANVtQ5ucD0iNRFJmB6YSfCF9DhBC8YvUP8BHjihyrnPBn9B1J1 9xNA== X-Forwarded-Encrypted: i=1; AJvYcCX9kVsnSNRmLpDYW6mtuwcjA61JP/Z7pVSkUySBuutw6oAgFotkLGaC7g8SY33yXywGKTZ2cH5PpGVF@nongnu.org X-Gm-Message-State: AOJu0YzaEg3qziC/HpA5hLPCUAFpuDaXIvilyeV0eFq+r9VamBmCQg3g 490Qy+dTRY39ELLaHZc8F/BwcLKmogdpPrajY5pBmNFAW1MV/F2akOu6cBxN+vk= X-Google-Smtp-Source: AGHT+IE/LHxjua8FHvmPZ3dzgmWfOdxer9v+JSj3UH/Q2gqOnSUPFRgTmiKM8aKTdYIOlY9xFwSaoA== X-Received: by 2002:adf:ec12:0:b0:37d:50e7:8c56 with SMTP id ffacd0b85a97d-37ea213ffd2mr1768853f8f.11.1729260816407; Fri, 18 Oct 2024 07:13:36 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37ecf0ecd89sm2040086f8f.78.2024.10.18.07.13.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Oct 2024 07:13:36 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Jean-Christophe Dubois , Igor Mitsyanko , Andrey Smirnov , Alexandre Iooss , Alistair Francis , "Edgar E. Iglesias" Subject: [PATCH 3/7] docs/system/arm: Split fby35 out from aspeed.rst Date: Fri, 18 Oct 2024 15:13:28 +0100 Message-Id: <20241018141332.942844-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241018141332.942844-1-peter.maydell@linaro.org> References: <20241018141332.942844-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org The fby35 machine is not implemented in hw/arm/aspeed.c, but its documentation is currently stuck at the end of aspeed.rst, formatted in a way that it gets its own heading in the top-level list of boards in target-arm.html. We don't have any other boards that we document like this; split it out into its own rst file. This improves consistency with other board docs and means we can have the entry in the target-arm list be in the correct alphabetical order. Signed-off-by: Peter Maydell Reviewed-by: Cédric Le Goater --- MAINTAINERS | 1 + docs/system/arm/aspeed.rst | 48 -------------------------------------- docs/system/arm/fby35.rst | 47 +++++++++++++++++++++++++++++++++++++ docs/system/target-arm.rst | 1 + 4 files changed, 49 insertions(+), 48 deletions(-) create mode 100644 docs/system/arm/fby35.rst diff --git a/MAINTAINERS b/MAINTAINERS index c21d6a2f9e1..dff8073c5bc 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1121,6 +1121,7 @@ F: include/hw/*/*aspeed* F: hw/net/ftgmac100.c F: include/hw/net/ftgmac100.h F: docs/system/arm/aspeed.rst +F: docs/system/arm/fby35.rst F: tests/*/*aspeed* F: hw/arm/fby35.c diff --git a/docs/system/arm/aspeed.rst b/docs/system/arm/aspeed.rst index 968ba88b997..63910d382fe 100644 --- a/docs/system/arm/aspeed.rst +++ b/docs/system/arm/aspeed.rst @@ -257,51 +257,3 @@ To boot a kernel directly from a Zephyr build tree: $ qemu-system-arm -M ast1030-evb -nographic \ -kernel zephyr.elf - -Facebook Yosemite v3.5 Platform and CraterLake Server (``fby35``) -================================================================== - -Facebook has a series of multi-node compute server designs named -Yosemite. The most recent version released was -`Yosemite v3 `__. - -Yosemite v3.5 is an iteration on this design, and is very similar: there's a -baseboard with a BMC, and 4 server slots. The new server board design termed -"CraterLake" includes a Bridge IC (BIC), with room for expansion boards to -include various compute accelerators (video, inferencing, etc). At the moment, -only the first server slot's BIC is included. - -Yosemite v3.5 is itself a sled which fits into a 40U chassis, and 3 sleds -can be fit into a chassis. See `here `__ -for an example. - -In this generation, the BMC is an AST2600 and each BIC is an AST1030. The BMC -runs `OpenBMC `__, and the BIC runs -`OpenBIC `__. - -Firmware images can be retrieved from the Github releases or built from the -source code, see the README's for instructions on that. This image uses the -"fby35" machine recipe from OpenBMC, and the "yv35-cl" target from OpenBIC. -Some reference images can also be found here: - -.. code-block:: bash - - $ wget https://github.com/facebook/openbmc/releases/download/openbmc-e2294ff5d31d/fby35.mtd - $ wget https://github.com/peterdelevoryas/OpenBIC/releases/download/oby35-cl-2022.13.01/Y35BCL.elf - -Since this machine has multiple SoC's, each with their own serial console, the -recommended way to run it is to allocate a pseudoterminal for each serial -console and let the monitor use stdio. Also, starting in a paused state is -useful because it allows you to attach to the pseudoterminals before the boot -process starts. - -.. code-block:: bash - - $ qemu-system-arm -machine fby35 \ - -drive file=fby35.mtd,format=raw,if=mtd \ - -device loader,file=Y35BCL.elf,addr=0,cpu-num=2 \ - -serial pty -serial pty -serial mon:stdio \ - -display none -S - $ screen /dev/tty0 # In a separate TMUX pane, terminal window, etc. - $ screen /dev/tty1 - $ (qemu) c # Start the boot process once screen is setup. diff --git a/docs/system/arm/fby35.rst b/docs/system/arm/fby35.rst new file mode 100644 index 00000000000..742b887d44c --- /dev/null +++ b/docs/system/arm/fby35.rst @@ -0,0 +1,47 @@ +Facebook Yosemite v3.5 Platform and CraterLake Server (``fby35``) +================================================================== + +Facebook has a series of multi-node compute server designs named +Yosemite. The most recent version released was +`Yosemite v3 `__. + +Yosemite v3.5 is an iteration on this design, and is very similar: there's a +baseboard with a BMC, and 4 server slots. The new server board design termed +"CraterLake" includes a Bridge IC (BIC), with room for expansion boards to +include various compute accelerators (video, inferencing, etc). At the moment, +only the first server slot's BIC is included. + +Yosemite v3.5 is itself a sled which fits into a 40U chassis, and 3 sleds +can be fit into a chassis. See `here `__ +for an example. + +In this generation, the BMC is an AST2600 and each BIC is an AST1030. The BMC +runs `OpenBMC `__, and the BIC runs +`OpenBIC `__. + +Firmware images can be retrieved from the Github releases or built from the +source code, see the README's for instructions on that. This image uses the +"fby35" machine recipe from OpenBMC, and the "yv35-cl" target from OpenBIC. +Some reference images can also be found here: + +.. code-block:: bash + + $ wget https://github.com/facebook/openbmc/releases/download/openbmc-e2294ff5d31d/fby35.mtd + $ wget https://github.com/peterdelevoryas/OpenBIC/releases/download/oby35-cl-2022.13.01/Y35BCL.elf + +Since this machine has multiple SoC's, each with their own serial console, the +recommended way to run it is to allocate a pseudoterminal for each serial +console and let the monitor use stdio. Also, starting in a paused state is +useful because it allows you to attach to the pseudoterminals before the boot +process starts. + +.. code-block:: bash + + $ qemu-system-arm -machine fby35 \ + -drive file=fby35.mtd,format=raw,if=mtd \ + -device loader,file=Y35BCL.elf,addr=0,cpu-num=2 \ + -serial pty -serial pty -serial mon:stdio \ + -display none -S + $ screen /dev/tty0 # In a separate TMUX pane, terminal window, etc. + $ screen /dev/tty1 + $ (qemu) c # Start the boot process once screen is setup. diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst index 3c0a5848453..9c01e66ffa9 100644 --- a/docs/system/target-arm.rst +++ b/docs/system/target-arm.rst @@ -90,6 +90,7 @@ undocumented; you can get a complete list by running arm/digic arm/cubieboard arm/emcraft-sf2 + arm/fby35 arm/musicpal arm/kzm arm/nrf From patchwork Fri Oct 18 14:13:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13841867 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 91C29D30011 for ; Fri, 18 Oct 2024 14:15:29 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t1nja-0000y5-Cp; Fri, 18 Oct 2024 10:13:42 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t1njY-0000vm-3v for qemu-devel@nongnu.org; Fri, 18 Oct 2024 10:13:40 -0400 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1t1njW-0006xX-H7 for qemu-devel@nongnu.org; Fri, 18 Oct 2024 10:13:39 -0400 Received: by mail-wm1-x32c.google.com with SMTP id 5b1f17b1804b1-4314c452180so22244765e9.0 for ; Fri, 18 Oct 2024 07:13:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1729260817; x=1729865617; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=gAX28yWcBXDRA8GUHaWHj1wjFTUDruopzlW85DJp/k8=; b=BZEFjEsbM2VXR8Q+/P9ORzeTjPA7VqUjzG9iZdoH6nIhe0loS7fZNuSXfnzB3DYSZs IpqrFYDLTFhOlf3VcA2acM+ZdF8RWhohhaNp1tUR3qz201f1yUovfDLJgFIZ/UJ2kkff Jbkz19p5H/9UYf+XQSUxI/hFdi0g+I2uCsY5iQkSEj0dgxSaTdKSA48eAqGYlXBva+17 nokWkuYoggIt9PEKNolERCvsquj+lP/8Yh5BwTo/w9q11SwIjaQErq5uRaW1YsZJgfIT fJMIkGg2E68lzCl0rsj1XBipGeYpCH6zKtwWC/TXaALEfTuHmyAcWBXFa/jEuAVT5Eel tB4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729260817; x=1729865617; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=gAX28yWcBXDRA8GUHaWHj1wjFTUDruopzlW85DJp/k8=; b=WO2bwd/fmf8bzcGUVatyVQ6+wgWovrBjOxyUPvwc6NSnCpHz5tRNZNGgH/ed+nf5wI sf51ii0gswAom4hQoFxsm0bAsKFdvfzF+fa4EVB9jqAIRtk3nq57KcTvPVL7DD419onh UHI6oep/Euae8zf8Uz4W9rziODOp9dDEjW1/1FejUhwjCYRMy6MxZRPQy0yMCiGjVe3H dksnHq6kZF1awW1p+YJjBKNlWj5MtXjuUkX8ztubP4brh/2i64jb/juF7cfRJ1nbRM+h mhQLbsWhp3fnjuNRW4EvAYEAPpWrTQAVmIJ9i1u80sHDdlZU+BSluWMMVZSbyXFSti12 qtQA== X-Forwarded-Encrypted: i=1; AJvYcCUnGORHQktNP4cPZiUzEB9JkCwUBErb04ah/4AgxN4HJhp1igOwZoBU6GnI5zJY55qO4PGUBwkNJ2eA@nongnu.org X-Gm-Message-State: AOJu0Yw0dIjAOFemimaE9CzFnr2AqHJf/Mbx+mQz9cjAUFXpCoY7Pqqv eFVK0lNTBhtHNoNwX1/kEdYDWz9yza/WPNMmNFhSEuEmIrIpSvBeIZ3OmnTolBE= X-Google-Smtp-Source: AGHT+IF1x79hdA58IFQH3WOi+bGHnWxAAQFRbDG3LNex0BH8LKndgN/YalNGRLZ8Q0QYf+QUPCti+Q== X-Received: by 2002:a05:600c:4ecc:b0:431:416e:2603 with SMTP id 5b1f17b1804b1-431586fc9b3mr47060115e9.3.1729260817068; Fri, 18 Oct 2024 07:13:37 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37ecf0ecd89sm2040086f8f.78.2024.10.18.07.13.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Oct 2024 07:13:36 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Jean-Christophe Dubois , Igor Mitsyanko , Andrey Smirnov , Alexandre Iooss , Alistair Francis , "Edgar E. Iglesias" Subject: [PATCH 4/7] docs/system/arm: Add placeholder doc for exynos4 boards Date: Fri, 18 Oct 2024 15:13:29 +0100 Message-Id: <20241018141332.942844-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241018141332.942844-1-peter.maydell@linaro.org> References: <20241018141332.942844-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add a placeholder doc for the exynos4 boards nuri and smdkc210. Signed-off-by: Peter Maydell Reviewed-by: Cédric Le Goater --- MAINTAINERS | 1 + docs/system/arm/exynos.rst | 9 +++++++++ docs/system/target-arm.rst | 1 + 3 files changed, 11 insertions(+) create mode 100644 docs/system/arm/exynos.rst diff --git a/MAINTAINERS b/MAINTAINERS index dff8073c5bc..031b117a3a0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -716,6 +716,7 @@ L: qemu-arm@nongnu.org S: Odd Fixes F: hw/*/exynos* F: include/hw/*/exynos* +F: docs/system/arm/exynos.rst Calxeda Highbank M: Rob Herring diff --git a/docs/system/arm/exynos.rst b/docs/system/arm/exynos.rst new file mode 100644 index 00000000000..86894bc02b7 --- /dev/null +++ b/docs/system/arm/exynos.rst @@ -0,0 +1,9 @@ +Exynos4 boards (``nuri``, ``smdkc210``) +======================================= + +These are machines which use the Samsung Exynos4210 SoC, which has Cortex-A9 CPUs. + +``nuri`` models the Samsung NURI board. + +``smdkc210`` models the Samsung SMDKC210 board. + diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst index 9c01e66ffa9..a7f88c8f317 100644 --- a/docs/system/target-arm.rst +++ b/docs/system/target-arm.rst @@ -90,6 +90,7 @@ undocumented; you can get a complete list by running arm/digic arm/cubieboard arm/emcraft-sf2 + arm/exynos arm/fby35 arm/musicpal arm/kzm From patchwork Fri Oct 18 14:13:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13841862 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B324AD30011 for ; Fri, 18 Oct 2024 14:14:24 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t1njb-0000yI-81; Fri, 18 Oct 2024 10:13:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t1njZ-0000wl-E0 for qemu-devel@nongnu.org; Fri, 18 Oct 2024 10:13:41 -0400 Received: from mail-wr1-x434.google.com ([2a00:1450:4864:20::434]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1t1njX-0006xp-G2 for qemu-devel@nongnu.org; Fri, 18 Oct 2024 10:13:41 -0400 Received: by mail-wr1-x434.google.com with SMTP id ffacd0b85a97d-37d4ac91d97so2132829f8f.2 for ; Fri, 18 Oct 2024 07:13:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1729260818; x=1729865618; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=N4Yot1tudtAAArP4Zjr4rYhpGE+rTwWWEjyjmd9wPl4=; b=z0rAhZrY45VWzrz0Gqp02uZR1rf4f0XIrNPBUWN8ykz40OOx+ZHnyuu05IAk2zvGJa 0748m4tjAuzHnbSL3QZ19VDS/ABbw5G+hh4PiNP0OhPjvWWeb/o7oaX+CydFKtVpFeoK JQiPoLTV1LoySzBfVP7z4hIPw9I4BJpjEDgkS87fh8GYDirrwKoWKxhH1d8NVzagQdKB 0o/onCoowykQhazThsMtUxpZnNyfpYFewTH+DAsiX31uw8wPVTjKf23zc3SCzfDzD6Nk fqs/eOeuEpaW72+UATjH39A7ll9f4JRawYk5xGeAyxfC8O0jOjLNl/ywPGtqCkBl/sEu uH4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729260818; x=1729865618; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=N4Yot1tudtAAArP4Zjr4rYhpGE+rTwWWEjyjmd9wPl4=; b=ub0JPVE80G+7RP1NXQJNPUhQI3+5e4VbtjQUewQam6j39Af3ATY/meRTtIob4z7R5Q Wa+MQpu5ciZc9enXoO3xJv8t/0Sahs2cAUuIeQsFpNCjfN6X76YckAzaHK+XgakDufai /bdmpHN/KYrso2ve0qSQ//seqfDKzhbUa1fmaa92frIg2Lur1RUKkBK2XL1d9L5q8E09 FUOObLcnz4dZxNK+9iP6kUijKDxPwHJ+EOSxeQO1PMVLCXOOrZI6p2Cxmg9NhlBgZ8HS zCMm/UCgicS9lH47XqjCaXRkeQ9AJWVOEdcp+bUpTNlTMDsTP+MFkOgIMQM09QSK/NkE k41g== X-Forwarded-Encrypted: i=1; AJvYcCUGw7Z/Qaj3N8Wb5QxxgbirvK9Y6lZf/gg1cXWIex/TMXQa+c8qFMBjWPxChLKlei+Oo9WGzVcHM3hq@nongnu.org X-Gm-Message-State: AOJu0YyUZv4eebqt29ZrdlccJ+rwtN9WRdYARdNRg1vV+8LnQRuhuB8k gGYeOgk4aU3fey6VHvCYtgb9TQuz12nM58/RUwovXzCycdPQJu9FFpS2Bp4qo0A= X-Google-Smtp-Source: AGHT+IFkUxXxHLkwxWd5Nv5sIUakAP8w5Ir9VJ85a22y+kZbOjN65qOtcg6z3PnclNvCvVwvRWhM2Q== X-Received: by 2002:adf:f251:0:b0:37c:cfdc:19ba with SMTP id ffacd0b85a97d-37eab4cc04bmr2783674f8f.28.1729260817644; Fri, 18 Oct 2024 07:13:37 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. 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Iglesias" Subject: [PATCH 5/7] docs/system/arm: Add placeholder doc for xlnx-zcu102 board Date: Fri, 18 Oct 2024 15:13:30 +0100 Message-Id: <20241018141332.942844-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241018141332.942844-1-peter.maydell@linaro.org> References: <20241018141332.942844-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, WEIRD_QUOTING=0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add a placeholder doc for the xlnx-zcu102 board. Signed-off-by: Peter Maydell Reviewed-by: Alistair Francis --- MAINTAINERS | 1 + docs/system/arm/xlnx-zcu102.rst | 19 +++++++++++++++++++ docs/system/target-arm.rst | 1 + 3 files changed, 21 insertions(+) create mode 100644 docs/system/arm/xlnx-zcu102.rst diff --git a/MAINTAINERS b/MAINTAINERS index 031b117a3a0..7c3325628c9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1016,6 +1016,7 @@ F: include/hw/ssi/xilinx_spips.h F: hw/display/dpcd.c F: include/hw/display/dpcd.h F: docs/system/arm/xlnx-versal-virt.rst +F: docs/system/arm/xlnx-zcu102.rst Xilinx Versal OSPI M: Francisco Iglesias diff --git a/docs/system/arm/xlnx-zcu102.rst b/docs/system/arm/xlnx-zcu102.rst new file mode 100644 index 00000000000..534cd1dc887 --- /dev/null +++ b/docs/system/arm/xlnx-zcu102.rst @@ -0,0 +1,19 @@ +Xilinx ZynqMP ZCU102 (``xlnx-zcu102``) +====================================== + +The ``xlnx-zcu102`` board models the Xilinx ZynqMP ZCU102 board. +This board has 4 Cortex-A53 CPUs and 2 Cortex-R5F CPUs. + +Machine-specific options +"""""""""""""""""""""""" + +The following machine-specific options are supported: + +secure + Set ``on``/``off`` to enable/disable emulating a guest CPU which implements the + Arm Security Extensions (TrustZone). The default is ``off``. + +virtualization + Set ``on``/``off`` to enable/disable emulating a guest CPU which implements the + Arm Virtualization Extensions. The default is ``off``. + diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst index a7f88c8f317..ace36d1b17d 100644 --- a/docs/system/target-arm.rst +++ b/docs/system/target-arm.rst @@ -107,6 +107,7 @@ undocumented; you can get a complete list by running arm/xenpvh arm/xlnx-versal-virt arm/xlnx-zynq + arm/xlnx-zcu102 Emulated CPU architecture support ================================= From patchwork Fri Oct 18 14:13:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13841866 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 86CE5D3000F for ; Fri, 18 Oct 2024 14:15:20 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t1njb-0000yP-Oq; Fri, 18 Oct 2024 10:13:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t1njZ-0000x2-Kh for qemu-devel@nongnu.org; Fri, 18 Oct 2024 10:13:41 -0400 Received: from mail-wm1-x335.google.com ([2a00:1450:4864:20::335]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1t1njX-0006yE-QC for qemu-devel@nongnu.org; Fri, 18 Oct 2024 10:13:41 -0400 Received: by mail-wm1-x335.google.com with SMTP id 5b1f17b1804b1-4314fa33a35so21462345e9.1 for ; Fri, 18 Oct 2024 07:13:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1729260818; x=1729865618; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=quF+uJRumwJtdROayPVjONeUFJ/tj9KRPQQ2lXyyT3U=; b=rDRb8lpKxv+H33sB+R3UmUk+1E1bz8PYRWmk5NrAnRWgieCEcdBvYTcnBQzNfoS/bh ZoJ9qdtmPU5TdnHARHzny2/9w/sWAWs2CfUmqzcjeXKiDCGFedeVx1IFi3Qwfwmt7HTz cyftjB6EBgrqTg67hqPEXDYVgReBC//ttJjmvgtXVCrpXyY1dyu4/S9zraP415xbWq3F ejH0Ajrou/GVPZF0gDuXl9kLSjQTsQvthp39CSUiCic13I8t4Jk8C1yarFWlW29qhawF GOLwk+/W4cr9SUAecCuSys1bEPI1QVQqlUt17w1ZKuRNmxvWgMCQCgrTW/tgdiVV+Czn i7ag== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729260818; x=1729865618; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=quF+uJRumwJtdROayPVjONeUFJ/tj9KRPQQ2lXyyT3U=; b=Zr7v2mB8pyUWwaayOLETp3A9EPzFpWPEVyEO4tY2O09ty/63p8PjzcvmG04mgtA5y9 i67APpXihLaLrC5mmkfiawcp66BnZ+SLG7+ToTZNWyIUnB9ZgHENR9OtOVSjB36qWn2l zfuuXG9W3KMrZEduv+5b+7VdQAx1t6S0zakn37pMH+r20k/BxUAcFNQfGglGMUBNclPo po8chRE5/4sTdBA4AFDgSu2qPdRdSd3IEum5Ji4oaNKfrUPrNk3okaSkkXNdj0LDB+g9 tzwx0sM/5Xbz1nqCsR5KJsUxlHIa3W9Xf1+bye3CDE1oUuaYhV0hZ5/EB2CfKD9xGiqR 006A== X-Forwarded-Encrypted: i=1; AJvYcCX99n2vgEEWPSSmFnbqD8PYCY6gTpJcug5rIEv3ZXu0/jnFJ7XPWcMOQeQl1p/nHWIRv/SnPGVYUIEf@nongnu.org X-Gm-Message-State: AOJu0YwWvK16brNRINEQ+mq8jvZgNnXiB3poNd8XM1FW7G8hk5LoTOEa r1SLeZIjPVTSsy/iWehoZ4skegoT17RFKFmqQmhsnpP9RXwzomlmlpvx2YkLTkU= X-Google-Smtp-Source: AGHT+IGfEWp8+522pUK623v9sU5CUUEYA7S+3C3k2C/8OwdcFBQGKN7dEQnYWD9f7yeSwUUB1CLIgQ== X-Received: by 2002:a5d:6b85:0:b0:37d:39aa:b9f4 with SMTP id ffacd0b85a97d-37eab6ee783mr1841212f8f.26.1729260818251; Fri, 18 Oct 2024 07:13:38 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37ecf0ecd89sm2040086f8f.78.2024.10.18.07.13.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Oct 2024 07:13:38 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Jean-Christophe Dubois , Igor Mitsyanko , Andrey Smirnov , Alexandre Iooss , Alistair Francis , "Edgar E. Iglesias" Subject: [PATCH 6/7] docs/system/arm: Add placeholder docs for mcimx6ul-evk and mcimx7d-sabre Date: Fri, 18 Oct 2024 15:13:31 +0100 Message-Id: <20241018141332.942844-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241018141332.942844-1-peter.maydell@linaro.org> References: <20241018141332.942844-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Add placeholder docs for the mcimx6ul-evk and mcimx7d-sabre boards. Signed-off-by: Peter Maydell Reviewed-by: Cédric Le Goater --- MAINTAINERS | 2 ++ docs/system/arm/mcimx6ul-evk.rst | 5 +++++ docs/system/arm/mcimx7d-sabre.rst | 5 +++++ docs/system/target-arm.rst | 2 ++ 4 files changed, 14 insertions(+) create mode 100644 docs/system/arm/mcimx6ul-evk.rst create mode 100644 docs/system/arm/mcimx7d-sabre.rst diff --git a/MAINTAINERS b/MAINTAINERS index 7c3325628c9..2866737261b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -791,6 +791,7 @@ F: hw/arm/fsl-imx6ul.c F: hw/misc/imx6ul_ccm.c F: include/hw/arm/fsl-imx6ul.h F: include/hw/misc/imx6ul_ccm.h +F: docs/system/arm/mcimx6ul-evk.rst MCIMX7D SABRE / i.MX7 M: Peter Maydell @@ -804,6 +805,7 @@ F: include/hw/arm/fsl-imx7.h F: include/hw/misc/imx7_*.h F: hw/pci-host/designware.c F: include/hw/pci-host/designware.h +F: docs/system/arm/mcimx7d-sabre.rst MPS2 / MPS3 M: Peter Maydell diff --git a/docs/system/arm/mcimx6ul-evk.rst b/docs/system/arm/mcimx6ul-evk.rst new file mode 100644 index 00000000000..8871138ab3e --- /dev/null +++ b/docs/system/arm/mcimx6ul-evk.rst @@ -0,0 +1,5 @@ +NXP MCIMX6UL-EVK (``mcimx6ul-evk``) +=================================== + +The ``mcimx6ul-evk`` machine models the NXP i.MX6UltraLite Evaluation Kit +MCIMX6UL-EVK development board. It has a single Cortex-A7 CPU. diff --git a/docs/system/arm/mcimx7d-sabre.rst b/docs/system/arm/mcimx7d-sabre.rst new file mode 100644 index 00000000000..c5d35af1d44 --- /dev/null +++ b/docs/system/arm/mcimx7d-sabre.rst @@ -0,0 +1,5 @@ +NXP MCIMX7D Sabre (``mcimx7d-sabre``) +===================================== + +The ``mcimx7d-sabre`` machine models the NXP SABRE Board MCIMX7SABRE, +based an an i.MX7Dual SoC. diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst index ace36d1b17d..1f806cf4a46 100644 --- a/docs/system/target-arm.rst +++ b/docs/system/target-arm.rst @@ -97,6 +97,8 @@ undocumented; you can get a complete list by running arm/nrf arm/nuvoton arm/imx25-pdk + arm/mcimx6ul-evk + arm/mcimx7d-sabre arm/orangepi arm/raspi arm/collie From patchwork Fri Oct 18 14:13:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 13841865 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8CAFCD3000F for ; Fri, 18 Oct 2024 14:14:58 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1t1njc-000105-IR; Fri, 18 Oct 2024 10:13:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1t1nja-0000xs-5E for qemu-devel@nongnu.org; Fri, 18 Oct 2024 10:13:42 -0400 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1t1njY-0006yh-Jp for qemu-devel@nongnu.org; Fri, 18 Oct 2024 10:13:41 -0400 Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-37d473c4bb6so1925962f8f.3 for ; Fri, 18 Oct 2024 07:13:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1729260819; x=1729865619; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=603GFU4/OLS3KRoV1w+4LwOlh2l5ru3HKLAtyoHGj6k=; b=Asmy1HSgZpIDNtG+gGhN5eCXTIqb5U+weqY5E5vVuLgXVdEYNfGw/Ii4O80FcdQ3Es cmtf/CsXuAygz0Nbf2qfI+AhRPZWLCiEpRqhqlv2PPiJTYevqGKb+HIFP46HMKyhRDiR oic3ko+Dz4fmueXKQeiOb4OM35ipwE4HpEloXFzB0eU834fJO8QCL7ARxJfYpH05DWnR 26AoKPcUIuI88BC+ZWjN3D3QAsb6Fr0YRibQ3h2zp0Ivw5G70E0oLB0n2Y9Gs/Di4CNE 8fdpVyH4kF91uKrynw2mi1B3vzyYG97qje/Qy5V9Dv5+NYyXdFZ6UcotIx2DBksQJ+3v upCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1729260819; x=1729865619; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=603GFU4/OLS3KRoV1w+4LwOlh2l5ru3HKLAtyoHGj6k=; b=WceWWAEtSVtqs6JkBhCcUP0bI3tkDvjiBWfXcFdUDj/n88ZYVZlabxzP+FnK8Timyw O/uhlw09euXYV4H14lq692cn4EnD+35sj4CieBdvyxYv/S5NoOFH/6wf4crz5fbJJwuu H2eFQo5qakQQFoT5F/vd7t2t7qE3gP5RGVciUZd2gpdoHNIYh3Wx2YulQj1AE5anEc6l 9GHTMe4+4cb54Vaxgy2SSbddgylLZ11dKH4o+Kzs+FqQ6HgyFXSXzh4aVmAr9aE7tNRG Uj1ffIpgIe1OdPCrB4GIZywf/kuEXcnlg0DZkb7JoZssvc8jncAUhebzcrJC9yRusXQg SLrg== X-Forwarded-Encrypted: i=1; AJvYcCUuAiNXDkoJ1BDsVhJ5MEiQG1Dv9z1XGBdpO404zstcoW+e2XgVaOfXH6hXItGAXnUcKnRBay3aqmAe@nongnu.org X-Gm-Message-State: AOJu0YzVDMI5X6A9RgzM64+W95ZtNuvH8pAWdop1T6NIkVwCozTzawtk HBe6tpCKuQKxkKXUn1RRI73TZqnqr4KU5lq3VUy1gjilESW5dDFgv95zfy3Uldo= X-Google-Smtp-Source: AGHT+IHF73B9tmhinpRBOglsd/H16yqanHgOAnnBqlzr388dWbnF0mnyczeVRzn97oJQz/hM0D4Afg== X-Received: by 2002:adf:f7d1:0:b0:37d:4cd6:e8e with SMTP id ffacd0b85a97d-37eb4768f72mr2865236f8f.48.1729260819032; Fri, 18 Oct 2024 07:13:39 -0700 (PDT) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-37ecf0ecd89sm2040086f8f.78.2024.10.18.07.13.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Oct 2024 07:13:38 -0700 (PDT) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: =?utf-8?q?C=C3=A9dric_Le_Goater?= , Jean-Christophe Dubois , Igor Mitsyanko , Andrey Smirnov , Alexandre Iooss , Alistair Francis , "Edgar E. Iglesias" Subject: [PATCH 7/7] docs/system/target-arm.rst: Remove "many boards are undocumented" note Date: Fri, 18 Oct 2024 15:13:32 +0100 Message-Id: <20241018141332.942844-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241018141332.942844-1-peter.maydell@linaro.org> References: <20241018141332.942844-1-peter.maydell@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org We now have at least placeholder documentation for every Arm board, so we can remove the apologetic note that says that there are undocumented ones which you can only find out about via the ``--machine help`` option. Signed-off-by: Peter Maydell Reviewed-by: Alistair Francis Reviewed-by: Cédric Le Goater --- docs/system/target-arm.rst | 4 ---- 1 file changed, 4 deletions(-) diff --git a/docs/system/target-arm.rst b/docs/system/target-arm.rst index 1f806cf4a46..9aaa9c414c9 100644 --- a/docs/system/target-arm.rst +++ b/docs/system/target-arm.rst @@ -63,10 +63,6 @@ large amounts of RAM. It also supports 64-bit CPUs. Board-specific documentation ============================ -Unfortunately many of the Arm boards QEMU supports are currently -undocumented; you can get a complete list by running -``qemu-system-aarch64 --machine help``. - .. This table of contents should be kept sorted alphabetically by the title text of each file, which isn't the same ordering