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Mon, 11 Mar 2019 04:46:20 -0700 Received: from [127.0.0.1] (helo=localhost) by xsj-pvapsmtp01 with smtp (Exim 4.63) (envelope-from ) id 1h3JNn-0000St-SW; Mon, 11 Mar 2019 04:46:15 -0700 Received: from xsj-pvapsmtp01 (smtp3.xilinx.com [149.199.38.66]) by xsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id x2BBk6AZ009849; Mon, 11 Mar 2019 04:46:07 -0700 Received: from [172.23.37.224] (helo=xhdbharatku40.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1h3JNe-0000R1-Ex; Mon, 11 Mar 2019 04:46:06 -0700 From: Bharat Kumar Gogada To: , CC: , , , Bharat Kumar Gogada Subject: [PATCH v2] PCI: xilinx-nwl: Fix Multi MSI data programming Date: Mon, 11 Mar 2019 17:15:59 +0530 Message-ID: <1552304759-5394-1-git-send-email-bharat.kumar.gogada@xilinx.com> X-Mailer: git-send-email 2.7.4 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.83;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(39860400002)(396003)(346002)(376002)(136003)(2980300002)(199004)(189003)(126002)(51416003)(50226002)(7696005)(107886003)(486006)(63266004)(476003)(8936002)(36756003)(8676002)(36386004)(2616005)(305945005)(81156014)(4326008)(9786002)(81166006)(47776003)(336012)(478600001)(106002)(6666004)(316002)(356004)(16586007)(106466001)(5660300002)(48376002)(186003)(26005)(110136005)(50466002)(54906003)(14444005)(426003)(2906002)(77096007);DIR:OUT;SFP:1101;SCL:1;SRVR:DM5PR02MB2380;H:xsj-pvapsmtpgw01;FPR:;SPF:Pass;LANG:en;PTR:unknown-60-83.xilinx.com;A:1;MX:1; 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Due to this if multiple end points are connected and requesting MSI and multi MSI combination, the multi MSI data is ending up using wrong MSI data, which might be used by different device. Fix Multi MSI data programming with required alignment by using number of vectors being requested. Fixes: ab597d35ef11 ("PCI: xilinx-nwl: Add support for Xilinx NWL PCIe Host Controller") Signed-off-by: Bharat Kumar Gogada --- V2: - Added more description of fix --- drivers/pci/controller/pcie-xilinx-nwl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-xilinx-nwl.c b/drivers/pci/controller/pcie-xilinx-nwl.c index 81538d7..36669c5 100644 --- a/drivers/pci/controller/pcie-xilinx-nwl.c +++ b/drivers/pci/controller/pcie-xilinx-nwl.c @@ -484,7 +484,7 @@ static int nwl_irq_domain_alloc(struct irq_domain *domain, unsigned int virq, mutex_lock(&msi->lock); bit = bitmap_find_next_zero_area(msi->bitmap, INT_PCI_MSI_NR, 0, - nr_irqs, 0); + nr_irqs, nr_irqs - 1); if (bit >= INT_PCI_MSI_NR) { mutex_unlock(&msi->lock); return -ENOSPC;