From patchwork Mon Oct 21 10:50:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Golani, Mitulkumar Ajitkumar" X-Patchwork-Id: 13843906 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 85DE6D0E6F0 for ; Mon, 21 Oct 2024 10:49:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 1CC6C10E48A; Mon, 21 Oct 2024 10:49:22 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="jXQM1wXX"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) by gabe.freedesktop.org (Postfix) with ESMTPS id 22F9610E472 for ; Mon, 21 Oct 2024 10:49:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729507759; x=1761043759; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=d1Xi6OO+qrW0UPNwgX3c46MKUH7EbDgSpiQl3jV+6k8=; b=jXQM1wXXRTVSvbmUvJVqyyLoH14UbyVUs5iGnI1r5D9m2EQBcX+UAnx7 SM4eunodOEbG2ROOQnCDa5RRYzv/nBQNrQzNNtRajX2ZJrT7p1Uh+1azV l7rNHn/tVKfRprQ+aq+vsXyYKcioFWBtwEds5cBFLt2DT68NU6vQzyYvo 1qPQ7Ds9FQ8cyrz16S5ntKBpJc++zAbxDEM3A4Eeo/tEvOZ2pq61IGSob SqV1leoiJhwU5qL/On3EHUi73ETkXhuuQbdBb+ZtwMxfh58dzqqbXnwFJ u6szNjCSUOiI4/dI6cPVS+hyiNSnbAHiUH48kt4VnXJuobVUF57bV8ibF Q==; X-CSE-ConnectionGUID: OVYruF3KQRq3w4EAgAnfow== X-CSE-MsgGUID: QzXUSNBmTrOqhMN9w9AygA== X-IronPort-AV: E=McAfee;i="6700,10204,11231"; a="28439936" X-IronPort-AV: E=Sophos;i="6.11,220,1725346800"; d="scan'208";a="28439936" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2024 03:49:19 -0700 X-CSE-ConnectionGUID: PxjKpsmHQECTuFHPQVGNww== X-CSE-MsgGUID: UKsDzOc5SMGcmv7dWGY/+w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="84310738" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by orviesa003.jf.intel.com with ESMTP; 21 Oct 2024 03:49:18 -0700 From: Mitul Golani To: intel-gfx@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 1/3] drm/i915/vrr: Update vrr.vsync_{start, end} computation Date: Mon, 21 Oct 2024 16:20:58 +0530 Message-ID: <20241021105100.2861830-2-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20241021105100.2861830-1-mitulkumar.ajitkumar.golani@intel.com> References: <20241021105100.2861830-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" vrr.vsync_{start,end} computation should not depend on crtc_state->vrr.enable. Also add them to state dump. --v1: - Explain commit message more clearly [Jani] - Instead of tweaking to fastset use vrr.flipline while computing AS_SDP. --v2: - Correct computation of vrr.vsync_start/end should not depend on vrr.enable.[ville] - vrr enable disable requirement should not obstruct by SDP enable disable requirements. [Ville] Signed-off-by: Mitul Golani --- .../drm/i915/display/intel_crtc_state_dump.c | 4 +++- drivers/gpu/drm/i915/display/intel_vrr.c | 24 +++++++------------ 2 files changed, 12 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c index 705ec5ad385c..296a6c9de1f7 100644 --- a/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c +++ b/drivers/gpu/drm/i915/display/intel_crtc_state_dump.c @@ -303,7 +303,9 @@ void intel_crtc_state_dump(const struct intel_crtc_state *pipe_config, pipe_config->vrr.flipline, intel_vrr_vmin_vblank_start(pipe_config), intel_vrr_vmax_vblank_start(pipe_config)); - + drm_printf(&p, "vrr_vsync_start: %d, vrr_vsync_end: %d\n", + pipe_config->vrr.vsync_start, + pipe_config->vrr.vsync_end); drm_printf(&p, "requested mode: " DRM_MODE_FMT "\n", DRM_MODE_ARG(&pipe_config->hw.mode)); drm_printf(&p, "adjusted mode: " DRM_MODE_FMT "\n", diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 19a5d0076bb8..89696243f320 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -236,7 +236,7 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state, crtc_state->mode_flags |= I915_MODE_FLAG_VRR; } - if (intel_dp->as_sdp_supported && crtc_state->vrr.enable) { + if (HAS_AS_SDP(display)) { crtc_state->vrr.vsync_start = (crtc_state->hw.adjusted_mode.crtc_vtotal - crtc_state->hw.adjusted_mode.vsync_start); @@ -316,6 +316,11 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) trans_vrr_ctl(crtc_state)); intel_de_write(display, TRANS_VRR_FLIPLINE(display, cpu_transcoder), crtc_state->vrr.flipline - 1); + if (HAS_AS_SDP(display)) + intel_de_write(display, + TRANS_VRR_VSYNC(display, cpu_transcoder), + VRR_VSYNC_END(crtc_state->vrr.vsync_end) | + VRR_VSYNC_START(crtc_state->vrr.vsync_start)); } void intel_vrr_send_push(const struct intel_crtc_state *crtc_state) @@ -352,12 +357,6 @@ void intel_vrr_enable(const struct intel_crtc_state *crtc_state) intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), TRANS_PUSH_EN); - if (HAS_AS_SDP(display)) - intel_de_write(display, - TRANS_VRR_VSYNC(display, cpu_transcoder), - VRR_VSYNC_END(crtc_state->vrr.vsync_end) | - VRR_VSYNC_START(crtc_state->vrr.vsync_start)); - if (crtc_state->cmrr.enable) { intel_de_write(display, TRANS_VRR_CTL(display, cpu_transcoder), VRR_CTL_VRR_ENABLE | VRR_CTL_CMRR_ENABLE | @@ -382,10 +381,6 @@ void intel_vrr_disable(const struct intel_crtc_state *old_crtc_state) TRANS_VRR_STATUS(display, cpu_transcoder), VRR_STATUS_VRR_EN_LIVE, 1000); intel_de_write(display, TRANS_PUSH(display, cpu_transcoder), 0); - - if (HAS_AS_SDP(display)) - intel_de_write(display, - TRANS_VRR_VSYNC(display, cpu_transcoder), 0); } void intel_vrr_get_config(struct intel_crtc_state *crtc_state) @@ -425,10 +420,6 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) TRANS_VRR_VMAX(display, cpu_transcoder)) + 1; crtc_state->vrr.vmin = intel_de_read(display, TRANS_VRR_VMIN(display, cpu_transcoder)) + 1; - } - - if (crtc_state->vrr.enable) { - crtc_state->mode_flags |= I915_MODE_FLAG_VRR; if (HAS_AS_SDP(display)) { trans_vrr_vsync = @@ -440,4 +431,7 @@ void intel_vrr_get_config(struct intel_crtc_state *crtc_state) REG_FIELD_GET(VRR_VSYNC_END_MASK, trans_vrr_vsync); } } + + if (crtc_state->vrr.enable) + crtc_state->mode_flags |= I915_MODE_FLAG_VRR; } From patchwork Mon Oct 21 10:50:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Golani, Mitulkumar Ajitkumar" X-Patchwork-Id: 13843905 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 342C9D0E6F1 for ; Mon, 21 Oct 2024 10:49:22 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C819710E47F; Mon, 21 Oct 2024 10:49:21 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="JOAfI+lK"; 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d="scan'208";a="28439937" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2024 03:49:20 -0700 X-CSE-ConnectionGUID: xE8Tt+C3ReGdpMANWOpJyQ== X-CSE-MsgGUID: R4TCz/D5Sru3tRue76aH/g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="84310749" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by orviesa003.jf.intel.com with ESMTP; 21 Oct 2024 03:49:19 -0700 From: Mitul Golani To: intel-gfx@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 2/3] drm/i915/dp: Set FAVT mode in DP SDP with fixed refresh rate Date: Mon, 21 Oct 2024 16:20:59 +0530 Message-ID: <20241021105100.2861830-3-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20241021105100.2861830-1-mitulkumar.ajitkumar.golani@intel.com> References: <20241021105100.2861830-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" While running with fixed refresh rate and VRR timing generator set FAVT mode (Fixed Vtotal) in DP Adaptive Sync SDP to intimate the panel about Fixed refresh rate. Signed-off-by: Ankit Nautiyal Signed-off-by: Mitul Golani --- drivers/gpu/drm/i915/display/intel_dp.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 7e04913bc2ff..b1f68fff524d 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2785,7 +2785,7 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, as_sdp->target_rr = drm_mode_vrefresh(adjusted_mode); as_sdp->target_rr_divider = true; } else { - as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL; + as_sdp->mode = DP_AS_SDP_AVT_DYNAMIC_VTOTAL; as_sdp->vtotal = adjusted_mode->vtotal; as_sdp->target_rr = 0; } From patchwork Mon Oct 21 10:51:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Golani, Mitulkumar Ajitkumar" X-Patchwork-Id: 13843907 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1939FD0E6F0 for ; Mon, 21 Oct 2024 10:49:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id B15F010E489; Mon, 21 Oct 2024 10:49:25 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="B43VED2o"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) by gabe.freedesktop.org (Postfix) with ESMTPS id E2ADD10E489 for ; Mon, 21 Oct 2024 10:49:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1729507762; x=1761043762; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Sht8uCtzZl/fALIioUNrTmPDgfLfs8nQ5Gg5yFJJJVI=; b=B43VED2oMa2Y4Kyaa26yrDzfqmc8WIIbKpMaiEt/gFZCbST3BoA6BUB5 2iLLgAQe1HoOxz5sAJCmeo6Z7O3xBUNGrbkcwFfQT/0DwtCsgkzPi6DRN 7W+4x5lGGnTXSW9hdG0mofuAfwQlgD9Hh0fKEf+1OB1gCt6SGhYfmda43 lJ7uEen2n1OVvkLmHCfj6fgeaG7fL/0d294Xc9RPBAUpsyp46WjBmOpoR bWh6fj69qjuLzgiJzKIn2F1ROxPFxvB6u2i6gQNkYCI3pJ9sYBDRYkr+1 epdYQbOLZt66Am1Fmz3LQREuoqQ3sVZgK8ZVUr6TlVmm08fMMK3+yhHea w==; X-CSE-ConnectionGUID: 9syB6HyEQM+nehYeTfgJ+Q== X-CSE-MsgGUID: Oh7BkDtFRFCGMsMi4kdsTQ== X-IronPort-AV: E=McAfee;i="6700,10204,11231"; a="28439939" X-IronPort-AV: E=Sophos;i="6.11,220,1725346800"; d="scan'208";a="28439939" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2024 03:49:21 -0700 X-CSE-ConnectionGUID: U+ySU2cBQ5yyvbRI1u9MKg== X-CSE-MsgGUID: qJl2TwJrSpa/5fC3lB/OBg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.11,199,1725346800"; d="scan'208";a="84310763" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by orviesa003.jf.intel.com with ESMTP; 21 Oct 2024 03:49:21 -0700 From: Mitul Golani To: intel-gfx@lists.freedesktop.org Cc: ankit.k.nautiyal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v3 3/3] drm/i915/dp: Compute as_sdp based on if vrr possible Date: Mon, 21 Oct 2024 16:21:00 +0530 Message-ID: <20241021105100.2861830-4-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20241021105100.2861830-1-mitulkumar.ajitkumar.golani@intel.com> References: <20241021105100.2861830-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" Adaptive sync sdp param computation, specifically minimum vtotal is blocking vrr enable and disable fastset requirements in certain scenario i.e. during null modeset, this minimum vtotal we can configure during full modeset as well when sink is having vrr support, where it doesn't need dependency on vrr.enable status and can also match vrr enable/disable fastset requirement. Signed-off-by: Mitul Golani --- drivers/gpu/drm/i915/display/intel_dp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index b1f68fff524d..0fefe6f16257 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -2769,7 +2769,7 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; - if (!crtc_state->vrr.enable || !intel_dp->as_sdp_supported) + if (!intel_vrr_possible(crtc_state) || !intel_dp->as_sdp_supported) return; crtc_state->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_ADAPTIVE_SYNC); @@ -2786,7 +2786,7 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp, as_sdp->target_rr_divider = true; } else { as_sdp->mode = DP_AS_SDP_AVT_DYNAMIC_VTOTAL; - as_sdp->vtotal = adjusted_mode->vtotal; + as_sdp->vtotal = crtc_state->vrr.vmin + 1; as_sdp->target_rr = 0; } }