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For QM/QXP, the 4 power domains are: DSP, DSP_RAM, MU13A, MU13B. First off, drop MU13A from the count as its already attached to lsio_mu13. This decreases the count to 3. Secondly, drop DSP and DSP_RAM from the count for QXP. These are already attached to the DSP's LPCGs. Thirdly, a new power domain is required for DSP-SCU communication (MU2A). With this in mind, the number of required power domains for QXP is 2 (MU2A, MU13B), while for QM it's 4 (MU13B, DSP, DSP_RAM, MU2A). Update the fsl,dsp binding to reflect all of this information. Since the arm,mhuv2 binding has an example node using the fsl,imx8qxp-dsp compatible, remove two of the extra PDs to align with the required power domain count. Signed-off-by: Laurentiu Mihalcea Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/dsp/fsl,dsp.yaml | 31 +++++++++++++++---- .../bindings/mailbox/arm,mhuv2.yaml | 2 +- 2 files changed, 26 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml index 9af40da5688e..ab93ffd3d2e5 100644 --- a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml @@ -99,14 +99,35 @@ allOf: contains: enum: - fsl,imx8qxp-dsp - - fsl,imx8qm-dsp - fsl,imx8qxp-hifi4 + then: + properties: + power-domains: + minItems: 2 + maxItems: 2 + + - if: + properties: + compatible: + contains: + enum: + - fsl,imx8qm-dsp - fsl,imx8qm-hifi4 then: properties: power-domains: minItems: 4 - else: + + - if: + properties: + compatible: + contains: + enum: + - fsl,imx8mp-dsp + - fsl,imx8mp-hifi4 + - fsl,imx8ulp-dsp + - fsl,imx8ulp-hifi4 + then: properties: power-domains: maxItems: 1 @@ -157,10 +178,8 @@ examples: <&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>, <&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>; clock-names = "ipg", "ocram", "core"; - power-domains = <&pd IMX_SC_R_MU_13A>, - <&pd IMX_SC_R_MU_13B>, - <&pd IMX_SC_R_DSP>, - <&pd IMX_SC_R_DSP_RAM>; + power-domains = <&pd IMX_SC_R_MU_13B>, + <&pd IMX_SC_R_MU_2A>; mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1"; mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>; memory-region = <&dsp_reserved>; diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml index a4f1fe63659a..02f06314d85f 100644 --- a/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml +++ b/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml @@ -197,7 +197,7 @@ examples: reg = <0 0x596e8000 0 0x88000>; clocks = <&adma_lpcg 0>, <&adma_lpcg 1>, <&adma_lpcg 2>; clock-names = "ipg", "ocram", "core"; - power-domains = <&pd 0>, <&pd 1>, <&pd 2>, <&pd 3>; + power-domains = <&pd 0>, <&pd 1>; mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1"; mboxes = <&mhu_tx 2 0>, //data-transfer protocol with 5 windows, mhu-tx <&mhu_tx 3 0>, //data-transfer protocol with 7 windows, mhu-tx From patchwork Mon Oct 21 15:52:17 2024 Content-Type: text/plain; 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Since the firmware requires that some audio-related IPs be disabled in Linux, this will clash with the configurations from the imx8 board DTs (i.e: imx8qm-mek, imx8qxp-mek, etc...), thus making the dsp unusable (since the firmware won't function properly). To avoid this issue, configure the 'dsp' node for rproc. This way, users will be able to use the dsp alongside the board-level audio configuration as long as the firmware doesn't need the audio IPs. Signed-off-by: Laurentiu Mihalcea --- .../boot/dts/freescale/imx8-ss-audio.dtsi | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi index ff5df0fed9e9..a60ebb718789 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-audio.dtsi @@ -431,22 +431,19 @@ dsp_ram_lpcg: clock-controller@59590000 { }; dsp: dsp@596e8000 { - compatible = "fsl,imx8qxp-dsp"; + compatible = "fsl,imx8qxp-hifi4"; reg = <0x596e8000 0x88000>; clocks = <&dsp_lpcg IMX_LPCG_CLK_5>, <&dsp_ram_lpcg IMX_LPCG_CLK_4>, <&dsp_lpcg IMX_LPCG_CLK_7>; clock-names = "ipg", "ocram", "core"; - power-domains = <&pd IMX_SC_R_MU_13A>, - <&pd IMX_SC_R_MU_13B>, - <&pd IMX_SC_R_DSP>, - <&pd IMX_SC_R_DSP_RAM>; - mbox-names = "txdb0", "txdb1", - "rxdb0", "rxdb1"; - mboxes = <&lsio_mu13 2 0>, - <&lsio_mu13 2 1>, - <&lsio_mu13 3 0>, - <&lsio_mu13 3 1>; + power-domains = <&pd IMX_SC_R_MU_13B>, + <&pd IMX_SC_R_MU_2A>; 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Mon, 21 Oct 2024 08:53:04 -0700 (PDT) From: Laurentiu Mihalcea To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Daniel Baluta , Shengjiu Wang , Iuliana Prodan , Tushar Khandelwal , Viresh Kumar , Frank Li Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 3/6] arm64: dts: imx8qxp-mek: add dsp rproc-related mem regions Date: Mon, 21 Oct 2024 11:52:18 -0400 Message-Id: <20241021155221.112073-4-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241021155221.112073-1-laurentiumihalcea111@gmail.com> References: <20241021155221.112073-1-laurentiumihalcea111@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Laurentiu Mihalcea Add missing dsp rproc-related reserved memory regions and assign them to the 'dsp' node. Signed-off-by: Laurentiu Mihalcea Reviewed-by: Frank Li --- arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 21 ++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts index 936ba5ecdcac..4c4e71d39bac 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts @@ -21,6 +21,24 @@ memory@80000000 { reg = <0x00000000 0x80000000 0 0x40000000>; }; + reserved-memory { + dsp_vdev0vring0: memory@942f0000 { + reg = <0 0x942f0000 0 0x8000>; + no-map; + }; + + dsp_vdev0vring1: memory@942f8000 { + reg = <0 0x942f8000 0 0x8000>; + no-map; + }; + + dsp_vdev0buffer: memory@94300000 { + compatible = "shared-dma-pool"; + reg = <0 0x94300000 0 0x100000>; + no-map; + }; + }; + reg_usdhc2_vmmc: usdhc2-vmmc { compatible = "regulator-fixed"; regulator-name = "SD1_SPWR"; @@ -63,7 +81,8 @@ sound-wm8960 { }; &dsp { - memory-region = <&dsp_reserved>; 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Mon, 21 Oct 2024 08:53:06 -0700 (PDT) From: Laurentiu Mihalcea To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Daniel Baluta , Shengjiu Wang , Iuliana Prodan , Tushar Khandelwal , Viresh Kumar , Frank Li Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 4/6] arm64: dts: imx8qm: drop dsp node from audio_subsys bus Date: Mon, 21 Oct 2024 11:52:19 -0400 Message-Id: <20241021155221.112073-5-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241021155221.112073-1-laurentiumihalcea111@gmail.com> References: <20241021155221.112073-1-laurentiumihalcea111@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Laurentiu Mihalcea On i.MX8QM, the DSP is in the VPU subsystem, which means that using the 'dsp' node from 'imx8-ss-audio.dtsi' is wrong as it's placed under the wrong bus. As such, drop it. Signed-off-by: Laurentiu Mihalcea Reviewed-by: Frank Li --- arch/arm64/boot/dts/freescale/imx8qm.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi index 3ee6e2869e3c..f8b577ebdbef 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi @@ -603,3 +603,5 @@ mipi_pll_div2_clk: clock-controller-mipi-div2-pll { #include "imx8qm-ss-audio.dtsi" #include "imx8qm-ss-lvds.dtsi" #include "imx8qm-ss-mipi.dtsi" + +/delete-node/ &dsp; From patchwork Mon Oct 21 15:52:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Mihalcea X-Patchwork-Id: 13844367 Received: from mail-ej1-f45.google.com (mail-ej1-f45.google.com [209.85.218.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1CE4A1CDFDA for ; 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Mon, 21 Oct 2024 08:53:09 -0700 (PDT) Received: from playground.localdomain ([86.127.146.72]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-a9a912edfd0sm218614366b.67.2024.10.21.08.53.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Oct 2024 08:53:08 -0700 (PDT) From: Laurentiu Mihalcea To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Daniel Baluta , Shengjiu Wang , Iuliana Prodan , Tushar Khandelwal , Viresh Kumar , Frank Li Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 5/6] arm64: dts: imx8qm: add node for VPU dsp Date: Mon, 21 Oct 2024 11:52:20 -0400 Message-Id: <20241021155221.112073-6-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241021155221.112073-1-laurentiumihalcea111@gmail.com> References: <20241021155221.112073-1-laurentiumihalcea111@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Laurentiu Mihalcea Add DT node for i.MX8QM's DSP, which is found in the VPU subsystem. Signed-off-by: Laurentiu Mihalcea Reviewed-by: Frank Li --- arch/arm64/boot/dts/freescale/imx8qm.dtsi | 26 +++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi index f8b577ebdbef..abd7cfd9a6c2 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi @@ -581,6 +581,32 @@ mipi_pll_div2_clk: clock-controller-mipi-div2-pll { clock-output-names = "mipi_pll_div2_clk"; }; + vpu_subsys_dsp: bus@55000000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x55000000 0x0 0x55000000 0x1000000>; + + vpu_dsp: dsp@556e8000 { + compatible = "fsl,imx8qm-hifi4"; + reg = <0x556e8000 0x88000>; + clocks = <&clk_dummy>, + <&clk_dummy>, + <&clk_dummy>; + clock-names = "ipg", "ocram", "core"; + power-domains = <&pd IMX_SC_R_MU_13B>, + <&pd IMX_SC_R_DSP>, + <&pd IMX_SC_R_DSP_RAM>, + <&pd IMX_SC_R_MU_2A>; + mboxes = <&lsio_mu13 0 0>, + <&lsio_mu13 1 0>, + <&lsio_mu13 3 0>; + mbox-names = "tx", "rx", "rxdb"; + firmware-name = "imx/dsp/hifi4.bin"; + status = "disabled"; + }; + }; + /* sorted in register address */ #include "imx8-ss-cm41.dtsi" #include "imx8-ss-audio.dtsi" From patchwork Mon Oct 21 15:52:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laurentiu Mihalcea X-Patchwork-Id: 13844368 Received: from mail-ej1-f52.google.com (mail-ej1-f52.google.com [209.85.218.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F41B81CEAC2 for ; Mon, 21 Oct 2024 15:53:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.218.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729525994; cv=none; b=CoNrHKG0CtH9tAox7lJHxoW9xRY6FfM0AUB/Y2RJSUJlZiJfO5viuY/WmimjAYk2lALEJusZp+LexKTQS94GHbgtpBwdCCEOBen8RAMlZoXR7mP0f/I9PJlg5nCAjH30Jxnj9Tx2BJArbgHKf8oGGtwUHSrGHoS1PFAcmI1+OPw= ARC-Message-Signature: i=1; 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Mon, 21 Oct 2024 08:53:10 -0700 (PDT) From: Laurentiu Mihalcea To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Daniel Baluta , Shengjiu Wang , Iuliana Prodan , Tushar Khandelwal , Viresh Kumar , Frank Li Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 6/6] arm64: dts: imx8qm-mek: enable dsp node for rproc usage Date: Mon, 21 Oct 2024 11:52:21 -0400 Message-Id: <20241021155221.112073-7-laurentiumihalcea111@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241021155221.112073-1-laurentiumihalcea111@gmail.com> References: <20241021155221.112073-1-laurentiumihalcea111@gmail.com> Precedence: bulk X-Mailing-List: imx@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Laurentiu Mihalcea Set the status of the dsp node to "okay" and assign and add its reserved memory regions. Signed-off-by: Laurentiu Mihalcea Reviewed-by: Frank Li --- arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 27 ++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts index 62203eed6a6c..d51da3b6b3aa 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts @@ -92,6 +92,27 @@ vdevbuffer: memory@90400000 { reg = <0 0x90400000 0 0x100000>; no-map; }; + + dsp_reserved: memory@92400000 { + reg = <0 0x92400000 0 0x1000000>; + no-map; + }; + + dsp_vdev0vring0: memory@942f0000 { + reg = <0 0x942f0000 0 0x8000>; + no-map; + }; + + dsp_vdev0vring1: memory@942f8000 { + reg = <0 0x942f8000 0 0x8000>; + no-map; + }; + + dsp_vdev0buffer: memory@94300000 { + compatible = "shared-dma-pool"; + reg = <0 0x94300000 0 0x100000>; + no-map; + }; }; lvds_backlight0: backlight-lvds0 { @@ -640,6 +661,12 @@ &sai7 { status = "okay"; }; +&vpu_dsp { + memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>, + <&dsp_vdev0vring1>, <&dsp_reserved>; + status = "okay"; +}; + &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog>;