From patchwork Thu Oct 24 17:05:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cody Eksal X-Patchwork-Id: 13849499 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 518DD1FBF45; Thu, 24 Oct 2024 17:19:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729790356; cv=none; b=Z9caYtR2dCpjh7ZWYp60FzWovTTgrCJaG1+/FGITf2kG8pHPXTMBVsP3Z9a8akzhswp4t3nDyuLfF+oB17S8Y0sgpoRdcQSrVZsRi8bjj08+XJ/FfoGCMq1h1ZiphG65CLZql3Sz0HHu4XpJTztU3zLeJL/O3MZ2xkYPGr89BVU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729790356; c=relaxed/simple; bh=8tBNvio1ObQTdhVztprL74DuHbZpuJ/042vXRGsdyBc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OuGPNiQpnsgoGkBV1mZHcHIXsdtXIWRGbnK1E2hJdRdq3azw63Wx1uNPLKL43wqBepJV8oem3s/YxGhEB9nlRBRkce0b1d7g7n8xrtr+P4b1YhBZ27Gmxj1nKChtmDDISHz4FC3P1KUJoLqYs984qwk8gQcoKH//I0IVI7lflE0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=gBpbT0s4; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="gBpbT0s4" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1729789781; bh=8tBNvio1ObQTdhVztprL74DuHbZpuJ/042vXRGsdyBc=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=gBpbT0s4l/mH/5QaMbAWMR9X/xoQ2LxH8ZCno0hvGjlhDc0U6Qp28p8TrQ6cLjCPt 2JdrefvdU6KCkLy0g7yzngC/ECTV18sfnhi3F5dLI1qoil3nT/rXYzu6aIJ0m35q3+ AZPfQdcVTq7ZeKK3gTHKbBSADrQmFoeehWhsb2RAq5BsjuYcjo/y6IoeXVA7Ju+Sjj /fsawnI5GeVxUwBixvNrppUX7BK9mfaazcRMhwOpdzWKiJOuwwOhl6nZ0EcFdg1tnV NjeqgtTgIUhtvTq6HJFNZZorHxqe/mvKk3VX9e7GPPODi/qhKTlDzs8N61/d88LNSy vuLAAireR7sXg== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Cody Eksal , Andre Przywara , Parthiban , Yangtao Li , Florian Fainelli , Vinod Koul , Linus Walleij , Thierry Reding , Krzysztof Kozlowski , Maxime Ripard , Greg Kroah-Hartman , Yangtao Li , Viresh Kumar , Nishanth Menon , Stephen Boyd , Kishon Vijay Abraham I , "Rafael J. Wysocki" Subject: [PATCH 01/13] arm64: dts: allwinner: A100: Add PMU mode Date: Thu, 24 Oct 2024 14:05:19 -0300 Message-ID: <20241024170540.2721307-2-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> References: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Yangtao Li Add the Performance Monitoring Unit (PMU) device tree node to the A100 .dtsi, which tells DT users which interrupts are triggered by PMU overflow events on each core. Signed-off-by: Yangtao Li Reviewed-by: Andre Przywara Signed-off-by: Cody Eksal --- arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index a3dccf193765..1eca7c220ede 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -25,21 +25,21 @@ cpu0: cpu@0 { enable-method = "psci"; }; - cpu@1 { + cpu1: cpu@1 { compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <0x1>; enable-method = "psci"; }; - cpu@2 { + cpu2: cpu@2 { compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <0x2>; enable-method = "psci"; }; - cpu@3 { + cpu3: cpu@3 { compatible = "arm,cortex-a53"; device_type = "cpu"; reg = <0x3>; @@ -47,6 +47,15 @@ cpu@3 { }; }; + pmu { + compatible = "arm,cortex-a53-pmu"; + interrupts = , + , + , + ; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + psci { compatible = "arm,psci-1.0"; method = "smc"; From patchwork Thu Oct 24 17:05:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cody Eksal X-Patchwork-Id: 13849497 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3A6EA1FAF1E; Thu, 24 Oct 2024 17:19:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729790356; cv=none; b=JGOcU2H+y6F5tVyDgejkE4QhqtE6IXM7UQZDnf1w8JQArAFDbWoTnj/objKvMIwuvafQ/NoT3OVzdTeVtCLWXwC1Wzr/l7PjVWYKdEFQMGR0eoDbCbta/97hPp99UFpAViX0IRopz0hp4/BvB4oS2kXvlAdy275ocCULvpMM2s4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729790356; c=relaxed/simple; bh=c6mAFMfMnzUCM/bRTvKysE72zxNJKIHReq/xcIwXjco=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=C6Jiul/wnzH+xrrVqIz1Nc/L7JclAvl5nvCdHk18GBVD+0XVplyrW//xHkrvmr2f3qT19cAGFHjpXJaxLLtmD9RxmIyC/J3xiNASj19LvNBD/Eby5GMCvgs+iv3yCe1ScASPMuZ4vJdKmnYcKF0gNP1bQaJ6NQqU4f5VtczhK4I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=hcApd2xl; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="hcApd2xl" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1729789781; bh=c6mAFMfMnzUCM/bRTvKysE72zxNJKIHReq/xcIwXjco=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hcApd2xlBpYyS0cXu9eSE1lhCyAo9OS/FOBF5M4uqtwdGFPa5eYsTWwyGOxjEap4O BKUlObhTk7+teSIm2Kjim68paDZKTyAywxNx7ZQcm4ClXFhrarEhaKyS22WRtAoO3n U2pxyPNIJsSuhVNjeG5w0wkPXiK9G3nli1J2mDCQxNG91GA6fllxHOWcijXo2wzDxG Yv38dsP6WsEkhFHu+jRs+4PdeadGAHntpUbLN09gvyYrdlKNMlhJd78HVwVog1cAWM s1otUpErvBIyK83IaZykiIHKkIKQra0NQo6IgaOOvsTW+rp2BGuYrg+Yz5s7rAgtEF Gmpu/d9ayT9LQ== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Cody Eksal , Andre Przywara , Parthiban , Yangtao Li , Florian Fainelli , Vinod Koul , Linus Walleij , Thierry Reding , Krzysztof Kozlowski , Maxime Ripard , Greg Kroah-Hartman , Yangtao Li , Viresh Kumar , Nishanth Menon , Stephen Boyd , Kishon Vijay Abraham I , "Rafael J. Wysocki" Subject: [PATCH 02/13] arm64: dts: allwinner: a100: add watchdog node Date: Thu, 24 Oct 2024 14:05:20 -0300 Message-ID: <20241024170540.2721307-3-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> References: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Yangtao Li Declare A100's watchdog in the device-tree. Signed-off-by: Yangtao Li Reviewed-by: Andre Przywara Signed-off-by: Cody Eksal --- arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index 1eca7c220ede..adb11b26045f 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -144,6 +144,14 @@ ths_calibration: calib@14 { }; }; + watchdog@30090a0 { + compatible = "allwinner,sun50i-a100-wdt", + "allwinner,sun6i-a31-wdt"; + reg = <0x030090a0 0x20>; + interrupts = ; + clocks = <&dcxo24M>; + }; + pio: pinctrl@300b000 { compatible = "allwinner,sun50i-a100-pinctrl"; reg = <0x0300b000 0x400>; From patchwork Thu Oct 24 17:05:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cody Eksal X-Patchwork-Id: 13849500 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C3581FAF05; Thu, 24 Oct 2024 17:19:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729790356; cv=none; b=R8U6YdJFAwrpv4lSW+nrK8mDZnz8G2jGNqn7MtbXBXWrugMyMWTrKRh7esCVixdvu/AaRvrlY4V0jUWMQLLAOTHSL5ApHG+ZJf49gC1Wm4QJnarR4nRtENLSeJzJKD4L6ZHfnFWrzFe+qnmGupJc/ujCZpaUZK8N3EGet3Tgqww= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729790356; c=relaxed/simple; bh=JkRVwM9k+j3E/nlOdSLDJcFQJqTbTeyz4GS5TOzoBYo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=TGWBd39KGY/SS1cjJsB3xh73pypvVYpMuStXb8CIc/oGNq9SMqFOT7LPNU7VNqM3tn6FgwaRK9VT0EW0aosyWB27ga1lsmmCU73i9b7Y2gJZ1Bkee9dfL0vl7cYPdsyYs5sbdk1YvulQe0G9YDgW7FJm5Wz/vFu5/QCe0KNBkFU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=fu0uHdmh; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="fu0uHdmh" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1729789782; bh=JkRVwM9k+j3E/nlOdSLDJcFQJqTbTeyz4GS5TOzoBYo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=fu0uHdmhg589NknjBuOq9MenRyuPkuLBEwT8UHfJfGkBBQxJ0hjtome9pFYIJ+ttH yKeWh1Jg8E+iEXu7C5XCIQSpBNGf8kSqDa33v+kuK3L3PRnHPpAF9zvKb0V9uIU+/a GynAIKZ3nVc4shet1UoW5blBjtZxNaMS8uLnjCxh9EFoEPMlJ9l1z+y1id20ZKcXkr V+fE7ofcC6P22gbdH5KAYDiwtn2q0uNfEmE7kU2UJA1aZQgsUdHtX5KZQ/EOTltLxQ 0tNG3dPJI4PTOWsD/PXI1M1bLyvPGfNnPu1v77ZKBa+KHbvIaHbti9KNY/O6CJtxpl DRh1VwlvO88Mw== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard Cc: Cody Eksal , Andre Przywara , Parthiban , Yangtao Li , Florian Fainelli , Linus Walleij , Thierry Reding , Krzysztof Kozlowski , Greg Kroah-Hartman , Yangtao Li , Viresh Kumar , Nishanth Menon , Stephen Boyd , "Rafael J. Wysocki" Subject: [PATCH 03/13] dt-bindings: phy: sun50i-a64: add a100 compatible Date: Thu, 24 Oct 2024 14:05:21 -0300 Message-ID: <20241024170540.2721307-4-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> References: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The USB PHY found in the A100 is similar to that found in the A64, although it requires some quirks to be enabled. Add a compatible for the A100's variant. Signed-off-by: Cody Eksal Acked-by: Rob Herring (Arm) --- .../devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml b/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml index f557feca9763..b91e6c83722c 100644 --- a/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml +++ b/Documentation/devicetree/bindings/phy/allwinner,sun50i-a64-usb-phy.yaml @@ -18,6 +18,7 @@ properties: enum: - allwinner,sun20i-d1-usb-phy - allwinner,sun50i-a64-usb-phy + - allwinner,sun50i-a100-usb-phy reg: items: From patchwork Thu Oct 24 17:05:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cody Eksal X-Patchwork-Id: 13849496 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0D5AA1FAC51; Thu, 24 Oct 2024 17:19:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729790356; cv=none; b=GoUzPimaJdQba2tF/QcZKGYHUtjAwxTieQZ7IRtnnB60/9noMsALi5BL0lnevmrhb38eBgeF9lWFDWiVf5j3c9VxDxyAdtsyjL4q37PWICx+9uOpXAxEzBeVQl34M/7uJiBfPQWNQqDYYk3WUO2OVZj+n3jC6RehYZLiYh1jSJk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729790356; c=relaxed/simple; bh=RX+bua+zQmv95muSSfcwHCoRRExA1+Jmd6fbL7zvW6s=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=H8Hz08Qxr76SuQuCop5wctxkiic8NVGCCERu38BGaXtHf8Ke4Y+0MGWZt9fwkhbP1aPAKe8NrqmGyXcsWjlydfRV7T8Qdkm0btG5vGJBCgMwcgZalBW/ds1D4QwRK8NsbKCuJxb0+qflhBxrokHzkSPKRnURogK67yBXVJmOdf0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=iQxJhzXu; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="iQxJhzXu" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1729789782; bh=RX+bua+zQmv95muSSfcwHCoRRExA1+Jmd6fbL7zvW6s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iQxJhzXurv5NTaqqSXTBmDxmvJU4Vp9eGzjP1KUdQMgA1xxT5UGg9Cu7oefMCrZQs rVeFo0vRZm4G9AOmDRzn5AUliV7IdhiTKiAPiZ9hftmGxMQYh/DQpJAjR2ccS+3F59 hKzjtxoc3C5PvikWx/7/msKmgee7/jU67G+M7b2vhyIKauebjab0xfj1H5L2ZdWyZc LMpjLnghC7scjYGdwNJA5T5YY6rkaNMtaqmBS6trj1i21sURoBjA81DnOMwNevUnBr ZpxcxPHA7hQTRDpGFs5gNVm7oB+IymjDva84lJoLfjRzBZPsWdFDAd9sxWy4gyn3+z pQnIJZiaiB9wg== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Cody Eksal , Andre Przywara , Parthiban , Yangtao Li , Florian Fainelli , Vinod Koul , Linus Walleij , Thierry Reding , Krzysztof Kozlowski , Chen-Yu Tsai , Maxime Ripard , Yangtao Li , Viresh Kumar , Nishanth Menon , Stephen Boyd , Jernej Skrabec , Samuel Holland , Kishon Vijay Abraham I , "Rafael J. Wysocki" Subject: [PATCH 04/13] dt-bindings: usb: Add A100 compatible string Date: Thu, 24 Oct 2024 14:05:22 -0300 Message-ID: <20241024170540.2721307-5-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> References: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The Allwinner A100 contains two fully OHCI/EHCI compatible USB host controllers. Add their compatible strings to the list of generic OHCI/EHCI controllers. Signed-off-by: Cody Eksal Reviewed-by: Andre Przywara Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/usb/generic-ehci.yaml | 1 + Documentation/devicetree/bindings/usb/generic-ohci.yaml | 1 + 2 files changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml index 2ed178f16a78..e00e98dd04af 100644 --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml @@ -30,6 +30,7 @@ properties: - allwinner,sun4i-a10-ehci - allwinner,sun50i-a64-ehci - allwinner,sun50i-h6-ehci + - allwinner,sun50i-a100-ehci - allwinner,sun50i-h616-ehci - allwinner,sun5i-a13-ehci - allwinner,sun6i-a31-ehci diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Documentation/devicetree/bindings/usb/generic-ohci.yaml index b9576015736b..6ce81979781b 100644 --- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml @@ -17,6 +17,7 @@ properties: - allwinner,sun4i-a10-ohci - allwinner,sun50i-a64-ohci - allwinner,sun50i-h6-ohci + - allwinner,sun50i-a100-ohci - allwinner,sun50i-h616-ohci - allwinner,sun5i-a13-ohci - allwinner,sun6i-a31-ohci From patchwork Thu Oct 24 17:05:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cody Eksal X-Patchwork-Id: 13849442 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B6992167DAC; Thu, 24 Oct 2024 17:09:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729789790; cv=none; b=CrGKvW5QDl9olOG8h2Bz71STbJpmB4tfVlfLILvUlPLK5yYbLcQqZyMy35/0WcbwFtiHvKQia95yIBzyV+xu2sTQR038F8QmqyPNXO9f+UJ5+5qPzYKm8m3f7v3kZ6zJRB62KVNbsUUNywkvMNJ4OZ84Fy9Jv+Wo/GgsoFiAt90= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729789790; c=relaxed/simple; bh=LIXJN7WyqZbUIo6zFt/nMh6Am1vcombr30b63lmOUnw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=GHDRWe/UDHTmU8d2y5B9YKkqkuMHo7W6bPe7GwiHXt/kBowBHu2Rq/b0biza49gm/TVfsq9M7G4qokglkJ+3V5lhlRN10lEVgW6rTUTSSAq3o0TnRzz91kGKQyq7PLJa147Yi5kncFkr+eksslpLkjdyP3uDyDBvCSskOgveXD8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=jpK+LRwA; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="jpK+LRwA" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1729789783; bh=LIXJN7WyqZbUIo6zFt/nMh6Am1vcombr30b63lmOUnw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=jpK+LRwAyINXIUY2QUYqrQYDafODoy+OCx/WIRluz3+tup0nE0CF9Vavkfw+vt6AH dsEFQB1U0j7su8mzUmoj2G9otG40x41feD/OkfJwR1J6y7B9PPdY/zGxFaAKDCIrp2 w8DCkw7P8fKCBcx512aZvLtJuPL0gT97cXESWCBOw56LuDaxMpU4dQipwgjP2tKq7o uPQTnoQUdPLdm9nfnMscbLsGl7bScPLf2Rei4En/Iu/VVGTFaZP386i1pTBZzqnTDA cilvq2WgrzIMe3Fa9tS5lEO9a49NHDtahB5aBG/1jKjXqKC5MsHb5rDH98JHBUc2/G kvA0Fc+KlyKOw== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Greg Kroah-Hartman , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard Cc: Cody Eksal , Andre Przywara , Parthiban , Yangtao Li , Florian Fainelli , Vinod Koul , Linus Walleij , Thierry Reding , Krzysztof Kozlowski , Yangtao Li , Viresh Kumar , Nishanth Menon , Stephen Boyd , Kishon Vijay Abraham I , "Rafael J. Wysocki" Subject: [PATCH 05/13] dt-bindings: usb: sunxi-musb: Add A100 compatible string Date: Thu, 24 Oct 2024 14:05:23 -0300 Message-ID: <20241024170540.2721307-6-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> References: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The A100 MUSB peripheral has 10 endpoints, and thus is compatible with the A33 version. Signed-off-by: Cody Eksal --- .../devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml b/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml index f972ce976e86..d4993336a29b 100644 --- a/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml +++ b/Documentation/devicetree/bindings/usb/allwinner,sun4i-a10-musb.yaml @@ -24,6 +24,7 @@ properties: - allwinner,sun8i-a83t-musb - allwinner,sun20i-d1-musb - allwinner,sun50i-h6-musb + - allwinner,sun50i-a100-musb - const: allwinner,sun8i-a33-musb - items: - const: allwinner,sun50i-h616-musb From patchwork Thu Oct 24 17:05:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cody Eksal X-Patchwork-Id: 13849443 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E331E1F81A8; Thu, 24 Oct 2024 17:09:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729789791; cv=none; b=UbqfZfrMaTQ+0ePxtj0fTQKIbsNgR+9Ct3QAHw0xZaVUgu7Rd7NqWqB6lGxzlO9cDwZImbhL2rOdw3fQ1CZ8QFL86H30rcRo9cuaOhzyFuLNgqzjP8DVoAcipoqpKbPxNdRbSG3UQCyFJO5NSzRDu9sN+O37QIPz/6bsjygbRKA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729789791; c=relaxed/simple; bh=FH09cfs2D/eTLSS+cO6Kkfb54K4fYoxC6N0jK4Y1o38=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=j8xUq11TwpKD2xm05BGryWXoTwGINgoaE2leJBspz5DSePBEiY2dbu47aaWsd7ItG/5eL7uxs8BgBVAZN4u75CJIdmQ1K+qk+ZLjNWIFIKa44PQsntUNM2SnH54H233Qsfd56rUrxqC6GSK6Q/KBTkBUmM1amcGgmSFFFMVEKFE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=bBAsoLfA; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="bBAsoLfA" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1729789785; bh=FH09cfs2D/eTLSS+cO6Kkfb54K4fYoxC6N0jK4Y1o38=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bBAsoLfA8Xr8/ymGhdlRzh7wD6MaTfs+sSVd7UkyXRmhfIO+ZH9IeAl5UQrOJsfCu BAV00mWamykjITl8MViMv08vXtYZvcJyx8x3pTQ9hWLJjyX2p3SLvcHxx7mLNULIGa 99+JcSKt6UUf4uYqTowPeo9IzKQ0uuTJyXtU5N3KjTLjFUx2Hs4i5kjUbVQPPEN8E5 Z8ebFUldvG0reYFdBejn99W8mJCunTX4VpVFBTT9EX6tQOHxc/61GNCNbivA4BSHbA WZi/bY6oJLsSz9A4Q8uo048ppkl6q9ZSS2RMYnjbQiG2vKWa9kThlsTW7vZoYy792J 75AaHJpmNx31Q== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Vinod Koul , Kishon Vijay Abraham I , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Cody Eksal , Yangtao Li , Florian Fainelli , Krzysztof Kozlowski Cc: Andre Przywara , Parthiban , Linus Walleij , Thierry Reding , Maxime Ripard , Greg Kroah-Hartman , Yangtao Li , Viresh Kumar , Nishanth Menon , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , "Rafael J. Wysocki" Subject: [PATCH 06/13] phy: sun4i-usb: add support for A100 USB PHY Date: Thu, 24 Oct 2024 14:05:24 -0300 Message-ID: <20241024170540.2721307-7-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> References: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Yangtao Li Add support for a100's usb phy, which with 2 PHYs. Signed-off-by: Yangtao Li [masterr3c0rd@epochal.quest: modified to use quirk flags] Signed-off-by: Cody Eksal --- drivers/phy/allwinner/phy-sun4i-usb.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/phy/allwinner/phy-sun4i-usb.c b/drivers/phy/allwinner/phy-sun4i-usb.c index b0f19e950601..a3942b2ee90b 100644 --- a/drivers/phy/allwinner/phy-sun4i-usb.c +++ b/drivers/phy/allwinner/phy-sun4i-usb.c @@ -1006,6 +1006,16 @@ static const struct sun4i_usb_phy_cfg sun50i_a64_cfg = { .phy0_dual_route = true, }; +static const struct sun4i_usb_phy_cfg sun50i_a100_cfg = { + .num_phys = 2, + .disc_thresh = 3, + .phyctl_offset = REG_PHYCTL_A33, + .dedicated_clocks = true, + .hci_phy_ctl_clear = PHY_CTL_SIDDQ, + .phy0_dual_route = true, + .siddq_in_base = true, +}; + static const struct sun4i_usb_phy_cfg sun50i_h6_cfg = { .num_phys = 4, .phyctl_offset = REG_PHYCTL_A33, @@ -1040,6 +1050,7 @@ static const struct of_device_id sun4i_usb_phy_of_match[] = { { .compatible = "allwinner,sun20i-d1-usb-phy", .data = &sun20i_d1_cfg }, { .compatible = "allwinner,sun50i-a64-usb-phy", .data = &sun50i_a64_cfg}, + { .compatible = "allwinner,sun50i-a100-usb-phy", .data = &sun50i_a100_cfg }, { .compatible = "allwinner,sun50i-h6-usb-phy", .data = &sun50i_h6_cfg }, { .compatible = "allwinner,sun50i-h616-usb-phy", .data = &sun50i_h616_cfg }, { .compatible = "allwinner,suniv-f1c100s-usb-phy", From patchwork Thu Oct 24 17:05:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cody Eksal X-Patchwork-Id: 13849446 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D3581FAEF6; Thu, 24 Oct 2024 17:09:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729789793; cv=none; b=kClCNcSgddifGkOq2C/Dc7hCgWoF6dXbu8Y+HU0KGOUSsEUWv6T1rNI1Nci4065fq3hwQkoODtJh24e9x1G7Dvpctj7jGcIFzQJKrDCDNg3TTbb/THjKq7JcpqS/F47Q/jrx2HPUEJocHsAfpqv1UqOaYyNcln8awMvuwwoqvQ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729789793; c=relaxed/simple; bh=SXlv9B8AoJX1K/LjIPZJ5S+TFLEbtezksBkekZtH358=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=VRS8GIPEjhTHYD4FYZFs4ModAOXOhUaufR5OMM+sJLC69+YcYlsnNrtoM7EChoDR7aHAQvS0s4KTHI7CGFK/2AVK1uUC0zSGLTf4mQZ/d6mrHJSzeKksw2BFq8K0bWPCKyZDK4PGCK685LZopUkoK78DxE8bJC+cKb45sY3PWM0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=SA0QNzYQ; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="SA0QNzYQ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1729789786; bh=SXlv9B8AoJX1K/LjIPZJ5S+TFLEbtezksBkekZtH358=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SA0QNzYQV4gTjTYnKFIEcdb3jDoLhhKKll25bO7rw3IkEcEfI+DB+wxCqvdgtSNOY GW/fOm7PZ8gaLs5uJIYAlXz+efQuBajSudGYQ/xI6ga6lnjRA2sAllK1wVLpuUE80g I3QwHnZhd+PzrNXdDzxQ7dzwF6aWFsfsfUsxQA4Yk/PTFKBaCXsdM8AAw7cNdnbw9J xPmhAGUB5wjMxtwNnhi82GjOKdjs+/cP1q09n1ZlCpvyKTIngTA5JfHr/4V+wrt7d6 QClQQ1sYyz9l0rNrw8YuirKraWliqG7YWtWiSzqKP9rUnUUiaKExexvIJHOdn/t43q rlSeOKqnCX4cA== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Cody Eksal , Andre Przywara , Parthiban , Yangtao Li , Florian Fainelli , Vinod Koul , Linus Walleij , Thierry Reding , Krzysztof Kozlowski , Maxime Ripard , Greg Kroah-Hartman , Yangtao Li , Viresh Kumar , Nishanth Menon , Stephen Boyd , Kishon Vijay Abraham I , "Rafael J. Wysocki" Subject: [PATCH 07/13] arm64: dts: allwinner: a100: add usb related nodes Date: Thu, 24 Oct 2024 14:05:25 -0300 Message-ID: <20241024170540.2721307-8-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> References: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Yangtao Li Allwinner A64 have two HCI USB controllers, a OTG controller and a USB PHY device, let's add nodes on dts. Signed-off-by: Yangtao Li [masterr3c0rd@epochal.quest: fallback to a33-musb instead of h3-musb] Signed-off-by: Cody Eksal --- .../arm64/boot/dts/allwinner/sun50i-a100.dtsi | 91 +++++++++++++++++++ 1 file changed, 91 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index adb11b26045f..0aee1b578661 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -302,6 +302,97 @@ ths: thermal-sensor@5070400 { #thermal-sensor-cells = <1>; }; + usbphy: phy@5100400 { + #phy-cells = <1>; + compatible = "allwinner,sun50i-a100-usb-phy"; + reg = <0x05100400 0x14>, + <0x05101800 0x4>, + <0x05200800 0x4>; + reg-names = "phy_ctrl", + "pmu0", + "pmu1"; + clocks = <&ccu CLK_USB_PHY0>, + <&ccu CLK_USB_PHY1>; + clock-names = "usb0_phy", + "usb1_phy"; + resets = <&ccu RST_USB_PHY0>, + <&ccu RST_USB_PHY1>; + reset-names = "usb0_reset", + "usb1_reset"; + status = "disabled"; + }; + + ehci0: usb@5101000 { + compatible = "allwinner,sun50i-a100-ehci", + "generic-ehci"; + reg = <0x05101000 0x100>; + interrupts = ; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_BUS_EHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>, + <&ccu RST_BUS_EHCI0>; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci0: usb@5101400 { + compatible = "allwinner,sun50i-a100-ohci", + "generic-ohci"; + reg = <0x05101400 0x100>; + interrupts = ; + clocks = <&ccu CLK_BUS_OHCI0>, + <&ccu CLK_USB_OHCI0>; + resets = <&ccu RST_BUS_OHCI0>; + phys = <&usbphy 0>; + phy-names = "usb"; + status = "disabled"; + }; + + usb_otg: usb@5100000 { + compatible = "allwinner,sun50i-a100-musb", + "allwinner,sun8i-a33-musb"; + reg = <0x05100000 0x0400>; + clocks = <&ccu CLK_BUS_OTG>; + resets = <&ccu RST_BUS_OTG>; + interrupts = ; + interrupt-names = "mc"; + phys = <&usbphy 0>; + phy-names = "usb"; + extcon = <&usbphy 0>; + dr_mode = "otg"; + status = "disabled"; + }; + + ehci1: usb@5200000 { + compatible = "allwinner,sun50i-a100-ehci", + "generic-ehci"; + reg = <0x05200000 0x100>; + interrupts = ; + clocks = <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_BUS_EHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_OHCI1>, + <&ccu RST_BUS_EHCI1>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + + ohci1: usb@5200400 { + compatible = "allwinner,sun50i-a100-ohci", + "generic-ohci"; + reg = <0x05200400 0x100>; + interrupts = ; + clocks = <&ccu CLK_BUS_OHCI1>, + <&ccu CLK_USB_OHCI1>; + resets = <&ccu RST_BUS_OHCI1>; + phys = <&usbphy 1>; + phy-names = "usb"; + status = "disabled"; + }; + r_ccu: clock@7010000 { compatible = "allwinner,sun50i-a100-r-ccu"; reg = <0x07010000 0x300>; From patchwork Thu Oct 24 17:05:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cody Eksal X-Patchwork-Id: 13849445 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A14A11FAF00; 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Wysocki" Subject: [PATCH 08/13] arm64: allwinner: A100: enable EHCI, OHCI and USB PHY nodes in Perf1 Date: Thu, 24 Oct 2024 14:05:26 -0300 Message-ID: <20241024170540.2721307-9-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> References: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Yangtao Li Add USB support on A100 perf1 board, which include two USB2.0 port. Signed-off-by: Yangtao Li Signed-off-by: Cody Eksal --- .../allwinner/sun50i-a100-allwinner-perf1.dts | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts index f5c5c1464482..c6d8264b91b7 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts @@ -7,6 +7,8 @@ #include "sun50i-a100.dtsi" +#include + /{ model = "Allwinner A100 Perf1"; compatible = "allwinner,a100-perf1", "allwinner,sun50i-a100"; @@ -18,6 +20,35 @@ aliases { chosen { stdout-path = "serial0:115200n8"; }; + + reg_usb1_vbus: usb1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb1-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 7 10 GPIO_ACTIVE_HIGH>; /* PH10 */ + enable-active-high; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&ehci1 { + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + +&ohci1 { + status = "okay"; +}; + +&usb_otg { + status = "okay"; }; &pio { @@ -178,3 +209,10 @@ &uart0 { pinctrl-0 = <&uart0_pb_pins>; status = "okay"; }; + +&usbphy { + usb0_id_det-gpios = <&pio 7 8 GPIO_ACTIVE_HIGH>; /* PH8 */ + usb0_vbus-supply = <®_drivevbus>; + usb1_vbus-supply = <®_usb1_vbus>; + status = "okay"; +}; From patchwork Thu Oct 24 17:05:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cody Eksal X-Patchwork-Id: 13849449 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F4AA1FAEF9; Thu, 24 Oct 2024 17:09:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729789794; cv=none; b=ZIDVZR22jhc2H7KCUJqY5HgBxdt9W4G8IaaYV+vuVgewdYSkFLQwNOt6+48xGhvOm8iY1oaSfeN9epsZnLIW/RmBdi5P84M6jYgFZkrmdpJ71rSvjQ6AKyEKHWPji+1JvHiICISn6r1amYf39MToCDzVD5/Y3ViM5shr8vS9/UI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729789794; c=relaxed/simple; bh=bHPvxwNam7d5e7DDcVYjGZMshprhb5/GH93Zen2fk8E=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=dXkez1zVZEFw+vV/DUBn8PO1A7tU4mGryZ1OGXYqNmpnqAYzuuQBZyjcGR3MPTCoLz7jGTQhGxy13DZAvQ9wM48NX/mHsxS0L6wXnJ3kw4G7szOAG8sW5FST9OJFGpc2Zh3SAwSZjiB1zBrV43d52S97lJUuSHPu/zXERjLIVpc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=M/0FCt16; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="M/0FCt16" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1729789787; bh=bHPvxwNam7d5e7DDcVYjGZMshprhb5/GH93Zen2fk8E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=M/0FCt16IYLO4RCFOninr0W8AfJM7xH0LRnX26BHyHD6Z9K2LjBPjpu7rf9g+aw60 tO20zweubmEKQAFJRexz9386imzHVMLd7xzIKkdXBtiSpJcBAvKvsHL/YzCiKIeLv/ zpqy5p7VHci7nUgddWFYQ6jVDZSXhLAr0HZATdKVw6YZh34CeIf5/EzSsG2teDY+KV 1TwY/LEwTw9nQEmvEOPbJWnbo6e2fPREqRFS7fTRjgcYQSb33m3BOSdXi5tTUlf+ig 3dfQ+cCmqAbEaM1ZE3ZBHRx5MH/vOdETDQWErUy+f9wQ5yJTh2L6PZdtLdMHqYsT7U L0OOu7T6TI0Og== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Cody Eksal , Andre Przywara , Parthiban , Yangtao Li , Florian Fainelli , Vinod Koul , Linus Walleij , Thierry Reding , Krzysztof Kozlowski , Maxime Ripard , Greg Kroah-Hartman , Yangtao Li , Viresh Kumar , Nishanth Menon , Stephen Boyd , Kishon Vijay Abraham I , "Rafael J. Wysocki" Subject: [PATCH 09/13] arm64: allwinner: a100: Add MMC related nodes Date: Thu, 24 Oct 2024 14:05:27 -0300 Message-ID: <20241024170540.2721307-10-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> References: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Yangtao Li The A100 has 3 MMC controllers, one of them being especially targeted to eMMC. Let's add nodes on dts. Signed-off-by: Yangtao Li Reviewed-by: Andre Przywara Signed-off-by: Cody Eksal --- .../arm64/boot/dts/allwinner/sun50i-a100.dtsi | 71 +++++++++++++++++++ 1 file changed, 71 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index 0aee1b578661..6dca766ea222 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -169,12 +169,83 @@ pio: pinctrl@300b000 { interrupt-controller; #interrupt-cells = <3>; + mmc0_pins: mmc0-pins { + pins = "PF0", "PF1", "PF2", "PF3", + "PF4", "PF5"; + function = "mmc0"; + drive-strength = <30>; + bias-pull-up; + }; + + /omit-if-no-ref/ + mmc1_pins: mmc1-pins { + pins = "PG0", "PG1", "PG2", "PG3", + "PG4", "PG5"; + function = "mmc1"; + drive-strength = <30>; + bias-pull-up; + }; + + mmc2_pins: mmc2-pins { + pins = "PC0", "PC1", "PC5", "PC6", + "PC8", "PC9", "PC10", "PC11", + "PC13", "PC14", "PC15", "PC16"; + function = "mmc2"; + drive-strength = <30>; + bias-pull-up; + }; + uart0_pb_pins: uart0-pb-pins { pins = "PB9", "PB10"; function = "uart0"; }; }; + mmc0: mmc@4020000 { + compatible = "allwinner,sun50i-a100-mmc"; + reg = <0x04020000 0x1000>; + clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC0>; + reset-names = "ahb"; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc1: mmc@4021000 { + compatible = "allwinner,sun50i-a100-mmc"; + reg = <0x04021000 0x1000>; + clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC1>; + reset-names = "ahb"; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + mmc2: mmc@4022000 { + compatible = "allwinner,sun50i-a100-emmc"; + reg = <0x04022000 0x1000>; + clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>; + clock-names = "ahb", "mmc"; + resets = <&ccu RST_BUS_MMC2>; + reset-names = "ahb"; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&mmc2_pins>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + uart0: serial@5000000 { compatible = "snps,dw-apb-uart"; reg = <0x05000000 0x400>; From patchwork Thu Oct 24 17:05:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cody Eksal X-Patchwork-Id: 13849448 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D6AA41FAF05; Thu, 24 Oct 2024 17:09:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729789793; cv=none; b=PvJX9hkuvIOiI/QyXxmyy440RCYtZqR1KkPqLunZG0JDPdlC0rMqwcCT8XtgDsQCwanGRpsZNW9u2mujp4mPOTUAghr+Enw78U3jIoCEzDKaO16QmD/nfKJfiE2NHZnqD8RMs43DKVfl6HMp9JjkSYFgRpCKrZLO0Y1WrOcoZZI= ARC-Message-Signature: i=1; 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Wysocki" Subject: [PATCH 10/13] arm64: dts: allwinner: a100: perf1: Add eMMC and MMC node Date: Thu, 24 Oct 2024 14:05:28 -0300 Message-ID: <20241024170540.2721307-11-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> References: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Yangtao Li A100 perf1 hava MicroSD slot and on-board eMMC module, add support for them. Signed-off-by: Yangtao Li Signed-off-by: Cody Eksal --- .../allwinner/sun50i-a100-allwinner-perf1.dts | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts index c6d8264b91b7..29e9d24da8b6 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts @@ -39,6 +39,22 @@ &ehci1 { status = "okay"; }; +&mmc0 { + vmmc-supply = <®_dcdc1>; + cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ + bus-width = <4>; + status = "okay"; +}; + +&mmc2 { + vmmc-supply = <®_dcdc1>; + vqmmc-supply = <®_aldo1>; + cap-mmc-hw-reset; + non-removable; + bus-width = <8>; + status = "okay"; +}; + &ohci0 { status = "okay"; }; From patchwork Thu Oct 24 17:05:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cody Eksal X-Patchwork-Id: 13849444 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D87711FAF07; Thu, 24 Oct 2024 17:09:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729789792; cv=none; b=izAi8nrmPTG7am2TlPIFM/eVgtFHb5ege1tynuUASAx9Sxke3zd0/4JeHAWE9s3BDrBBPkOQMQwThuGu3Q6C7uAXb5Ld7dxr3H2cTmkUewnx9G09I4+yAOASGhMU/TwOaarn+pfA1zkZEnum+JS0imA7mbCCDzc2Q3tZlRXKUSA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729789792; c=relaxed/simple; bh=0RkskRslYaUuKRSgVlTdkKv+Mh9NFTsXkwpsxrbjVIo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XIJy6MgHYI/JEX+X8mKEEIUCtgCKzJ6hR1XHEjw/vCH7Pq5d/LAXKOtXbMic1oNGA10qxDgWqgNDsyNfAIz2QEr+lf+jFg17E6NLt0vQzgGba69mEmsnBAET988vVql/7bzrxJxYlRCFQ/pN5SGlIqnqFZ4ykCzVUP2Tm9usmUY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=DL3jdBNp; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="DL3jdBNp" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1729789788; bh=0RkskRslYaUuKRSgVlTdkKv+Mh9NFTsXkwpsxrbjVIo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DL3jdBNpJNo5KntIZ0v25l3caK6zQjh0AQF//EWEnTja844TVoiVVkP53yIEkSYid DKTa16726L5IJMSUtxcb8b+x3AVift1IIubQRxKvoftZxNIZZszSGiWwaeYSM3ZXgC IRF/+WiDp5wGzmj/yjAhTQb1gMpPaSYQwSAnHFSzr9wONGl5h8f5FxcYTT0uCLsSMQ XpP0ttP2olSRaNo2Q5MKtnK7RosfYu3uw4Z6MF6I2JFjpPZ+nvuTjWEBW8Fvwc2r/x W2WBq8Qk4hcSIR2KwhyBzh+hCQWXhw23u5LiEd2Uq4IZkTMPyfO0pm3nW+tDx/+0S8 rmJpdHNQ+NppA== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Yangtao Li , Viresh Kumar , Nishanth Menon , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard Cc: Cody Eksal , Andre Przywara , Parthiban , Yangtao Li , Florian Fainelli , Vinod Koul , Linus Walleij , Thierry Reding , Krzysztof Kozlowski , Greg Kroah-Hartman , Kishon Vijay Abraham I , "Rafael J. Wysocki" Subject: [PATCH 11/13] dt-bindings: opp: h6: Add A100 operating points Date: Thu, 24 Oct 2024 14:05:29 -0300 Message-ID: <20241024170540.2721307-12-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> References: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The A100, similar to the H6 and H616, use an NVMEM value to determine speed binnings. The method used is similar to that of the H6. However, the information is stored at a slightly different bit offset. Add a new compatible for the A100. Signed-off-by: Cody Eksal --- .../bindings/opp/allwinner,sun50i-h6-operating-points.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml index ec5e424bb3c8..603c6c88d080 100644 --- a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml +++ b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml @@ -23,6 +23,7 @@ properties: compatible: enum: - allwinner,sun50i-h6-operating-points + - allwinner,sun50i-a100-operating-points - allwinner,sun50i-h616-operating-points nvmem-cells: From patchwork Thu Oct 24 17:05:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cody Eksal X-Patchwork-Id: 13849447 Received: from thales.epochal.quest (thales.epochal.quest [51.222.15.28]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D668C1FAF02; Thu, 24 Oct 2024 17:09:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=51.222.15.28 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729789793; cv=none; b=oJQF2CHgzawWzFPPuUwxPOYUGAGs1Bfp0Kb6ovAXoNltf2r2RLXrpSpSsOtBhaqf6XVx+9mJtuxjwP/OTWtNfWzttBqXO6yV2Klnur+ljS9y/shR7J7GrndYemk018q/jrLf+EK/6KLogERVQT00sFUKMhmG/vDK3CPCgWkVTsI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1729789793; c=relaxed/simple; bh=i9M0xbrAcc2zYjmRWvSGZudanxzGOPy6UtlMgUT0VHA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OASY15bt4TpFh4tF4dMNYrAeY17GGr+gvHM8moCiiHfI3nEtVxKEDWtcvPJaSLTHup72jrKsYxhH5Wh83gIx/cqJoft1RjhDBRKs5Uh5dste162FtYjalE2Jy5dw5eewNRk1xj5kHsU+Kn62Fwl1+qrACK2l5ZsmPI/8tYWBgu8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest; spf=pass smtp.mailfrom=epochal.quest; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b=SyMKLYIk; arc=none smtp.client-ip=51.222.15.28 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=epochal.quest Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=epochal.quest Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=epochal.quest header.i=@epochal.quest header.b="SyMKLYIk" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=epochal.quest; s=default; t=1729789788; bh=i9M0xbrAcc2zYjmRWvSGZudanxzGOPy6UtlMgUT0VHA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=SyMKLYIkLV4yt/rvAYObv3DEnh9SXBhd82PdHYAMcxFUOhicASPhb3gJrWrSfRWBz O/U6QxXbYc6HPKOFA5QPSfJSQImr49xa9bgMprIcyy7uPVlErv/ofO4gpqqIB36Z7v IvrodmRgzh0xOcmVgYzvukEji0Omi2XYhV8r1mwdLpJlBY5azK4akyhY747tzA41w5 rnyDGdomBrHYYGdGGz3hr5RA8YBdIpfozoIV4JoqXp3Cst+dEqbQvU8qD2hBoFTkTY lpCHV7vX5FmdzYrTTH4rE3QRK/r7HB27rDlJfsKR+0U/FdostLHe3aGZuIjzoRiJw1 DeQcPUq8p9NbA== X-Virus-Scanned: by epochal.quest From: Cody Eksal To: linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-usb@vger.kernel.org, Yangtao Li , "Rafael J. Wysocki" , Viresh Kumar , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland Cc: Cody Eksal , Andre Przywara , Parthiban , Yangtao Li , Florian Fainelli , Vinod Koul , Linus Walleij , Thierry Reding , Krzysztof Kozlowski , Maxime Ripard , Greg Kroah-Hartman , Viresh Kumar , Nishanth Menon , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Kishon Vijay Abraham I , Shuosheng Huang Subject: [PATCH 12/13] cpufreq: sun50i: add a100 cpufreq support Date: Thu, 24 Oct 2024 14:05:30 -0300 Message-ID: <20241024170540.2721307-13-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> References: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Shuosheng Huang Let's add cpufreq nvmem based for allwinner a100 soc. It's similar to h6, let us use efuse_xlate to extract the differentiated part. Signed-off-by: Shuosheng Huang [masterr3c0rd@epochal.quest: add A100 to opp_match_list] Signed-off-by: Cody Eksal --- drivers/cpufreq/sun50i-cpufreq-nvmem.c | 28 ++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/cpufreq/sun50i-cpufreq-nvmem.c b/drivers/cpufreq/sun50i-cpufreq-nvmem.c index 293921acec93..3a29c026d364 100644 --- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c +++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c @@ -22,6 +22,9 @@ #define NVMEM_MASK 0x7 #define NVMEM_SHIFT 5 +#define SUN50I_A100_NVMEM_MASK 0xf +#define SUN50I_A100_NVMEM_SHIFT 12 + static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev; struct sunxi_cpufreq_data { @@ -45,6 +48,23 @@ static u32 sun50i_h6_efuse_xlate(u32 speedbin) return 0; } +static u32 sun50i_a100_efuse_xlate(u32 speedbin) +{ + u32 efuse_value; + + efuse_value = (speedbin >> SUN50I_A100_NVMEM_SHIFT) & + SUN50I_A100_NVMEM_MASK; + + switch (efuse_value) { + case 0b100: + return 2; + case 0b010: + return 1; + default: + return 0; + } +} + static int get_soc_id_revision(void) { #ifdef CONFIG_HAVE_ARM_SMCCC_DISCOVERY @@ -108,6 +128,10 @@ static struct sunxi_cpufreq_data sun50i_h6_cpufreq_data = { .efuse_xlate = sun50i_h6_efuse_xlate, }; +static struct sunxi_cpufreq_data sun50i_a100_cpufreq_data = { + .efuse_xlate = sun50i_a100_efuse_xlate, +}; + static struct sunxi_cpufreq_data sun50i_h616_cpufreq_data = { .efuse_xlate = sun50i_h616_efuse_xlate, }; @@ -116,6 +140,9 @@ static const struct of_device_id cpu_opp_match_list[] = { { .compatible = "allwinner,sun50i-h6-operating-points", .data = &sun50i_h6_cpufreq_data, }, + { .compatible = "allwinner,sun50i-a100-operating-points", + .data = &sun50i_a100_cpufreq_data, + }, { .compatible = "allwinner,sun50i-h616-operating-points", .data = &sun50i_h616_cpufreq_data, }, @@ -291,6 +318,7 @@ static struct platform_driver sun50i_cpufreq_driver = { static const struct of_device_id sun50i_cpufreq_match_list[] = { { .compatible = "allwinner,sun50i-h6" }, + { .compatible = "allwinner,sun50i-a100" }, { .compatible = "allwinner,sun50i-h616" }, { .compatible = "allwinner,sun50i-h618" }, { .compatible = "allwinner,sun50i-h700" }, From patchwork Thu Oct 24 17:05:31 2024 Content-Type: text/plain; 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Wysocki" , Shuosheng Huang Subject: [PATCH 13/13] arm64: dts: allwinner: a100: Add CPU Operating Performance Points table Date: Thu, 24 Oct 2024 14:05:31 -0300 Message-ID: <20241024170540.2721307-14-masterr3c0rd@epochal.quest> X-Mailer: git-send-email 2.47.0 In-Reply-To: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> References: <20241024170540.2721307-1-masterr3c0rd@epochal.quest> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Shuosheng Huang Add an Operating Performance Points table for the CPU cores to enable Dynamic Voltage & Frequency Scaling on the A100. Signed-off-by: Shuosheng Huang [masterr3c0rd@epochal.quest: fix typos in -cpu-opp, use compatible] Signed-off-by: Cody Eksal --- .../allwinner/sun50i-a100-allwinner-perf1.dts | 5 ++ .../dts/allwinner/sun50i-a100-cpu-opp.dtsi | 90 +++++++++++++++++++ .../arm64/boot/dts/allwinner/sun50i-a100.dtsi | 8 ++ 3 files changed, 103 insertions(+) create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts index 29e9d24da8b6..99b1b2f7b92a 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100-allwinner-perf1.dts @@ -6,6 +6,7 @@ /dts-v1/; #include "sun50i-a100.dtsi" +#include "sun50i-a100-cpu-opp.dtsi" #include @@ -67,6 +68,10 @@ &usb_otg { status = "okay"; }; +&cpu0 { + cpu-supply = <®_dcdc2>; +}; + &pio { vcc-pb-supply = <®_dcdc1>; vcc-pc-supply = <®_eldo1>; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi new file mode 100644 index 000000000000..eeb8d20f3fb4 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100-cpu-opp.dtsi @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2020 Yangtao Li +// Copyright (c) 2020 ShuoSheng Huang + +/ { + cpu_opp_table: cpu-opp-table { + compatible = "allwinner,sun50i-a100-operating-points"; + nvmem-cells = <&cpu_speed_grade>; + opp-shared; + + opp@408000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <408000000>; + + opp-microvolt-speed0 = <900000 900000 1200000>; + opp-microvolt-speed1 = <900000 900000 1200000>; + opp-microvolt-speed2 = <900000 900000 1200000>; + }; + + opp@600000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <600000000>; + + opp-microvolt-speed0 = <900000 900000 1200000>; + opp-microvolt-speed1 = <900000 900000 1200000>; + opp-microvolt-speed2 = <900000 900000 1200000>; + }; + + opp@816000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <816000000>; + + opp-microvolt-speed0 = <940000 940000 1200000>; + opp-microvolt-speed1 = <900000 900000 1200000>; + opp-microvolt-speed2 = <900000 900000 1200000>; + }; + + opp@1080000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <1080000000>; + + opp-microvolt-speed0 = <1020000 1020000 1200000>; + opp-microvolt-speed1 = <980000 980000 1200000>; + opp-microvolt-speed2 = <950000 950000 1200000>; + }; + + opp@1200000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <1200000000>; + + opp-microvolt-speed0 = <1100000 1100000 1200000>; + opp-microvolt-speed1 = <1020000 1020000 1200000>; + opp-microvolt-speed2 = <1000000 1000000 1200000>; + }; + + opp@1320000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <1320000000>; + + opp-microvolt-speed0 = <1160000 1160000 1200000>; + opp-microvolt-speed1 = <1060000 1060000 1200000>; + opp-microvolt-speed2 = <1030000 1030000 1200000>; + }; + + opp@1464000000 { + clock-latency-ns = <244144>; /* 8 32k periods */ + opp-hz = /bits/ 64 <1464000000>; + + opp-microvolt-speed0 = <1180000 1180000 1200000>; + opp-microvolt-speed1 = <1180000 1180000 1200000>; + opp-microvolt-speed2 = <1130000 1130000 1200000>; + }; + }; +}; + +&cpu0 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&cpu1 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&cpu2 { + operating-points-v2 = <&cpu_opp_table>; +}; + +&cpu3 { + operating-points-v2 = <&cpu_opp_table>; +}; diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi index 6dca766ea222..747a0292ef98 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi @@ -23,6 +23,7 @@ cpu0: cpu@0 { device_type = "cpu"; reg = <0x0>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; cpu1: cpu@1 { @@ -30,6 +31,7 @@ cpu1: cpu@1 { device_type = "cpu"; reg = <0x1>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; cpu2: cpu@2 { @@ -37,6 +39,7 @@ cpu2: cpu@2 { device_type = "cpu"; reg = <0x2>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; cpu3: cpu@3 { @@ -44,6 +47,7 @@ cpu3: cpu@3 { device_type = "cpu"; reg = <0x3>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; }; }; @@ -142,6 +146,10 @@ efuse@3006000 { ths_calibration: calib@14 { reg = <0x14 8>; }; + + cpu_speed_grade: cpu-speed-grade@1c { + reg = <0x1c 0x2>; + }; }; watchdog@30090a0 {