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a=openpgp-sha256; l=1570; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=W+RGPqPnbhu9Q3x8lJkcTlZu/uDp2T0PEcID/5CYBT8=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQ7qsnkCq4pN4vY07jQTfy5q8zGCe4SiUm9PW0GGbxFejW r7uk0wnozELAyMXg6yYIotPQcvUmE3JYR92TK2HGcTKBDKFgYtTACbitZH9D4eYlZRfaDrfjvKQ qsvNvnIXXAUbkzOS2RZ6pOy+2eUxR59nC0fDsjIJoZC3Jy93/72mtuKe1JeJahsrup+d0j+iJt7 5741AqZRv3nlDGyNjLeveK9ZNZvdZNttesV/29x2f7+yPe35cSHmg9as+/ZdLqtnLSeYeic8dsi +euXIqSe7xzFP3Fk7dnpSgG74q01qf1zhhWt7GIv46do2iiQZT8/4r/xdss1Q7s+Dij6fbjl/4f 5NfXlar/O/jjuu53gIXHl9wOfWn5wM7c9el3HzFPLcOk+dVm3MzyvYlObzcZPm8b+/vXaXz0lna XYJaDMqDtAp/Mm8+I2VxqlSiY3JHduuixGXf37vkMGUDAA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A SM8550 lists two interconnects for the display subsystem, mdp0-mem (between MDP and LLCC) and mdp1-mem (between LLCC and EBI, memory). The second interconnect is a misuse. mdpN-mem paths should be used for several outboud MDP interconnects rather than the path between LLCC and memory. This kind of misuse can result in bandwidth underflows, possibly degrading picture quality as the required memory bandwidth is divided between all mdpN-mem paths (and LLCC-EBI should not be a part of such division). Drop the second path and use direct MDP-EBI path for mdp0-mem until we support separate MDP-LLCC and LLCC-EBI paths. Fixes: d7da51db5b81 ("arm64: dts: qcom: sm8550: add display hardware devices") Cc: stable@kernel.org Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8550.dtsi | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi index 9dc0ee3eb98f..cca10f9faa14 100644 --- a/arch/arm64/boot/dts/qcom/sm8550.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi @@ -2871,9 +2871,8 @@ mdss: display-subsystem@ae00000 { power-domains = <&dispcc MDSS_GDSC>; - interconnects = <&mmss_noc MASTER_MDP 0 &gem_noc SLAVE_LLCC 0>, - <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>; - interconnect-names = "mdp0-mem", "mdp1-mem"; + interconnects = <&mmss_noc MASTER_MDP 0 &mc_virt SLAVE_EBI1 0>; + interconnect-names = "mdp0-mem"; iommus = <&apps_smmu 0x1c00 0x2>; From patchwork Sat Oct 26 17:59:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 13852321 Received: from mail-lj1-f172.google.com (mail-lj1-f172.google.com [209.85.208.172]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C47A1D6DB6 for ; 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Sat, 26 Oct 2024 10:59:53 -0700 (PDT) Received: from umbar.lan ([192.130.178.90]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-2fcb453e53esm5970631fa.71.2024.10.26.10.59.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 26 Oct 2024 10:59:51 -0700 (PDT) From: Dmitry Baryshkov Date: Sat, 26 Oct 2024 20:59:41 +0300 Subject: [PATCH v2 2/2] arm64: dts: qcom: sm8650: correct MDSS interconnects Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241026-fix-sm8x50-mdp-icc-v2-2-fd8ddf755acc@linaro.org> References: <20241026-fix-sm8x50-mdp-icc-v2-0-fd8ddf755acc@linaro.org> In-Reply-To: <20241026-fix-sm8x50-mdp-icc-v2-0-fd8ddf755acc@linaro.org> To: Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong Cc: Abhinav Kumar , Rob Clark , Marijn Suijten , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, freedreno@lists.freedesktop.org, stable@kernel.org X-Mailer: b4 0.14.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1617; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=sKr/BvUYAOgHY4ZN/Rmk88OHIStViu1F6gSvWhlDBxg=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBnHS4R7YHfOs4vIQeSo2IOXxytBfzXP+eHYtHzL 0nOcTCBSWGJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZx0uEQAKCRCLPIo+Aiko 1X3rCACPYqXa+RxJnVbTxsJwFRK+SLlbiS+cH1oWzz8Dx17wMpLr5kcR+oSiY42YGNV5g7xNtNy cmHF6Lce4m8UGHXobrl+NMJXqE77MuIa6xh7ND0vZ+FgVRWyXbEK7q134sK2u42WXJ9O0kPQYhN GlPzawZy+sg+iwfe6IkLOktfij65TS2pzSnyMgAg5mV2qZIG7Nw5/FeSh7fuU8DPBUq2OMB5YL3 MEUnkoWEki/n0DbSZWzXa1YsfYbdJH8JBvNa8tMttePSFko4o2gEuD8XzmQTgqFNEEHCDRYv+yC +/OPUfSRK8hNGyZ303ln8mAkWa7Murcj4CemJEVCtKQRxw+A X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A SM8650 lists two interconnects for the display subsystem, mdp0-mem (between MDP and LLCC) and mdp1-mem (between LLCC and EBI, memory). The second interconnect is a misuse. mdpN-mem paths should be used for several outboud MDP interconnects rather than the path between LLCC and memory. This kind of misuse can result in bandwidth underflows, possibly degrading picture quality as the required memory bandwidth is divided between all mdpN-mem paths (and LLCC-EBI should not be a part of such division). Drop the second path and use direct MDP-EBI path for mdp0-mem until we support separate MDP-LLCC and LLCC-EBI paths. Fixes: 10e024671295 ("arm64: dts: qcom: sm8650: add interconnect dependent device nodes") Cc: stable@kernel.org Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 173e092b15e2..4b54063c0e0c 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -3455,11 +3455,8 @@ mdss: display-subsystem@ae00000 { resets = <&dispcc DISP_CC_MDSS_CORE_BCR>; interconnects = <&mmss_noc MASTER_MDP QCOM_ICC_TAG_ALWAYS - &gem_noc SLAVE_LLCC QCOM_ICC_TAG_ALWAYS>, - <&mc_virt MASTER_LLCC QCOM_ICC_TAG_ALWAYS &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>; - interconnect-names = "mdp0-mem", - "mdp1-mem"; + interconnect-names = "mdp0-mem"; power-domains = <&dispcc MDSS_GDSC>;