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[84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.23.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:23:52 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 01/23] ARM: dts: socfpga: fix typo Date: Tue, 29 Oct 2024 20:23:27 +0000 Message-Id: <20241029202349.69442-2-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132355_360194_F90FAF01 X-CRM114-Status: GOOD ( 10.81 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org A semicolon was fallen off the wall. Signed-off-by: Lothar Rubusch --- arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi index 6b6e77596..7113fe5b5 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -169,8 +169,7 @@ main_gpio_db_clk: main_gpio_db_clk@74 { main_sdmmc_clk: main_sdmmc_clk@78 { #clock-cells = <0>; - compatible = "altr,socfpga-a10-perip-clk" -; + compatible = "altr,socfpga-a10-perip-clk"; clocks = <&main_pll>; reg = <0x78>; }; From patchwork Tue Oct 29 20:23:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lothar Rubusch X-Patchwork-Id: 13855398 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1E3A9D3A696 for ; Tue, 29 Oct 2024 20:29:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=a7BTF2QgV5p9nNttdJyKFEUTkRzHJB1L1AnxAUE0mKw=; b=Ol2WRYOTzcQPFb/RJuk4B8gwTo pr2+EbcLD8Ngb0FI7O+H2G2atTFhGJXLygLGkwmnG6MqABYj0XTeFjO5bQ+lzmSiPWNaeThOSdZtt 1hHNlZ6eepBtCU+fyupFIvMt/FuGb4Y869EpsrCgTZfvefEMlL/KvGxjrDl5RpUhud6GPzhuCgD7m tCCHYh0mMChP8LUByup3UUnvKQl1bw6Ruxp89XKVqaswLwc5KuN3JTbUZdNzCWq8OW0SnfZh8WAuY IAh8siBnfDRgJvdm3t3If8EcYkAf09xILQjmvXd3isZJYuSG05ysEuXoeyZgKJuxFFQ1lGXZmPZib lx57oaYg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t5spt-0000000Fmeq-3iW4; Tue, 29 Oct 2024 20:29:05 +0000 Received: from mail-wr1-x429.google.com ([2a00:1450:4864:20::429]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t5skv-0000000Fl4f-3AUS for linux-arm-kernel@lists.infradead.org; Tue, 29 Oct 2024 20:23:59 +0000 Received: by mail-wr1-x429.google.com with SMTP id ffacd0b85a97d-37d432f9f5aso548953f8f.3 for ; Tue, 29 Oct 2024 13:23:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730233436; x=1730838236; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=a7BTF2QgV5p9nNttdJyKFEUTkRzHJB1L1AnxAUE0mKw=; b=Ia46wouxkqQMkmDWOtIe1o9n0pq70QLTr4j9Zj7RWlEizZQxwLnwquZMF+4YRx48Wk JbqahNPnX6gXV02XkSdfDf/j6x/rom/6yoEMrkB+Y67icxsmGCzg7eQEDdcXnYta7Mqw 1t97UZONVpOFt4BYhZA/FVVh6QO+Ma2NSqvw1uK1J5I1ENzxCCS+cUlqME44/uyz33GX IrwC6xOBZ8gq22N3hJa/DpGBD9oZWnY/XtsS7q3e0TFW0hRMFxOKOhH67MDb9m9Epndi qzS/2bDPkRJ/wD8Io6iW6gKpvl/1nj4DAohtU+SG74B4y+hl8t15AkmdwGg3rTZuIR4A Vv4w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730233436; x=1730838236; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=a7BTF2QgV5p9nNttdJyKFEUTkRzHJB1L1AnxAUE0mKw=; b=Iq8OWH+FCwXYX9bnKyY//8fKvwZWyzPkRjL0PmrKu8l9uRvHLKY4dDmjIkb4sGcLRX v6FmSDCogJomwBlHEnFaU48NqEOkYr22EZloRSNyPw5LgR/Xw/jHZb9hZUD+/MnLu1fR mFiRxOhGuN7tbDDL3R/Si4LJ5HN9dcJK+D1f8alkbMaM3NGyhAFmuRnoB2P0FNRZUXTa bRfDMNPfGBYJIhQmcQEyvYaFHgWcch99a5bjKQelNO22rSFWi+pXU2mKF0f3jXbLDrYx WmZ8/sH4jnCw46uqIsgqgBRwXkzIZT2OE43uKYQmEMnnwXY4SHDQvg94/2u+GwWQBeMv tpgQ== X-Forwarded-Encrypted: i=1; AJvYcCVGgGs4rWk6nKubF63/dHDF4VzoOSdnavMGKRUewJuy5ouLkoQi0Clbw4s7F4/vCpNgNKdzcwgHQM3NHQa11W+G@lists.infradead.org X-Gm-Message-State: AOJu0Yz/eYVs+x5CVwOs1HMpn5fqjusL6pP6hTzuHXTTLJA4XrOdPP0D tDcvk6HwkAhvGXRoCPz8N4M/gOl/8a4igtvtfrVZvkIcXnpq9V0A X-Google-Smtp-Source: AGHT+IGD+/RLlUFQ9JfrHmh8ZbfUuGjxW0QoMqGnWizIoxkZXn06IHyKtDzC4H57odNMJ3rODgdWcg== X-Received: by 2002:a05:6000:186b:b0:378:955f:d244 with SMTP id ffacd0b85a97d-380612bdf5dmr4232846f8f.14.1730233435443; Tue, 29 Oct 2024 13:23:55 -0700 (PDT) Received: from 6c1d2e1f4cf4.v.cablecom.net (84-72-156-211.dclient.hispeed.ch. [84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.23.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:23:54 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 02/23] ARM: dts: socfpga: align bus name with bindings Date: Tue, 29 Oct 2024 20:23:28 +0000 Message-Id: <20241029202349.69442-3-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132357_890283_FC412E5A X-CRM114-Status: GOOD ( 12.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Binding expects the bus node name to match bus and not amba. Signed-off-by: Lothar Rubusch --- arch/arm/boot/dts/intel/socfpga/socfpga.dtsi | 2 +- arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi index 35be14150..c7ba1e4c7 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi @@ -62,7 +62,7 @@ soc { interrupt-parent = <&intc>; ranges; - amba { + bus { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi index 7113fe5b5..7abb8a0c5 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -54,7 +54,7 @@ soc { interrupt-parent = <&intc>; ranges; - amba { + bus { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; From patchwork Tue Oct 29 20:23:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lothar Rubusch X-Patchwork-Id: 13855399 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 59CAFD3A696 for ; Tue, 29 Oct 2024 20:30:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=qk9braQhcUfjQhD1zhHgydTWlqcLCgBL7v99PtqcEgk=; b=FTk4hIBmP6wxuhnyVtp/Gl7bJh z69jE2yAqgozxfLSMPDE612+DhwxMMFwcTnpe68OT6D6kZ9DZoIt8qagjSwRoHsD+WNAwanW03DxE wMzIEeGVBDBaT1AZrkahqhxj316M/bHw/L5bCMltH1qVRY5W/cDzNp7bhqI7fr0c403vIRTzj4yR9 uYrppmXmFJOk5dZ3fzXaK7Tj2DGHn/ldDY5Jn98Os12kJNdq09L5MfiO8fnyhuqsUZapX2H0iy5KA e5Yf3ANXPvaYuLVXMTt0IGkEIrtfjID+2yMU2QcBr97BBBfX4LuA0gjougiLWZLBk7PjAoKertIe7 GRm37XXw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t5srV-0000000Fn7Z-3G7N; Tue, 29 Oct 2024 20:30:45 +0000 Received: from mail-wm1-x32b.google.com ([2a00:1450:4864:20::32b]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t5skx-0000000Fl5Z-3iUK for linux-arm-kernel@lists.infradead.org; Tue, 29 Oct 2024 20:24:01 +0000 Received: by mail-wm1-x32b.google.com with SMTP id 5b1f17b1804b1-4315b0bd4ddso7082925e9.3 for ; Tue, 29 Oct 2024 13:23:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730233438; x=1730838238; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qk9braQhcUfjQhD1zhHgydTWlqcLCgBL7v99PtqcEgk=; b=HgHA4MOmwmg0W21eZnu4rQt98B7OVFQ12nDNJ7RpL84rwag1vg50bjoqDkgjNy3TNS Xs4q8L1GUiZ+WPdG2bB5EsKzm3r16tRC1+6vyRSZP4oAhwQVkZWos1HlOCojMuNz2mcy 4ssKg7uy6mpjMtOEAtQu+E4rhy1vIjjXWBGHReNCSssKzF0+mR0Nx5ybvFIvwQEHLO7v WKN8Mc9ylnhGLdpFFX1vZhFm6LfevI6cz+QlrS6CggqAnTLaysJ9ZVzHBGbd+tNY4B5g ruNhzImY9Wlo8/ViC/6UqPrOEwcPo2jVxJeXXKD/psnCVGX7S2TRQdq6RA2KG6orD35L j2fQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730233438; x=1730838238; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qk9braQhcUfjQhD1zhHgydTWlqcLCgBL7v99PtqcEgk=; b=FEhVijN+cTfdHVXUdjrqjtVPdxrxyZC8UnKnKKw5eEUmrZHPnF/OUXmK6nDMtEnyvZ DCHtwastYnRL8ZmXec5H6i4eIM6A8J7q0JM1Tv/oWHFCjr51OGEFiYXwT+nVLUp9c/Hb p+z7h9UxKe0oB1YXMhyLk1ujuYQJ5jnbgUzhmNDHp/67Ep84NG8KTn/GcXIK6EleI7X+ scn6Yt3NFy1lQOtGYFVP8a0bJse1oJgyz/PPq01ShSp+tesNGmrTh5Yt9rxdrtrpWdlz b/pmMnichWYXM9UCDUP2wGt42sS017g2SBHV5Wz2/9IA8TLpqc2gULAM8qCqG6jzFAip HCmQ== X-Forwarded-Encrypted: i=1; AJvYcCUEwSvFoXiyE5m1mPyttaV9ejGseK5OjPy6r+GysWwy7782GinOsg35uJb8UvELlxi+Cx1exvHGeTmojveaO6Cm@lists.infradead.org X-Gm-Message-State: AOJu0YzfopYwvuYD7sweuey+sWZRv8dEfO2GbRX5P7LXbdDDgd15DN8M euPqsxVG83QJROyqPqsbH8tB4rPFdNPUVum2jQjGmcJHxszA8Ykz X-Google-Smtp-Source: AGHT+IHXKDESh6R0R2pH+YTSOSGmekompPP5kRB3raByIC6HZykFMvR8z13eRdBzBJ15DbPxCjmrrQ== X-Received: by 2002:a05:600c:1390:b0:431:4e33:98ae with SMTP id 5b1f17b1804b1-4319ad14ca6mr47168295e9.5.1730233437588; Tue, 29 Oct 2024 13:23:57 -0700 (PDT) Received: from 6c1d2e1f4cf4.v.cablecom.net (84-72-156-211.dclient.hispeed.ch. [84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.23.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:23:56 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 03/23] ARM: dts: socfpga: align dma name with binding Date: Tue, 29 Oct 2024 20:23:29 +0000 Message-Id: <20241029202349.69442-4-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132359_931973_8BB877C9 X-CRM114-Status: GOOD ( 11.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Binding expects the node name to match with dma-controller. Signed-off-by: Lothar Rubusch --- arch/arm/boot/dts/intel/socfpga/socfpga.dtsi | 2 +- arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi index c7ba1e4c7..01cc5280f 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi @@ -68,7 +68,7 @@ bus { #size-cells = <1>; ranges; - pdma: pdma@ffe01000 { + pdma: dma-controller@ffe01000 { compatible = "arm,pl330", "arm,primecell"; reg = <0xffe01000 0x1000>; interrupts = <0 104 4>, diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi index 7abb8a0c5..aa0e960a3 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -60,7 +60,7 @@ bus { #size-cells = <1>; ranges; - pdma: pdma@ffda1000 { + pdma: dma-controller@ffda1000 { compatible = "arm,pl330", "arm,primecell"; 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[84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.23.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:23:58 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 04/23] ARM: dts: socfpga: align fpga-region name Date: Tue, 29 Oct 2024 20:23:30 +0000 Message-Id: <20241029202349.69442-5-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132400_615749_585164BD X-CRM114-Status: GOOD ( 11.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Binding and setup expects to match fpga-region instead of old naming. Signed-off-by: Lothar Rubusch --- arch/arm/boot/dts/intel/socfpga/socfpga.dtsi | 2 +- arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi index 01cc5280f..1562669b3 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga.dtsi @@ -87,7 +87,7 @@ pdma: dma-controller@ffe01000 { }; }; - base_fpga_region { + fpga-region { compatible = "fpga-region"; fpga-mgr = <&fpgamgr0>; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi index aa0e960a3..90e4ea61d 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -80,7 +80,7 @@ pdma: dma-controller@ffda1000 { }; }; - base_fpga_region { + fpga-region { #address-cells = <0x1>; #size-cells = <0x1>; From patchwork Tue Oct 29 20:23:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lothar Rubusch X-Patchwork-Id: 13855459 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AD5A8D3A696 for ; Tue, 29 Oct 2024 20:34:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=9wwdH5E3n/FKvtFIFoeUG2vP8wssuIiUjkTOLgVYvdE=; b=wP5ziwe7SJcVqAiJskPhiM7rM6 aEG1X4SFCeiVWnZUrV9B4+00rcYaL/OmGlFXVUng5P5Cd2MySpcdEe9k5XRF/1sCFCZ7C1Vc5xKJW I20Pu8Dc7E/feKvfVTfihk/AGIAanXNVgxLmFsNuWDzC3B1rDqWfFuaWgYCsjVNmeIdyqKAbBISgn 7qmCBSbOJzFIbMpLBSlthwUG6F5TZjQrytQUKOr/82UbXTtKathDaEV8iKfBDIWsKJBs7Wp2QX6V/ U37/I6UuCD0V58LliJ0E57bVTL1Oax0veFPTaHqts6XzXwmawQbi9KmrVqvn6bqGC2sg0AjNa7edr j7eF8zUQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t5sup-0000000FnuZ-3Hd7; Tue, 29 Oct 2024 20:34:11 +0000 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t5sl0-0000000Fl6j-0JfY for linux-arm-kernel@lists.infradead.org; Tue, 29 Oct 2024 20:24:03 +0000 Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-37d6716e200so888348f8f.3 for ; Tue, 29 Oct 2024 13:24:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730233441; x=1730838241; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9wwdH5E3n/FKvtFIFoeUG2vP8wssuIiUjkTOLgVYvdE=; b=BsPgoRhp+Ca9HwXSRicDLn+c3Swf+v8hyd+XPg3yufL2fChdFVSvTMbevzinndekj+ zEJtcs5rfPWZKjHPLnQkpEGUI+pUG67CgS9z0F9KJMEKHUsOpliGWeQ2hREubyJS5ria 41bpSAhnMENqbTQY7k24eCnlOgdAWmcSjr+UrGNVX/poR3zozAIN6Q1EL3Cx9yqerM5i ElHDDlR8s691OzA2BEh5zC+awKgh3CuYvlLd7Vz6uMP8PfiRRflsJqC7/PmS4Rb6n+vA 0j3JXc0Dgh50X7QXhhNxut/1uW/fnR8PKYzyYs0EVSdJeU6/EK7F9Cy2w5jLsMcDNxX1 F9Vg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730233441; x=1730838241; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9wwdH5E3n/FKvtFIFoeUG2vP8wssuIiUjkTOLgVYvdE=; b=bySFvohC6B0lXWJrWB5nt74u3inywx0cUHibha3gUPR47BqY2WD4lzHAgIh0gg62jP Yd41QqqzjxNjAQsjTvKDeKHQFsuRrBUJmKj1U+yjHu7MEMz5qc9HTKz9gZHrXf6j1zah bXLLxoFBzZ1U1NAAV36Q3Tshj4ZSQuEZ/GO2auajmvQSgAFwqwxt3t9n+TnE5wcv+El1 O/kyGkcN425BujF9z8pvqN4IsH2SVTKkVL+w4m3H4wrkDZtBGpVo6aMiqwNcdlLVz2Fl sXEjl2p3T/cJ+IgOu+tJOQQlYRy9vEE0uPZaKNv3G41y8BAvMDEjb153+tJbnPPle1ME UwOA== X-Forwarded-Encrypted: i=1; AJvYcCWcuetuctXxPCzcxtyVmKEqrKJ9do+9Njw/hY+Esm5IPo7S6BWDJhd+CUqyi2GB90Url2Avukgp/WyBecyqXXWf@lists.infradead.org X-Gm-Message-State: AOJu0YzJx8TkpDEOp9wAADwSB1sO3JQUCTvnz8UkiKhGEhLoQ6u/o+Dg dUsCeQgYFs+n60C6TlsmGBt7/Thi0OkOK9XECZMwZ7wpp832cc4f X-Google-Smtp-Source: AGHT+IH2AADFwOVOQ1R4+gybUTrdQi/LWShRjvH9Hp6FgJFs5PPv8cF+35BhJDVAUQg7FgD0Y6O57w== X-Received: by 2002:a05:6000:1fab:b0:37d:47a4:ec2b with SMTP id ffacd0b85a97d-3806121a2b6mr4483656f8f.11.1730233440576; Tue, 29 Oct 2024 13:24:00 -0700 (PDT) Received: from 6c1d2e1f4cf4.v.cablecom.net (84-72-156-211.dclient.hispeed.ch. [84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.23.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:00 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 05/23] ARM: dts: socfpga: add label to clock manager Date: Tue, 29 Oct 2024 20:23:31 +0000 Message-Id: <20241029202349.69442-6-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132402_135854_54A72B3A X-CRM114-Status: GOOD ( 12.28 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Devicetree setup expects a clock manager label to be around. In preparation of upcoming changes to allow for compatibility. Signed-off-by: Lothar Rubusch --- arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi index 90e4ea61d..7f7ac0dc1 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -88,7 +88,7 @@ fpga-region { fpga-mgr = <&fpga_mgr>; }; - clkmgr@ffd04000 { + clkmgr: clkmgr@ffd04000 { compatible = "altr,clk-mgr"; reg = <0xffd04000 0x1000>; From patchwork Tue Oct 29 20:23:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lothar Rubusch X-Patchwork-Id: 13855460 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F3504D3A699 for ; Tue, 29 Oct 2024 20:36:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=zykG5xT9htU2beqODKL0ma8uO47wG8f6mRcFvD55rTU=; b=ETrxQL6IuDQrfZ4Tq8xCIg4SJM Nu7nE2p4p9cEg23W4LNMPEZj15qQhVH0fGq/v89QIjHLS+J4Zs1RmuJJJW7CHqk35ZRem7TiQvcSi BklVk+GlAP3fL28yIarZYPMIwgPzK/Mgv8FleiBmm05Y72weBs8QIlu4m8YjpeemrdrGMCjED13Tp NhCyLTttXph+iWt1o0FQfRhOz9yyIXDWeZR7vwUwNWh5i5R5DCYVi3Fh8JkqJgjAzqve/AFqZRZAD 6InlFPp0D4mqMBvqLDjYK7EAOn2w7nIvQGcn6dPHoxEa8qV18WmvwE2FtsXoJnePYyAEewBRMgnZL FTxYOBLQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t5swR-0000000FoEL-2xMH; Tue, 29 Oct 2024 20:35:51 +0000 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t5sl2-0000000Fl7I-485C for linux-arm-kernel@lists.infradead.org; Tue, 29 Oct 2024 20:24:06 +0000 Received: by mail-wm1-x32d.google.com with SMTP id 5b1f17b1804b1-43155a6c3a6so7118785e9.1 for ; Tue, 29 Oct 2024 13:24:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730233442; x=1730838242; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zykG5xT9htU2beqODKL0ma8uO47wG8f6mRcFvD55rTU=; b=QQI6elZF6dXSGNbtRSOrUqtcfaMdoIjU7qREaBzrDeZG590eH0cEsHZPMeAutPIA/K v/UUfUm8+pWMaEAWD7Kiz92H+RmPP9m0CPvXzSi6P0LsSNZH2pjDza9V1SG17pSQzQm5 z8X4iUOuaR+7Of6b+UcTEktXQGlXUT1ADSRydiMALTZA5U8bl7Jdz7jO/A2elp8xhfMX OX8msjHJRazI2WPt0D8bL6LMjFKwAtgElB+fICI7M4t+Wfpcct9OyBtz2iP+xih2/HDt CwBFW5hP0lRRrit+1nEnnQfebF9GJOE/X+kpzpIKeAh2udVNG6OfEPNAr9h99s2mnbyj I2dg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730233442; x=1730838242; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zykG5xT9htU2beqODKL0ma8uO47wG8f6mRcFvD55rTU=; b=qyJtB/A01zmY9wGefGYA0NSewebgY6D/Ge2NfYB+xu/8lFkcnKvbVFjbgoSAqUxQR8 XH6z4RuPa12nDC91LSjHJApQfLcLbF4nEo3jWobIXFyCaKC4XY9z+EHnsG+iEtzhKkgC qjzrP8TG/3Dd+/8GQDz3Dhp1y2wc3SspUO62z8gdMS8PhV6LLeD0ASksYZD1TkwpT4Gn 9fw3LKd1UI4SZWijzfwXSkDxpifXE0DgssTdKBjKOA2BGXnYeB5sPftFsWf98j127vtK /3KLdWzbirl9Zv/epnmQ+h3KvM8uDVWXgKufn5/QD86yAjzG+DqR2rCFn4zsyadN6tMP gCog== X-Forwarded-Encrypted: i=1; AJvYcCVuskNEtOSYr2JpqherF/WASbU6u0Ux1hPt63UpWghu3hTMuruTCqPESV5wcfYUz1MLVPkICcc4PfjdrJcOyFwr@lists.infradead.org X-Gm-Message-State: AOJu0YxZl8mfTjycHIR3miqUCVhvbkod4zIYZSQZr+T/mx5CcKqVo7Hy 9rqou4T9bFXLTLgbwQ2lAN9iGYIGEtGcgp+xvo09oYYFWi7TsyI3 X-Google-Smtp-Source: AGHT+IHmAsezJTQ6HDzRiPuCCGE+RMKKJV1S7Rnrkqh2NL2lY4iIeUnDKBM6QOnU1gla9isevRSz4g== X-Received: by 2002:a05:600c:3542:b0:42c:ba6c:d9a7 with SMTP id 5b1f17b1804b1-4319ad08603mr47418785e9.4.1730233442025; Tue, 29 Oct 2024 13:24:02 -0700 (PDT) Received: from 6c1d2e1f4cf4.v.cablecom.net (84-72-156-211.dclient.hispeed.ch. [84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:01 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 06/23] ARM: dts: socfpga: add missing cells properties Date: Tue, 29 Oct 2024 20:23:32 +0000 Message-Id: <20241029202349.69442-7-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132405_168806_9A455749 X-CRM114-Status: GOOD ( 10.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Binding requires size-cells and address-cells to be around for the SRAM. Signed-off-by: Lothar Rubusch --- arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi index 7f7ac0dc1..4b19fad1e 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -684,6 +684,8 @@ nand: nand-controller@ffb90000 { ocram: sram@ffe00000 { compatible = "mmio-sram"; + #address-cells = <1>; + #size-cells = <1>; reg = <0xffe00000 0x40000>; }; From patchwork Tue Oct 29 20:23:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lothar Rubusch X-Patchwork-Id: 13855461 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B857FD3A69F for ; Tue, 29 Oct 2024 20:37:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=syqLQEEuQIy2cda968KqPmvPAkdMXpl9TyM7P/fgr+8=; b=eElfpJRisS5rFG3HJU11SbQ2UU Lezuq7Q5nF5yGXUaGihBfi2Howverg3KJErQdWe8W3j3JhdV6/qHyWMYbM6RtoSxJguLjC1wmzrL/ XD0TrBdhZqLbABhb6IhMuZyJLMMmrpRs1tIosapKL1E34qCEJQn+5pycIvF3ruKYqxzfD3oJsUVD8 +uoHySpGTN5VGhPqukIu9b8L/khxQuvPHjKHXzy64cIUVz1YnMCDsDJCmrYH3ZQ57Wt8wGc6MzfPP GT3cyqfNYARjLYUYoHo/oGewUHvWBdWeJytJy19TpgfCAu4L5yhtHizxgtjiLLaxt55W0w+ed6236 XyNYv8+g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t5sy5-0000000Foq0-3BSO; Tue, 29 Oct 2024 20:37:33 +0000 Received: from mail-wr1-x42d.google.com ([2a00:1450:4864:20::42d]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t5sl4-0000000Fl7a-0WIE for linux-arm-kernel@lists.infradead.org; Tue, 29 Oct 2024 20:24:07 +0000 Received: by mail-wr1-x42d.google.com with SMTP id ffacd0b85a97d-37d432f9f5aso549004f8f.3 for ; Tue, 29 Oct 2024 13:24:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730233444; x=1730838244; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=syqLQEEuQIy2cda968KqPmvPAkdMXpl9TyM7P/fgr+8=; b=VyPZOf1uc0olVsRqHfHymmlaHClkWWOTrhrOqm95wOQVu/4ODyiS3i/X0osgWtXCJP 4WIjI04hy2Bj49e0oJE1R1ckFU/Ixe+sx9jLcoqYdO8MseLaFkU+oROvqzP/a/8Jn16z ghqC+fEFbPlFy9NNAXulHpGk9M3EjWDcm5zGJ53y+oQjihUgJtHV+G6vmLdmdKl5/AQM jT2nPso0h5WijUfDc/AdL4SBgMDmLK9P3FWovN02dk8YCVnfpRsUcAzyyYHJx/J5VY2t sFtlllrPdOYiGTQmYXxeM+W40OKgOKZ/oX+LHXvLvPadJN7oRkazWdxxo/Vut3e77Bng a6NA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730233444; x=1730838244; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=syqLQEEuQIy2cda968KqPmvPAkdMXpl9TyM7P/fgr+8=; b=R2WyTR7TnmCWI+budeVIId3rFPhhj7Mk8szvGxg758AoBVKeZOOf7Coj1DeeJlpNqt 8fxX7V1f+otsu+brhD4JXUDur1dMRKJKntGrsxIZMECei+11WfKqSn7oOQOv5I+HSeeX RgGcpquITsblpPcGYcCOMu+A0RuenwsXu/OmP2WDYRU1LuB1g5oPaZ7E5HKK+yhTTdXM u+t2F6XgBGWQfHPQVWQxtoMiXeTtAWwqRroT1da6D49XrvJ0xItVVic9QveT4gVp30/D nDLnVcWQdRC154vvRUkZ+SxvjnYEWJ2fjmxUSpXuZv/hwHiWDYhDAMvimOdT2JrJJD9A Y99Q== X-Forwarded-Encrypted: i=1; AJvYcCXgalpeKoBDe/AAVt4abxfFR3A/MnuMB7cnHmMLNYpzfekHL8ky177VZK8ooWFSmHXMZY2UdHwPYymVGapdaHgf@lists.infradead.org X-Gm-Message-State: AOJu0YyD17iZRE4yyoldA5JVxv3vq2qW2H/dknX20FgSFt0V87lcd8F9 fcBRZTc4SkoPFfuQcPJ2NgPpsfd+D2oa//eJcvf2y6hvLCNSMi+3 X-Google-Smtp-Source: AGHT+IHGVFfyqJqlmqeKRFFKcmhj1OyaAu/znhSmRzQJTc6ZYgh+32XL3bPFTzuO8uUces3IhKZcmQ== X-Received: by 2002:a05:6000:1446:b0:37d:54d0:1f15 with SMTP id ffacd0b85a97d-38061231c59mr4689734f8f.7.1730233443892; Tue, 29 Oct 2024 13:24:03 -0700 (PDT) Received: from 6c1d2e1f4cf4.v.cablecom.net (84-72-156-211.dclient.hispeed.ch. [84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:03 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 07/23] ARM: dts: socfpga: fix missing ranges Date: Tue, 29 Oct 2024 20:23:33 +0000 Message-Id: <20241029202349.69442-8-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132406_197115_DE35A650 X-CRM114-Status: GOOD ( 11.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add reanges, since by dtschema 'ranges' is a required property here. Signed-off-by: Lothar Rubusch --- arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi index 4b19fad1e..65d04339f 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -81,10 +81,10 @@ pdma: dma-controller@ffda1000 { }; fpga-region { + compatible = "fpga-region"; #address-cells = <0x1>; #size-cells = <0x1>; - - compatible = "fpga-region"; + ranges; fpga-mgr = <&fpga_mgr>; }; From patchwork Tue Oct 29 20:23:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lothar Rubusch X-Patchwork-Id: 13855474 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9962FD3A69D for ; Tue, 29 Oct 2024 20:39:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=QbnDXxocaCyheHFI8hTECOWKPKoXgfCmEGz3dctI1es=; b=PxRO+WP9mubgCsFwF0L06+MfOt TdmfUjobZrtkJBIHig0txiBSS77oZJwdMB77R3TtK1CQYl5/7Wkz4UoAg7dHwh6xVNdoOj+uPH5Fm iNmCeTX13iy/sJFN0eaNjEYgKaO5pnbuwpIItZjr0i7DpyW+xpxsQOebzlx4bqfrwFV6KGfJ4V/YX 0DFIGRDJf4tlvbFFhvUkS5g+dHjBQxvsjIvGKqpHEU+WgAi8fk4g708FngN6qfNXQ8fq1kp6H7L4f poqsofjZpckGUVJHFu6e2SNWgbUePx4OdeMWDDC1jJbUZdhhWwS3VR4nZH1i8UB06A9PyC6VTS+W7 /zxh0VSQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t5szn-0000000FpRj-0F8r; Tue, 29 Oct 2024 20:39:19 +0000 Received: from mail-wr1-x433.google.com ([2a00:1450:4864:20::433]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t5sl6-0000000Fl8a-0BLy for linux-arm-kernel@lists.infradead.org; Tue, 29 Oct 2024 20:24:09 +0000 Received: by mail-wr1-x433.google.com with SMTP id ffacd0b85a97d-37d5231f71cso685491f8f.2 for ; Tue, 29 Oct 2024 13:24:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730233446; x=1730838246; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=QbnDXxocaCyheHFI8hTECOWKPKoXgfCmEGz3dctI1es=; b=eeht5xLixBXhyCN5zVlcdJGi7SznogpzAyP2TxTBWOoeyZPMDiuNIn3mQFDPr57ani +z+VRVrAeJtCEKU4KPMLlpZFTMXv9tMM8qXKsjW46/lN43ou1q8DiEXYyj957V43q9yM flh+yqPN7mEEkp4eshbA7WGnB85HdKco8tKZJbVnJhyYM6Hsf9GTSz5nLrn6FHqgyM4A jmsN2kruXIB61uz+NW3LpS9mhFI64MclGz7U8ADVobBinmW0Rhi8LiS2WgzMWTK7wgz3 1FrIQHMhUGlQH2UFBpa8wgMd9tjSjX+PWSj20kgphqK3rysijLjUeF9a2KG4VU8Pv8Ub sPuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730233446; x=1730838246; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=QbnDXxocaCyheHFI8hTECOWKPKoXgfCmEGz3dctI1es=; b=ByxF8jCIfni23uxaHNzcjO6VTQsEtFdB2BYjWaUVdu1pJuo2DTbe8yalQGnMc3C6Hf e/mzg12JFatqYoBkSz2tAOwlELOln6+9MFs0ElyEJmQk7BecOreWZdvHEjdWaqhsDict +EbLh1PoL0qX7UPW2rf0v8mRyjSn2jGCsdEiQRoavV168iN7J5HAXrG/GsJJcy96pJ9g slJyS0TsRnzbntl5c6Jjo6JVurgwqqV/Do6STZJLgCf5khzYTRqdvUIfK0A908c23KED PfGuTLCUb37Dj0vEE5ZoVF/urS8OOGGI93j5UtU6xrC3TiFuE9/+aM1zrVwrgPOqn9/T z1lg== X-Forwarded-Encrypted: i=1; AJvYcCUW/3RjLpbkt8YFKUuTCk+f8XI7jzCOf9fTrAZXZteEkETxfbVISZqy+WcI14xoosLxx651cVM6woLHelU1hgZY@lists.infradead.org X-Gm-Message-State: AOJu0YwPnqcb+KHARA0rc9DcGKEdGpWiK6HCBkbC+FyVinL/N5hp1/Za wms3/7hE6wICghnx8AufWafaZERiw5AC0MxhoD4FfoRkoha9dEaPTJ9yHw== X-Google-Smtp-Source: AGHT+IETpjLLRg+7eXu2VyfPEE1vigfdrCP6sTkEwWApr6Df5/fyHL5jVC/64h7dxa0Nz1OLwcuYIA== X-Received: by 2002:a05:600c:511b:b0:431:558c:d9e9 with SMTP id 5b1f17b1804b1-4319ad24126mr50500115e9.5.1730233446109; Tue, 29 Oct 2024 13:24:06 -0700 (PDT) Received: from 6c1d2e1f4cf4.v.cablecom.net (84-72-156-211.dclient.hispeed.ch. [84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:05 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 08/23] ARM: dts: socfpga: add clock-frequency property Date: Tue, 29 Oct 2024 20:23:34 +0000 Message-Id: <20241029202349.69442-9-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132408_115007_21E42D76 X-CRM114-Status: UNSURE ( 9.85 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add 'clock-frequency' is a required property by dtschema. Initialization is open, similar to agilex devices. Signed-off-by: Lothar Rubusch --- arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi index 65d04339f..5f4bed187 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -99,21 +99,25 @@ clocks { cb_intosc_hs_div2_clk: cb_intosc_hs_div2_clk { #clock-cells = <0>; compatible = "fixed-clock"; + clock-frequency = <0>; }; cb_intosc_ls_clk: cb_intosc_ls_clk { #clock-cells = <0>; compatible = "fixed-clock"; + clock-frequency = <0>; }; f2s_free_clk: f2s_free_clk { #clock-cells = <0>; compatible = "fixed-clock"; + clock-frequency = <0>; }; osc1: osc1 { #clock-cells = <0>; compatible = "fixed-clock"; + clock-frequency = <0>; }; main_pll: main_pll@40 { From patchwork Tue Oct 29 20:23:35 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lothar Rubusch X-Patchwork-Id: 13855475 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BF845D3A69D for ; Tue, 29 Oct 2024 20:41:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=JxrWAGvbebnl7bShJIljz1Nm6dGXiAY6T1E3WWpWzg0=; b=LdvxtU/cHQ0+Z0h37tICr63hTp p06XuQxlDLwC4JLxcxKviaGfZM7EkbGSBPyzPKUNDFmi9AdW3trfA01f5D/g6CobEYYHAm9vnIvG6 BwXzPwSY7A30dUOCjZu6NAj+utHTgrxQx21vBLIcfx8AvcPkT1Ig2IbuQIIUlmLfs6Dv7Kv7qN5Rt yED2xK8IU52QYF5uxOWUrRrR1tlNFN3iEsRuqZsttaXklEUUGl5Sk9eJIoD2nDupSrHhrGmw/IO2X qIvGBf50aQ6Ofh4qmi7f0HQ6QI0DM0wWpBX2cDXC/ong84WZr/zf3j6AaQlxkfnxgfZxcCRVIT994 LZiGTp/A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t5t1V-0000000Fq2H-41HX; Tue, 29 Oct 2024 20:41:05 +0000 Received: from mail-wr1-x42f.google.com ([2a00:1450:4864:20::42f]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t5sl8-0000000Fl9W-0Rx6 for linux-arm-kernel@lists.infradead.org; Tue, 29 Oct 2024 20:24:11 +0000 Received: by mail-wr1-x42f.google.com with SMTP id ffacd0b85a97d-37d432f9f5aso549017f8f.3 for ; Tue, 29 Oct 2024 13:24:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730233448; x=1730838248; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JxrWAGvbebnl7bShJIljz1Nm6dGXiAY6T1E3WWpWzg0=; b=j6B/mOLzVmm1m2m3gpzyfMh3ZB/PObp33nkHtDq0lLneNy90MkoKnNiDxFVoBeggMf IYskvyCHVpu+R15dc52ZN/XmtHINMz53qEyMioEqB+JvYN7wCD72Hum0xN4L1ENFL6O+ UTPGRHuhWz+F7xsD4XnT2rMO9R6bfkDn0rcbPQhaxZrpjGdBiOOtKxrf2i9CjsKQueT0 SdT+Cx7d4v/h6WNDNmrHpE0QRZGCF0rGAGipIS9r4KuhVVYiwshqPTZwep6jfXTS0LKZ 9kQVINWMJgz8YiXwAM3zIAXE8JZ09uyF30ZWOFCz3IphH21e0SNz4DPGWRSGHm/kAA5z wwpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730233448; x=1730838248; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JxrWAGvbebnl7bShJIljz1Nm6dGXiAY6T1E3WWpWzg0=; b=aDhwC+Yn26/wJsozSllu3eXijHBLcB5Vi1l0sEAPvJuWiwW2TQhOAEmvOVeU/k90wR opB4nDfIpzQ36n5g4j9NMnMlzjiFcwvtPDDNGO7dIkH6ZSPs7vrieiVbPx3aIwBz3LcC bxfa+p+3h9qlXZXIymyrR3SMm12PvI3I4QnvbTLV77F9Z9kYAN6UqwTVVhBSef5U3ORp fDf+3CWJ9bLBbBNDJj21VeuCg53yP3u3mZc+zPRE4L6BVO7viTPW5l6Z96KYSfdHiqVu auvDXmPJ/mA2n1e1CTAZbeDfpcfzlcX/f+KsT2yyBJyV4Q5aeRq+GP9ePa33tzDbwp69 eXiQ== X-Forwarded-Encrypted: i=1; AJvYcCXs2UrH91C4Jt2MwvI4aatrRaQEhYE169zH7sMtqAaPQWrxLr+teHhXI2WEys0c7l4DqelX9plCa8f9Ms2bCNDy@lists.infradead.org X-Gm-Message-State: AOJu0Yw6ZN2MXM4NKdZqbNJy5xLgoInIg+fPiuSGx/hx66Cn85MZvZih ukLM2D7GL7OI1XAljEFajzGEQ/U574IumNcCS9CStQvznxM/5UsR X-Google-Smtp-Source: AGHT+IFe4HEmiUudtU71Iu+vsYyyet/UvGGn2kWZSX/+5WG2rLBnApro20Grx6Z5bXjcP0EijIUzig== X-Received: by 2002:a05:600c:5494:b0:431:4a7e:a121 with SMTP id 5b1f17b1804b1-4319ad4ee8emr46759745e9.9.1730233447776; Tue, 29 Oct 2024 13:24:07 -0700 (PDT) Received: from 6c1d2e1f4cf4.v.cablecom.net (84-72-156-211.dclient.hispeed.ch. [84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:07 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 09/23] ARM: dts: socfpga: add ranges property to sram Date: Tue, 29 Oct 2024 20:23:35 +0000 Message-Id: <20241029202349.69442-10-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132410_229378_06684878 X-CRM114-Status: UNSURE ( 9.59 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add 'ranges' to the SRAM node as it is a required property by the dtschema. Signed-off-by: Lothar Rubusch --- arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi index 5f4bed187..6a2ecc7ed 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -691,6 +691,7 @@ ocram: sram@ffe00000 { #address-cells = <1>; #size-cells = <1>; reg = <0xffe00000 0x40000>; + ranges; }; eccmgr: eccmgr { From patchwork Tue Oct 29 20:23:36 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lothar Rubusch X-Patchwork-Id: 13855488 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0477CD3A69F for ; Tue, 29 Oct 2024 20:43:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=vySvn0PrZ5KmWWRcUjB0f7ffbO3G5ojONpptbAIcwaU=; b=UqUjrfBJFxxA/RyWN04y4rp0bD XxlDlssO7VbX6HC3n5pEDZ3rbqxO51Aw3AlX66d6Ml4Kwyr1nZ2L/ZoUYZJ3XkCsL5bVbWImGkUbC Macw/4YTFGpixkeVIMJgvSKk/6Gf7w4byy/h/K8MXHlmxgOtPckp4pCbZFoxmEaC6X9WNRYrII8en MR0gxFA2+rjVtbnEcjDRTl+axGGQIJGiUKj3kthSnEJIIce+oRgj011GeON3CAJgWA4eBshpFc5U7 fLRlwD4dYN723h93sKYnwrneR4PMbyTqnTPJXSEkKwqvaRK0Ft6ji5h7McU+zO5pHIO5llArsgOQO 1ha9m/nQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t5t3G-0000000Fqdb-34CF; Tue, 29 Oct 2024 20:42:54 +0000 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t5sl9-0000000FlAK-1WfT for linux-arm-kernel@lists.infradead.org; Tue, 29 Oct 2024 20:24:12 +0000 Received: by mail-wr1-x430.google.com with SMTP id ffacd0b85a97d-37d432f9f5aso549025f8f.3 for ; Tue, 29 Oct 2024 13:24:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730233449; x=1730838249; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vySvn0PrZ5KmWWRcUjB0f7ffbO3G5ojONpptbAIcwaU=; b=WLOtyNuMj7AstjL++GOV9nZlkgwIUCDLPR4GvEz0awKBQ/O0Rlk0b3JOuIxIe/yWeL j0u6NHdKg5iiKZ0C8Vv+2fDyVkqQO+mJtHD00EI/FGcS9awtxAsBVcb9Knzn/yG6z1SK ZwxOynugiJS0KhTd0LoEWu0HcJlgCzJ8qNMVDO7hWsTnUlkykh5zIztRF8zSQVwT61dG ZbGi/Edjs7Mh6AtDgpVz5k2ZknQhSKkdB32uphwzlBlMA53dWGlR/PWBq77irfRka9kn 2+zKeE604wN6LFIqTmA51lfHQLUR1R8wUnuFDkneGjLSchhIKNroANPqb7BI3+AWaNd4 INvg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730233449; x=1730838249; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vySvn0PrZ5KmWWRcUjB0f7ffbO3G5ojONpptbAIcwaU=; b=HjLHWjAcscTAq36t+fKSXfp7zOsH0gmXAPDcKzfgdTwcQPy72aHNKaraEDd4n3RUQa WWnMa8sWkxxIIaFGMG81C79Kpskiz9Ql3aoaDnkCkdfWZtj0+Wscd2IKIsgNMWzNUaM2 KyiZhGwLEm9hnJJOI2YFJA+OGwNy6WNPVN83+4TKPcZcnYFlj3kgVTUbVpUcA/K29ZWd Fsh+cfvajMWwMHV7YXCVCBkkPMsgQ0oNjTnQEsVibIpbF535HWsOyAboB85oEwSkV9VB lFFSdRZzK8ecoomrBmkk57QjEFENPHzT4PwCqJ3nt1q1dSAHnwqebAX4ubzO4vkUMjpE d3Tg== X-Forwarded-Encrypted: i=1; AJvYcCVh69t9C/tvCnxZs/x0iMN+qM2+2Axtk0zCR0QyNQH46YfSI4iZl1hTBVc/YLdbZiACFS/H5JLgDRqP8mhH9UUD@lists.infradead.org X-Gm-Message-State: AOJu0Yw/LT3Q1T726izo1IUCPc9Zepj3XkYFpR4fRlLWeZP0zoq1LXQ2 y9VL3APDAtJSLVp5cFidX7Z6Z6vV/812ptyWJ2YKDB+BThBR8KtM X-Google-Smtp-Source: AGHT+IFSpTV0Tj7I6mQHfK9STG9/cLahfdy+XF2noCCt0RfKclZZKLKsVyDf7dEs0S7eg2BUhcBLuA== X-Received: by 2002:a05:600c:45cf:b0:42c:aeee:d8ee with SMTP id 5b1f17b1804b1-4319ad4adc4mr46799135e9.8.1730233449432; Tue, 29 Oct 2024 13:24:09 -0700 (PDT) Received: from 6c1d2e1f4cf4.v.cablecom.net (84-72-156-211.dclient.hispeed.ch. [84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:09 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 10/23] ARM: dts: socfpga: remove arria10 reset-names Date: Tue, 29 Oct 2024 20:23:36 +0000 Message-Id: <20241029202349.69442-11-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132411_420207_CCECC8A4 X-CRM114-Status: GOOD ( 10.64 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remove the reset-names since the binding does not mention them, and they seem not to be used in arria10 (similarily to agilex). Signed-off-by: Lothar Rubusch --- arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi | 4 ---- 1 file changed, 4 deletions(-) diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi index 6a2ecc7ed..005c57843 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10.dtsi @@ -818,7 +818,6 @@ timer0: timer0@ffc02700 { clocks = <&l4_sp_clk>; clock-names = "timer"; resets = <&rst SPTIMER0_RESET>; - reset-names = "timer"; }; timer1: timer1@ffc02800 { @@ -828,7 +827,6 @@ timer1: timer1@ffc02800 { clocks = <&l4_sp_clk>; clock-names = "timer"; resets = <&rst SPTIMER1_RESET>; - reset-names = "timer"; }; timer2: timer2@ffd00000 { @@ -838,7 +836,6 @@ timer2: timer2@ffd00000 { clocks = <&l4_sys_free_clk>; clock-names = "timer"; resets = <&rst L4SYSTIMER0_RESET>; - reset-names = "timer"; }; timer3: timer3@ffd00100 { @@ -848,7 +845,6 @@ timer3: timer3@ffd00100 { clocks = <&l4_sys_free_clk>; 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[84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:10 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 11/23] net: stmmac: add support for dwmac 3.72a Date: Tue, 29 Oct 2024 20:23:37 +0000 Message-Id: <20241029202349.69442-12-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132412_555573_616E7D48 X-CRM114-Status: GOOD ( 13.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The dwmac 3.72a is an ip version that can be found on Intel/Altera Arria10 SoCs. Going by the hardware features "snps,multicast-filter-bins" and "snps,perfect-filter-entries" shall be supported. Thus add a compatibility flag, and extend coverage of the driver for the 3.72a. Signed-off-by: Lothar Rubusch --- drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c | 1 + drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c index 598eff926..b9218c07e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-generic.c @@ -56,6 +56,7 @@ static const struct of_device_id dwmac_generic_match[] = { { .compatible = "snps,dwmac-3.610"}, { .compatible = "snps,dwmac-3.70a"}, { .compatible = "snps,dwmac-3.710"}, + { .compatible = "snps,dwmac-3.72a"}, { .compatible = "snps,dwmac-4.00"}, { .compatible = "snps,dwmac-4.10a"}, { .compatible = "snps,dwmac"}, diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c index 54797edc9..e7e2d6c20 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c @@ -522,6 +522,7 @@ stmmac_probe_config_dt(struct platform_device *pdev, u8 *mac) if (of_device_is_compatible(np, "st,spear600-gmac") || of_device_is_compatible(np, "snps,dwmac-3.50a") || of_device_is_compatible(np, "snps,dwmac-3.70a") || + of_device_is_compatible(np, "snps,dwmac-3.72a") || of_device_is_compatible(np, "snps,dwmac")) { /* Note that the max-frame-size parameter as defined in the * ePAPR v1.1 spec is defined as max-frame-size, it's From patchwork Tue Oct 29 20:23:38 2024 Content-Type: text/plain; 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[84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:12 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 12/23] dt-bindings: net: snps,dwmac: add support for Arria10 Date: Tue, 29 Oct 2024 20:23:38 +0000 Message-Id: <20241029202349.69442-13-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132415_158531_248BDFE1 X-CRM114-Status: GOOD ( 10.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The hard processor system (HPS) on the Intel/Altera Arria10 provides three Ethernet Media Access Controller (EMAC) peripherals. Each EMAC can be used to transmit and receive data at 10/100/1000 Mbps over ethernet connections in compliance with the IEEE 802.3 specification. The EMACs on the Arria10 are instances of the Synopsis DesignWare Universal 10/100/1000 Ethernet MAC, version 3.72a. Support the Synopsis DesignWare version 3.72a, which is used in Intel's Arria10 SoC, since it was missing. Signed-off-by: Lothar Rubusch Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/net/snps,dwmac.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 15073627c..d26bb77eb 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -26,6 +26,7 @@ select: - snps,dwmac-3.610 - snps,dwmac-3.70a - snps,dwmac-3.710 + - snps,dwmac-3.72a - snps,dwmac-4.00 - snps,dwmac-4.10a - snps,dwmac-4.20a @@ -88,6 +89,7 @@ properties: - snps,dwmac-3.610 - snps,dwmac-3.70a - snps,dwmac-3.710 + - snps,dwmac-3.72a - snps,dwmac-4.00 - snps,dwmac-4.10a - snps,dwmac-4.20a From patchwork Tue Oct 29 20:23:39 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lothar Rubusch X-Patchwork-Id: 13855492 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E7B95D3A69F for ; Tue, 29 Oct 2024 20:48:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=rx0eMLUEzhYETTDB2Dx4nHIilzNRVf/VQgEFIdoul78=; b=Z2BNHSYVO6zs9e6K+w+iEZR535 J/yUg/du9wq/cA0qU6ZHQ49IJsmdMEYR2IpInGpi94VPqDw8iaNFItf4GL+BCVOaX2EM9MEIZpI07 mhGxr3Xa7d/E8NeSUX+ElXJTCYkdw6vVcX/NSM7vSiFn2YEXEb4eYLjmnLOv0p1LxBMrugBWzFz8w fPHmg1x0S7MIkwi02zyu2vaT+8Sy4DRxtrm7ZONAvKVciMNvsbQAtijkRwu+FZ+jDIDFOP7AjBDBJ R1LOf9p4gH2c/13lxsnR71sStmisPPZwn8u0pch0oVeaeM/xYBQkuIknmf/eOUuRBLwVLUExMgQqz QfjyE2uA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t5t8F-0000000Fs5I-0e1Q; Tue, 29 Oct 2024 20:48:03 +0000 Received: from mail-wr1-x431.google.com ([2a00:1450:4864:20::431]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t5slF-0000000FlDU-0dbf for linux-arm-kernel@lists.infradead.org; Tue, 29 Oct 2024 20:24:18 +0000 Received: by mail-wr1-x431.google.com with SMTP id ffacd0b85a97d-37d6716e200so888396f8f.3 for ; Tue, 29 Oct 2024 13:24:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730233455; x=1730838255; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rx0eMLUEzhYETTDB2Dx4nHIilzNRVf/VQgEFIdoul78=; b=aZIe2bkFhQV0b5Lrnk13qzSRwAcIXbXn07aoClKbGJzPGND/oYETtpKrYDeRC48LAO NuRoB0FK4dQNXJTfkf0n/YWp/gUZGZx2P5Utn2b+cY+6WDhxox6fKoCbXFOeOaaWzGgS wifYGOre+r2yteFsi+Qhf1lPkVHzFq3SbpOgz0qg2icHczjtxhGC/rCBXAEJ2Fu/MApD EKYImAgv0PgIXRMt8m/JlG0fxEeVAtExG78DADXATn2Xb09AVTH1tDBhiKlPAFxMecJ3 Z5O8qsXXNd5rZ2P85acpYnhKM9WggmRUJj5BPdVJp+mjge3pibPBQ22rCqnXrQ0+jX0R Z5Dg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730233455; x=1730838255; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rx0eMLUEzhYETTDB2Dx4nHIilzNRVf/VQgEFIdoul78=; b=NItYvW4P5kLbDNA33pOPVEMtOSBfMbqzdupyA1x2zNuIxXRzbPHQ4u9y7FVYLGbjZM Gvm3kAk6Km3Qu1xNj2YIfrgT5Ix6lv4ZxzjVSPny8+uiQPb54QXBHNhSeA1qEL+FAq+S ohHsUQoClWqVEBNWiBBRq2lvXET6sPpfj5uWk4YxTuzNMvxBXSkO6tUyJajilM33ORiX gUMu0NCYtxTa+wHfC+Nh9155NHwPf8qSTftIVB15GMQFPCCmn8zafhGkg806vmFj9meA /yO0Igf9If+fqTdGg5naKuDLk34d8xdHOsz9PzPGDBerUK3W4fwddPbRq8Z1m0CK6+xk SQuA== X-Forwarded-Encrypted: i=1; AJvYcCVw8s5kLZKeBdTMmSBcID+6h+PIRdpc5zFZcGu0piMfZ8bnka4vI3dD3baO4o5Nakdgqo0Jf7UWJxAGvuqEBpJ3@lists.infradead.org X-Gm-Message-State: AOJu0YwMjOIjAkcLpGmykcrdcbuTmgLDiOQPrMh33Gi/0+rO+AYJda/N K6/9b6mXqDoldD7EJhvs1s+wU6+APBwfMkGKRP5tpnZJCk7DYSA6 X-Google-Smtp-Source: AGHT+IEnuFjr/Zc4f6jXZAW8xbcExw/fgwTtYOC4EmQWOqcT/pxDPVKNa5Oe0HscWQqMZwS60H9tkw== X-Received: by 2002:a5d:47c2:0:b0:374:ca43:ac00 with SMTP id ffacd0b85a97d-38061126ae4mr3904749f8f.4.1730233454663; Tue, 29 Oct 2024 13:24:14 -0700 (PDT) Received: from 6c1d2e1f4cf4.v.cablecom.net (84-72-156-211.dclient.hispeed.ch. [84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:14 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 13/23] ARM: dts: socfpga: add Enclustra boot-mode dtsi Date: Tue, 29 Oct 2024 20:23:39 +0000 Message-Id: <20241029202349.69442-14-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132417_239359_90ACBC45 X-CRM114-Status: GOOD ( 16.44 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add generic boot-mode support to Enclustra Arria10 and Cyclone5 boards. Some Enclustra carrier boards need hardware adjustments specific to the selected boot-mode. Enclustra's Arria10 SoMs allow for booting from different media. By muxing certain IO pins, the media can be selected. This muxing can be done by gpios at runtime e.g. when flashing QSPI from off the bootloader. But also to have statically certain boot media available, certain adjustments to the DT are needed: - SD: QSPI must be disabled - eMMC: QSPI must be disabled, bus width can be doubled to 8 byte - QSPI: any mmc is disabled, QSPI then defaults to be enabled The boot media must be accessible to the bootloader, e.g. to load a bitstream file, but also to the system to mount the rootfs and to use the specific performance. Signed-off-by: Andreas Buerkler Signed-off-by: Lothar Rubusch --- .../socfpga_enclustra_mercury_bootmode_emmc.dtsi | 12 ++++++++++++ .../socfpga_enclustra_mercury_bootmode_qspi.dtsi | 8 ++++++++ .../socfpga_enclustra_mercury_bootmode_sdmmc.dtsi | 8 ++++++++ 3 files changed, 28 insertions(+) create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_emmc.dtsi create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_qspi.dtsi create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_sdmmc.dtsi diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_emmc.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_emmc.dtsi new file mode 100644 index 000000000..d79cb64da --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_emmc.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +&qspi { + status = "disabled"; +}; + +&mmc { + bus-width = <8>; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_qspi.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_qspi.dtsi new file mode 100644 index 000000000..5ba21dd8f --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_qspi.dtsi @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +&mmc { + status = "disabled"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_sdmmc.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_sdmmc.dtsi new file mode 100644 index 000000000..2b102e0b6 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_bootmode_sdmmc.dtsi @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +&qspi { + status = "disabled"; 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[84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:15 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 14/23] ARM: dts: socfpga: add Enclustra base-board dtsi Date: Tue, 29 Oct 2024 20:23:40 +0000 Message-Id: <20241029202349.69442-15-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132418_859375_B730252B X-CRM114-Status: GOOD ( 14.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add generic Enclustra base-board support for the Mercury+ PE1, the Mercury+ PE3 and the Mercury+ ST1 board. The carrier boards can be freely combined with the SoMs Mercury+ AA1, Mercury SA1 and Mercury+ SA2. Signed-off-by: Andreas Buerkler Signed-off-by: Lothar Rubusch --- .../socfpga_enclustra_mercury_pe1.dtsi | 33 +++++++++++ .../socfpga_enclustra_mercury_pe3.dtsi | 55 +++++++++++++++++++ .../socfpga_enclustra_mercury_st1.dtsi | 15 +++++ 3 files changed, 103 insertions(+) create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_pe1.dtsi create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_pe3.dtsi create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_st1.dtsi diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_pe1.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_pe1.dtsi new file mode 100644 index 000000000..abc4bfb7f --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_pe1.dtsi @@ -0,0 +1,33 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +&i2c_encl { + status = "okay"; + + eeprom@57 { + status = "okay"; + compatible = "microchip,24c128"; + reg = <0x57>; + pagesize = <64>; + label = "user eeprom"; + address-width = <16>; + }; + + lm96080: temperature-sensor@2f { + status = "okay"; + compatible = "national,lm80"; + reg = <0x2f>; + }; + + si5338: clock-controller@70 { + compatible = "silabs,si5338"; + reg = <0x70>; + }; + +}; + +&i2c_encl_fpga { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_pe3.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_pe3.dtsi new file mode 100644 index 000000000..bc57b0680 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_pe3.dtsi @@ -0,0 +1,55 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +&i2c_encl { + i2c-mux@74 { + status = "okay"; + compatible = "nxp,pca9547"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x74>; + + i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + eeprom@56 { + status = "okay"; + compatible = "microchip,24c128"; + reg = <0x56>; + pagesize = <64>; + label = "user eeprom"; + address-width = <16>; + }; + + lm96080: temperature-sensor@2f { + status = "okay"; + compatible = "national,lm80"; + reg = <0x2f>; + }; + + pcal6416: gpio@20 { + status = "okay"; + compatible = "nxp,pcal6416"; + reg = <0x20>; + gpio-controller; + #gpio-cells = <2>; + }; + }; + }; +}; + +&i2c_encl_fpga { + status = "okay"; + + i2c-mux@75 { + status = "okay"; + compatible = "nxp,pca9547"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x75>; + }; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_st1.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_st1.dtsi new file mode 100644 index 000000000..4c00475f4 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_enclustra_mercury_st1.dtsi @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +&i2c_encl { + si5338: clock-controller@70 { + compatible = "silabs,si5338"; + reg = <0x70>; + }; +}; + +&i2c_encl_fpga { + status = "okay"; +}; From patchwork Tue Oct 29 20:23:41 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lothar Rubusch X-Patchwork-Id: 13855494 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B0538D2AB15 for ; Tue, 29 Oct 2024 20:51:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; 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[84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:17 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 15/23] ARM: dts: socfpga: add Enclustra Mercury SA1 Date: Tue, 29 Oct 2024 20:23:41 +0000 Message-Id: <20241029202349.69442-16-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132419_824631_DD49BE12 X-CRM114-Status: GOOD ( 15.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Introduce support for Enclustra's Mercury SA1 SoM based on Intel Cyclone5 technology as a .dtsi file. Signed-off-by: Andreas Buerkler Signed-off-by: Lothar Rubusch --- .../socfpga/socfpga_cyclone5_mercury_sa1.dtsi | 143 ++++++++++++++++++ 1 file changed, 143 insertions(+) create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1.dtsi diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1.dtsi new file mode 100644 index 000000000..2041088b7 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1.dtsi @@ -0,0 +1,143 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +#include "socfpga_cyclone5.dtsi" + +/ { + model = "Enclustra Mercury SA1"; + compatible = "altr,socfpga-cyclone5", "altr,socfpga"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + ethernet0 = &gmac1; + }; + + /* Adjusted the i2c labels to use generic base-board dtsi files for + * Enclustra Arria10 and Cyclone5 SoMs. + * + * The set of i2c0 and i2c1 labels defined in socfpga_cyclone5.dtsi and in + * socfpga_arria10.dtsi do not allow for using the same base-board .dtsi + * fragments. Thus define generic labels here to match the correct i2c + * bus in a generic base-board .dtsi file. + */ + soc { + i2c_encl: i2c@ffc04000 { + }; + i2c_encl_fpga: i2c@ffc05000 { + }; + }; + + memory { + name = "memory"; + device_type = "memory"; + reg = <0x0 0x40000000>; /* 1GB */ + }; +}; + +&osc1 { + clock-frequency = <50000000>; +}; + +&i2c_encl { + i2c-sda-hold-time-ns = <300>; + clock-frequency = <100000>; + status = "okay"; + + isl12020: rtc@6f { + compatible = "isil,isl12022"; + reg = <0x6f>; + }; +}; + +&i2c_encl_fpga { + i2c-sda-hold-time-ns = <300>; + status = "disabled"; +}; + +&uart0 { + clock-frequency = <100000000>; +}; + +&mmc0 { + status = "okay"; + /delete-property/ cap-mmc-highspeed; + /delete-property/ cap-sd-highspeed; +}; + +&qspi { + status = "okay"; + + flash0: flash@0 { + u-boot,dm-pre-reloc; + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25fl512s", "jedec,spi-nor"; + reg = <0>; + + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + spi-max-frequency = <10000000>; + + cdns,read-delay = <4>; + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <50>; + cdns,tchsh-ns = <4>; + cdns,tslch-ns = <4>; + + partition@raw { + label = "Flash Raw"; + reg = <0x0 0x4000000>; + }; + }; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gmac1 { + status = "okay"; + /delete-property/ mac-address; + phy-mode = "rgmii"; + phy-handle = <&phy3>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + phy3: ethernet-phy@3 { + reg = <3>; + + /* Add 2ns RX clock delay (1.2ns + 0.78ns)*/ + rxc-skew-ps = <1680>; + rxd0-skew-ps = <420>; + rxd1-skew-ps = <420>; + rxd2-skew-ps = <420>; + rxd3-skew-ps = <420>; + rxdv-skew-ps = <420>; + + /* Add 1.38ns TX clock delay (0.96ns + 0.42ns)*/ + txc-skew-ps = <1860>; + txd0-skew-ps = <0>; + txd1-skew-ps = <0>; + txd2-skew-ps = <0>; + txd3-skew-ps = <0>; + txen-skew-ps = <0>; + }; + }; +}; + +&usb1 { + status = "okay"; + dr_mode = "host"; +}; From patchwork Tue Oct 29 20:23:42 2024 Content-Type: text/plain; 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[84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:19 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v4 16/23] dt-bindings: altera: add Enclustra Mercury SA1 Date: Tue, 29 Oct 2024 20:23:42 +0000 Message-Id: <20241029202349.69442-17-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132422_451512_A0AA46FE X-CRM114-Status: UNSURE ( 9.02 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Update the DT binding for the Enclustra Mercury+ SA1 SoM Signed-off-by: Lothar Rubusch Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/altera.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml index 8c7575455..87a22d2a4 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -51,6 +51,16 @@ properties: - const: altr,socfpga-cyclone5 - const: altr,socfpga + - description: Mercury SA1 boards + items: + - enum: + - enclustra,mercury-sa1-pe1 + - enclustra,mercury-sa1-pe3 + - enclustra,mercury-sa1-st1 + - const: enclustra,mercury-sa1 + - const: altr,socfpga-cyclone5 + - const: altr,socfpga + - description: Stratix 10 boards items: - enum: From patchwork Tue Oct 29 20:23:43 2024 Content-Type: text/plain; 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[84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:21 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 17/23] ARM: dts: socfpga: add Enclustra Mercury+ SA2 Date: Tue, 29 Oct 2024 20:23:43 +0000 Message-Id: <20241029202349.69442-18-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132424_061068_2A46EF76 X-CRM114-Status: GOOD ( 15.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Introduce Enclustra's Mercury+ SA2 SoM based on Intel Cyclone5 technology as a .dtsi file. Signed-off-by: Andreas Buerkler Signed-off-by: Lothar Rubusch --- .../socfpga/socfpga_cyclone5_mercury_sa2.dtsi | 146 ++++++++++++++++++ 1 file changed, 146 insertions(+) create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2.dtsi diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2.dtsi new file mode 100644 index 000000000..f46f1410f --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2.dtsi @@ -0,0 +1,146 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +#include "socfpga_cyclone5.dtsi" + +/ { + model = "Enclustra Mercury+ SA2"; + compatible = "altr,socfpga-cyclone5", "altr,socfpga"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + aliases { + ethernet0 = &gmac1; + }; + + /* Adjusted the i2c labels to use generic base-board dtsi files for + * Enclustra Arria10 and Cyclone5 SoMs. + * + * The set of i2c0 and i2c1 labels defined in socfpga_cyclone5.dtsi and in + * socfpga_arria10.dtsi do not allow for using the same base-board .dtsi + * fragments. Thus define generic labels here to match the correct i2c + * bus in a generic base-board .dtsi file. + */ + soc { + i2c_encl: i2c@ffc04000 { + }; + i2c_encl_fpga: i2c@ffc05000 { + }; + }; + + memory { + name = "memory"; + device_type = "memory"; + reg = <0x0 0x80000000>; /* 2GB */ + }; +}; + +&osc1 { + clock-frequency = <50000000>; +}; + +&i2c_encl { + i2c-sda-hold-time-ns = <300>; + clock-frequency = <100000>; + status = "okay"; + + isl12020: rtc@6f { + compatible = "isil,isl12022"; + reg = <0x6f>; + }; + + atsha204a: crypto@64 { + compatible = "atmel,atsha204a"; + reg = <0x64>; + }; +}; + +&i2c_encl_fpga { + i2c-sda-hold-time-ns = <300>; + status = "disabled"; +}; + +&uart0 { + clock-frequency = <100000000>; +}; + +&mmc0 { + status = "okay"; +}; + +&qspi { + status = "okay"; + + flash0: flash@0 { + u-boot,dm-pre-reloc; + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25fl512s", "jedec,spi-nor"; + reg = <0>; + + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + spi-max-frequency = <10000000>; + + cdns,read-delay = <4>; + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <50>; + cdns,tchsh-ns = <4>; + cdns,tslch-ns = <4>; + + partition@raw { + label = "Flash Raw"; + reg = <0x0 0x4000000>; + }; + }; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gmac1 { + status = "okay"; + /delete-property/ mac-address; + phy-mode = "rgmii"; + phy-handle = <&phy3>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + phy3: ethernet-phy@3 { + reg = <3>; + + /* Add 2ns RX clock delay (1.2ns + 0.78ns)*/ + rxc-skew-ps = <1680>; + rxd0-skew-ps = <420>; + rxd1-skew-ps = <420>; + rxd2-skew-ps = <420>; + rxd3-skew-ps = <420>; + rxdv-skew-ps = <420>; + + /* Add 1.38ns TX clock delay (0.96ns + 0.42ns)*/ + txc-skew-ps = <1860>; + txd0-skew-ps = <0>; + txd1-skew-ps = <0>; + txd2-skew-ps = <0>; + txd3-skew-ps = <0>; + txen-skew-ps = <0>; + }; + }; +}; + +&usb1 { + status = "okay"; + dr_mode = "host"; +}; From patchwork Tue Oct 29 20:23:44 2024 Content-Type: text/plain; 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[84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:23 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v4 18/23] dt-bindings: altera: add binding for Mercury+ SA2 Date: Tue, 29 Oct 2024 20:23:44 +0000 Message-Id: <20241029202349.69442-19-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132425_285727_2B0C1C1B X-CRM114-Status: UNSURE ( 9.64 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Update the device-tree binding for the Enclustra Mercury+ SA2 SoM. Signed-off-by: Lothar Rubusch Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/altera.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml index 87a22d2a4..31af6859d 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -61,6 +61,16 @@ properties: - const: altr,socfpga-cyclone5 - const: altr,socfpga + - description: Mercury+ SA2 boards + items: + - enum: + - enclustra,mercury-sa2-pe1 + - enclustra,mercury-sa2-pe3 + - enclustra,mercury-sa2-st1 + - const: enclustra,mercury-sa2 + - const: altr,socfpga-cyclone5 + - const: altr,socfpga + - description: Stratix 10 boards items: - enum: From patchwork Tue Oct 29 20:23:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lothar Rubusch X-Patchwork-Id: 13855514 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B576CD2AB15 for ; Tue, 29 Oct 2024 20:58:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=qJYzgv7BpNS3X0anslX6neWR7MP+bzIdFazI1EGhk+Y=; b=sRDO8smZr8l4Fi1gADyDK1Pt7E o9kuCFwvK04L67VqsxG1LNoI68Fh7dcxa2/czN7I0T8lZTMbOm2MoAnU6AgTVUzBZY+ggrYT0IPKT /vgufx2l8nKjDebSRUyUyKaDIzbbex+bkhlPYO7zDMEQsEwuVidITleZdwVqwcv7DrZFSMq17b4eE 4Vb09wxdJjJpQ/FW4zxkZhCa6D6KFDW91YPRsjxLwfORHULE2Vle5Dc64+fGwo7/v68I2vVjimHH0 l3dEpLVWJ3xA9OOqm/p2AvNFJWA+paW4lgTdqxCiDlzCrSgJCO+9QBaI4L24SUl6lHi68OS5bIb2v euMzqbhg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t5tHp-0000000FtVu-4BHD; Tue, 29 Oct 2024 20:57:58 +0000 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t5slP-0000000FlJX-3mqy for linux-arm-kernel@lists.infradead.org; Tue, 29 Oct 2024 20:24:29 +0000 Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-43155a6c3a6so7119055e9.1 for ; Tue, 29 Oct 2024 13:24:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730233465; x=1730838265; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=qJYzgv7BpNS3X0anslX6neWR7MP+bzIdFazI1EGhk+Y=; b=lKrkM9ZTUPivFhdAu1dvkZa18+v/zw3wDC30HeuVs5ew5uamobw+IQbKUUegPA/gDa k9jFkds/VbSTUz/9Vg2qoHWZyCv7G5rzZhD1F+3XAVEWUSH4IT6GcBy+SHelqWSozMrB K9QJIrQRjU2Usu+MoRu+/IJU9UWx+KtUaBWITInKSA4bWumQavegSgkehPX47UKyD73u IseRjQELKEfov6L/bFfQlSoMFoUmIzo1CbVhatq/kZ+sIIWkSCzuRsp4S49Uw/Tcdw2a dUQB+flpxOSNgTZyPtqqWkMCEsuJWxcvRNRggpslqDA85xWWydHtgTmJ75nEta6lWX5m 0tNg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730233465; x=1730838265; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=qJYzgv7BpNS3X0anslX6neWR7MP+bzIdFazI1EGhk+Y=; b=EmYmWPUbswYyKymkiLL0ZCMeicTHSWM59xlCdrwO0WdYq9b98lHv6nL0TKLraBxieY j1dICQm8KE1lH4o/UpFnEqUBC7/tlXXBj4HMS7T9jMXRNfUC61Rw4Wzpg3eRg2qxmLvK /XtyNUVlZOIsFk72Ea5WBKdtyaDjRC4Q+xRLrrFJqPAmw91qoZYfqgP54v9LQajq+89G ZAO7Gn1u9IuBs387UqAXfmgyDG72qqrFHpatniKYu/a+xUdaBMWq6e09qeCpsBXbpbJk 9ya7e8g1n7qi5WDMaEaA+t/s/fa1ShBCy8YQrzp9yjp8G7H8kWjf5+4c6kpym7w1you2 BMXg== X-Forwarded-Encrypted: i=1; AJvYcCVd6cNooqKFSLNbeEBkYDRlXxKSnaxg3i/Gbxto9p+fWjZfUjnFQzzH4pdhTOtvYygyeXtHvOFZxnNIXBWKoIg0@lists.infradead.org X-Gm-Message-State: AOJu0Yz8KS3UuzetNhptqMcSPqZK2wNdqsM91ThtFHt0MPZChTXvMm/L qgmej90oTNB8eCPlxYg7A3pzmZds+MXFqmgJQE9CnyM8yPUAXNvl X-Google-Smtp-Source: AGHT+IGRmWtXkT5jAPAXRCxV+0flfcZw0XykWsjSo1z4+Tq4K4M0238SRmf//mWNOkIOSWwEX17Vsg== X-Received: by 2002:a05:600c:190a:b0:431:4e73:a515 with SMTP id 5b1f17b1804b1-4319ac9ad38mr47697085e9.3.1730233465129; Tue, 29 Oct 2024 13:24:25 -0700 (PDT) Received: from 6c1d2e1f4cf4.v.cablecom.net (84-72-156-211.dclient.hispeed.ch. [84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:24 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 19/23] ARM: dts: socfpga: add Mercury AA1 combinations Date: Tue, 29 Oct 2024 20:23:45 +0000 Message-Id: <20241029202349.69442-20-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132427_970062_4D970115 X-CRM114-Status: GOOD ( 15.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Introduce support for Enclustra's Mercury+ AA1 SoM, based on Intel Arria10. This is a flexible approach to allow for combining SoM with carrier board .dtsi and boot-mode .dtsi in a device-tree file. Signed-off-by: Andreas Buerkler Signed-off-by: Lothar Rubusch --- .../socfpga/socfpga_arria10_mercury_aa1.dtsi | 141 +++++++++++++++--- 1 file changed, 120 insertions(+), 21 deletions(-) diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1.dtsi b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1.dtsi index 41f865c8c..41351d58f 100644 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1.dtsi +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1.dtsi @@ -7,12 +7,14 @@ / { - model = "Enclustra Mercury AA1"; - compatible = "enclustra,mercury-aa1", "altr,socfpga-arria10", "altr,socfpga"; + model = "Enclustra Mercury+ AA1"; + compatible = "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; aliases { ethernet0 = &gmac0; serial1 = &uart1; + spi0 = &qspi; }; memory@0 { @@ -24,52 +26,102 @@ memory@0 { chosen { stdout-path = "serial1:115200n8"; }; + + /* Adjusted the i2c labels to use generic base-board dtsi files for + * Enclustra Arria10 and Cyclone5 SoMs. + * + * The set of i2c0 and i2c1 labels defined in socfpga_cyclone5.dtsi and in + * socfpga_arria10.dtsi do not allow for using the same base-board .dtsi + * fragments. Thus define generic labels here to match the correct i2c + * bus in a generic base-board .dtsi file. + */ + soc { + i2c_encl: i2c@ffc02300 { + }; + i2c_encl_fpga: i2c@ffc02200 { + }; + }; +}; + +&i2c_encl { + status = "okay"; + i2c-sda-hold-time-ns = <300>; + clock-frequency = <100000>; + + atsha204a: crypto@64 { + compatible = "atmel,atsha204a"; + reg = <0x64>; + }; + + isl12022: rtc@6f { + compatible = "isil,isl12022"; + reg = <0x6f>; + }; +}; + +&i2c_encl_fpga { + i2c-sda-hold-time-ns = <300>; + status = "disabled"; }; &gmac0 { + status = "okay"; phy-mode = "rgmii"; phy-addr = <0xffffffff>; /* probe for phy addr */ - max-frame-size = <3800>; - phy-handle = <&phy3>; + /delete-property/ mac-address; + mdio { #address-cells = <1>; #size-cells = <0>; compatible = "snps,dwmac-mdio"; phy3: ethernet-phy@3 { - txd0-skew-ps = <0>; /* -420ps */ - txd1-skew-ps = <0>; /* -420ps */ - txd2-skew-ps = <0>; /* -420ps */ - txd3-skew-ps = <0>; /* -420ps */ + reg = <3>; + + /* Add 2ns RX clock delay (1.2ns + 0.78ns)*/ + rxc-skew-ps = <1680>; /* 780ps */ rxd0-skew-ps = <420>; /* 0ps */ rxd1-skew-ps = <420>; /* 0ps */ rxd2-skew-ps = <420>; /* 0ps */ rxd3-skew-ps = <420>; /* 0ps */ - txen-skew-ps = <0>; /* -420ps */ - txc-skew-ps = <1860>; /* 960ps */ rxdv-skew-ps = <420>; /* 0ps */ - rxc-skew-ps = <1680>; /* 780ps */ - reg = <3>; + + /* Add 1.38ns TX clock delay (0.96ns + 0.42ns)*/ + txc-skew-ps = <1860>; /* 960ps */ + txd0-skew-ps = <0>; /* -420ps */ + txd1-skew-ps = <0>; /* -420ps */ + txd2-skew-ps = <0>; /* -420ps */ + txd3-skew-ps = <0>; /* -420ps */ + txen-skew-ps = <0>; /* -420ps */ }; }; }; -&i2c1 { - atsha204a: crypto@64 { - compatible = "atmel,atsha204a"; - reg = <0x64>; - }; +&gpio0 { + status = "okay"; +}; - isl12022: isl12022@6f { - compatible = "isil,isl12022"; - reg = <0x6f>; - }; +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&uart0 { + status = "disabled"; +}; + +&uart1 { + status = "okay"; }; /* Following mappings are taken from arria10 socdk dts */ &mmc { + status = "okay"; cap-sd-highspeed; broken-cd; bus-width = <4>; @@ -79,3 +131,50 @@ &mmc { &osc1 { clock-frequency = <33330000>; }; + +&eccmgr { + sdmmca-ecc@ff8c2c00 { + compatible = "altr,socfpga-sdmmc-ecc"; + reg = <0xff8c2c00 0x400>; + altr,ecc-parent = <&mmc>; + interrupts = <15 IRQ_TYPE_LEVEL_HIGH>, + <47 IRQ_TYPE_LEVEL_HIGH>, + <16 IRQ_TYPE_LEVEL_HIGH>, + <48 IRQ_TYPE_LEVEL_HIGH>; + }; +}; + +&qspi { + status = "okay"; + flash0: flash@0 { + u-boot,dm-pre-reloc; + #address-cells = <1>; + #size-cells = <1>; + compatible = "spansion,s25fl512s", "jedec,spi-nor"; + reg = <0>; + + spi-rx-bus-width = <4>; + spi-tx-bus-width = <4>; + spi-max-frequency = <10000000>; + + cdns,read-delay = <4>; + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <50>; + cdns,tchsh-ns = <4>; + cdns,tslch-ns = <4>; + + partition@raw { + label = "Flash Raw"; + reg = <0x0 0x4000000>; + }; + }; +}; + +&watchdog1 { + status = "disabled"; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; +}; From patchwork Tue Oct 29 20:23:46 2024 Content-Type: text/plain; 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[84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:27 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v4 20/23] dt-bindings: altera: add Mercury AA1 combinations Date: Tue, 29 Oct 2024 20:23:46 +0000 Message-Id: <20241029202349.69442-21-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132428_951527_5F48F781 X-CRM114-Status: UNSURE ( 9.37 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Update binding with combined .dts for the Mercury+ PE1, PE3 and ST1 carrier boards with the Mercury+ AA1 SoM. Signed-off-by: Lothar Rubusch Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/altera.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml index 31af6859d..51f10ff8e 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -32,6 +32,9 @@ properties: items: - enum: - enclustra,mercury-pe1 + - enclustra,mercury-aa1-pe1 + - enclustra,mercury-aa1-pe3 + - enclustra,mercury-aa1-st1 - google,chameleon-v3 - const: enclustra,mercury-aa1 - const: altr,socfpga-arria10 From patchwork Tue Oct 29 20:23:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lothar Rubusch X-Patchwork-Id: 13855516 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5D2D0D2AB2C for ; Tue, 29 Oct 2024 21:01:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Y0rrp5xrTxl0hGh1RK0+7VZvEHCMBhzUuqSkpHc7vyU=; b=DAuB8URMRu58vih1B0ss/Cayr5 SBCKmtROa+R6Mt08lqytyzV0E82JXXrfDUNcZH1HqlkIqZVXGSODfLlu2Tm5oGPt+FydkW/2TlgM0 9H7bdNg1DmOuy9haYuZZLdHyzK6orcfkeD+bAefs/F/SGKUnKTuAOQsDNQ+3Orx6aXtMK7GS1i7JY OWad6dQCOIMq7r5bwNKwaIFP9UhuwoYVoqgGWFG14UZHXIQ08kf5fyu4iZHiRKEVc+zE2VMySF8OL ecDvQfC+1u0WveCoEOG0mEfXPhnUj0s7W3F+rclzIZ9VCZnb4GBSeQHLMGwjHaM522PKbMJb3F0ng YVzQ4mjw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t5tL2-0000000FtyJ-21fp; Tue, 29 Oct 2024 21:01:16 +0000 Received: from mail-wr1-x435.google.com ([2a00:1450:4864:20::435]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t5slS-0000000FlL6-3gBz for linux-arm-kernel@lists.infradead.org; Tue, 29 Oct 2024 20:24:32 +0000 Received: by mail-wr1-x435.google.com with SMTP id ffacd0b85a97d-37d43a34a0cso655610f8f.1 for ; Tue, 29 Oct 2024 13:24:30 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730233469; x=1730838269; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Y0rrp5xrTxl0hGh1RK0+7VZvEHCMBhzUuqSkpHc7vyU=; b=fNIbmKi2sc1HSZK9QCxnhYpynrbTy34Kt2xV0JRJABqdvWx/aXwEwrlprMc+P4up98 iaPLOGVurBlCMeGiOaMBnGcJFVBB50wyeFn0zUovp1Wd+PD+W8dTImb0vL3wYHEAJyh5 i8A2i16hqb4GYFfwhk9PVitWi9P3OkpA+KYekkI/WIHRaFHYn8/ot1L33j2O5Ldfq7Jt 4ztH1C8jSgLILXQ9KvLbSwZ9f1oe9USCdK3u/YTdbQjmfLFhzq8V+y+UVKdkLUnvS7Rk 65kfUQrA2uhyT5gSfjz4EZsvUf7am0T9jtIoNBK+0kOes7CEXlE+LCY87nf2Z7h4g/VR qJDA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730233469; x=1730838269; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Y0rrp5xrTxl0hGh1RK0+7VZvEHCMBhzUuqSkpHc7vyU=; b=DNogd5K3kocLnl7PTTUkBdKcGLPvBhpoOONWsa+NMLhz9UVbjSDiu1TTyb9NTc9AN9 JlVOxGGEPJ9tDz5WEq5s/1DMdQ5BalHCd2h3xj1z6vW6M44sojy78sCPBaO9da8nquYm 050/LaRVg1JyxdsQzRnfAu6TMy22owfQG29B1JCPg9rMFUtkBLWzVqVGCKm5qUxfLERW rzA2SbyKCClT/NX8WbaIl7c9sZxCN4eMwg+mC5ZXHYSIsLD6NPmyL2+CQLK1BaWP097T /XA22QaMVCaKrtRfRFfoc7j4nKM4OKsLtGXif4rB2j37JxLG8a0HOSTJ93qvmIs6uXO3 Uy9A== X-Forwarded-Encrypted: i=1; AJvYcCX1vIs0eZEXPdSHrD3Y6lI4u7nI5pbcipakK70O7fJ2ZU1KymJhIL43xhPS23IB48Rsj/VYSSO1hk2eW9j0azz6@lists.infradead.org X-Gm-Message-State: AOJu0YwMfB1TvY6jox3aMXe3QcGCtUbinkyNTkTmiojlK/nthsbY+cjZ 5dMM1RgSLt/7rykKBacwtY4hztVEe2sY4wZeNJc0b1NeH8YPRjpj X-Google-Smtp-Source: AGHT+IEhYwBOUVTvTj3Hj0ZMICPfIHBCtNgFSxbtpX78XFkcd9rCEeOvpqOMJ3bxsigpakj/rBHQPA== X-Received: by 2002:a05:600c:3b13:b0:431:55f3:d34b with SMTP id 5b1f17b1804b1-4319aca248dmr50351615e9.3.1730233468766; Tue, 29 Oct 2024 13:24:28 -0700 (PDT) Received: from 6c1d2e1f4cf4.v.cablecom.net (84-72-156-211.dclient.hispeed.ch. [84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:28 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 21/23] ARM: dts: socfpga: removal of generic PE1 dts Date: Tue, 29 Oct 2024 20:23:47 +0000 Message-Id: <20241029202349.69442-22-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132430_935507_2A0409ED X-CRM114-Status: GOOD ( 13.42 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remove the older socfpga_arria10_mercury_pe1.dts, since it is duplicate, the hardware is covered by the combination of Enclustra's .dtsi files. The older .dts was limited to only the case of having an Enclustra Mercury+ AA1 on a Mercury+ PE1 base board, booting from sdmmc. This functionality is provided also by the generic Enclustra dtsi and dts files, in particular socfpga_arria10_mercury_aa1_pe1_sdmmc.dts. Since both .dts files cover the same, the older one is to e replaced in favor of the more modularized approach. Signed-off-by: Lothar Rubusch Acked-by: Steffen Trumtrar --- arch/arm/boot/dts/intel/socfpga/Makefile | 1 - .../socfpga/socfpga_arria10_mercury_pe1.dts | 55 ------------------- 2 files changed, 56 deletions(-) delete mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_pe1.dts diff --git a/arch/arm/boot/dts/intel/socfpga/Makefile b/arch/arm/boot/dts/intel/socfpga/Makefile index c467828ae..d95862e34 100644 --- a/arch/arm/boot/dts/intel/socfpga/Makefile +++ b/arch/arm/boot/dts/intel/socfpga/Makefile @@ -2,7 +2,6 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ socfpga_arria5_socdk.dtb \ socfpga_arria10_chameleonv3.dtb \ - socfpga_arria10_mercury_pe1.dtb \ socfpga_arria10_socdk_nand.dtb \ socfpga_arria10_socdk_qspi.dtb \ socfpga_arria10_socdk_sdmmc.dtb \ diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_pe1.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_pe1.dts deleted file mode 100644 index cf533f76a..000000000 --- a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_pe1.dts +++ /dev/null @@ -1,55 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright 2023 Steffen Trumtrar - */ -/dts-v1/; -#include "socfpga_arria10_mercury_aa1.dtsi" - -/ { - model = "Enclustra Mercury+ PE1"; - compatible = "enclustra,mercury-pe1", "enclustra,mercury-aa1", - "altr,socfpga-arria10", "altr,socfpga"; - - aliases { - ethernet0 = &gmac0; - serial0 = &uart0; - serial1 = &uart1; - }; -}; - -&gmac0 { - status = "okay"; -}; - -&gpio0 { - status = "okay"; -}; - -&gpio1 { - status = "okay"; -}; - -&gpio2 { - status = "okay"; -}; - -&i2c1 { - status = "okay"; -}; - -&mmc { - status = "okay"; -}; - -&uart0 { - status = "okay"; -}; - -&uart1 { - status = "okay"; -}; - -&usb0 { - status = "okay"; - dr_mode = "host"; -}; From patchwork Tue Oct 29 20:23:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lothar Rubusch X-Patchwork-Id: 13855526 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D9323D2AB2C for ; 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[84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:29 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski Subject: [PATCH v4 22/23] dt-bindings: altera: removal of generic PE1 dts Date: Tue, 29 Oct 2024 20:23:48 +0000 Message-Id: <20241029202349.69442-23-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132432_218098_7ED4DA01 X-CRM114-Status: GOOD ( 12.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remove the binding for the generic Mercury+ AA1 on PE1 carrier board. The removed Mercury+ AA1 on PE1 carrier board is just a particular setup case, which is actually replaced by the set of generic Mercury+ AA1 combinations patch. In other words a combination of a Mercury+ AA1 on a PE1 base board, with boot mode SD card is already covered by the generic AA1 combinations. There is no further reason to keep this particular case now in a redundantly. Thus the redundant DT setup is removed. Signed-off-by: Lothar Rubusch Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/altera.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml index 51f10ff8e..1561f0164 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -31,7 +31,6 @@ properties: - description: Mercury+ AA1 boards items: - enum: - - enclustra,mercury-pe1 - enclustra,mercury-aa1-pe1 - enclustra,mercury-aa1-pe3 - enclustra,mercury-aa1-st1 From patchwork Tue Oct 29 20:23:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lothar Rubusch X-Patchwork-Id: 13855527 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 629AED74941 for ; Tue, 29 Oct 2024 21:04:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=58/Yp9z5BeuiNsOYUdEfHyKptWKflHI/Ww9dE/OYykM=; b=OjA/pdiBxaUOf5PHVkWF/iAa4N CSl+w3DyIu+q6X0X/XVoPwDvu84u4JpFxEtGP9u6cvndhLx1hM1mcu4f70KU+htCF67gEgJSNu/S8 Uwz/Pz5+24oSktnA7ZV1nx3AatHCYuJCtLvdQaC+ouh13dBV6bvw+cs7tg4pg2rOcUGrgHgSlOFOl XJ7oqTwjzGaKY7O4QiamkJyeLprzD2oruYdrXs70QE9WUbt3nwtxmtoL4hdoJzWfEaZvhsM0KdYDk yloKtsYapImBh3CENOhfEvEZs7JEhCtj1nhVcs5FPq3IbY3puMJWqxocnC9Fkd0eZgaZMsOvjsxwX opBtsDFg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1t5tOH-0000000FuY9-31yf; Tue, 29 Oct 2024 21:04:37 +0000 Received: from mail-wr1-x42b.google.com ([2a00:1450:4864:20::42b]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1t5slV-0000000FlMw-20r7 for linux-arm-kernel@lists.infradead.org; Tue, 29 Oct 2024 20:24:35 +0000 Received: by mail-wr1-x42b.google.com with SMTP id ffacd0b85a97d-37d432f9f5aso549081f8f.3 for ; Tue, 29 Oct 2024 13:24:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1730233472; x=1730838272; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=58/Yp9z5BeuiNsOYUdEfHyKptWKflHI/Ww9dE/OYykM=; b=fM6cW2vqVfUNtL3k4+dNXydsZMULMJtGD3ZsI3GHp7ejaONFBPVInL9ysJKdSRUQRr ajgZf3Mw4X7bF6mFmKNnvG5tVAsEHARcBTvRC9orjCXNCdLY2p7Kwla7Z6/uHtmWKdFx InFbY6ZqL29j3JQ43GRxPhsC7L8WW/lP8uyAoOrJPTmcuJ1EeDODK2a+AB67aMt3uTrL V19s2TH4MVozF15StOyxZ/zFcA6fhfgWMmod33FkOziPe7C4jcITtpdQ4Ck0P5BpQfRS jn5Rz8ft3uJI5Cr75WkGnwsONUYW/tFiUebg1mUky1Ax1vF5Sq8zqySvMQP+dLOxjHaA QevA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1730233472; x=1730838272; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=58/Yp9z5BeuiNsOYUdEfHyKptWKflHI/Ww9dE/OYykM=; b=N8Mppt9XBT4zuiEGDKE9rA+D4Ciu/vS++tbjd95ZJStoZ1e40avR9tA6eonE8HhEz7 xhFyzyYE7zY6GqHmdTpe/YYHrScdsahyV6bpIf/xGtjSjtj96AcFoi/22CiQBh9u0wnB m4SMJcyT+m4u8ZbauJqlGRbSEyiElgsD4EJ8KFlvKX4HBg8E/8Kgy31qS8RWBLtoYfag /roawE7b3sSkSpa5vv+KLKzxtkT7tY1bmTfGMAXS43sXtEMvNPU0ARrGDEWG4PJcyyfg fpw72pRlMp73tEBz6WjDbBkFRE9VNUA39aNJ+vbsjKLTKU8WZWmVdtWfENBXKMLUbGY5 M+Ng== X-Forwarded-Encrypted: i=1; AJvYcCXCjqNab/riFDkoUmY/ChLXvZxqW3spkNMXwzuBVZzviIt5laf5SDQUwaJdMYms20KLZsrK51O3sBB/1cQuAEi6@lists.infradead.org X-Gm-Message-State: AOJu0YzYCvKCWupeo0cCrS6pf6LKeVUrQx3ckk2RY1OZUIT9GFfvRJVJ PmUc8y7UFMoP0gJp5j3bVx4GGBTBun6QCEoyCXe9UomR7ZaAPnfV X-Google-Smtp-Source: AGHT+IHUTIPntp80wlmsDSZsxnN4LdgLxCxHE5azOHJ+sZci6nyjaVWgArufst7Usgp1AAGI9yIUwA== X-Received: by 2002:a05:6000:186b:b0:378:955f:d244 with SMTP id ffacd0b85a97d-380612bdf5dmr4233334f8f.14.1730233471868; Tue, 29 Oct 2024 13:24:31 -0700 (PDT) Received: from 6c1d2e1f4cf4.v.cablecom.net (84-72-156-211.dclient.hispeed.ch. [84.72.156.211]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-38058b3bf85sm13619976f8f.42.2024.10.29.13.24.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Oct 2024 13:24:31 -0700 (PDT) From: Lothar Rubusch To: robh@kernel.org, krzk+dt@kernel.org, a.fatoum@pengutronix.de Cc: conor+dt@kernel.org, dinguyen@kernel.org, marex@denx.de, s.trumtrar@pengutronix.de, alexandre.torgue@foss.st.com, joabreu@synopsys.com, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, mcoquelin.stm32@gmail.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, l.rubusch@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 23/23] ARM: dts: socfpga: add Enclustra SoM dts files Date: Tue, 29 Oct 2024 20:23:49 +0000 Message-Id: <20241029202349.69442-24-l.rubusch@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20241029202349.69442-1-l.rubusch@gmail.com> References: <20241029202349.69442-1-l.rubusch@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_132433_738380_F5163063 X-CRM114-Status: GOOD ( 14.55 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the approach to set up a combination of Enclustra's SoM on a carrier board and corresponding boot-mode as single device-tree target. Signed-off-by: Lothar Rubusch --- arch/arm/boot/dts/intel/socfpga/Makefile | 24 +++++++++++++++++++ .../socfpga_arria10_mercury_aa1_pe1_emmc.dts | 16 +++++++++++++ .../socfpga_arria10_mercury_aa1_pe1_qspi.dts | 16 +++++++++++++ .../socfpga_arria10_mercury_aa1_pe1_sdmmc.dts | 16 +++++++++++++ .../socfpga_arria10_mercury_aa1_pe3_emmc.dts | 16 +++++++++++++ .../socfpga_arria10_mercury_aa1_pe3_qspi.dts | 16 +++++++++++++ .../socfpga_arria10_mercury_aa1_pe3_sdmmc.dts | 16 +++++++++++++ .../socfpga_arria10_mercury_aa1_st1_emmc.dts | 16 +++++++++++++ .../socfpga_arria10_mercury_aa1_st1_qspi.dts | 16 +++++++++++++ .../socfpga_arria10_mercury_aa1_st1_sdmmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa1_pe1_emmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa1_pe1_qspi.dts | 16 +++++++++++++ ...socfpga_cyclone5_mercury_sa1_pe1_sdmmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa1_pe3_emmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa1_pe3_qspi.dts | 16 +++++++++++++ ...socfpga_cyclone5_mercury_sa1_pe3_sdmmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa1_st1_emmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa1_st1_qspi.dts | 16 +++++++++++++ ...socfpga_cyclone5_mercury_sa1_st1_sdmmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa2_pe1_qspi.dts | 16 +++++++++++++ ...socfpga_cyclone5_mercury_sa2_pe1_sdmmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa2_pe3_qspi.dts | 16 +++++++++++++ ...socfpga_cyclone5_mercury_sa2_pe3_sdmmc.dts | 16 +++++++++++++ .../socfpga_cyclone5_mercury_sa2_st1_qspi.dts | 16 +++++++++++++ ...socfpga_cyclone5_mercury_sa2_st1_sdmmc.dts | 16 +++++++++++++ 25 files changed, 408 insertions(+) create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_emmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe1_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe3_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe3_sdmmc.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_st1_qspi.dts create mode 100644 arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_st1_sdmmc.dts diff --git a/arch/arm/boot/dts/intel/socfpga/Makefile b/arch/arm/boot/dts/intel/socfpga/Makefile index d95862e34..861880560 100644 --- a/arch/arm/boot/dts/intel/socfpga/Makefile +++ b/arch/arm/boot/dts/intel/socfpga/Makefile @@ -2,6 +2,30 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += \ socfpga_arria5_socdk.dtb \ socfpga_arria10_chameleonv3.dtb \ + socfpga_arria10_mercury_aa1_pe1_emmc.dtb \ + socfpga_arria10_mercury_aa1_pe1_qspi.dtb \ + socfpga_arria10_mercury_aa1_pe1_sdmmc.dtb \ + socfpga_arria10_mercury_aa1_pe3_emmc.dtb \ + socfpga_arria10_mercury_aa1_pe3_qspi.dtb \ + socfpga_arria10_mercury_aa1_pe3_sdmmc.dtb \ + socfpga_arria10_mercury_aa1_st1_emmc.dtb \ + socfpga_arria10_mercury_aa1_st1_qspi.dtb \ + socfpga_arria10_mercury_aa1_st1_sdmmc.dtb \ + socfpga_cyclone5_mercury_sa1_pe1_emmc.dtb \ + socfpga_cyclone5_mercury_sa1_pe1_qspi.dtb \ + socfpga_cyclone5_mercury_sa1_pe1_sdmmc.dtb \ + socfpga_cyclone5_mercury_sa1_pe3_emmc.dtb \ + socfpga_cyclone5_mercury_sa1_pe3_qspi.dtb \ + socfpga_cyclone5_mercury_sa1_pe3_sdmmc.dtb \ + socfpga_cyclone5_mercury_sa1_st1_emmc.dtb \ + socfpga_cyclone5_mercury_sa1_st1_qspi.dtb \ + socfpga_cyclone5_mercury_sa1_st1_sdmmc.dtb \ + socfpga_cyclone5_mercury_sa2_pe1_qspi.dtb \ + socfpga_cyclone5_mercury_sa2_pe1_sdmmc.dtb \ + socfpga_cyclone5_mercury_sa2_pe3_qspi.dtb \ + socfpga_cyclone5_mercury_sa2_pe3_sdmmc.dtb \ + socfpga_cyclone5_mercury_sa2_st1_qspi.dtb \ + socfpga_cyclone5_mercury_sa2_st1_sdmmc.dtb \ socfpga_arria10_socdk_nand.dtb \ socfpga_arria10_socdk_qspi.dtb \ socfpga_arria10_socdk_sdmmc.dtb \ diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_emmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_emmc.dts new file mode 100644 index 000000000..b6cca0b5f --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_emmc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_pe1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_emmc.dtsi" + +/ { + model = "Enclustra Mercury SA1 on Mercury+ PE1 Base Board"; + compatible = "enclustra,mercury-sa1-pe1", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_qspi.dts new file mode 100644 index 000000000..6ad023477 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_qspi.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_pe1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model = "Enclustra Mercury+ AA1 on Mercury+ PE1 Base Board"; + compatible = "enclustra,mercury-aa1-pe1", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_sdmmc.dts new file mode 100644 index 000000000..653c9a865 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe1_sdmmc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_pe1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model = "Enclustra Mercury+ AA1 on Mercury+ PE1 Base Board"; + compatible = "enclustra,mercury-aa1-pe1", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_emmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_emmc.dts new file mode 100644 index 000000000..ae9c7c6a2 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_emmc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_pe3.dtsi" +#include "socfpga_enclustra_mercury_bootmode_emmc.dtsi" + +/ { + model = "Enclustra Mercury+ AA1 on Mercury+ PE3 Base Board"; + compatible = "enclustra,mercury-aa1-pe3", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_qspi.dts new file mode 100644 index 000000000..c3a0c30a0 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_qspi.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_pe3.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model = "Enclustra Mercury+ AA1 on Mercury+ PE3 Base Board"; + compatible = "enclustra,mercury-aa1-pe3", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_sdmmc.dts new file mode 100644 index 000000000..dc1e1ad20 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_pe3_sdmmc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_pe3.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model = "Enclustra Mercury+ AA1 on Mercury+ PE3 Base Board"; + compatible = "enclustra,mercury-aa1-pe3", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_emmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_emmc.dts new file mode 100644 index 000000000..61d5e4c85 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_emmc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_st1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_emmc.dtsi" + +/ { + model = "Enclustra Mercury+ AA1 on Mercury+ ST1 Base Board"; + compatible = "enclustra,mercury-aa1-st1", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_qspi.dts new file mode 100644 index 000000000..a3b99c9b1 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_qspi.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_st1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model = "Enclustra Mercury+ AA1 on Mercury+ ST1 Base Board"; + compatible = "enclustra,mercury-aa1-st1", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_sdmmc.dts new file mode 100644 index 000000000..5deb289e2 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_arria10_mercury_aa1_st1_sdmmc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_arria10_mercury_aa1.dtsi" +#include "socfpga_enclustra_mercury_st1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model = "Enclustra Mercury+ AA1 on Mercury+ ST1 Base Board"; + compatible = "enclustra,mercury-aa1-st1", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_emmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_emmc.dts new file mode 100644 index 000000000..85d6146da --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_emmc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_pe1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_emmc.dtsi" + +/ { + model = "Enclustra Mercury SA1 on Mercury+ PE1 Base Board"; + compatible = "enclustra,mercury-sa1-pe1", "enclustra,mercury-aa1", + "altr,socfpga-arria10", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_qspi.dts new file mode 100644 index 000000000..770ab680a --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_qspi.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_pe1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model = "Enclustra Mercury SA1 on Mercury+ PE1 Base Board"; + compatible = "enclustra,mercury-sa1-pe1", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_sdmmc.dts new file mode 100644 index 000000000..990ca0fec --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe1_sdmmc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_pe1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model = "Enclustra Mercury SA1 on Mercury+ PE1 Base Board"; + compatible = "enclustra,mercury-sa1-pe1", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_emmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_emmc.dts new file mode 100644 index 000000000..6c8fd5b0d --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_emmc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_pe3.dtsi" +#include "socfpga_enclustra_mercury_bootmode_emmc.dtsi" + +/ { + model = "Enclustra Mercury SA1 on Mercury+ PE3 Base Board"; + compatible = "enclustra,mercury-sa1-pe3", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_qspi.dts new file mode 100644 index 000000000..329242607 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_qspi.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_pe3.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model = "Enclustra Mercury SA1 on Mercury+ PE3 Base Board"; + compatible = "enclustra,mercury-sa1-pe3", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_sdmmc.dts new file mode 100644 index 000000000..1eb10b524 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_pe3_sdmmc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_pe3.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model = "Enclustra Mercury SA1 on Mercury+ PE3 Base Board"; + compatible = "enclustra,mercury-sa1-pe3", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_emmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_emmc.dts new file mode 100644 index 000000000..8c97b5b3a --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_emmc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_st1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_emmc.dtsi" + +/ { + model = "Enclustra Mercury SA1 on Mercury+ ST1 Base Board"; + compatible = "enclustra,mercury-sa1-st1", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_qspi.dts new file mode 100644 index 000000000..e6d14b22e --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_qspi.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_st1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model = "Enclustra Mercury SA1 on Mercury+ ST1 Base Board"; + compatible = "enclustra,mercury-sa1-st1", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_sdmmc.dts new file mode 100644 index 000000000..beaeca94d --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa1_st1_sdmmc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa1.dtsi" +#include "socfpga_enclustra_mercury_st1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model = "Enclustra Mercury SA1 on Mercury+ ST1 Base Board"; + compatible = "enclustra,mercury-sa1-st1", "enclustra,mercury-sa1", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe1_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe1_qspi.dts new file mode 100644 index 000000000..6f79d9ed1 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe1_qspi.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa2.dtsi" +#include "socfpga_enclustra_mercury_pe1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model = "Enclustra Mercury+ SA2 on Mercury+ PE1 Base Board"; + compatible = "enclustra,mercury-sa2-pe1", "enclustra,mercury-sa2", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe1_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe1_sdmmc.dts new file mode 100644 index 000000000..b94bd8baf --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe1_sdmmc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa2.dtsi" +#include "socfpga_enclustra_mercury_pe1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model = "Enclustra Mercury+ SA2 on Mercury+ PE1 Base Board"; + compatible = "enclustra,mercury-sa2-pe1", "enclustra,mercury-sa2", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe3_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe3_qspi.dts new file mode 100644 index 000000000..51fc4a229 --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe3_qspi.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa2.dtsi" +#include "socfpga_enclustra_mercury_pe3.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model = "Enclustra Mercury+ SA2 on Mercury+ PE3 Base Board"; + compatible = "enclustra,mercury-sa2-pe3", "enclustra,mercury-sa2", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe3_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe3_sdmmc.dts new file mode 100644 index 000000000..e4209209f --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_pe3_sdmmc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa2.dtsi" +#include "socfpga_enclustra_mercury_pe3.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model = "Enclustra Mercury+ SA2 on Mercury+ PE3 Base Board"; + compatible = "enclustra,mercury-sa2-pe3", "enclustra,mercury-sa2", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_st1_qspi.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_st1_qspi.dts new file mode 100644 index 000000000..ab4549a0d --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_st1_qspi.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa2.dtsi" +#include "socfpga_enclustra_mercury_st1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_qspi.dtsi" + +/ { + model = "Enclustra Mercury+ SA2 on Mercury+ ST1 Base Board"; + compatible = "enclustra,mercury-sa2-st1", "enclustra,mercury-sa2", + "altr,socfpga-cyclone5", "altr,socfpga"; +}; diff --git a/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_st1_sdmmc.dts b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_st1_sdmmc.dts new file mode 100644 index 000000000..ebe62879c --- /dev/null +++ b/arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_mercury_sa2_st1_sdmmc.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0+ OR MIT +/* + * Copyright (C) 2024 Enclustra GmbH - https://www.enclustra.com + */ + +/dts-v1/; + +#include "socfpga_cyclone5_mercury_sa2.dtsi" +#include "socfpga_enclustra_mercury_st1.dtsi" +#include "socfpga_enclustra_mercury_bootmode_sdmmc.dtsi" + +/ { + model = "Enclustra Mercury+ SA2 on Mercury+ ST1 Base Board"; + compatible = "enclustra,mercury-sa2-st1", "enclustra,mercury-sa2", + "altr,socfpga-cyclone5", "altr,socfpga"; +};