From patchwork Wed Oct 30 12:10:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steffen Trumtrar X-Patchwork-Id: 13856433 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 772C81E7C07 for ; Wed, 30 Oct 2024 12:10:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730290233; cv=none; b=d72aO+/kRW1AE19+oG26H7kRYDsVubcf5bU/19viTRIIwBEHJGZZUnbZOY40US58yFtJU8ffQrMDtp8i8wiYaGNX8L9yOspYLvX6CW9LNReZNbbcLm7f4pzTsjsHMMnNllUcnR7b0EllZDP7jsV2mgYcu53UOCO8w/cD3A6axC0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730290233; c=relaxed/simple; bh=FFXiiQhXhWNlPYV60DTxKdZyGuqHKlEKBnrLXPUxdvQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=EUCzERu3/+olwJFDaSnCCkQ4Urgjg3wBHql/nqCz9bO8Ze2BWoRNo/rLvXamn5RYTUgaMRnFK/OFtGylj0uvzaFcznP7w4TTR6g3GkyTiXfTz5QXop+CQMnu0/2I8eAhD8kE+WgDuGt8paqmonlrIDdq8uNsfb/L27CIrPuPi3k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=ratatoskr.trumtrar.info) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1t67Wm-0006os-88; Wed, 30 Oct 2024 13:10:20 +0100 From: Steffen Trumtrar Date: Wed, 30 Oct 2024 13:10:12 +0100 Subject: [PATCH 1/4] arm64: dts: agilex5: add gpio0 Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-v6-12-topic-socfpga-agilex5-v1-1-b2b67780e60e@pengutronix.de> References: <20241030-v6-12-topic-socfpga-agilex5-v1-0-b2b67780e60e@pengutronix.de> In-Reply-To: <20241030-v6-12-topic-socfpga-agilex5-v1-0-b2b67780e60e@pengutronix.de> To: Dinh Nguyen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Michael Turquette , Stephen Boyd Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-clk@vger.kernel.org, kernel@pengutronix.de, Steffen Trumtrar X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.trumtrar@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-clk@vger.kernel.org gpio0 is the same as gpio1 with a different base address. Signed-off-by: Steffen Trumtrar --- arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi index 1162978329c1637aa0fd9a4adef16a9ae5017ac3..57c28e284cccdb99ede6cea2bc0e8dd8aaf47fe9 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi @@ -222,6 +222,26 @@ i3c1: i3c@10da1000 { status = "disabled"; }; + gpio0: gpio@10c03200 { + compatible = "snps,dw-apb-gpio"; + reg = <0x10c03200 0x100>; + #address-cells = <1>; + #size-cells = <0>; + resets = <&rst GPIO0_RESET>; + status = "disabled"; + + porta: gpio-controller@0 { + compatible = "snps,dw-apb-gpio-port"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + snps,nr-gpios = <24>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + }; + }; + gpio1: gpio@10c03300 { compatible = "snps,dw-apb-gpio"; reg = <0x10c03300 0x100>; From patchwork Wed Oct 30 12:10:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steffen Trumtrar X-Patchwork-Id: 13856436 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A6F1B1EF923 for ; Wed, 30 Oct 2024 12:10:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730290236; cv=none; b=VayMChqQXIiT9ZLiy2YXGKH3kx8vNr5qelMAIQrFlQvvd71m27oCC3LWCZ+gxXypUmP7ugPCLDvrQ3q1m9uM1GJjoL+12BmgMXIvHXYPFZI3YvQk760ltsrlKxkFSb4HJag89lE9HLjMXlbWqq/r2BnRuDa97hnPHyfILDt0xgc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730290236; c=relaxed/simple; bh=CPjrZ4fKhbLXk0zIZxVMkwmvH7cZECkh0hUkVKEQKCc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=n1+R4bQwq5qyoalUoD8gxWUD1KohL4Ke3mXetQRnQC1GCc5+6p115zyv89pvEknfJ4T6P4J9tXpexIjAO78RFSs1n8cRBVb0fywdijazbwwIpo3rnn2gWN9WzKmeoIjRcYla0VGCcQREuMFFX6ByK1MOE9TZFkWwRrnhoKsGS98= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=ratatoskr.trumtrar.info) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1t67Wm-0006os-Tb; Wed, 30 Oct 2024 13:10:20 +0100 From: Steffen Trumtrar Date: Wed, 30 Oct 2024 13:10:13 +0100 Subject: [PATCH 2/4] arm64: dts: agilex5: add gmac nodes Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-v6-12-topic-socfpga-agilex5-v1-2-b2b67780e60e@pengutronix.de> References: <20241030-v6-12-topic-socfpga-agilex5-v1-0-b2b67780e60e@pengutronix.de> In-Reply-To: <20241030-v6-12-topic-socfpga-agilex5-v1-0-b2b67780e60e@pengutronix.de> To: Dinh Nguyen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Michael Turquette , Stephen Boyd Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-clk@vger.kernel.org, kernel@pengutronix.de, Steffen Trumtrar X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.trumtrar@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-clk@vger.kernel.org The Agilex5 provides three Synopsys XGMAC ethernet cores, that can be used to transmit and receive data at 10M/100M/1G/2.5G over ethernet connections and enables support for Time Sensitive Networking (TSN) applications. Signed-off-by: Steffen Trumtrar --- arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 321 +++++++++++++++++++++++++ 1 file changed, 321 insertions(+) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi index 57c28e284cccdb99ede6cea2bc0e8dd8aaf47fe9..761d970f8de59e08275edf15a9c890ba3bb1404c 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi @@ -141,6 +141,327 @@ soc: soc@0 { device_type = "soc"; interrupt-parent = <&intc>; + gmac0: ethernet@10810000 { + compatible = "altr,socfpga-stmmac-a10-s10", + "snps,dwxgmac-2.10", + "snps,dwxgmac"; + reg = <0x10810000 0x3500>; + interrupt-parent = <&intc>; + interrupts = ; + interrupt-names = "macirq"; + max-frame-size = <3800>; + snps,multicast-filter-bins = <64>; + snps,perfect-filter-entries = <64>; + rx-fifo-depth = <16384>; + tx-fifo-depth = <32768>; + resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>; + reset-names = "stmmaceth", "stmmaceth-ocp"; + clocks = <&clkmgr AGILEX5_EMAC0_CLK>, + <&clkmgr AGILEX5_EMAC_PTP_CLK>; + clock-names = "stmmaceth", "ptp_ref"; + snps,axi-config = <&stmmac_axi_emac0_setup>; + snps,mtl-rx-config = <&mtl_rx_emac0_setup>; + snps,mtl-tx-config = <&mtl_tx_emac0_setup>; + altr,sysmgr-syscon = <&sysmgr 0x44 0>; + status = "disabled"; + + stmmac_axi_emac0_setup: stmmac-axi-config { + snps,wr_osr_lmt = <31>; + snps,rd_osr_lmt = <31>; + snps,blen = <0 0 0 32 16 8 4>; + }; + + mtl_rx_emac0_setup: rx-queues-config { + snps,rx-queues-to-use = <8>; + snps,rx-sched-sp; + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + }; + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + }; + queue2 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x2>; + }; + queue3 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x3>; + }; + queue4 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x4>; + }; + queue5 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x5>; + }; + queue6 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x6>; + }; + queue7 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x7>; + }; + }; + + mtl_tx_emac0_setup: tx-queues-config { + snps,tx-queues-to-use = <8>; + snps,tx-sched-wrr; + queue0 { + snps,weight = <0x9>; + snps,dcb-algorithm; + }; + queue1 { + snps,weight = <0x0A>; + snps,dcb-algorithm; + }; + queue2 { + snps,weight = <0x0B>; + snps,dcb-algorithm; + }; + queue3 { + snps,weight = <0x0C>; + snps,dcb-algorithm; + }; + queue4 { + snps,weight = <0x0D>; + snps,dcb-algorithm; + }; + queue5 { + snps,weight = <0x0E>; + snps,dcb-algorithm; + }; + queue6 { + snps,weight = <0x0F>; + snps,dcb-algorithm; + snps,tbs-enable; + }; + queue7 { + snps,weight = <0x10>; + snps,dcb-algorithm; + snps,tbs-enable; + }; + }; + }; + + gmac1: ethernet@10820000 { + compatible = "altr,socfpga-stmmac-a10-s10", + "snps,dwxgmac-2.10", + "snps,dwxgmac"; + reg = <0x10820000 0x3500>; + interrupt-parent = <&intc>; + interrupts = ; + interrupt-names = "macirq"; + max-frame-size = <3800>; + snps,multicast-filter-bins = <64>; + snps,perfect-filter-entries = <64>; + rx-fifo-depth = <16384>; + tx-fifo-depth = <32768>; + resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>; + reset-names = "stmmaceth", "stmmaceth-ocp"; + clocks = <&clkmgr AGILEX5_EMAC1_CLK>, + <&clkmgr AGILEX5_EMAC_PTP_CLK>; + clock-names = "stmmaceth", "ptp_ref"; + snps,axi-config = <&stmmac_axi_emac1_setup>; + snps,mtl-rx-config = <&mtl_rx_emac1_setup>; + snps,mtl-tx-config = <&mtl_tx_emac1_setup>; + altr,sysmgr-syscon = <&sysmgr 0x48 0>; + status = "disabled"; + + stmmac_axi_emac1_setup: stmmac-axi-config { + snps,wr_osr_lmt = <31>; + snps,rd_osr_lmt = <31>; + snps,blen = <0 0 0 32 16 8 4>; + }; + + mtl_rx_emac1_setup: rx-queues-config { + snps,rx-queues-to-use = <8>; + snps,rx-sched-sp; + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + }; + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + }; + queue2 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x2>; + }; + queue3 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x3>; + }; + queue4 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x4>; + }; + queue5 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x5>; + }; + queue6 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x6>; + }; + queue7 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x7>; + }; + }; + + mtl_tx_emac1_setup: tx-queues-config { + snps,tx-queues-to-use = <8>; + snps,tx-sched-wrr; + queue0 { + snps,weight = <0x9>; + snps,dcb-algorithm; + }; + queue1 { + snps,weight = <0x0A>; + snps,dcb-algorithm; + }; + queue2 { + snps,weight = <0x0B>; + snps,dcb-algorithm; + }; + queue3 { + snps,weight = <0x0C>; + snps,dcb-algorithm; + }; + queue4 { + snps,weight = <0x0D>; + snps,dcb-algorithm; + }; + queue5 { + snps,weight = <0x0E>; + snps,dcb-algorithm; + }; + queue6 { + snps,weight = <0x0F>; + snps,dcb-algorithm; + snps,tbs-enable; + }; + queue7 { + snps,weight = <0x10>; + snps,dcb-algorithm; + snps,tbs-enable; + }; + }; + }; + + gmac2: ethernet@10830000 { + compatible = "altr,socfpga-stmmac-a10-s10", + "snps,dwxgmac-2.10", + "snps,dwxgmac"; + reg = <0x10830000 0x3500>; + interrupt-parent = <&intc>; + interrupts = ; + interrupt-names = "macirq"; + max-frame-size = <3800>; + snps,multicast-filter-bins = <64>; + snps,perfect-filter-entries = <64>; + rx-fifo-depth = <16384>; + tx-fifo-depth = <32768>; + resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>; + reset-names = "stmmaceth", "stmmaceth-ocp"; + clocks = <&clkmgr AGILEX5_EMAC2_CLK>, + <&clkmgr AGILEX5_EMAC_PTP_CLK>; + clock-names = "stmmaceth", "ptp_ref"; + snps,axi-config = <&stmmac_axi_emac2_setup>; + snps,mtl-rx-config = <&mtl_rx_emac2_setup>; + snps,mtl-tx-config = <&mtl_tx_emac2_setup>; + altr,sysmgr-syscon = <&sysmgr 0x4c 0>; + status = "disabled"; + + stmmac_axi_emac2_setup: stmmac-axi-config { + snps,wr_osr_lmt = <31>; + snps,rd_osr_lmt = <31>; + snps,blen = <0 0 0 32 16 8 4>; + }; + + mtl_rx_emac2_setup: rx-queues-config { + snps,rx-queues-to-use = <8>; + snps,rx-sched-sp; + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + }; + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + }; + queue2 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x2>; + }; + queue3 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x3>; + }; + queue4 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x4>; + }; + queue5 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x5>; + }; + queue6 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x6>; + }; + queue7 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x7>; + }; + }; + + mtl_tx_emac2_setup: tx-queues-config { + snps,tx-queues-to-use = <8>; + snps,tx-sched-wrr; + queue0 { + snps,weight = <0x9>; + snps,dcb-algorithm; + }; + queue1 { + snps,weight = <0x0A>; + snps,dcb-algorithm; + }; + queue2 { + snps,weight = <0x0B>; + snps,dcb-algorithm; + }; + queue3 { + snps,weight = <0x0C>; + snps,dcb-algorithm; + }; + queue4 { + snps,weight = <0x0D>; + snps,dcb-algorithm; + }; + queue5 { + snps,weight = <0x0E>; + snps,dcb-algorithm; + }; + queue6 { + snps,weight = <0x0F>; + snps,dcb-algorithm; + snps,tbs-enable; + }; + queue7 { + snps,weight = <0x10>; + snps,dcb-algorithm; + snps,tbs-enable; + }; + }; + }; + clkmgr: clock-controller@10d10000 { compatible = "intel,agilex5-clkmgr"; reg = <0x10d10000 0x1000>; From patchwork Wed Oct 30 12:10:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steffen Trumtrar X-Patchwork-Id: 13856435 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EEA161E7C30 for ; Wed, 30 Oct 2024 12:10:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730290234; cv=none; b=MenpAroqvlbEI9ryL4DBQ9x6XEJKTICNNUKXJtX+rOALh2nZS3gm0nALa1jGkgAo5HIgF8C8YLnL8TQ+jvVh9jSXIWZGquXTk4sr6eXgZvEzQ+RWUkyyMoke85YYrQLdPiA2KGDA1yHF780fkCQqRXtvTKceDxjeAHIVzON1PkU= ARC-Message-Signature: i=1; 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SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-clk@vger.kernel.org Add binding for the Arrow Agilex5-based AXE5-Eagle board. Signed-off-by: Steffen Trumtrar Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/arm/intel,socfpga.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml index 2ee0c740eb56d63cff7767167ee3c640beba0803..03de49222d465584f24cc6c7dfff6ccfe304db46 100644 --- a/Documentation/devicetree/bindings/arm/intel,socfpga.yaml +++ b/Documentation/devicetree/bindings/arm/intel,socfpga.yaml @@ -24,6 +24,7 @@ properties: - description: Agilex5 boards items: - enum: + - arrow,socfpga-agilex5-axe5-eagle - intel,socfpga-agilex5-socdk - const: intel,socfpga-agilex5 From patchwork Wed Oct 30 12:10:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Steffen Trumtrar X-Patchwork-Id: 13856437 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [185.203.201.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 200BA1EBFFC for ; Wed, 30 Oct 2024 12:10:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.203.201.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730290236; cv=none; b=ovjbb+WpQhfrow8V036YfmGqoKvgrQBiobz/VD1xLwWW29yhLY+4Y8MSw96Cj3tXR5uyBfsxjbtq0452PnsosHQie39YPmmPju2BOinMalBDRbH4nxN0QjBNMAKpOtS2PkfkpItAHtVC1MB3lFphB935BVR20gt19oz1Ampvb2k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1730290236; c=relaxed/simple; bh=s722pgkDTlnM7gfii6RdJq/Bs5rZKJoE9xRzLi3V97w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=NU5Gi3yoldi4+N4mumCHUwk2g5q53pYuaKsTUEFrkOmk+nEeRJz1NlBDlNsH910ERbbbl8RUnV0YIodk8bo5w2JNTmEpZ/LBwTQPGCGOX28ZnDDH1rpeyetHJxQh67STCyw91tfJLlBRYrP19OzPPv4iOHHmb1oWawdTw9Y2bws= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de; spf=pass smtp.mailfrom=pengutronix.de; arc=none smtp.client-ip=185.203.201.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=pengutronix.de Received: from ptz.office.stw.pengutronix.de ([2a0a:edc0:0:900:1d::77] helo=ratatoskr.trumtrar.info) by metis.whiteo.stw.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1t67Wo-0006os-8G; Wed, 30 Oct 2024 13:10:22 +0100 From: Steffen Trumtrar Date: Wed, 30 Oct 2024 13:10:15 +0100 Subject: [PATCH 4/4] arm64: dts: agilex5: initial support for Arrow AXE5-Eagle Precedence: bulk X-Mailing-List: linux-clk@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20241030-v6-12-topic-socfpga-agilex5-v1-4-b2b67780e60e@pengutronix.de> References: <20241030-v6-12-topic-socfpga-agilex5-v1-0-b2b67780e60e@pengutronix.de> In-Reply-To: <20241030-v6-12-topic-socfpga-agilex5-v1-0-b2b67780e60e@pengutronix.de> To: Dinh Nguyen , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Michael Turquette , Stephen Boyd Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, linux-clk@vger.kernel.org, kernel@pengutronix.de, Steffen Trumtrar X-Mailer: b4 0.14.2 X-SA-Exim-Connect-IP: 2a0a:edc0:0:900:1d::77 X-SA-Exim-Mail-From: s.trumtrar@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-clk@vger.kernel.org The Arrow AXE5-Eagle is an Intel Agilex5 SoCFPGA based board with: - 1x PCIe Gen4.0 edge connector - 4-port USB HUB - 2x 1Gb Ethernet - microSD - HDMI output - 2x 10Gb SFP+ cages As most devices aren't supported mainline yet, this is only the initial support for the board. Signed-off-by: Steffen Trumtrar --- arch/arm64/boot/dts/intel/Makefile | 1 + .../boot/dts/intel/socfpga_agilex5_axe5_eagle.dts | 146 +++++++++++++++++++++ 2 files changed, 147 insertions(+) diff --git a/arch/arm64/boot/dts/intel/Makefile b/arch/arm64/boot/dts/intel/Makefile index d39cfb723f5b6674a821dfdafb21b12668bb1e0e..3e87d548c532b1a9e38f4489c037c5c4db3a50b8 100644 --- a/arch/arm64/boot/dts/intel/Makefile +++ b/arch/arm64/boot/dts/intel/Makefile @@ -3,5 +3,6 @@ dtb-$(CONFIG_ARCH_INTEL_SOCFPGA) += socfpga_agilex_n6000.dtb \ socfpga_agilex_socdk.dtb \ socfpga_agilex_socdk_nand.dtb \ socfpga_agilex5_socdk.dtb \ + socfpga_agilex5_axe5_eagle.dtb \ socfpga_n5x_socdk.dtb dtb-$(CONFIG_ARCH_KEEMBAY) += keembay-evm.dtb diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_axe5_eagle.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_axe5_eagle.dts new file mode 100644 index 0000000000000000000000000000000000000000..bd5bd8f680c9ade49ac174108beed6828c5a925d --- /dev/null +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_axe5_eagle.dts @@ -0,0 +1,146 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2024, Arrow Electronics, Inc. + */ +#include "socfpga_agilex5.dtsi" + +/ { + model = "SoCFPGA Agilex5 Arrow AXE5-Eagle"; + compatible = "arrow,socfpga-agilex5-axe5-eagle", "intel,socfpga-agilex"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + hps0 { + label = "hps_led0"; + gpios = <&porta 6 GPIO_ACTIVE_HIGH>; + }; + + hps1 { + label = "hps_led1"; + gpios = <&porta 7 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + + hps_sw0 { + label = "hps_sw0"; + gpios = <&porta 10 0>; + linux,input-type = <5>; /* EV_SW */ + linux,code = <0x0>; + }; + + hps_sw1 { + label = "hps_sw1"; + gpios = <&porta 1 0>; + linux,input-type = <5>; /* EV_SW */ + linux,code = <0x0>; + }; + + hps_pb0 { + label = "hps_pb0"; + gpios = <&porta 8 1>; + linux,code = <187>; /* KEY_F17 */ + }; + + hps_pb1 { + label = "hps_pb1"; + gpios = <&porta 9 1>; + linux,code = <188>; /* KEY_F18 */ + }; + }; + + vdd: regulator-vdd { + compatible = "regulator-fixed"; + regulator-name = "fixed-supply"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + vdd_3_3: regulator-vdd { + compatible = "regulator-fixed"; + regulator-name = "fixed-supply"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; +}; + +&gmac2 { + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <&emac2_phy0>; + + max-frame-size = <9000>; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + emac2_phy0: ethernet-phy@1 { + reg = <0x1>; + adi,rx-internal-delay-ps = <2000>; + adi,tx-internal-delay-ps = <2000>; + }; + }; +}; + +&gpio0 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +&i2c1 { + status = "okay"; + + tca9544@70 { + compatible = "nxp,pca9544"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x70>; + status = "okay"; + }; +}; + +&osc1 { + clock-frequency = <25000000>; +}; + +&qspi { + status = "okay"; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "micron,mt25qu02g", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <100000000>; + + m25p,fast-read; + cdns,page-size = <256>; + cdns,block-size = <16>; + cdns,read-delay = <2>; + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <50>; + cdns,tchsh-ns = <4>; + cdns,tslch-ns = <4>; + }; +}; + +&uart0 { + status = "okay"; +};